* [PATCH v3 01/12] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M6
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 02/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing sdmmc cd pinctrl Joachim Eastwood via B4 Relay
` (10 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood, Krzysztof Kozlowski
From: Joachim Eastwood <joachim.eastwood@gmail.com>
Add device tree binding documentation for FriendlyElec NanoPi M6,
a single-board computer based on the Rockchip RK3588S SoC. Very
similar to NanoPi R6C and R6S.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 1a9dde18626d..6ba512964c25 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -344,9 +344,10 @@ properties:
- friendlyarm,nanopi-r5s
- const: rockchip,rk3568
- - description: FriendlyElec NanoPi R6 series boards
+ - description: FriendlyElec NanoPi6 series boards
items:
- enum:
+ - friendlyarm,nanopi-m6
- friendlyarm,nanopi-r6c
- friendlyarm,nanopi-r6s
- const: rockchip,rk3588s
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 02/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing sdmmc cd pinctrl
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 01/12] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M6 Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 03/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing pcie rst pinctrl Joachim Eastwood via B4 Relay
` (9 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
The cd (card detect) pin is used, but not reserved through pinctrl.
Fixes: 95147bb42bc1 ("arm64: dts: rockchip: Fix the SD card detection on NanoPi R6C/R6S")
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index 91b6eefd7abf..67e284a15c35 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -421,6 +421,10 @@ rtc_int: rtc-int {
};
sdmmc {
+ sdmmc_det_pin: sdmmc-det-pin {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
sd_s0_pwr: sd-s0-pwr {
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
@@ -496,6 +500,8 @@ &sdmmc {
no-mmc;
no-sdio;
sd-uhs-sdr104;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
vmmc-supply = <&vcc_3v3_sd_s0>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 03/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing pcie rst pinctrl
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 01/12] dt-bindings: arm: rockchip: add FriendlyElec NanoPi M6 Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 02/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing sdmmc cd pinctrl Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-14 13:02 ` Diederik de Haas
2026-07-13 20:30 ` [PATCH v3 04/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove pull up on rtc int pin Joachim Eastwood via B4 Relay
` (8 subsequent siblings)
11 siblings, 1 reply; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
The pins are used as reset-gpios but not reserved through pinctrl.
Fixes: f3c6526d6fb2 ("arm64: dts: rockchip: Convert dts files used as parents to dtsi files")
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index 67e284a15c35..8df6e1a21180 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -360,12 +360,16 @@ rgmii_phy1: ethernet-phy@1 {
};
&pcie2x1l1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_1_rst>;
reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
};
&pcie2x1l2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_2_rst>;
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
@@ -420,6 +424,16 @@ rtc_int: rtc-int {
};
};
+ pcie {
+ pcie2_1_rst: pcie2-1-rst {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie2_2_rst: pcie2-2-rst {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_det_pin: sdmmc-det-pin {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v3 03/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing pcie rst pinctrl
2026-07-13 20:30 ` [PATCH v3 03/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing pcie rst pinctrl Joachim Eastwood via B4 Relay
@ 2026-07-14 13:02 ` Diederik de Haas
0 siblings, 0 replies; 16+ messages in thread
From: Diederik de Haas @ 2026-07-14 13:02 UTC (permalink / raw)
To: Joachim Eastwood, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas
Hi Joachim,
On Mon Jul 13, 2026 at 10:30 PM CEST, Joachim Eastwood via B4 Relay wrote:
> From: Joachim Eastwood <joachim.eastwood@gmail.com>
>
> The pins are used as reset-gpios but not reserved through pinctrl.
>
> Fixes: f3c6526d6fb2 ("arm64: dts: rockchip: Convert dts files used as parents to dtsi files")
> Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
> index 67e284a15c35..8df6e1a21180 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
> @@ -360,12 +360,16 @@ rgmii_phy1: ethernet-phy@1 {
> };
>
> &pcie2x1l1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie2_1_rst>;
> reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
> vpcie3v3-supply = <&vcc_3v3_pcie20>;
> status = "okay";
> };
>
> &pcie2x1l2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie2_2_rst>;
> reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
> vpcie3v3-supply = <&vcc_3v3_pcie20>;
> status = "okay";
> @@ -420,6 +424,16 @@ rtc_int: rtc-int {
> };
> };
>
> + pcie {
> + pcie2_1_rst: pcie2-1-rst {
``pcie20x1_1_perstn_m2`` to match the schematic name?
> + rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie2_2_rst: pcie2-2-rst {
And ``pcie20x1_2_perstn_m0`` here?
Cheers,
Diederik
> + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> sdmmc {
> sdmmc_det_pin: sdmmc-det-pin {
> rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 04/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove pull up on rtc int pin
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (2 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 03/12] arm64: dts: rockchip: rk3588s-nanopi-r6: fix missing pcie rst pinctrl Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 05/12] arm64: dts: rockchip: rk3588s-nanopi-r6: pcie2x1l2: add clkreq Joachim Eastwood via B4 Relay
` (7 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
All boards in the RK3588S NanoPi familiy has a pull on the PCB for the
RTC interrupt pin. So there is no need to enable the pull-up in the SoC.
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index 8df6e1a21180..3f04b988ec29 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -420,7 +420,7 @@ hdmi0_tx_on_h: hdmi0-tx-on-h {
hym8563 {
rtc_int: rtc-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 05/12] arm64: dts: rockchip: rk3588s-nanopi-r6: pcie2x1l2: add clkreq
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (3 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 04/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove pull up on rtc int pin Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 06/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove always-on and boot-on from vdd_npu_s0 reg Joachim Eastwood via B4 Relay
` (6 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
The clkreq is present on the board, so hook it up in DT.
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index 3f04b988ec29..28966c292f5d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -369,7 +369,8 @@ &pcie2x1l1 {
&pcie2x1l2 {
pinctrl-names = "default";
- pinctrl-0 = <&pcie2_2_rst>;
+ pinctrl-0 = <&pcie2_2_rst>, <&pcie20x1m0_clkreqn>;
+ supports-clkreq;
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 06/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove always-on and boot-on from vdd_npu_s0 reg
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (4 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 05/12] arm64: dts: rockchip: rk3588s-nanopi-r6: pcie2x1l2: add clkreq Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 07/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove useless vcc_3v3_pcie20 Joachim Eastwood via B4 Relay
` (5 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
Since the NPU is hooked up in DT, the always-on and boot-on properties
on the regulator isn't needed anymore.
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index 28966c292f5d..8f8a1619787a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -314,8 +314,6 @@ vdd_npu_s0: regulator@42 {
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-ramp-delay = <2300>;
- regulator-boot-on;
- regulator-always-on;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 07/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove useless vcc_3v3_pcie20
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (5 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 06/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove always-on and boot-on from vdd_npu_s0 reg Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 08/12] arm64: dts: rockchip: rk3588s-nanopi-r6: add gmac1 add phy-supply Joachim Eastwood via B4 Relay
` (4 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood, Krzysztof Kozlowski
From: Joachim Eastwood <joachim.eastwood@gmail.com>
There is no separate regulator for boards with RTL8125BG MACs.
The power is only separated from VCC_3V3_S3 with a ferrite bead.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index 8f8a1619787a..b0a92f3174e2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -131,16 +131,6 @@ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
vin-supply = <&vcc_3v3_s3>;
};
- vcc_3v3_pcie20: regulator-vcc3v3-pcie20 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_3v3_pcie20";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
vcc5v0_usb: regulator-vcc5v0-usb {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_usb";
@@ -361,7 +351,7 @@ &pcie2x1l1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie2_1_rst>;
reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_pcie20>;
+ vpcie3v3-supply = <&vcc_3v3_s3>;
status = "okay";
};
@@ -370,7 +360,7 @@ &pcie2x1l2 {
pinctrl-0 = <&pcie2_2_rst>, <&pcie20x1m0_clkreqn>;
supports-clkreq;
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_pcie20>;
+ vpcie3v3-supply = <&vcc_3v3_s3>;
status = "okay";
};
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 08/12] arm64: dts: rockchip: rk3588s-nanopi-r6: add gmac1 add phy-supply
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (6 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 07/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove useless vcc_3v3_pcie20 Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:36 ` sashiko-bot
2026-07-13 20:30 ` [PATCH v3 09/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove bogus vcc5v0_usb regulator Joachim Eastwood via B4 Relay
` (3 subsequent siblings)
11 siblings, 1 reply; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
The RTL8211F Ethernet phy is power from the VCC_3V3_S3 rail.
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index b0a92f3174e2..aa074ecda050 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -210,6 +210,7 @@ &gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-rxid";
+ phy-supply = <&vcc_3v3_s3>;
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 09/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove bogus vcc5v0_usb regulator
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (7 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 08/12] arm64: dts: rockchip: rk3588s-nanopi-r6: add gmac1 add phy-supply Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 10/12] arm64: dts: rockchip: rk3588s-nanopi-r6: add comment to gmac phy-mode Joachim Eastwood via B4 Relay
` (2 subsequent siblings)
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
All USB regulators (power switches) are feed from the main vcc5v0
supply. There is no regulator or switch in between.
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index aa074ecda050..84fde8a669a7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -131,16 +131,6 @@ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
vin-supply = <&vcc_3v3_s3>;
};
- vcc5v0_usb: regulator-vcc5v0-usb {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_usb";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
compatible = "regulator-fixed";
enable-active-high;
@@ -150,7 +140,7 @@ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
regulator-name = "vcc5v0_usb_otg0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
+ vin-supply = <&vcc5v0_sys>;
};
vcc5v0_host_20: regulator-vcc5v0-host-20 {
@@ -162,7 +152,7 @@ vcc5v0_host_20: regulator-vcc5v0-host-20 {
regulator-name = "vcc5v0_host_20";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_usb>;
+ vin-supply = <&vcc5v0_sys>;
};
};
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 10/12] arm64: dts: rockchip: rk3588s-nanopi-r6: add comment to gmac phy-mode
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (8 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 09/12] arm64: dts: rockchip: rk3588s-nanopi-r6: remove bogus vcc5v0_usb regulator Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 11/12] arm64: dts: rockchip: rk3588s-nanopi-r6: refactor to support M6 boards Joachim Eastwood via B4 Relay
2026-07-13 20:30 ` [PATCH v3 12/12] arm64: dts: rockchip: add support for NanoPi M6 board Joachim Eastwood via B4 Relay
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
Add comment to explain rgmii-rxid phy-mode usage. Note that the actual
delay in ns is not known. The tx_delay value of 0x42 comes from vendor
DT.
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index 84fde8a669a7..d67a7f3e7f8b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -199,7 +199,7 @@ &cpu_l3 {
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-rxid";
+ phy-mode = "rgmii-rxid"; /* Vendor provided tx delay value below */
phy-supply = <&vcc_3v3_s3>;
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v3 11/12] arm64: dts: rockchip: rk3588s-nanopi-r6: refactor to support M6 boards
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (9 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 10/12] arm64: dts: rockchip: rk3588s-nanopi-r6: add comment to gmac phy-mode Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
2026-07-13 20:41 ` sashiko-bot
2026-07-13 20:30 ` [PATCH v3 12/12] arm64: dts: rockchip: add support for NanoPi M6 board Joachim Eastwood via B4 Relay
11 siblings, 1 reply; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
FriendlyElec NanoPi6 series consists of four distinct boards; R6S, R6C,
M6 and M6V2. Refactor FriendlyElec NanoPi R6 base dtsi in preparation
for adding NanoPi M6 support.
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
.../arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 792 +-------------------
arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi | 798 +++++++++++++++++++++
2 files changed, 799 insertions(+), 791 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
index d67a7f3e7f8b..ac9eebd2b790 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi
@@ -1,38 +1,8 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/dts-v1/;
-
-#include <dt-bindings/pinctrl/rockchip.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/soc/rockchip,vop2.h>
-#include "rk3588s.dtsi"
+#include "rk3588s-nanopi.dtsi"
/ {
- aliases {
- ethernet0 = &gmac1;
- mmc0 = &sdmmc;
- mmc1 = &sdhci;
- };
-
- chosen {
- stdout-path = "serial2:1500000n8";
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
- poll-interval = <100>;
-
- button-maskrom {
- label = "Maskrom";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <1800>;
- };
- };
-
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@@ -46,17 +16,6 @@ button-user {
};
};
- hdmi-con {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi0_out_con>;
- };
- };
- };
-
leds {
compatible = "gpio-leds";
@@ -89,48 +48,6 @@ lan2_led: led-3 {
};
};
- vcc5v0_sys: regulator-vcc5v0-sys {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0_sys";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc_1v1_nldo_s3";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1100000>;
- regulator-max-microvolt = <1100000>;
- vin-supply = <&vcc5v0_sys>;
- };
-
- vcc_3v3_s0: regulator-vcc-3v3-s0 {
- compatible = "regulator-fixed";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3_s0";
- vin-supply = <&vcc_3v3_s3>;
- };
-
- vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&sd_s0_pwr>;
- regulator-name = "vcc_3v3_sd_s0";
- regulator-boot-on;
- regulator-max-microvolt = <3000000>;
- regulator-min-microvolt = <3000000>;
- vin-supply = <&vcc_3v3_s3>;
- };
-
vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
compatible = "regulator-fixed";
enable-active-high;
@@ -142,225 +59,6 @@ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
-
- vcc5v0_host_20: regulator-vcc5v0-host-20 {
- compatible = "regulator-fixed";
- enable-active-high;
- gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&vcc5v0_host20_en>;
- regulator-name = "vcc5v0_host_20";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v0_sys>;
- };
-};
-
-&combphy0_ps {
- status = "okay";
-};
-
-&combphy2_psu {
- status = "okay";
-};
-
-&cpu_b0 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b1 {
- cpu-supply = <&vdd_cpu_big0_s0>;
-};
-
-&cpu_b2 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_b3 {
- cpu-supply = <&vdd_cpu_big1_s0>;
-};
-
-&cpu_l0 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l1 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l2 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&cpu_l3 {
- cpu-supply = <&vdd_cpu_lit_s0>;
-};
-
-&gmac1 {
- clock_in_out = "output";
- phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-rxid"; /* Vendor provided tx delay value below */
- phy-supply = <&vcc_3v3_s3>;
- pinctrl-0 = <&gmac1_miim
- &gmac1_tx_bus2
- &gmac1_rx_bus2
- &gmac1_rgmii_clk
- &gmac1_rgmii_bus>;
- pinctrl-names = "default";
- tx_delay = <0x42>;
- status = "okay";
-};
-
-&gpu {
- mali-supply = <&vdd_gpu_s0>;
- status = "okay";
-};
-
-&hdmi0 {
- frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
- pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
- &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&hdmi0_in {
- hdmi0_in_vp0: endpoint {
- remote-endpoint = <&vp0_out_hdmi0>;
- };
-};
-
-&hdmi0_out {
- hdmi0_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
-&hdmi0_sound {
- status = "okay";
-};
-
-&hdptxphy0 {
- status = "okay";
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0m2_xfer>;
- status = "okay";
-
- vdd_cpu_big0_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big0_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_big1_s0: regulator@43 {
- compatible = "rockchip,rk8603", "rockchip,rk8602";
- reg = <0x43>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_cpu_big1_s0";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <1050000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c2 {
- status = "okay";
-
- vdd_npu_s0: regulator@42 {
- compatible = "rockchip,rk8602";
- reg = <0x42>;
- fcs,suspend-voltage-selector = <1>;
- regulator-name = "vdd_npu_s0";
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <2300>;
- vin-supply = <&vcc5v0_sys>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-};
-
-&i2c6 {
- clock-frequency = <200000>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2c6m0_xfer>;
- status = "okay";
-
- hym8563: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "hym8563";
- pinctrl-names = "default";
- pinctrl-0 = <&rtc_int>;
- interrupt-parent = <&gpio0>;
- interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
- wakeup-source;
- };
-};
-
-&i2s5_8ch {
- status = "okay";
-};
-
-&mdio1 {
- rgmii_phy1: ethernet-phy@1 {
- compatible = "ethernet-phy-id001c.c916";
- reg = <0x1>;
- pinctrl-names = "default";
- pinctrl-0 = <&rtl8211f_rst>;
- reset-assert-us = <20000>;
- reset-deassert-us = <100000>;
- reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
- };
-};
-
-&pcie2x1l1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_1_rst>;
- reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_s3>;
- status = "okay";
-};
-
-&pcie2x1l2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_2_rst>, <&pcie20x1m0_clkreqn>;
- supports-clkreq;
- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
- vpcie3v3-supply = <&vcc_3v3_s3>;
- status = "okay";
-};
-
-&pd_gpu {
- domain-supply = <&vdd_gpu_s0>;
-};
-
-&pd_npu {
- domain-supply = <&vdd_npu_s0>;
};
&pinctrl {
@@ -392,497 +90,9 @@ lan2_led_pin: lan2-led-pin {
};
};
- hdmi {
- hdmi0_tx_on_h: hdmi0-tx-on-h {
- rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- hym8563 {
- rtc_int: rtc-int {
- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- pcie {
- pcie2_1_rst: pcie2-1-rst {
- rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- pcie2_2_rst: pcie2-2-rst {
- rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- sdmmc {
- sdmmc_det_pin: sdmmc-det-pin {
- rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
- };
-
- sd_s0_pwr: sd-s0-pwr {
- rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
- };
- };
-
usb {
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
-
- vcc5v0_host20_en: vcc5v0-host20-en {
- rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-
- rtl8211f {
- rtl8211f_rst: rtl8211f-rst {
- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
- };
- };
-};
-
-&rknn_core_0 {
- npu-supply = <&vdd_npu_s0>;
- sram-supply = <&vdd_npu_s0>;
- status = "okay";
-};
-
-&rknn_core_1 {
- npu-supply = <&vdd_npu_s0>;
- sram-supply = <&vdd_npu_s0>;
- status = "okay";
-};
-
-&rknn_core_2 {
- npu-supply = <&vdd_npu_s0>;
- sram-supply = <&vdd_npu_s0>;
- status = "okay";
-};
-
-&rknn_mmu_0 {
- status = "okay";
-};
-
-&rknn_mmu_1 {
- status = "okay";
-};
-
-&rknn_mmu_2 {
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&avcc_1v8_s0>;
- status = "okay";
-};
-
-&sdhci {
- bus-width = <8>;
- no-sdio;
- no-sd;
- non-removable;
- mmc-hs200-1_8v;
- status = "okay";
-};
-
-&sdmmc {
- bus-width = <4>;
- cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
- disable-wp;
- max-frequency = <150000000>;
- no-mmc;
- no-sdio;
- sd-uhs-sdr104;
- pinctrl-names = "default";
- pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
- vmmc-supply = <&vcc_3v3_sd_s0>;
- vqmmc-supply = <&vccio_sd_s0>;
- status = "okay";
-};
-
-&spi2 {
- status = "okay";
- assigned-clocks = <&cru CLK_SPI2>;
- assigned-clock-rates = <200000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
- num-cs = <1>;
-
- pmic@0 {
- compatible = "rockchip,rk806";
- spi-max-frequency = <1000000>;
- reg = <0x0>;
-
- interrupt-parent = <&gpio0>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
- <&rk806_dvs2_null>, <&rk806_dvs3_null>;
-
- system-power-controller;
-
- vcc1-supply = <&vcc5v0_sys>;
- vcc2-supply = <&vcc5v0_sys>;
- vcc3-supply = <&vcc5v0_sys>;
- vcc4-supply = <&vcc5v0_sys>;
- vcc5-supply = <&vcc5v0_sys>;
- vcc6-supply = <&vcc5v0_sys>;
- vcc7-supply = <&vcc5v0_sys>;
- vcc8-supply = <&vcc5v0_sys>;
- vcc9-supply = <&vcc5v0_sys>;
- vcc10-supply = <&vcc5v0_sys>;
- vcc11-supply = <&vcc_2v0_pldo_s3>;
- vcc12-supply = <&vcc5v0_sys>;
- vcc13-supply = <&vcc_1v1_nldo_s3>;
- vcc14-supply = <&vcc_1v1_nldo_s3>;
- vcca-supply = <&vcc5v0_sys>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl1";
- function = "pin_fun0";
- };
-
- rk806_dvs2_null: dvs2-null-pins {
- pins = "gpio_pwrctrl2";
- function = "pin_fun0";
- };
-
- rk806_dvs3_null: dvs3-null-pins {
- pins = "gpio_pwrctrl3";
- function = "pin_fun0";
- };
-
- regulators {
- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_gpu_s0";
- regulator-enable-ramp-delay = <400>;
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_cpu_lit_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_log_s0: dcdc-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <750000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_log_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <550000>;
- regulator-max-microvolt = <950000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_vdenc_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_ddr_s0: dcdc-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <675000>;
- regulator-max-microvolt = <900000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- vdd2_ddr_s3: dcdc-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vdd2_ddr_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vcc_2v0_pldo_s3: dcdc-reg7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2000000>;
- regulator-max-microvolt = <2000000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vdd_2v0_pldo_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <2000000>;
- };
- };
-
- vcc_3v3_s3: dcdc-reg8 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_3v3_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vddq_ddr_s0: dcdc-reg9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "vddq_ddr_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_1v8_s3: dcdc-reg10 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avcc_1v8_s0: pldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "avcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vcc_1v8_s0: pldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vcc_1v8_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- avdd_1v2_s0: pldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- regulator-name = "avdd_1v2_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avcc_3v3_s0: pldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "avcc_3v3_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vccio_sd_s0: pldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-ramp-delay = <12500>;
- regulator-name = "vccio_sd_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- pldo6_s3: pldo-reg6 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "pldo6_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vdd_0v75_s3: nldo-reg1 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s3";
-
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <750000>;
- };
- };
-
- avdd_ddr_pll_s0: nldo-reg2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "avdd_ddr_pll_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- regulator-suspend-microvolt = <850000>;
- };
- };
-
- avdd_0v75_s0: nldo-reg3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "avdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- avdd_0v85_s0: nldo-reg4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <850000>;
- regulator-name = "avdd_0v85_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vdd_0v75_s0: nldo-reg5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <750000>;
- regulator-max-microvolt = <750000>;
- regulator-name = "vdd_0v75_s0";
-
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&tsadc {
- status = "okay";
-};
-
-&u2phy0 {
- status = "okay";
-};
-
-&u2phy0_otg {
- phy-supply = <&vcc5v0_usb_otg0>;
- status = "okay";
-};
-
-&u2phy2 {
- status = "okay";
-};
-
-&u2phy2_host {
- phy-supply = <&vcc5v0_host_20>;
- status = "okay";
-};
-
-&uart2 {
- pinctrl-0 = <&uart2m0_xfer>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&usb_host0_ehci {
- status = "okay";
-};
-
-&usb_host0_ohci {
- status = "okay";
-};
-
-&usb_host0_xhci {
- dr_mode = "host";
- status = "okay";
-};
-
-&usbdp_phy0 {
- status = "okay";
-};
-
-&vop {
- status = "okay";
-};
-
-&vop_mmu {
- status = "okay";
-};
-
-&vp0 {
- vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
- reg = <ROCKCHIP_VOP2_EP_HDMI0>;
- remote-endpoint = <&hdmi0_in_vp0>;
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
new file mode 100644
index 000000000000..a8e532ad8b7a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
@@ -0,0 +1,798 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3588s.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &gmac1;
+ mmc0 = &sdmmc;
+ mmc1 = &sdhci;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "Maskrom";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <1800>;
+ };
+ };
+
+ hdmi-con {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi0_out_con>;
+ };
+ };
+ };
+
+ vcc5v0_sys: regulator-vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_3v3_s0: regulator-vcc-3v3-s0 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s0";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sd_s0_pwr>;
+ regulator-name = "vcc_3v3_sd_s0";
+ regulator-boot-on;
+ regulator-max-microvolt = <3000000>;
+ regulator-min-microvolt = <3000000>;
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ vcc5v0_host_20: regulator-vcc5v0-host-20 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host20_en>;
+ regulator-name = "vcc5v0_host_20";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii-rxid"; /* Vendor provided tx delay value below */
+ phy-supply = <&vcc_3v3_s3>;
+ pinctrl-0 = <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus>;
+ pinctrl-names = "default";
+ tx_delay = <0x42>;
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
+&hdmi0 {
+ frl-enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
+ pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+ &hdmim0_tx0_scl &hdmim0_tx0_sda &hdmi0_tx_on_h>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&hdmi0_in {
+ hdmi0_in_vp0: endpoint {
+ remote-endpoint = <&vp0_out_hdmi0>;
+ };
+};
+
+&hdmi0_out {
+ hdmi0_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&hdmi0_sound {
+ status = "okay";
+};
+
+&hdptxphy0 {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_npu_s0";
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <2300>;
+ regulator-boot-on;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c6 {
+ clock-frequency = <200000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c6m0_xfer>;
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_int>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+ wakeup-source;
+ };
+};
+
+&i2s5_8ch {
+ status = "okay";
+};
+
+&mdio1 {
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8211f_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pcie2x1l1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_1_rst>;
+ reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3_s3>;
+ status = "okay";
+};
+
+&pcie2x1l2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_2_rst>, <&pcie20x1m0_clkreqn>;
+ supports-clkreq;
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3_s3>;
+ status = "okay";
+};
+
+&pd_gpu {
+ domain-supply = <&vdd_gpu_s0>;
+};
+
+&pd_npu {
+ domain-supply = <&vdd_npu_s0>;
+};
+
+&pinctrl {
+ hdmi {
+ hdmi0_tx_on_h: hdmi0-tx-on-h {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ hym8563 {
+ rtc_int: rtc-int {
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie2_1_rst: pcie2-1-rst {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie2_2_rst: pcie2-2-rst {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdmmc {
+ sdmmc_det_pin: sdmmc-det-pin {
+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ sd_s0_pwr: sd-s0-pwr {
+ rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ usb {
+ vcc5v0_host20_en: vcc5v0-host20-en {
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ rtl8211f {
+ rtl8211f_rst: rtl8211f-rst {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&rknn_core_0 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_1 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_2 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_mmu_0 {
+ status = "okay";
+};
+
+&rknn_mmu_1 {
+ status = "okay";
+};
+
+&rknn_mmu_2 {
+ status = "okay";
+};
+
+&saradc {
+ vref-supply = <&avcc_1v8_s0>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ max-frequency = <150000000>;
+ no-mmc;
+ no-sdio;
+ sd-uhs-sdr104;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
+ vmmc-supply = <&vcc_3v3_sd_s0>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
+&spi2 {
+ status = "okay";
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ num-cs = <1>;
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ spi-max-frequency = <1000000>;
+ reg = <0x0>;
+
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+
+ system-power-controller;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_log_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_vdenc_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_2v0_pldo_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "avcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "avdd_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ avcc_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "avcc_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ avdd_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "avdd_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "avdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ avdd_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "avdd_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ phy-supply = <&vcc5v0_usb_otg0>;
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_host_20>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ status = "okay";
+};
+
+&vop {
+ status = "okay";
+};
+
+&vop_mmu {
+ status = "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint = <&hdmi0_in_vp0>;
+ };
+};
--
2.55.0
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v3 11/12] arm64: dts: rockchip: rk3588s-nanopi-r6: refactor to support M6 boards
2026-07-13 20:30 ` [PATCH v3 11/12] arm64: dts: rockchip: rk3588s-nanopi-r6: refactor to support M6 boards Joachim Eastwood via B4 Relay
@ 2026-07-13 20:41 ` sashiko-bot
0 siblings, 0 replies; 16+ messages in thread
From: sashiko-bot @ 2026-07-13 20:41 UTC (permalink / raw)
To: Joachim Eastwood; +Cc: conor+dt, devicetree, robh
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Unintentional restoration of `regulator-boot-on` for `vdd_npu_s0` during refactoring.
- [Low] Dangling phandle reference `&vcc5v0_usb_otg0` in the common `.dtsi` file.
--
--- Patch [11]: [PATCH v3 11/12] arm64: dts: rockchip: rk3588s-nanopi-r6: refactor to support M6 boards ---
commit 056adff75ec08989b96f09adc0efff6c3a5d662f
Author: Joachim Eastwood <joachim.eastwood@gmail.com>
arm64: dts: rockchip: rk3588s-nanopi-r6: refactor to support M6 boards
FriendlyElec NanoPi6 series consists of four distinct boards; R6S, R6C,
M6 and M6V2. Refactor FriendlyElec NanoPi R6 base dtsi in preparation
for adding NanoPi M6 support.
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
> new file mode 100644
> index 0000000000000..a8e532ad8b7a8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi.dtsi
[ ... ]
> +&i2c2 {
> + status = "okay";
> +
> + vdd_npu_s0: regulator@42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_npu_s0";
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <2300>;
> + regulator-boot-on;
[Severity: Medium]
Is the addition of regulator-boot-on here intentional?
This appears to accidentally revert a prior fix that removed the boot-on
property for vdd_npu_s0 to save power during early boot.
> + vin-supply = <&vcc5v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
[ ... ]
> +&u2phy0_otg {
> + phy-supply = <&vcc5v0_usb_otg0>;
[Severity: Low]
Does this create a dangling phandle reference in the common dtsi file?
Since the vcc5v0_usb_otg0 regulator was left in the board-specific
rk3588s-nanopi-r6.dtsi file, it looks like compiling a new board (like the M6)
that includes this common dtsi will fail to build if it doesn't also define a
regulator with this exact label.
> + status = "okay";
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713-nanopi-m6-v3-0-227567ffc5dc@gmail.com?part=11
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 12/12] arm64: dts: rockchip: add support for NanoPi M6 board
2026-07-13 20:30 [PATCH v3 00/12] arm64: dts: rockchip: Add NanoPi M6 board Joachim Eastwood via B4 Relay
` (10 preceding siblings ...)
2026-07-13 20:30 ` [PATCH v3 11/12] arm64: dts: rockchip: rk3588s-nanopi-r6: refactor to support M6 boards Joachim Eastwood via B4 Relay
@ 2026-07-13 20:30 ` Joachim Eastwood via B4 Relay
11 siblings, 0 replies; 16+ messages in thread
From: Joachim Eastwood via B4 Relay @ 2026-07-13 20:30 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, diederik, jonas,
Joachim Eastwood
From: Joachim Eastwood <joachim.eastwood@gmail.com>
The NanoPi M6 (V1) board shares most of the features of the R6 boards.
Main differences:
* M.2 M-key slot with PCIe (Also present on R6C)
* M.2 E-key slot with PCIe and USB (from hub)
* 1 additional USB 2.0 port from an on-board USB hub
* RT5616 audio CODEC
Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi | 142 +++++++++++++++++++++
.../boot/dts/rockchip/rk3588s-nanopi-m6v1.dts | 67 ++++++++++
3 files changed, 210 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 761d82b4f4f2..55a1ec8309df 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -218,6 +218,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-gameforce-ace.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-m6v1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-odroid-m2.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi
new file mode 100644
index 000000000000..bb2ef1f66d2a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi
@@ -0,0 +1,142 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588s-nanopi.dtsi"
+
+/ {
+ adc-keys-1 {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-maskrom {
+ label = "Recovery";
+ linux,code = <KEY_VENDOR>;
+ press-threshold-microvolt = <1800>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ sys_led: led-0 {
+ label = "sys_led";
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sys_led_pin>;
+ };
+
+ user_led: led-1 {
+ label = "user_led";
+ gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_led_pin>;
+ };
+ };
+
+ vcc_3v3_pcie: regulator-vcc-3v3-pcie {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_2_pwren>;
+ regulator-name = "vcc_3v3_pcie";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&typec5v_pwren>;
+ regulator-name = "vcc5v0_usb_otg0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vdd_mpcie_3v3: regulator-vdd-mpcie-3v3 {
+ compatible = "regulator-fixed";
+ /* Controlled by EXT_EN on RK806 */
+ regulator-name = "vdd_mpcie_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&i2c7 {
+ clock-frequency = <200000>;
+ status = "okay";
+};
+
+&i2s0_8ch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status = "okay";
+};
+
+&pcie2x1l1 { /* M.2 E-key 2230 */
+ vpcie3v3-supply = <&vdd_mpcie_3v3>;
+};
+
+&pcie2x1l2 { /* M.2 M-key 2280 */
+ pinctrl-0 = <&pcie2_2_rst>, <&pcie20x1m0_clkreqn>, <&pcie20x1m0_waken>;
+ vpcie3v3-supply = <&vcc_3v3_pcie>;
+};
+
+&pinctrl {
+ gpio-leds {
+ sys_led_pin: sys-led-pin {
+ rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ user_led_pin: user-led-pin {
+ rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ headphone {
+ hp_det: hp-det {
+ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie2_2_pwren: pcie2-2-pwren {
+ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ typec5v_pwren: typec5v-pwren {
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_host_20>;
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v1.dts b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v1.dts
new file mode 100644
index 000000000000..f981973c96ac
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6v1.dts
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3588s-nanopi-m6.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi M6";
+ compatible = "friendlyarm,nanopi-m6", "rockchip,rk3588s";
+
+ sound {
+ compatible = "simple-audio-card";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_det>;
+
+ simple-audio-card,name = "realtek,rt5616-codec";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,mclk-fs = <256>;
+
+ simple-audio-card,hp-det-gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
+
+ simple-audio-card,widgets =
+ "Headphone", "Headphones",
+ "Microphone", "Microphone Jack";
+ simple-audio-card,routing =
+ "Headphones", "HPOL",
+ "Headphones", "HPOR",
+ "MIC1", "Microphone Jack",
+ "Microphone Jack", "micbias1";
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s0_8ch>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&rt5616>;
+ };
+ };
+};
+
+&i2c7 {
+ rt5616: codec@1b {
+ compatible = "realtek,rt5616";
+ reg = <0x1b>;
+ clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT_TO_IO>;
+ assigned-clock-rates = <12288000>;
+
+ port {
+ rt5616_p0: endpoint {
+ remote-endpoint = <&i2s0_8ch_p0>;
+ };
+ };
+ };
+};
+
+&i2s0_8ch {
+ port {
+ i2s0_8ch_p0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&rt5616_p0>;
+ };
+ };
+};
--
2.55.0
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