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* [PATCH v3] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
@ 2026-07-19 18:34 Udaya Kiran Challa
  2026-07-19 18:42 ` sashiko-bot
  0 siblings, 1 reply; 2+ messages in thread
From: Udaya Kiran Challa @ 2026-07-19 18:34 UTC (permalink / raw)
  To: linusw, robh, krzk+dt, conor+dt
  Cc: skhan, me, linux-gpio, devicetree, linux-kernel,
	Udaya Kiran Challa

Convert Microchip PIC32 Pin Controller devicetree binding
from legacy text format to DT schema.

Signed-off-by: Udaya Kiran Challa <challauday369@gmail.com>
---
Changelog:
Changes since v2:
- Add container node for grouped pin configuration sub-nodes
- Correct regex patterns of direct and nested child nodes
- Fix interrupts values in uart2 example

Link to v2:https://lore.kernel.org/all/20260707144223.120417-1-challauday369@gmail.com/

Changes since v1:
- Add interrupts and clocks to uart2 example to satisfy uart schema validation
- Corect regex patterns to accept standard DT node naming conventions
- Add function property to top-level pin configuration nodes
- Remove restrictive enum from function property to support all mux functions

Link to v1:https://lore.kernel.org/all/20260705132521.159522-1-challauday369@gmail.com/
---
 .../pinctrl/microchip,pic32-pinctrl.txt       |  60 -------
 .../pinctrl/microchip,pic32mzda-pinctrl.yaml  | 153 ++++++++++++++++++
 2 files changed, 153 insertions(+), 60 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
 create mode 100644 Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
deleted file mode 100644
index 51efd2085113..000000000000
--- a/Documentation/devicetree/bindings/pinctrl/microchip,pic32-pinctrl.txt
+++ /dev/null
@@ -1,60 +0,0 @@
-* Microchip PIC32 Pin Controller
-
-Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
-../interrupt-controller/interrupts.txt for generic information regarding
-pin controller, GPIO, and interrupt bindings.
-
-PIC32 'pin configuration node' is a node of a group of pins which can be
-used for a specific device or function. This node represents configurations of
-pins, optional function, and optional mux related configuration.
-
-Required properties for pin controller node:
- - compatible: "microchip,pic32mada-pinctrl"
- - reg: Address range of the pinctrl registers.
- - clocks: Clock specifier (see clock bindings for details)
-
-Required properties for pin configuration sub-nodes:
- - pins: List of pins to which the configuration applies.
-
-Optional properties for pin configuration sub-nodes:
-----------------------------------------------------
- - function: Mux function for the specified pins.
- - bias-pull-up: Enable weak pull-up.
- - bias-pull-down: Enable weak pull-down.
- - input-enable: Set the pin as an input.
- - output-low: Set the pin as an output level low.
- - output-high: Set the pin as an output level high.
- - microchip,digital: Enable digital I/O.
- - microchip,analog: Enable analog I/O.
-
-Example:
-
-pic32_pinctrl: pinctrl@1f801400{
-	#address-cells = <1>;
-	#size-cells = <1>;
-	compatible = "microchip,pic32mzda-pinctrl";
-	reg = <0x1f801400 0x400>;
-	clocks = <&rootclk PB1CLK>;
-
-	pinctrl_uart2: pinctrl_uart2 {
-		uart2-tx {
-			pins = "G9";
-			function = "U2TX";
-			microchip,digital;
-			output-low;
-		};
-		uart2-rx {
-			pins = "B0";
-			function = "U2RX";
-			microchip,digital;
-			input-enable;
-		};
-	};
-};
-
-uart2: serial@1f822200 {
-	compatible = "microchip,pic32mzda-uart";
-	reg = <0x1f822200 0x50>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart2>;
-};
diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
new file mode 100644
index 000000000000..7a36e5ff61dd
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
@@ -0,0 +1,153 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/microchip,pic32mzda-pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip PIC32 Pin Controller
+
+maintainers:
+  - Linus Walleij <linusw@kernel.org>
+
+description: |
+  PIC32 pin configuration node is a node of a group of pins which can be used
+  for a specific device or function. This node represents configurations of
+  pins, optional function, and optional mux related configuration.
+
+properties:
+  compatible:
+    const: microchip,pic32mzda-pinctrl
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+patternProperties:
+  '^(?!pinctrl_)[a-z]+[0-9]*_[a-z0-9_]+$':
+    type: object
+    $ref: pinmux-node.yaml#
+
+    properties:
+      pins:
+        description: |
+          List of pins to which the configuration applies.
+        items:
+          type: string
+        minItems: 1
+
+      function: true
+
+      bias-pull-up: true
+      bias-pull-down: true
+      input-enable: true
+      output-low: true
+      output-high: true
+
+      microchip,digital:
+        description: Enable digital I/O.
+        type: boolean
+
+      microchip,analog:
+        description: Enable analog I/O.
+        type: boolean
+
+    required:
+      - pins
+
+    unevaluatedProperties: false
+
+  '^pinctrl_[a-z0-9_-]+$|^[a-z]+[0-9]+-[0-9]+$':
+    type: object
+    description: |
+      Container node for grouped pin configuration sub-nodes.
+
+    patternProperties:
+      '^[a-z]+[0-9]+-[a-z]+$':
+        type: object
+        $ref: pinmux-node.yaml#
+
+        properties:
+          pins:
+            description: |
+              List of pins to which the configuration applies.
+            items:
+              type: string
+            minItems: 1
+
+          function: true
+
+          bias-pull-up: true
+          bias-pull-down: true
+          input-enable: true
+          output-low: true
+          output-high: true
+
+          microchip,digital:
+            description: Enable digital I/O.
+            type: boolean
+
+          microchip,analog:
+            description: Enable analog I/O.
+            type: boolean
+
+        required:
+          - pins
+
+        unevaluatedProperties: false
+
+    unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/microchip,pic32-clock.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    pic32_pinctrl: pinctrl@1f801400 {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "microchip,pic32mzda-pinctrl";
+        reg = <0x1f801400 0x400>;
+        clocks = <&rootclk PB1CLK>;
+
+        pinctrl_uart2: pinctrl_uart2 {
+            uart2-tx {
+                pins = "G9";
+                function = "U2TX";
+                microchip,digital;
+                output-low;
+            };
+
+            uart2-rx {
+                pins = "B0";
+                function = "U2RX";
+                microchip,digital;
+                input-enable;
+            };
+        };
+    };
+
+    uart2: serial@1f822200 {
+        compatible = "microchip,pic32mzda-uart";
+        reg = <0x1f822200 0x50>;
+        interrupts = <145 IRQ_TYPE_LEVEL_HIGH>,
+                     <146 IRQ_TYPE_LEVEL_HIGH>,
+                     <147 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&rootclk PB2CLK>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_uart2>;
+    };
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v3] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
  2026-07-19 18:34 [PATCH v3] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema Udaya Kiran Challa
@ 2026-07-19 18:42 ` sashiko-bot
  0 siblings, 0 replies; 2+ messages in thread
From: sashiko-bot @ 2026-07-19 18:42 UTC (permalink / raw)
  To: Udaya Kiran Challa; +Cc: conor+dt, robh, devicetree

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The regular expressions used for matching pin configuration nodes contain invalid syntax (negative lookaheads unsupported by the RE2 engine) and overly restrictive patterns that reject standard Device Tree node naming conventions.
--

--- Patch [1]: [PATCH v3] dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema ---
commit e4c63aad2379e3c473b66cca58b14faae98c368f
Author: Udaya Kiran Challa <challauday369@gmail.com>

dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema

Convert Microchip PIC32 Pin Controller devicetree binding
from legacy text format to DT schema.

> diff --git a/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
> new file mode 100644
> index 0000000000000..7a36e5ff61ddf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/microchip,pic32mzda-pinctrl.yaml
> @@ -0,0 +1,153 @@

[ ... ]

> +  '#size-cells':
> +    const: 1
> +
> +patternProperties:
> +  '^(?!pinctrl_)[a-z]+[0-9]*_[a-z0-9_]+$':

[Severity: Medium]
Will this negative lookahead cause a schema compilation error during
make dt_binding_check?

The dt-schema tool requires RE2-compatible regexes, which do not support
negative lookaheads. Additionally, strictly requiring an underscore in the
node name violates standard Device Tree node naming conventions.

> +    type: object
> +    $ref: pinmux-node.yaml#

[ ... ]

> +    unevaluatedProperties: false
> +
> +  '^pinctrl_[a-z0-9_-]+$|^[a-z]+[0-9]+-[0-9]+$':

[Severity: Medium]
Is this pattern too restrictive for container nodes?

By requiring a pinctrl_ prefix or strictly ending in a number, this pattern
rejects valid generic node names like uart-pins, which could break schema
validation for conformant device trees.

> +    type: object
> +    description: |
> +      Container node for grouped pin configuration sub-nodes.
> +
> +    patternProperties:
> +      '^[a-z]+[0-9]+-[a-z]+$':

[Severity: Medium]
Does this child sub-node pattern improperly reject standard single-instance
interfaces?

The regex requires a number before a hyphen, which means valid generic names
like spi-mosi will fail to match.

> +        type: object
> +        $ref: pinmux-node.yaml#

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260719183431.124061-1-challauday369@gmail.com?part=1

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