From: sashiko-bot@kernel.org
To: dongxuyang@eswincomputing.com
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v13 2/5] dt-bindings: pwm: dwc: Add eswin compatible
Date: Fri, 24 Jul 2026 08:56:39 +0000 [thread overview]
Message-ID: <20260724085639.A7E841F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260724084320.1586-1-dongxuyang@eswincomputing.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Strict positional constraint on independent optional resets prevents using only the second reset ('timer').
--
--- Patch [2]: [PATCH v13 2/5] dt-bindings: pwm: dwc: Add eswin compatible ---
commit 5ab967af16c3b9f7a1cfa80ab82369dd37f82452
Author: Xuyang Dong <dongxuyang@eswincomputing.com>
dt-bindings: pwm: dwc: Add eswin compatible
This commit adds the eswin,eic7700-pwm compatible string to the DesignWare
PWM IP binding. It constrains the resets property for this specific hardware
variant to exactly one combined reset line, and modifies the base reset
properties to require at least one reset.
> diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> index 1f9d72f9f3590..c65174e2045a7 100644
> --- a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
> +++ b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml
[ ... ]
> @@ -44,11 +43,13 @@ properties:
> - const: timer
>
> resets:
> + minItems: 1
> items:
> - description: Interface bus (presetn) reset
> - description: PWM timer logic (timer_N_resetn) reset
>
> reset-names:
> + minItems: 1
> items:
> - const: bus
> - const: timer
[Severity: Medium]
Does this strict positional constraint on reset-names prevent a generic
device from using only the second reset?
The generic compatible allows up to two independent resets, meaning any
combination should be valid. However, if a platform wires only the
independent timer reset and provides a single element array with just
"timer", the dt-schema validates it sequentially against the items list.
Because it expects the first position to be "bus", providing just the
timer reset will result in a validation error for an otherwise valid
hardware configuration.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260724084153.1473-1-dongxuyang@eswincomputing.com?part=2
next prev parent reply other threads:[~2026-07-24 8:56 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-24 8:41 [PATCH v13 0/5] Update designware pwm driver dongxuyang
2026-07-24 8:43 ` [PATCH v13 1/5] dt-bindings: pwm: dwc: Document optional resets property dongxuyang
2026-07-24 8:53 ` sashiko-bot
2026-07-24 8:43 ` [PATCH v13 2/5] dt-bindings: pwm: dwc: Add eswin compatible dongxuyang
2026-07-24 8:56 ` sashiko-bot [this message]
2026-07-24 8:43 ` [PATCH v13 3/5] pwm: dwc: add of/platform support dongxuyang
2026-07-24 8:57 ` sashiko-bot
2026-07-24 8:44 ` [PATCH v13 4/5] dt-bindings: timer: dwc: Update resets property items dongxuyang
2026-07-24 8:55 ` sashiko-bot
2026-07-24 8:44 ` [PATCH v13 5/5] clocksource: dw_apb_timer: Use reset array API to handle all resets dongxuyang
2026-07-24 8:55 ` sashiko-bot
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