[PATCH] arm64: tegra: Add EL2 virtual timer interrupt for Tegra194

[PATCH] arm64: tegra: Add EL2 virtual timer interrupt for Tegra194

[Jon Hunter]

Commit d87773de9efe ("clocksource/drivers/arm_arch_timer: Default to EL2
virtual timer when running VHE") updated the ARM arch timer driver to
use the virtual timer by default if the CPU is running at EL2 with VHE
enabled. If the CPU is running at EL2 with VHE enabled but there is no
interrupt provided for the virtual timer, then the following warning is
displayed:

 arch_timer: [Firmware Bug]: VHE-capable CPU without EL2 virtual timer
  interrupt

This warning is observed on Tegra194 platforms. Tegra194 SoC includes
NVIDIA Carmel ARM v8.2 CPUs and support an EL2 virtual timer. Fix the
above warning by adding the PPI for the EL2 virtual timer interrupt for
Tegra194.

Fixes: 5425fb15d8ee ("arm64: tegra: Add Tegra194 chip device tree")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index eb7e3c666df6..5e510f77b538 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -3176,6 +3176,8 @@ timer {
 			     <GIC_PPI 11
 				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 			     <GIC_PPI 10
+				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 15
 				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 		interrupt-parent = <&gic>;
 		always-on;
-- 
2.43.0

Re: [PATCH] arm64: tegra: Add EL2 virtual timer interrupt for Tegra194

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly added EL2 virtual timer interrupt specifies GIC_PPI 15, but the ARM architectural standard for the EL2 virtual timer is GIC_PPI 12. If the Carmel CPU hardware actually triggers PPI 12, the interrupt will be misrouted, leading to timer stalls when running in VHE mode.
--

--- Patch [1]: [PATCH] arm64: tegra: Add EL2 virtual timer interrupt for Tegra194 ---
commit c19a2a2ae7a6be54be1db9d69e5e65ad5a1e8682
Author: Jon Hunter <jonathanh@nvidia.com>
arm64: tegra: Add EL2 virtual timer interrupt for Tegra194

This commit adds the EL2 virtual timer interrupt to the Tegra194 device tree
to resolve a warning generated when running on VHE-capable CPUs. It updates
the timer node by appending a new GIC_PPI definition for the virtual timer.

> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -3176,6 +3176,8 @@ timer {
>  			     <GIC_PPI 11
>  				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>  			     <GIC_PPI 10
> +				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 15

[Severity: High]
Is this the correct interrupt number for the EL2 virtual timer on this
platform? The standard ARM architecture definition for the EL2 virtual timer
is GIC_PPI 12, whereas this specifies GIC_PPI 15.

If the Carmel CPU hardware actually triggers PPI 12, could specifying 15 cause
the interrupt to be misrouted and lead to timer stalls when running in VHE
mode?

>  				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>  		interrupt-parent = <&gic>;
>  		always-on;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260728155059.200363-1-jonathanh@nvidia.com?part=1