From: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
To: Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Andi Shyti <andi.shyti@kernel.org>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-i2c@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Min Lin <linmin@eswincomputing.com>
Cc: Yulin Lu <luyulin@eswincomputing.com>,
Samuel Holland <samuel.holland@sifive.com>,
Darshan Prajapati <darshan.prajapati@einfochips.com>,
Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>,
Pritesh Patel <pritesh.patel@einfochips.com>
Subject: [PATCH v3 7/8] riscv: dts: eswin: add I2C controller support
Date: Tue, 4 Aug 2026 16:14:30 +0530 [thread overview]
Message-ID: <20260804104431.1391839-8-pinkesh.vaghela@einfochips.com> (raw)
In-Reply-To: <20260804104431.1391839-1-pinkesh.vaghela@einfochips.com>
From: Pritesh Patel <pritesh.patel@einfochips.com>
Add I2C nodes for EIC7700 SoC.
Also add nodes for corresponding slave devices in dts file and
enable them for HiFive Premier P550 board
Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com>
Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
---
.../dts/eswin/eic7700-hifive-premier-p550.dts | 56 +++++++
arch/riscv/boot/dts/eswin/eic7700.dtsi | 156 ++++++++++++++++++
2 files changed, 212 insertions(+)
diff --git a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
index 3101fd90d171..50c15e08a57f 100644
--- a/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
+++ b/arch/riscv/boot/dts/eswin/eic7700-hifive-premier-p550.dts
@@ -130,6 +130,62 @@ &gpio111_pins {
input-disable;
};
+&aon_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ eeprom@50 {
+ compatible = "atmel,24c02";
+ reg = <0x50>;
+ };
+};
+
+&aon_i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+
+ adc@10 {
+ compatible = "microchip,pac1934";
+ reg = <0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ channel@1 {
+ reg = <0x1>;
+ shunt-resistor-micro-ohms = <1000>;
+ label = "VDD_SOM";
+ };
+
+ channel@2 {
+ reg = <0x2>;
+ shunt-resistor-micro-ohms = <1000>;
+ label = "VDD_SOC";
+ };
+
+ channel@3 {
+ reg = <0x3>;
+ shunt-resistor-micro-ohms = <1000>;
+ label = "VDD_CPU";
+ };
+
+ channel@4 {
+ reg = <0x4>;
+ shunt-resistor-micro-ohms = <1000>;
+ label = "VDD_LPDDR";
+ };
+ };
+
+ power-sensor@44 {
+ compatible = "ti,ina226";
+ reg = <0x44>;
+ #io-channel-cells = <1>;
+ label = "sys_power";
+ shunt-resistor = <1000>;
+ };
+};
+
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_pins>, <&gpio5_pins>, <&gpio11_pins>,
diff --git a/arch/riscv/boot/dts/eswin/eic7700.dtsi b/arch/riscv/boot/dts/eswin/eic7700.dtsi
index 771a88645d83..c13432d14504 100644
--- a/arch/riscv/boot/dts/eswin/eic7700.dtsi
+++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi
@@ -315,6 +315,162 @@ uart4: serial@50940000 {
status = "disabled";
};
+ i2c0: i2c@50950000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x50950000 0x0 0x8000>;
+ interrupts = <105>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C0_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@50960000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x50960000 0x0 0x8000>;
+ interrupts = <106>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C1_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@50970000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x50970000 0x0 0x8000>;
+ interrupts = <107>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C2_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@50980000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x50980000 0x0 0x8000>;
+ interrupts = <108>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C3_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@50990000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x50990000 0x0 0x8000>;
+ interrupts = <109>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C4_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@509a0000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x509a0000 0x0 0x8000>;
+ interrupts = <110>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C5_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@509b0000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x509b0000 0x0 0x8000>;
+ interrupts = <111>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C6_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c7: i2c@509c0000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x509c0000 0x0 0x8000>;
+ interrupts = <112>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C7_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c8: i2c@509d0000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x509d0000 0x0 0x8000>;
+ interrupts = <113>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C8_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c9: i2c@509e0000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x509e0000 0x0 0x8000>;
+ interrupts = <114>;
+ clocks = <&clk EIC7700_CLK_GATE_LSP_I2C9_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_I2C9>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ aon_i2c0: i2c@51830000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x51830000 0x0 0x8000>;
+ interrupts = <290>;
+ clocks = <&clk EIC7700_CLK_GATE_AON_I2C0_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_ANO0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ aon_i2c1: i2c@51838000 {
+ compatible = "eswin,eic7700-i2c", "snps,designware-i2c";
+ reg = <0x0 0x51838000 0x0 0x8000>;
+ interrupts = <291>;
+ clocks = <&clk EIC7700_CLK_GATE_AON_I2C1_PCLK>;
+ clock-names = "ref";
+ clock-frequency = <100000>;
+ resets = <&reset EIC7700_RESET_ANO1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
gpio@51600000 {
compatible = "snps,dw-apb-gpio";
reg = <0x0 0x51600000 0x0 0x80>;
--
2.34.1
next prev parent reply other threads:[~2026-08-04 10:44 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-04 10:44 [PATCH v3 0/8] riscv: eswin: eic7700: Add support for clocks, resets, pinctrl, HSP bus, I2C and watchdog Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 1/8] riscv: dts: eswin: add reset generator for EIC7700 SoC Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 2/8] riscv: dts: eswin: add clock " Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 3/8] riscv: dts: eswin: eic7700: add pinctrl support Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 4/8] dt-bindings: mfd: syscon: add ESWIN EIC7700 compatible Pinkesh Vaghela
2026-08-04 11:02 ` sashiko-bot
2026-08-04 13:26 ` Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 5/8] riscv: dts: eswin: add hsp bus node Pinkesh Vaghela
2026-08-04 11:12 ` sashiko-bot
2026-08-04 13:07 ` Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 6/8] dt-bindings: i2c: dw: add ESWIN EIC7700 SoC I2C controller Pinkesh Vaghela
2026-08-04 10:44 ` Pinkesh Vaghela [this message]
2026-08-04 11:22 ` [PATCH v3 7/8] riscv: dts: eswin: add I2C controller support sashiko-bot
2026-08-04 13:19 ` Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 8/8] riscv: dts: eswin: add watchdog support Pinkesh Vaghela
2026-08-04 11:34 ` sashiko-bot
2026-08-04 13:03 ` Pinkesh Vaghela
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