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From: sashiko-bot@kernel.org
To: "Pinkesh Vaghela" <pinkesh.vaghela@einfochips.com>
Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v3 5/8] riscv: dts: eswin: add hsp bus node
Date: Tue, 04 Aug 2026 11:12:20 +0000	[thread overview]
Message-ID: <20260804111221.261071F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260804104431.1391839-6-pinkesh.vaghela@einfochips.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Generic `syscon` node under `simple-pm-bus` will be accessed with its clock disabled, causing a bus fault.
--

--- Patch [5]: [PATCH v3 5/8] riscv: dts: eswin: add hsp bus node ---
commit 4e57b37c3aadc988b1aed52b079b78ca92be234c
Author: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>

riscv: dts: eswin: add hsp bus node

Add an HSP bus node to manage the HSP CFG clock used by HSP
peripherals. This clock is required for accessing both the HSP CSR
registers and the register spaces of HSP peripheral devices.

> --- a/arch/riscv/boot/dts/eswin/eic7700.dtsi
> +++ b/arch/riscv/boot/dts/eswin/eic7700.dtsi
> @@ -252,6 +252,19 @@ plic: interrupt-controller@c000000 {
[ ... ]
> +		hsp: bus@50400000 {
> +			compatible = "simple-pm-bus";
> +			ranges = <0x0 0x50400000 0x0 0x50400000 0x0 0xa0000>;
> +			clocks = <&clk EIC7700_CLK_GATE_HSP_CFG_CLK>;
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +
> +			syscon: syscon@50440000 {
> +				compatible = "eswin,eic7700-syscfg", "syscon";
> +				reg = <0x0 0x50440000 0x0 0x2000>;

[Severity: High]
Will accessing this syscon node cause a bus fault due to the clock being
disabled?

Because the child syscon@50440000 uses the generic syscon compatible string, it
does not bind to a standard platform driver that would invoke
pm_runtime_get_sync(). As a result, the parent simple-pm-bus will remain
suspended and the clock EIC7700_CLK_GATE_HSP_CFG_CLK will stay disabled.

Additionally, since the clocks property is on the parent bus rather than
directly on the syscon node, of_syscon_register() cannot fetch the clock to
attach it to the underlying regmap_mmio.

Does this clock need to be placed directly on the syscon node so the generic
regmap core can manage it during register accesses?

> +			};
> +		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260804104431.1391839-1-pinkesh.vaghela@einfochips.com?part=5

  reply	other threads:[~2026-08-04 11:12 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-04 10:44 [PATCH v3 0/8] riscv: eswin: eic7700: Add support for clocks, resets, pinctrl, HSP bus, I2C and watchdog Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 1/8] riscv: dts: eswin: add reset generator for EIC7700 SoC Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 2/8] riscv: dts: eswin: add clock " Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 3/8] riscv: dts: eswin: eic7700: add pinctrl support Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 4/8] dt-bindings: mfd: syscon: add ESWIN EIC7700 compatible Pinkesh Vaghela
2026-08-04 11:02   ` sashiko-bot
2026-08-04 13:26     ` Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 5/8] riscv: dts: eswin: add hsp bus node Pinkesh Vaghela
2026-08-04 11:12   ` sashiko-bot [this message]
2026-08-04 13:07     ` Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 6/8] dt-bindings: i2c: dw: add ESWIN EIC7700 SoC I2C controller Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 7/8] riscv: dts: eswin: add I2C controller support Pinkesh Vaghela
2026-08-04 11:22   ` sashiko-bot
2026-08-04 13:19     ` Pinkesh Vaghela
2026-08-04 10:44 ` [PATCH v3 8/8] riscv: dts: eswin: add watchdog support Pinkesh Vaghela
2026-08-04 11:34   ` sashiko-bot
2026-08-04 13:03     ` Pinkesh Vaghela

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