Re: [PATCH v5 15/17] rtc: rzn1: Add OF match data to gate SUBU register access

[Alexandre Belloni <alexandre.belloni@bootlin.com>]

Hello,

On 21/08/2026 14:56:06+0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> The RZ/N1 RTC driver selects SCMP mode only when an optional xtal clock
> is provided at a valid rate other than 32768 Hz. Without an xtal clock,
> or when it runs at 32768 Hz, the driver uses SUBU mode.
> 
> However, the RTCA0SUBU register used by SUBU mode is not present on all
> SoCs that integrate a similar variant of the RTC block. Allowing SUBU
> mode on those variants would expose RTC offset operations that access a
> non-existent register.
> 
> Add OF match data to describe whether the RTC supports the SUBU register.
> Reject probe with -EOPNOTSUPP when SUBU mode would be selected on a
> variant without SUBU support.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Suggested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> ---
> v4->v5:
> - Renamed rzn1_data to rzn1_rtc_rzn1_data
> - Added a print message to indicate that SUBU mode is not supported
>   on the variant.
> - Added a comment to indicate that the xtal clock is NULL when SUBU
>   mode is not supported.
> - Added Suggested-by tag from Wolfram.
> 
> v3->v4:
> - New patch
> ---
>  drivers/rtc/rtc-rzn1.c | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
> 

This doesn't apply cleanly, can you rebase on rtc-next? If you do so
today, I'll include the series this merge window.

> diff --git a/drivers/rtc/rtc-rzn1.c b/drivers/rtc/rtc-rzn1.c
> index 8b68a5ad19c0..35770bff129f 100644
> --- a/drivers/rtc/rtc-rzn1.c
> +++ b/drivers/rtc/rtc-rzn1.c
> @@ -18,6 +18,7 @@
>  #include <linux/init.h>
>  #include <linux/iopoll.h>
>  #include <linux/module.h>
> +#include <linux/of.h>
>  #include <linux/platform_device.h>
>  #include <linux/pm_runtime.h>
>  #include <linux/rtc.h>
> @@ -65,6 +66,10 @@
>  #define RZN1_RTC_TIMEC 0x68
>  #define RZN1_RTC_CALC 0x6c
>  
> +struct rzn1_rtc_data {
> +	bool has_subu;
> +};
> +
>  struct rzn1_rtc {
>  	struct rtc_device *rtcdev;
>  	void __iomem *base;
> @@ -404,6 +409,7 @@ static void rzn1_rtc_disable_hardware(void *data)
>  
>  static int rzn1_rtc_probe(struct platform_device *pdev)
>  {
> +	const struct rzn1_rtc_data *data;
>  	struct device *dev = &pdev->dev;
>  	unsigned long rate = 32768;
>  	struct rzn1_rtc *rtc;
> @@ -411,6 +417,10 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
>  	struct clk *xtal;
>  	int irq, ret;
>  
> +	data = of_device_get_match_data(dev);
> +	if (!data)
> +		return -ENODEV;
> +
>  	rtc = devm_kzalloc(dev, sizeof(*rtc), GFP_KERNEL);
>  	if (!rtc)
>  		return -ENOMEM;
> @@ -454,8 +464,12 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
>  		if (rate < 32000 || rate > BIT(22))
>  			return -EOPNOTSUPP;
>  
> -		if (rate != 32768)
> +		if (rate != 32768 || !data->has_subu)
>  			scmp_val = RZN1_RTC_CTL0_SLSB_SCMP;
> +	} else if (!data->has_subu) {
> +		/* xtal is NULL here */
> +		return dev_err_probe(dev, -EOPNOTSUPP,
> +				     "No valid XTAL provided and SUBU mode not supported\n");
>  	}
>  
>  	/* Calculate the duration of two RTC_PCLK clock cycles */
> @@ -508,8 +522,12 @@ static int rzn1_rtc_probe(struct platform_device *pdev)
>  	return devm_rtc_register_device(rtc->rtcdev);
>  }
>  
> +static const struct rzn1_rtc_data rzn1_rtc_rzn1_data = {
> +	.has_subu = true,
> +};
> +
>  static const struct of_device_id rzn1_rtc_of_match[] = {
> -	{ .compatible	= "renesas,rzn1-rtc" },
> +	{ .compatible	= "renesas,rzn1-rtc", .data = &rzn1_rtc_rzn1_data },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, rzn1_rtc_of_match);
> -- 
> 2.43.0
> 

-- 
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com