[PATCH v2 12/13] ARM: dts: ux500: Add new AB8500/AB8505 regulators

[Linus Walleij <linusw@kernel.org>]

Add the newly supported buck converters to the AB8500 and AB8505 device
tree includes. Use separate, native node names for the AB8500 and AB8505
rails, including the AB8505 VSAFE, VSMPSC and VSMPSM converters.

Give the 1.8 V I/O buck on each variant a common functional label for
board include files which can be combined with either PMIC.

Assisted-by: LLM
Signed-off-by: Linus Walleij <linusw@kernel.org>
---
 arch/arm/boot/dts/st/ste-ab8500.dtsi | 24 ++++++++++++++++++++++++
 arch/arm/boot/dts/st/ste-ab8505.dtsi | 24 ++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/st/ste-ab8500.dtsi b/arch/arm/boot/dts/st/ste-ab8500.dtsi
index dd30d08ccb9b..fc9b613547f4 100644
--- a/arch/arm/boot/dts/st/ste-ab8500.dtsi
+++ b/arch/arm/boot/dts/st/ste-ab8500.dtsi
@@ -360,6 +360,30 @@ ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
 					// supply for U8500 CSI/DSI; VANA LDO
 					ab8500_ldo_ana_reg: ab8500_ldo_ana {
 					};
+
+					// 1.2 V I/O and memory supply for DB8500 and peripherals
+					ab8500_buck_vsmps1: ab8500_buck_smps1 {
+					};
+
+					// 1.8 V I/O and memory supply for DB8500 and peripherals
+					buck_vio18: ab8500_buck_vsmps2: ab8500_buck_smps2 {
+					};
+
+					// DB8500 VSAFE supply for permanent logic and DDR PHY
+					ab8500_buck_vsmps3: ab8500_buck_smps3 {
+					};
+
+					// DB8500 Cortex-A9 supply
+					ab8500_buck_varm: ab8500_buck_arm {
+					};
+
+					// DB8500 APE logic and multimedia accelerator supply
+					ab8500_buck_vape: ab8500_buck_ape {
+					};
+
+					// DB8500 modem subsystem supply
+					ab8500_buck_vmod: ab8500_buck_mod {
+					};
 				};
 			};
 		};
diff --git a/arch/arm/boot/dts/st/ste-ab8505.dtsi b/arch/arm/boot/dts/st/ste-ab8505.dtsi
index 131c82508e82..eb25a3f366a4 100644
--- a/arch/arm/boot/dts/st/ste-ab8505.dtsi
+++ b/arch/arm/boot/dts/st/ste-ab8505.dtsi
@@ -297,6 +297,30 @@ ab8500_ldo_aux8_reg: ab8500_ldo_aux8 {
 					// supply for U8500 CSI/DSI; VANA LDO
 					ab8500_ldo_ana_reg: ab8500_ldo_ana {
 					};
+
+					// 1.2 V I/O and memory supply for DB8500 and peripherals
+					ab8505_buck_vsmpsa: ab8505_buck_smpsa {
+					};
+
+					// 1.8 V I/O and memory supply for DB8500 and peripherals
+					buck_vio18: ab8505_buck_vsmpsb: ab8505_buck_smpsb {
+					};
+
+					// DB8500 VSAFE supply for permanent logic and DDR PHY
+					ab8505_buck_vsafe: ab8505_buck_safe {
+					};
+
+					// DB8500 Cortex-A9 supply
+					ab8505_buck_varm: ab8505_buck_arm {
+					};
+
+					// DB8500 APE logic and multimedia accelerator supply
+					ab8505_buck_vsmpsc: ab8505_buck_smpsc {
+					};
+
+					// DB8500 modem subsystem supply
+					ab8505_buck_vsmpsm: ab8505_buck_smpsm {
+					};
 				};
 			};
 		};

-- 
2.55.0