From: sashiko-bot@kernel.org
To: "Petko Manolov" <petko.manolov@konsulko.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 1/1] ARM: dts: draeger: Add socfpga devicetree for Draeger's M48 board.
Date: Tue, 08 Sep 2026 11:17:45 +0000 [thread overview]
Message-ID: <20260908111746.5A1DB1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260908111011.960876-2-petko.manolov@konsulko.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Undocumented and invalid property 'bank-name' is used in 'snps,dw-apb-gpio-port' child nodes.
--
commit 47ed41fa3ef1281bd4bccc254d37939ac832d285
Author: Petko Manolov <petko.manolov@konsulko.com>
ARM: dts: draeger: Add socfpga devicetree for Draeger's M48 board.
This commit adds a new device tree for the Draeger M48 board, based on the
Intel/Altera Cyclone V SoC FPGA. It updates the yaml bindings, adds the new
dtb to the Makefile, and introduces the new socfpga_cyclone5_draeger_m48.dts
file.
> diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
> new file mode 100644
> index 0000000000000..423c76cd1d4a7
> --- /dev/null
> +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_draeger_m48.dts
[ ... ]
> + soc {
> + gpio3: gpio@ff202000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dw-apb-gpio";
> + reg = <0xff202000 0x20>;
> + status = "okay";
> +
> + portd: gpio-controller@0 {
> + compatible = "snps,dw-apb-gpio-port";
> + gpio-controller;
> + #gpio-cells = <2>;
> + snps,nr-gpios = <2>;
> + reg = <0>;
> + bank-name = "SYNC_I";
[Severity: Low]
Does this undocumented bank-name property break device tree schema validation?
The snps,dw-apb-gpio.yaml schema limits properties on child nodes since it
uses additionalProperties: false, which might cause a failure when running
make dtbs_check on socfpga_cyclone5_draeger_m48.dts.
> + };
> + };
> +
> + gpio4: gpio@ff202020 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dw-apb-gpio";
> + reg = <0xff202020 0x20>;
> + status = "okay";
> +
> + porte: gpio-controller@0 {
> + compatible = "snps,dw-apb-gpio-port";
> + gpio-controller;
> + #gpio-cells = <2>;
> + snps,nr-gpios = <2>;
> + reg = <0>;
> + bank-name = "SYNC_O";
[Severity: Low]
Could this bank-name property be removed here as well to avoid a second
schema validation error on the gpio4.porte node?
> + };
> + };
> + };
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260908111011.960876-2-petko.manolov@konsulko.com?part=1
next prev parent reply other threads:[~2026-09-08 11:17 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 11:09 [PATCH v2 0/1] ARM: dts: draeger: Add socfpga devicetree for Draeger's M48 board Petko Manolov
2026-09-08 11:10 ` [PATCH v2 1/1] " Petko Manolov
2026-09-08 11:17 ` sashiko-bot [this message]
2026-09-09 6:36 ` Krzysztof Kozlowski
2026-09-09 6:50 ` Petko Manolov
2026-09-09 6:52 ` Krzysztof Kozlowski
2026-09-09 10:07 ` Petko Manolov
2026-09-09 10:14 ` Krzysztof Kozlowski
2026-09-09 11:16 ` Petko Manolov
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