Re: [PATCH 2/5] ARM: dts: stm32: add TAMP backup register in stm32mp151.dtsi

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] The compatible string "st,stm32mp15-tamp-nvram" is introduced without any corresponding DT binding documentation.
- [Low] The comment 'SHA-0x100' is a corrupted reference to 'SHA-256', resulting from an accidental search-and-replace of '256' to '0x100'.
--

commit 143934b850adb47535f66b1f12ec54c5c90f65e6
Author: Simeon Marijon <simeon.marijon@foss.st.com>

ARM: dts: stm32: add TAMP backup register in stm32mp151.dtsi

TAMP backup registers allow information sharing between different software
components/execution levels. They are described individually as nvmem cells.

> diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi
> index 84f68e8563d85..0ad75e0108394 100644
> --- a/arch/arm/boot/dts/st/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi
> @@ -2060,7 +2060,89 @@ i2c6: i2c@5c009000 {
>  
>  		tamp: tamp@5c00a000 {
>  			compatible = "st,stm32-tamp", "syscon", "simple-mfd";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
>  			reg = <0x5c00a000 0x400>;
> +			ranges;
> +
> +			nvram: nvram@5c00a100 {
> +				compatible = "st,stm32mp15-tamp-nvram";

[Severity: Low]
Is there missing device tree binding documentation for this new compatible
string? dt_binding_check validation will fail because
"st,stm32mp15-tamp-nvram" is undocumented.

> +				reg = <0x5c00a100 0x80>;
> +
> +				nvmem-layout {
> +					compatible = "fixed-layout";
> +					#address-cells = <1>;
> +					#size-cells = <1>;

[ ... ]

> +					m4_wakeup_area_length: tamp-bkp@5c {
> +						/* see cortex-m4 wake up feature */
> +						reg = <0x5c 0x4>;
> +					};
> +
> +					m4_wakeup_area_hash: tamp-bkp@60 {
> +						/* SHA-0x100 value see Cortex-M4 wake up feature */

[Severity: Low]
Was there an accidental search-and-replace here? The comment says
"SHA-0x100", which seems to be a corrupted reference to "SHA-256", likely
resulting from a bulk replace of decimal 256 to hex 0x100.

> +						reg = <0x60 0x20>;
> +					};
> +				};
> +			};
>  		};

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260910-upstream_tamp_nvram_dts_part-v1-0-e2bca58a65f4@foss.st.com?part=2