From: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
To: Bryan O'Donoghue <bod@kernel.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Subject: [PATCH 1/6] dt-bindings: media: Add bindings for qcom,nord-camss
Date: Tue, 15 Sep 2026 17:34:11 +0800 [thread overview]
Message-ID: <20260915-nord-v1-1-20db41a7f1ff@oss.qualcomm.com> (raw)
In-Reply-To: <20260915-nord-v1-0-20db41a7f1ff@oss.qualcomm.com>
Add bindings for the camera subsystem (CAMSS) on the Qualcomm Nord
platform.
The Nord platform provides:
- 3 x TPG (Test Pattern Generator)
- 3 x CSID (CSI Decoder)
- 10 x CSID Lite
- 3 x VFE (Video Front End)
- 10 x VFE Lite
Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
---
.../devicetree/bindings/media/qcom,nord-camss.yaml | 393 +++++++++++++++++++++
1 file changed, 393 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/qcom,nord-camss.yaml b/Documentation/devicetree/bindings/media/qcom,nord-camss.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..ba724ecffa6cee9fcaca6a116f3785d76597def2
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/qcom,nord-camss.yaml
@@ -0,0 +1,393 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/qcom,nord-camss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Nord Camera Subsystem (CAMSS)
+
+maintainers:
+ - Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
+
+description:
+ The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
+
+properties:
+ compatible:
+ const: qcom,nord-camss
+
+ reg:
+ maxItems: 29
+
+ reg-names:
+ items:
+ - const: csid0
+ - const: csid1
+ - const: csid2
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: csid_lite2
+ - const: csid_lite3
+ - const: csid_lite4
+ - const: csid_lite5
+ - const: csid_lite6
+ - const: csid_lite7
+ - const: csid_lite8
+ - const: csid_lite9
+ - const: csitpg0
+ - const: csitpg1
+ - const: csitpg2
+ - const: vfe0
+ - const: vfe1
+ - const: vfe2
+ - const: vfe_lite0
+ - const: vfe_lite1
+ - const: vfe_lite2
+ - const: vfe_lite3
+ - const: vfe_lite4
+ - const: vfe_lite5
+ - const: vfe_lite6
+ - const: vfe_lite7
+ - const: vfe_lite8
+ - const: vfe_lite9
+
+ clocks:
+ maxItems: 22
+
+ clock-names:
+ items:
+ - const: camnoc_rt_axi
+ - const: csid
+ - const: csid_csiphy_rx
+ - const: gcc_axi_hf
+ - const: top_ahb
+ - const: top_fast_ahb
+ - const: top_ife0
+ - const: top_ife1
+ - const: top_ife2
+ - const: top_ife_lite
+ - const: vfe0
+ - const: vfe0_fast_ahb
+ - const: vfe1
+ - const: vfe1_fast_ahb
+ - const: vfe2
+ - const: vfe2_fast_ahb
+ - const: vfe_lite
+ - const: vfe_lite_ahb
+ - const: vfe_lite_cphy_rx
+ - const: vfe_lite_csid
+ - const: tpg_csiphy_rx
+ - const: qdss_debug_xo
+
+ interrupts:
+ maxItems: 26
+
+ interrupt-names:
+ items:
+ - const: csid0
+ - const: csid1
+ - const: csid2
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: csid_lite2
+ - const: csid_lite3
+ - const: csid_lite4
+ - const: csid_lite5
+ - const: csid_lite6
+ - const: csid_lite7
+ - const: csid_lite8
+ - const: csid_lite9
+ - const: vfe0
+ - const: vfe1
+ - const: vfe2
+ - const: vfe_lite0
+ - const: vfe_lite1
+ - const: vfe_lite2
+ - const: vfe_lite3
+ - const: vfe_lite4
+ - const: vfe_lite5
+ - const: vfe_lite6
+ - const: vfe_lite7
+ - const: vfe_lite8
+ - const: vfe_lite9
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: ahb
+ - const: hf_mnoc
+
+ iommus:
+ items:
+ - description: S1 HLOS IFE non-protected
+ - description: S1 HLOS IFE_LITE non-protected
+
+ power-domains:
+ items:
+ - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller.
+
+ power-domain-names:
+ items:
+ - const: ife0
+ - const: ife1
+ - const: ife2
+ - const: top
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ description:
+ CSI input ports.
+
+ patternProperties:
+ "^port@[0-4]$":
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+
+ description:
+ Input port for receiving CSI data.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ bus-type:
+ enum:
+ - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
+ - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
+
+ required:
+ - data-lanes
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - interconnects
+ - interconnect-names
+ - iommus
+ - power-domains
+ - power-domain-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,nord-camcc.h>
+ #include <dt-bindings/clock/qcom,nord-nwgcc.h>
+ #include <dt-bindings/interconnect/qcom,icc.h>
+ #include <dt-bindings/interconnect/qcom,nord-rpmh.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ isp@9b32000 {
+ compatible = "qcom,nord-camss";
+
+ reg = <0 0x09b32000 0 0x2000>,
+ <0 0x09b38800 0 0x2000>,
+ <0 0x09b3f000 0 0x2000>,
+ <0 0x09c32000 0 0x1000>,
+ <0 0x09c37000 0 0x1000>,
+ <0 0x09c3c000 0 0x1000>,
+ <0 0x09c41000 0 0x1000>,
+ <0 0x09c46000 0 0x1000>,
+ <0 0x09c4b000 0 0x1000>,
+ <0 0x09c50000 0 0x1000>,
+ <0 0x09c55000 0 0x1000>,
+ <0 0x09c5a000 0 0x1000>,
+ <0 0x09c5f000 0 0x1000>,
+ <0 0x09a92000 0 0x400>,
+ <0 0x09a93000 0 0x400>,
+ <0 0x09a94000 0 0x400>,
+ <0 0x09ab1000 0 0x4000>,
+ <0 0x09ad1000 0 0x4000>,
+ <0 0x09af1000 0 0x4000>,
+ <0 0x09c34000 0 0x2000>,
+ <0 0x09c39000 0 0x2000>,
+ <0 0x09c3e000 0 0x2000>,
+ <0 0x09c43000 0 0x2000>,
+ <0 0x09c48000 0 0x2000>,
+ <0 0x09c4d000 0 0x2000>,
+ <0 0x09c52000 0 0x2000>,
+ <0 0x09c57000 0 0x2000>,
+ <0 0x09c5c000 0 0x2000>,
+ <0 0x09c61000 0 0x2000>;
+ reg-names = "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "csid_lite2",
+ "csid_lite3",
+ "csid_lite4",
+ "csid_lite5",
+ "csid_lite6",
+ "csid_lite7",
+ "csid_lite8",
+ "csid_lite9",
+ "csitpg0",
+ "csitpg1",
+ "csitpg2",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1",
+ "vfe_lite2",
+ "vfe_lite3",
+ "vfe_lite4",
+ "vfe_lite5",
+ "vfe_lite6",
+ "vfe_lite7",
+ "vfe_lite8",
+ "vfe_lite9";
+
+ clocks = <&camcc CAM_CC_CAMNOC_RT_AXI_CLK>,
+ <&camcc CAM_CC_CSID_CLK>,
+ <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
+ <&nwgcc NW_GCC_CAMERA_HF_AXI_CLK>,
+ <&camcc CAM_CC_TOP_AHB_CLK>,
+ <&camcc CAM_CC_TOP_FAST_AHB_CLK>,
+ <&camcc CAM_CC_TOP_IFE_0_CLK>,
+ <&camcc CAM_CC_TOP_IFE_1_CLK>,
+ <&camcc CAM_CC_TOP_IFE_2_CLK>,
+ <&camcc CAM_CC_TOP_IFE_LITE_CLK>,
+ <&camcc CAM_CC_IFE_0_MAIN_CLK>,
+ <&camcc CAM_CC_IFE_0_MAIN_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_1_MAIN_CLK>,
+ <&camcc CAM_CC_IFE_1_MAIN_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_2_MAIN_CLK>,
+ <&camcc CAM_CC_IFE_2_MAIN_FAST_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CLK>,
+ <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
+ <&camcc CAM_CC_TPG_CSIPHY_RX_CLK>,
+ <&camcc CAM_CC_QDSS_DEBUG_XO_CLK>;
+ clock-names = "camnoc_rt_axi",
+ "csid",
+ "csid_csiphy_rx",
+ "gcc_axi_hf",
+ "top_ahb",
+ "top_fast_ahb",
+ "top_ife0",
+ "top_ife1",
+ "top_ife2",
+ "top_ife_lite",
+ "vfe0",
+ "vfe0_fast_ahb",
+ "vfe1",
+ "vfe1_fast_ahb",
+ "vfe2",
+ "vfe2_fast_ahb",
+ "vfe_lite",
+ "vfe_lite_ahb",
+ "vfe_lite_cphy_rx",
+ "vfe_lite_csid",
+ "tpg_csiphy_rx",
+ "qdss_debug_xo";
+
+ interrupts = <GIC_SPI 601 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 603 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 431 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 605 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 19 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 17 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 15 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 13 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 11 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 9 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 7 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 5 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 22 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 21 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 20 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 606 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 18 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 16 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 14 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 12 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 10 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 8 IRQ_TYPE_EDGE_RISING>,
+ <GIC_ESPI 6 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 795 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid2",
+ "csid_lite0",
+ "csid_lite1",
+ "csid_lite2",
+ "csid_lite3",
+ "csid_lite4",
+ "csid_lite5",
+ "csid_lite6",
+ "csid_lite7",
+ "csid_lite8",
+ "csid_lite9",
+ "vfe0",
+ "vfe1",
+ "vfe2",
+ "vfe_lite0",
+ "vfe_lite1",
+ "vfe_lite2",
+ "vfe_lite3",
+ "vfe_lite4",
+ "vfe_lite5",
+ "vfe_lite6",
+ "vfe_lite7",
+ "vfe_lite8",
+ "vfe_lite9";
+
+ interconnects = <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "ahb",
+ "hf_mnoc";
+
+ iommus = <&apps_smmu_2 0x1401 0x20>,
+ <&apps_smmu_2 0x1460 0x00>;
+
+ power-domains = <&camcc CAM_CC_IFE_0_GDSC>,
+ <&camcc CAM_CC_IFE_1_GDSC>,
+ <&camcc CAM_CC_IFE_2_GDSC>,
+ <&camcc CAM_CC_TITAN_TOP_GDSC>;
+ power-domain-names = "ife0",
+ "ife1",
+ "ife2",
+ "top";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ endpoint {
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&sensor_ep>;
+ };
+ };
+ };
+ };
+ };
--
2.34.1
next prev parent reply other threads:[~2026-09-15 9:34 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 9:34 [PATCH 0/6] media: qcom: camss: Add support for Nord CAMSS Wenmeng Liu
2026-09-15 9:34 ` Wenmeng Liu [this message]
2026-09-15 9:45 ` [PATCH 1/6] dt-bindings: media: Add bindings for qcom,nord-camss sashiko-bot
2026-09-17 10:13 ` Krzysztof Kozlowski
2026-09-17 12:37 ` Wenmeng Liu
2026-09-18 6:47 ` Krzysztof Kozlowski
2026-09-18 7:08 ` Wenmeng Liu
2026-09-15 9:34 ` [PATCH 2/6] media: qcom: camss: csid: Add support for CSID 900 Wenmeng Liu
2026-09-15 9:50 ` sashiko-bot
2026-09-20 7:01 ` Shawn Guo
2026-09-15 9:34 ` [PATCH 3/6] media: qcom: camss: vfe: Add support for VFE gen4 Wenmeng Liu
2026-09-15 9:53 ` sashiko-bot
2026-09-20 7:19 ` Shawn Guo
2026-09-15 9:34 ` [PATCH 4/6] media: qcom: camss: vfe: Add support for VFE 900 Wenmeng Liu
2026-09-15 9:43 ` sashiko-bot
2026-09-20 7:17 ` Shawn Guo
2026-09-15 9:34 ` [PATCH 5/6] media: qcom: camss: tpg: Add support for TPG v2.5.0 Wenmeng Liu
2026-09-15 9:34 ` [PATCH 6/6] media: qcom: camss: Add support for nord camss Wenmeng Liu
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