[PATCH 0/2] Add few more SOC IDs for IPQ5210 family

[PATCH 0/2] Add few more SOC IDs for IPQ5210 family

[Kathiravan Thirumoorthy]

QCF3211 and IPQ5211 are the new SoCs based on the IPQ5210 family. Add
the SoC IDs for the same.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
Kathiravan Thirumoorthy (2):
      dt-bindings: arm: qcom,ids: add few more SOC IDs for IPQ5210 family
      soc: qcom: socinfo: add few more SOC IDs for IPQ5210 family

 drivers/soc/qcom/socinfo.c         | 2 ++
 include/dt-bindings/arm/qcom,ids.h | 2 ++
 2 files changed, 4 insertions(+)
---
base-commit: 3f2425f5b5bbbdd991ca9cdfd5502e68d8895998
change-id: 20260917-ipq52xx_new_ids-1b584bc547e8

Best regards,
--  
Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>

[PATCH 1/2] dt-bindings: arm: qcom,ids: add few more SOC IDs for IPQ5210 family

[Kathiravan Thirumoorthy]

QCF3211 and IPQ5211 are the new SoCs based on the IPQ5210 family. Add
the SoC IDs for the same.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
 include/dt-bindings/arm/qcom,ids.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h
index b63e4a0b8e54..f251d4c75612 100644
--- a/include/dt-bindings/arm/qcom,ids.h
+++ b/include/dt-bindings/arm/qcom,ids.h
@@ -317,6 +317,8 @@
 #define QCOM_ID_IPQ9630			779
 #define QCOM_ID_IPQ9640			780
 #define QCOM_ID_IPQ9670			781
+#define QCOM_ID_QCF3211			801
+#define QCOM_ID_IPQ5211			802
 
 /*
  * The board type and revision information, used by Qualcomm bootloaders and

-- 
2.34.1

Re: [PATCH 1/2] dt-bindings: arm: qcom,ids: add few more SOC IDs for IPQ5210 family

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] cpufreq: qcom: kernel panic on boot due to missing SoC IDs in switch case
--

commit 0b99a8e575edc333a621cdaa6e2499570c73a001
Author: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>

dt-bindings: arm: qcom,ids: add few more SOC IDs for IPQ5210 family

QCF3211 and IPQ5211 are the new SoCs based on the IPQ5210 family. Add
the SoC IDs for the same.

> diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h
> index b63e4a0b8e545..f251d4c75612c 100644
> --- a/include/dt-bindings/arm/qcom,ids.h
> +++ b/include/dt-bindings/arm/qcom,ids.h
> @@ -317,6 +317,8 @@
>  #define QCOM_ID_IPQ9630			779
>  #define QCOM_ID_IPQ9640			780
>  #define QCOM_ID_IPQ9670			781
> +#define QCOM_ID_QCF3211			801
> +#define QCOM_ID_IPQ5211			802

[Severity: High]
Will adding these new SoC IDs cause a kernel panic during boot when using the
qcom-cpufreq-nvmem driver?

Because these new SoCs are based on the IPQ5210 family, they will likely match
the fallback compatible string in the device tree and load the driver.

During probe, the driver reads the actual SoC ID from SMEM, but these new IDs
are currently missing from the switch statement:

drivers/cpufreq/qcom-cpufreq-nvmem.c:qcom_cpufreq_kryo_name_version() {
    ...
	ret = qcom_smem_get_soc_id(&msm_id);
    ...
	switch (msm_id) {
    ...
	case QCOM_ID_IPQ5200:
	case QCOM_ID_IPQ5210:
	case QCOM_ID_QCF2200:
	case QCOM_ID_QCF3200:
	case QCOM_ID_QCF3210:
		drv->versions = (*speedbin == 0xcd) ? BIT(1) : BIT(0);
		break;
    ...
	default:
		BUG();
		break;
	}
    ...
}

Because QCOM_ID_QCF3211 and QCOM_ID_IPQ5211 are unhandled, execution will fall
through to the default case, triggering an unconditional BUG() and bringing
down the system during boot.

Should these new IDs be added to the IPQ5210 case block in the driver to
prevent the crash?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260921-ipq52xx_new_ids-v1-0-63d68a11bbff@oss.qualcomm.com?part=1

[PATCH 2/2] soc: qcom: socinfo: add few more SOC IDs for IPQ5210 family

[Kathiravan Thirumoorthy]

QCF3211 and IPQ5211 are the new SoCs based on the IPQ5210 family. Add
the SoC IDs for the same.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
 drivers/soc/qcom/socinfo.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
index 63ee5cd561a2..4e7e14fe7231 100644
--- a/drivers/soc/qcom/socinfo.c
+++ b/drivers/soc/qcom/socinfo.c
@@ -558,6 +558,8 @@ static const struct soc_id soc_id[] = {
 	{ qcom_board_id(IPQ9630) },
 	{ qcom_board_id(IPQ9640) },
 	{ qcom_board_id(IPQ9670) },
+	{ qcom_board_id(QCF3211) },
+	{ qcom_board_id(IPQ5211) },
 };
 
 static const char *socinfo_machine(struct device *dev, unsigned int id)

-- 
2.34.1

Re: [PATCH 2/2] soc: qcom: socinfo: add few more SOC IDs for IPQ5210 family

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] qcom-cpufreq: kernel panic on boot for new IPQ5210 SoCs
--

commit 9ff7f8e096f96a22381e41ab225a2e460fe769da
Author: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>

soc: qcom: socinfo: add few more SOC IDs for IPQ5210 family

QCF3211 and IPQ5211 are the new SoCs based on the IPQ5210 family. This commit
adds the SoC IDs for them to the socinfo driver.

> diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
> index 63ee5cd561a29..4e7e14fe72317 100644
> --- a/drivers/soc/qcom/socinfo.c
> +++ b/drivers/soc/qcom/socinfo.c
> @@ -558,6 +558,8 @@ static const struct soc_id soc_id[] = {
>  	{ qcom_board_id(IPQ9630) },
>  	{ qcom_board_id(IPQ9640) },
>  	{ qcom_board_id(IPQ9670) },
> +	{ qcom_board_id(QCF3211) },
> +	{ qcom_board_id(IPQ5211) },

[Severity: High]
Could this lead to a kernel panic during boot on these new SoCs? 

When the qcom-cpufreq-nvmem driver probes, it calls
qcom_cpufreq_kryo_name_version() which checks the SoC ID. Since QCOM_ID_QCF3211
and QCOM_ID_IPQ5211 are not handled in its switch statement, execution
appears to fall through to the default case:

drivers/cpufreq/qcom-cpufreq-nvmem.c:qcom_cpufreq_kryo_name_version() {
...
	switch (msm_id) {
...
	case QCOM_ID_IPQ5200:
	case QCOM_ID_IPQ5210:
	case QCOM_ID_QCF2200:
	case QCOM_ID_QCF3200:
	case QCOM_ID_QCF3210:
		drv->versions = (*speedbin == 0xcd) ? BIT(1) : BIT(0);
		break;
...
	default:
		BUG();
		break;
	}
...
}

Does qcom-cpufreq-nvmem.c need to be updated alongside this change to handle
the newly added IDs and prevent triggering this BUG() trap?

>  };
>  
>  static const char *socinfo_machine(struct device *dev, unsigned int id)

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260921-ipq52xx_new_ids-v1-0-63d68a11bbff@oss.qualcomm.com?part=2