[PATCH v1 07/27] dt-bindings: gpu: mali-valhall-csf: Add Mali Gen5 AM compatible

[PATCH v1 07/27] dt-bindings: gpu: mali-valhall-csf: Add Mali Gen5 AM compatible

[Karunika Choo]

Add the generic "arm,mali-gen5-am" compatible for Mali Gen5 AM GPU
integrations.

Mali Gen5 AM systems use the external AM_GOVERNOR block for frequency
scaling, so OPP, cooling and local GPU supply properties are not valid
for this compatible.

Add a matching example node.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 .../bindings/gpu/arm,mali-valhall-csf.yaml    | 26 ++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
index 8eccd4338a2b2..a1e85570b4b3b 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
@@ -22,6 +22,7 @@ properties:
               - nxp,imx95-mali            # G310
               - rockchip,rk3588-mali
           - const: arm,mali-valhall-csf   # Mali Valhall GPU model/revision is fully discoverable
+      - const: arm,mali-gen5-am
 
   reg:
     maxItems: 1
@@ -146,6 +147,19 @@ allOf:
         - nvmem-cells
         - nvmem-cell-names
         - power-domains
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: arm,mali-gen5-am
+    then:
+      properties:
+        mali-supply: false
+        sram-supply: false
+        operating-points-v2: false
+        opp-table: false
+        "#cooling-cells": false
+        dynamic-power-coefficient: false
 
 examples:
   - |
@@ -195,5 +209,15 @@ examples:
         nvmem-cell-names = "shader-present";
         power-domains = <&gpufreq>;
     };
-
+  - |
+    gpu@100000 {
+        compatible = "arm,mali-gen5-am";
+        reg = <0x100000 0x480000>;
+        interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>,
+                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>,
+                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>;
+        interrupt-names = "job", "mmu", "gpu";
+        clocks = <&gpu_clock 0>, <&gpu_clock 1>, <&gpu_clock 2>;
+        clock-names = "core", "coregroup", "stacks";
+    };
 ...
-- 
2.43.0

Re: [PATCH v1 07/27] dt-bindings: gpu: mali-valhall-csf: Add Mali Gen5 AM compatible

[Krzysztof Kozlowski]

On Tue, Sep 22, 2026 at 09:45:01PM +0100, Karunika Choo wrote:
> Add the generic "arm,mali-gen5-am" compatible for Mali Gen5 AM GPU
> integrations.
> 
> Mali Gen5 AM systems use the external AM_GOVERNOR block for frequency
> scaling, so OPP, cooling and local GPU supply properties are not valid
> for this compatible.
> 
> Add a matching example node.
> 
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
>  .../bindings/gpu/arm,mali-valhall-csf.yaml    | 26 ++++++++++++++++++-
>  1 file changed, 25 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> index 8eccd4338a2b2..a1e85570b4b3b 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
> @@ -22,6 +22,7 @@ properties:
>                - nxp,imx95-mali            # G310
>                - rockchip,rk3588-mali
>            - const: arm,mali-valhall-csf   # Mali Valhall GPU model/revision is fully discoverable
> +      - const: arm,mali-gen5-am

Why no SoC specific compatibles? Which platform uses this alone (without
SoC integration)?

>  
>    reg:
>      maxItems: 1
> @@ -146,6 +147,19 @@ allOf:
>          - nvmem-cells
>          - nvmem-cell-names
>          - power-domains
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: arm,mali-gen5-am
> +    then:
> +      properties:
> +        mali-supply: false
> +        sram-supply: false
> +        operating-points-v2: false
> +        opp-table: false
> +        "#cooling-cells": false
> +        dynamic-power-coefficient: false

That's way too much, you need a new binding file.

Best regards,
Krzysztof

[PATCH v1 10/27] dt-bindings: gpu: panthor: Document panthor-system bindings

[Karunika Choo]

Mali 5th-Gen AM GPUs expose an AM_SYSTEM block for GPU-wide control
outside the main GPU register window.

Document the system node compatible, register and interrupt resources,
GPU clock, and optional GPU regulator supply used by the AM_SYSTEM
platform driver.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 .../bindings/gpu/arm,mali-gen5-am-system.yaml | 67 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 68 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
new file mode 100644
index 0000000000000..f0689bb8f05a2
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+# Copyright 2026 ARM Limited. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/arm,mali-gen5-am-system.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Mali 5th-Gen GPU System Device
+
+maintainers:
+  - Liviu Dudau <liviu.dudau@arm.com>
+  - Boris Brezillon <boris.brezillon@collabora.com>
+
+properties:
+  $nodename:
+    pattern: '^panthor-system@[a-f0-9]+$'
+
+  compatible:
+    oneOf:
+      - items:
+          - const: arm,mali-gen5-am-system
+
+  reg:
+    items:
+      - description: System register
+
+  reg-names:
+    items:
+      - const: system
+
+  interrupts:
+    items:
+      - description: System interrupt
+
+  clocks:
+    maxItems: 1
+    description:
+      Phandle to the GPU clock.
+
+  gpu-supply: true
+
+  dma-coherent: true
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    panthor_system: panthor-system@68000000 {
+      compatible = "arm,mali-gen5-am-system";
+      reg = <0x68000000 0x10000>;
+      reg-names = "system";
+      interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+      clocks = <&mali_gpu_clk>;
+      gpu-supply = <&gpu_supply>;
+    };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 40fdb0ecc9c12..377156650580c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2324,6 +2324,7 @@ M:	Liviu Dudau <liviu.dudau@arm.com>
 L:	dri-devel@lists.freedesktop.org
 S:	Supported
 T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git
+F:	Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-*.yaml
 F:	Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
 F:	drivers/gpu/drm/ci/xfails/panthor*
 F:	drivers/gpu/drm/panthor/
-- 
2.43.0

Re: [PATCH v1 10/27] dt-bindings: gpu: panthor: Document panthor-system bindings

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: use of OS-specific driver name 'panthor' in DT node name
--

commit ee6d231b5dc0544f3b9572b62d9e84b81e33eedd
Author: Karunika Choo <karunika.choo@arm.com>

dt-bindings: gpu: panthor: Document panthor-system bindings

This commit introduces DT bindings for the ARM Mali 5th-Gen AM GPU's
AM_SYSTEM block. It documents the compatible string, registers, interrupts,
clocks, and regulators for this system node.

> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
> new file mode 100644
> index 0000000000000..f0689bb8f05a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
[ ... ]
> +properties:
> +  $nodename:
> +    pattern: '^panthor-system@[a-f0-9]+$'

[Severity: Low]
Does this node name pattern violate the Device Tree specification's generic
names recommendation?

Device tree bindings are expected to describe the underlying hardware in an
OS-agnostic manner. Since 'panthor' is the name of the Linux DRM driver
rather than the hardware itself (ARM Mali 5th-Gen AM GPU's AM_SYSTEM block),
should this use a generic class name like '^gpu-system@[a-f0-9]+$' or
'^system-controller@[a-f0-9]+$' instead?

[ ... ]
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    panthor_system: panthor-system@68000000 {

[Severity: Low]
Similarly, this example demonstrates the OS-specific node name. Should it
be updated to match a generic functional name as well?

> +      compatible = "arm,mali-gen5-am-system";
> +      reg = <0x68000000 0x10000>;
[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260922204535.2850094-1-karunika.choo@arm.com?part=10

Re: [PATCH v1 10/27] dt-bindings: gpu: panthor: Document panthor-system bindings

[Krzysztof Kozlowski]

On Tue, Sep 22, 2026 at 09:45:04PM +0100, Karunika Choo wrote:
> Mali 5th-Gen AM GPUs expose an AM_SYSTEM block for GPU-wide control
> outside the main GPU register window.

A nit, subject: drop second/last, redundant "bindings". The
"dt-bindings" prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v7.1-rc7/source/Documentation/devicetree/bindings/submitting-patches.rst#L23

> 
> Document the system node compatible, register and interrupt resources,
> GPU clock, and optional GPU regulator supply used by the AM_SYSTEM
> platform driver.
> 
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
>  .../bindings/gpu/arm,mali-gen5-am-system.yaml | 67 +++++++++++++++++++
>  MAINTAINERS                                   |  1 +
>  2 files changed, 68 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
> new file mode 100644
> index 0000000000000..f0689bb8f05a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +# Copyright 2026 ARM Limited. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpu/arm,mali-gen5-am-system.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM Mali 5th-Gen GPU System Device
> +
> +maintainers:
> +  - Liviu Dudau <liviu.dudau@arm.com>
> +  - Boris Brezillon <boris.brezillon@collabora.com>
> +
> +properties:
> +  $nodename:
> +    pattern: '^panthor-system@[a-f0-9]+$'

Nope. Why would we name devices based on driver?

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
If you cannot find a name matching your device, please check in kernel
sources for similar cases or you can grow the spec (via pull request to
DT spec repo).

Drop the nodename completely.

> +
> +  compatible:
> +    oneOf:

Drop

> +      - items:

Probably drop... but:

> +          - const: arm,mali-gen5-am-system

How can this be used alone?


> +
> +  reg:
> +    items:
> +      - description: System register

so just maxItems: 1

> +
> +  reg-names:
> +    items:
> +      - const: system

Drop entire reg-names

> +
> +  interrupts:
> +    items:
> +      - description: System interrupt

keep it simple, maxItems: 1

> +
> +  clocks:
> +    maxItems: 1
> +    description:
> +      Phandle to the GPU clock.

Drop description, obvious. Can this be something else than phandle? Can
a single clock for GPU can be something else than GPU clock?

> +
> +  gpu-supply: true

This should rather be named based on the pins/domains. Are you sure the
domain is called GPU?

> +
> +  dma-coherent: true
> +
> +required:
> +  - compatible
> +  - reg
> +  - reg-names
> +  - interrupts
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    panthor_system: panthor-system@68000000 {

Drop unused label

Best regards,
Krzysztof

[PATCH v1 12/27] dt-bindings: gpu: panthor: Document panthor-arbitration bindings

[Karunika Choo]

Mali 5th-Gen AM GPUs expose arbitration registers outside the GPU node.
The arbitration device contains partition-control and resource-group
register blocks used to grant, yield, and close access windows.

Document partition and resource-group child nodes, each with its own
register range, interrupt and hardware ID.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 .../gpu/arm,mali-gen5-am-arbitration.yaml     | 125 ++++++++++++++++++
 .../bindings/gpu/arm,mali-gen5-am-system.yaml |   9 ++
 2 files changed, 134 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
new file mode 100644
index 0000000000000..9ea2b4bb9a344
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
@@ -0,0 +1,125 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+# Copyright 2026 ARM Limited. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/arm,mali-gen5-am-arbitration.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Mali 5th-Gen GPU Arbitration Device
+
+maintainers:
+  - Liviu Dudau <liviu.dudau@arm.com>
+  - Boris Brezillon <boris.brezillon@collabora.com>
+
+description:
+  The arbitration device manages partition-control and resource-group blocks.
+  Each block is described by a child node with its own register range,
+  interrupt and hardware ID. Partition and resource-group IDs are separate
+  namespaces. Access-window IDs are global to the GPU.
+
+properties:
+  $nodename:
+    const: panthor-arbitration
+
+  compatible:
+    const: arm,mali-gen5-am-arbitration
+
+  "#address-cells": true
+
+  "#size-cells": true
+
+  ranges: true
+
+patternProperties:
+  "^partition@[0-9a-f]+$":
+    type: object
+    additionalProperties: false
+    description:
+      Partition control block and its initial resource assignments.
+
+    properties:
+      reg:
+        maxItems: 1
+        description: Partition control register range.
+
+      interrupts:
+        maxItems: 1
+        description: Partition control interrupt.
+
+      arm,id:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Hardware partition control index. Must identify a partition present on
+          the GPU and be unique among this device's partition nodes.
+
+    required:
+      - reg
+      - interrupts
+      - arm,id
+
+  "^resource-group@[0-9a-f]+$":
+    type: object
+    additionalProperties: false
+    description:
+      Resource group block used for access-window messaging.
+
+    properties:
+      reg:
+        maxItems: 1
+        description: Resource group register range.
+
+      interrupts:
+        maxItems: 1
+        description: Resource group interrupt.
+
+      arm,id:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Hardware resource group index. Must identify a resource group
+          present on the GPU and be unique among this device's resource group
+          nodes.
+
+    required:
+      - reg
+      - interrupts
+      - arm,id
+
+  "^gpu@[0-9a-f]+$":
+    $ref: arm,mali-valhall-csf.yaml#
+    properties:
+      compatible:
+        const: arm,mali-gen5-am
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    panthor-arbitration {
+        compatible = "arm,mali-gen5-am-arbitration";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+
+        partition@50000 {
+            reg = <0x50000 0x10000>;
+            interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>;
+            arm,id = <0>;
+        };
+
+        resource-group@c0000 {
+            reg = <0xc0000 0x10000>;
+            interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>;
+            arm,id = <0>;
+        };
+    };
+
+...
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
index f0689bb8f05a2..a027dc5f4f890 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
@@ -41,6 +41,15 @@ properties:
 
   dma-coherent: true
 
+  "#address-cells": true
+
+  "#size-cells": true
+
+  ranges: true
+
+  panthor-arbitration:
+    $ref: arm,mali-gen5-am-arbitration.yaml#
+
 required:
   - compatible
   - reg
-- 
2.43.0

Re: [PATCH v1 12/27] dt-bindings: gpu: panthor: Document panthor-arbitration bindings

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] dt-bindings: hardcoded driver-specific node name 'panthor-arbitration'
- [Low] dt-bindings: missing const constraints on #address-cells and #size-cells
--

commit 5958d9241a2d1add1102ff00e882946446a4e494
Author: Karunika Choo <karunika.choo@arm.com>

dt-bindings: gpu: panthor: Document panthor-arbitration bindings

Mali 5th-Gen AM GPUs expose arbitration registers outside the GPU node.
The arbitration device contains partition-control and resource-group
register blocks used to grant, yield, and close access windows.

Document partition and resource-group child nodes, each with its own
register range, interrupt and hardware ID.

> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> new file mode 100644
> index 0000000000000..9ea2b4bb9a344
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml

[ ... ]

> +properties:
> +  $nodename:
> +    const: panthor-arbitration

[Severity: Low]
Does this enforce an invalid, driver-specific naming convention on all
devicetrees using this hardware?

Any devicetree author attempting to instantiate this hardware must use the
Linux-specific driver name panthor-arbitration to pass schema validation.
This violates the DT specification requirement for generic,
hardware-reflective naming. 

Could this be changed to use a generic term like arbitrator or
gpu-arbitrator instead of incorporating the DRM driver name?

> +
> +  compatible:
> +    const: arm,mali-gen5-am-arbitration
> +
> +  "#address-cells": true
> +
> +  "#size-cells": true

[Severity: Low]
Should these cell-count properties have a strict const constraint matching
the hardware, such as const: 1 as shown in the examples, rather than just
true?

Without a strict constraint, the schema allows arbitrary integers for cell
counts. This weakens schema validation for child nodes' reg array dimensions,
and a device tree with incorrectly sized reg properties might silently pass
the dt_binding_check.

> +
> +  ranges: true

[ ... ]

> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
> index f0689bb8f05a2..a027dc5f4f890 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-system.yaml

[ ... ]

> @@ -41,6 +41,15 @@ properties:
>  
>    dma-coherent: true
>  
> +  "#address-cells": true
> +
> +  "#size-cells": true

[Severity: Low]
Similar to the arbitration bindings, should these cell-count properties also
be defined with strict const constraints?

Allowing arbitrary integers weakens schema validation for child nodes' reg
array dimensions.

> +
> +  ranges: true
> +
> +  panthor-arbitration:
> +    $ref: arm,mali-gen5-am-arbitration.yaml#

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260922204535.2850094-1-karunika.choo@arm.com?part=12

Re: [PATCH v1 12/27] dt-bindings: gpu: panthor: Document panthor-arbitration bindings

[Krzysztof Kozlowski]

On Tue, Sep 22, 2026 at 09:45:06PM +0100, Karunika Choo wrote:
> Mali 5th-Gen AM GPUs expose arbitration registers outside the GPU node.
> The arbitration device contains partition-control and resource-group
> register blocks used to grant, yield, and close access windows.
> 
> Document partition and resource-group child nodes, each with its own
> register range, interrupt and hardware ID.
> 
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
>  .../gpu/arm,mali-gen5-am-arbitration.yaml     | 125 ++++++++++++++++++
>  .../bindings/gpu/arm,mali-gen5-am-system.yaml |   9 ++
>  2 files changed, 134 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> new file mode 100644
> index 0000000000000..9ea2b4bb9a344
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> @@ -0,0 +1,125 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +# Copyright 2026 ARM Limited. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpu/arm,mali-gen5-am-arbitration.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM Mali 5th-Gen GPU Arbitration Device
> +
> +maintainers:
> +  - Liviu Dudau <liviu.dudau@arm.com>
> +  - Boris Brezillon <boris.brezillon@collabora.com>
> +
> +description:
> +  The arbitration device manages partition-control and resource-group blocks.
> +  Each block is described by a child node with its own register range,
> +  interrupt and hardware ID. Partition and resource-group IDs are separate
> +  namespaces. Access-window IDs are global to the GPU.
> +
> +properties:
> +  $nodename:
> +    const: panthor-arbitration

Same comments. I stopped review here except one more point:


> +
> +  compatible:
> +    const: arm,mali-gen5-am-arbitration
> +
> +  "#address-cells": true
> +
> +  "#size-cells": true
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^partition@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: false
> +    description:
> +      Partition control block and its initial resource assignments.
> +
> +    properties:
> +      reg:
> +        maxItems: 1
> +        description: Partition control register range.
> +
> +      interrupts:
> +        maxItems: 1
> +        description: Partition control interrupt.
> +
> +      arm,id:
> +        $ref: /schemas/types.yaml#/definitions/uint32

IDs are not allowed. See writing bindings or DTS101 slides.

Best regards,
Krzysztof

[PATCH v1 18/27] dt-bindings: gpu: panthor: Document AW assignment DT property

[Karunika Choo]

Introduce arm,access-window-mask property to allow partitions to define
the assigned access windows at probe time.

Signed-off-by: Karunika Choo <karunika.choo@arm.com>
---
 .../bindings/gpu/arm,mali-gen5-am-arbitration.yaml     | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
index 9ea2b4bb9a344..4e7933829e2be 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
@@ -52,6 +52,15 @@ patternProperties:
           Hardware partition control index. Must identify a partition present on
           the GPU and be unique among this device's partition nodes.
 
+      arm,access-window-mask:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        maximum: 0xffff
+        default: 0
+        description:
+          Initial access window assignment mask. Bit N selects global
+          access window ID N. Masks must be disjoint across partitions.
+          If omitted, no access windows are assigned by default.
+
     required:
       - reg
       - interrupts
@@ -113,6 +122,7 @@ examples:
             reg = <0x50000 0x10000>;
             interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>;
             arm,id = <0>;
+            arm,access-window-mask = <0xffff>;
         };
 
         resource-group@c0000 {
-- 
2.43.0

Re: [PATCH v1 18/27] dt-bindings: gpu: panthor: Document AW assignment DT property

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: gpu: software resource policy in device tree
--

commit c9c432471efad1a2abcbaf062de9fa8ddb5708c3
Author: Karunika Choo <karunika.choo@arm.com>

dt-bindings: gpu: panthor: Document AW assignment DT property
    
Introduce arm,access-window-mask property to allow partitions to define
the assigned access windows at probe time.

> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> index 9ea2b4bb9a344..4e7933829e2be 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> @@ -52,6 +52,15 @@ patternProperties:
>            Hardware partition control index. Must identify a partition present on
>            the GPU and be unique among this device's partition nodes.
>  
> +      arm,access-window-mask:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        maximum: 0xffff
> +        default: 0
> +        description:
> +          Initial access window assignment mask. Bit N selects global
> +          access window ID N. Masks must be disjoint across partitions.
> +          If omitted, no access windows are assigned by default.
> +

[Severity: Low]
Does this new property improperly introduce software policy into the
hardware description bindings?

Encoding dynamic resource assignment with arm,access-window-mask in the
device tree dictates software policy rather than describing pure hardware
topology. 

This restricts the kernel's flexibility to dynamically assign resources
based on runtime workloads, as it forces an initial hardcoded allocation
upon driver probe.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260922204535.2850094-1-karunika.choo@arm.com?part=18

Re: [PATCH v1 18/27] dt-bindings: gpu: panthor: Document AW assignment DT property

[Krzysztof Kozlowski]

On Tue, Sep 22, 2026 at 09:45:12PM +0100, Karunika Choo wrote:
> Introduce arm,access-window-mask property to allow partitions to define
> the assigned access windows at probe time.
> 
> Signed-off-by: Karunika Choo <karunika.choo@arm.com>
> ---
>  .../bindings/gpu/arm,mali-gen5-am-arbitration.yaml     | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> index 9ea2b4bb9a344..4e7933829e2be 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-gen5-am-arbitration.yaml
> @@ -52,6 +52,15 @@ patternProperties:
>            Hardware partition control index. Must identify a partition present on
>            the GPU and be unique among this device's partition nodes.
>  
> +      arm,access-window-mask:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        maximum: 0xffff
> +        default: 0
> +        description:
> +          Initial access window assignment mask. Bit N selects global
> +          access window ID N. Masks must be disjoint across partitions.
> +          If omitted, no access windows are assigned by default.

You just added this file!

Please read writing bindings document. The bindings MUST BE complete.

Best regards,
Krzysztof