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From: sashiko-bot@kernel.org
To: "Harendra Gautam" <harendra.gautam@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v7 03/10] ASoC: qcom: Add QAIF hardware register map
Date: Wed, 23 Sep 2026 07:00:38 +0000	[thread overview]
Message-ID: <20260923070039.181391F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260923-b4-qaif-shikra-audio-v7-3-d5b6f056568e@oss.qualcomm.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] qaif: incorrect register offsets for EE map registers causing MMIO corruption
--

commit 5454f6ca9bb412d35876e973e587e5e34579e362
Author: Harendra Gautam <harendra.gautam@oss.qualcomm.com>

ASoC: qcom: Add QAIF hardware register map
    
This commit adds qaif-reg.h to define the MMIO register offsets for the
Qualcomm Audio Interface (QAIF) hardware block.

> diff --git a/sound/soc/qcom/qaif-reg.h b/sound/soc/qcom/qaif-reg.h
> index 0000000000000..84a9c0285289e
> --- /dev/null
> +++ b/sound/soc/qcom/qaif-reg.h
[ ... ]
> +/*
> + * EE (Execution Engine) assignment and map registers.
> + *
> + * The EE offset (v->ee) is an address/index offset relative to the
> + * platform-defined QAIF/EE base and lets the hardware route the AIF
> + * operation to the correct EE context. It is hardware/platform-specific and
> + * must match the mapping defined for the selected QAIF AIF/lane in the
> + * hardware programming guide. It is not a runtime data offset and must not
> + * be changed based on the stream configuration.
> + */
> +#define QAIF_EE_RDDMA_ASSIGNMENT_REG(v)			(0x19148 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_WRDMA_ASSIGNMENT_REG(v)			(0x19150 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_INTF_ASSIGNMENT_REG(v)			(0x19158 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_CODEC_RDDMA_ASSIGN_REG(v)		(0x19308 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_CODEC_WRDMA_ASSIGN_REG(v)		(0x19318 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_RDDMA_MAP_REG(v)			(0x1920 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_WRDMA_MAP_REG(v)			(0x1940 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_INTF_MAP_REG(v)				(0x1960 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_CODEC_RDDMA_MAP_REG(v)			(0x1980 + (0x1000 * ((v)->ee)))
> +#define QAIF_EE_CODEC_WRDMA_MAP_REG(v)			(0x1A00 + (0x1000 * ((v)->ee)))

[Severity: High]
Are these QAIF_EE_*_MAP_REG definitions missing a hex digit in their base
offsets?

The other Execution Engine (EE) registers appear to be in the 0x19000 range.
Because these map registers are defined with bases like 0x1920 instead of what
might be intended (e.g., 0x19920), they evaluate to addresses outside the
expected Execution Engine block.

For example, when v->ee evaluates to 3, QAIF_EE_RDDMA_MAP_REG results in offset
0x4920. This directly overlaps with the Audio Interface 0 block (which starts
at 0x4000), and could corrupt hardware configuration during initialization.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260923-b4-qaif-shikra-audio-v7-0-d5b6f056568e@oss.qualcomm.com?part=3

  reply	other threads:[~2026-09-23  7:00 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-23  6:48 [PATCH v7 00/10] ASoC: qcom: Add QAIF driver for Shikra audio platform Harendra Gautam
2026-09-23  6:48 ` [PATCH v7 01/10] ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding Harendra Gautam
2026-09-23  6:59   ` sashiko-bot
2026-09-23  6:48 ` [PATCH v7 02/10] ASoC: qcom: Add QAIF shared data structures and variant interface Harendra Gautam
2026-09-23  6:59   ` sashiko-bot
2026-09-23  9:29   ` Mark Brown
2026-09-28  9:11     ` Harendra Gautam
2026-09-23  6:48 ` [PATCH v7 03/10] ASoC: qcom: Add QAIF hardware register map Harendra Gautam
2026-09-23  7:00   ` sashiko-bot [this message]
2026-09-23  6:48 ` [PATCH v7 04/10] ASoC: qcom: Add QAIF CPU DAI ops, regmap, DT parsing and platform init Harendra Gautam
2026-09-23  7:02   ` sashiko-bot
2026-09-23  9:41   ` Mark Brown
2026-09-28  9:38     ` Harendra Gautam
2026-09-28 12:17       ` Harendra Gautam
2026-09-23  6:48 ` [PATCH v7 05/10] ASoC: soc-core: Add snd_soc_of_xlate_dai_name() generic helper Harendra Gautam
2026-09-23  7:00   ` sashiko-bot
2026-09-23  6:48 ` [PATCH v7 06/10] ASoC: qcom: Switch lpass-cpu and qaif-cpu to snd_soc_of_xlate_dai_name() Harendra Gautam
2026-09-24 10:32   ` Ajay Kumar Nandam
2026-09-23  6:48 ` [PATCH v7 07/10] ASoC: qcom: Add QAIF PCM operations Harendra Gautam
2026-09-23  7:03   ` sashiko-bot
2026-09-23  9:45   ` Mark Brown
2026-09-28  9:06     ` Harendra Gautam
2026-09-23  6:48 ` [PATCH v7 08/10] ASoC: qcom: Add QAIF IRQ handling and platform register Harendra Gautam
2026-09-23  7:04   ` sashiko-bot
2026-09-23  6:48 ` [PATCH v7 09/10] ASoC: qcom: Add Shikra QAIF support Harendra Gautam
2026-09-23  7:09   ` sashiko-bot
2026-09-23  6:48 ` [PATCH v7 10/10] MAINTAINERS: Add Qualcomm QAIF driver entry Harendra Gautam
2026-09-23  9:27 ` [PATCH v7 00/10] ASoC: qcom: Add QAIF driver for Shikra audio platform Mark Brown
2026-09-28  5:44   ` Harendra Gautam

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