* [PATCH v4 1/8] arm64: dts: qcom: ipq5018: Flatten usb controller node
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 2/8] arm64: dts: qcom: ipq5332: " George Moussalem via B4 Relay
` (6 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
Flatten usb controller node and update to using latest bindings and
flattened driver approach.
In addition, set the right UTMI clock rate and override any clock
rate inherited from the bootloader.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 6 +--
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 51 ++++++++++++--------------
2 files changed, 25 insertions(+), 32 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
index 34d4a0886356..1c1006ec50ca 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
@@ -120,11 +120,9 @@ data-pins {
};
&usb {
- status = "okay";
-};
-
-&usb_dwc {
dr_mode = "host";
+
+ status = "okay";
};
&usbphy0 {
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
index fe1ed240de59..4f81e87ffdbf 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -597,16 +597,9 @@ qpic_nand: spi@79b0000 {
status = "disabled";
};
- usb: usb@8af8800 {
- compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
-
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
- "dp_hs_phy_irq",
- "dm_hs_phy_irq";
+ usb: usb@8a00000 {
+ compatible = "qcom,ipq5018-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
@@ -616,30 +609,32 @@ usb: usb@8af8800 {
"iface",
"sleep",
"mock_utmi";
+ assigned-clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <24000000>;
+
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
resets = <&gcc GCC_USB0_BCR>;
+ phys = <&usbphy0>;
+ phy-names = "usb2-phy";
+
qcom,select-utmi-as-pipe-clk;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- status = "disabled";
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
- usb_dwc: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x08a00000 0xe000>;
- clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phy-names = "usb2-phy";
- phys = <&usbphy0>;
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ status = "disabled";
};
intc: interrupt-controller@b000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v4 2/8] arm64: dts: qcom: ipq5332: Flatten usb controller node
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 1/8] arm64: dts: qcom: ipq5018: Flatten usb controller node George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 3/8] arm64: dts: qcom: ipq5424: Flatten usb controller nodes George Moussalem via B4 Relay
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
Flatten usb controller node and update to using latest bindings and
flattened driver approach.
In addition, set the right UTMI clock rate and override any clock rate
inherited from the bootloader.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 6 +--
arch/arm64/boot/dts/qcom/ipq5332.dtsi | 57 +++++++++++++----------------
2 files changed, 28 insertions(+), 35 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts
index c224ffc65b08..25a70cd884c0 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts
@@ -90,11 +90,9 @@ spi_0_cs_pins: spi-0-cs-state {
};
&usb {
- status = "okay";
-};
-
-&usb_dwc {
dr_mode = "host";
+
+ status = "okay";
};
&usbphy0 {
diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
index 74d9de8d7641..25c32e966de9 100644
--- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
@@ -493,16 +493,9 @@ qpic_nand: spi@79b0000 {
status = "disabled";
};
- usb: usb@8af8800 {
- compatible = "qcom,ipq5332-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
-
- interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
- "dp_hs_phy_irq",
- "dm_hs_phy_irq";
+ usb: usb@8a00000 {
+ compatible = "qcom,ipq5332-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_SLEEP_CLK>,
@@ -510,34 +503,36 @@ usb: usb@8af8800 {
clock-names = "core",
"sleep",
"mock_utmi";
+ assigned-clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ assigned-clock-rates = <24000000>;
- resets = <&gcc GCC_USB_BCR>;
-
- qcom,select-utmi-as-pipe-clk;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
interconnects = <&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>,
<&gcc MASTER_SNOC_USB &gcc SLAVE_SNOC_USB>;
interconnect-names = "usb-ddr", "apps-usb";
- status = "disabled";
+ resets = <&gcc GCC_USB_BCR>;
- usb_dwc: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x08a00000 0xe000>;
- clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
- phy-names = "usb2-phy";
- phys = <&usbphy0>;
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ phys = <&usbphy0>;
+ phy-names = "usb2-phy";
+
+ qcom,select-utmi-as-pipe-clk;
+
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
+ status = "disabled";
};
intc: interrupt-controller@b000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v4 3/8] arm64: dts: qcom: ipq5424: Flatten usb controller nodes
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 1/8] arm64: dts: qcom: ipq5018: Flatten usb controller node George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 2/8] arm64: dts: qcom: ipq5332: " George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
2026-10-01 8:04 ` sashiko-bot
2026-10-01 7:53 ` [PATCH v4 4/8] arm64: dts: qcom: ipq6018: move DR mode to board DTS George Moussalem via B4 Relay
` (4 subsequent siblings)
7 siblings, 1 reply; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 12 ++--
arch/arm64/boot/dts/qcom/ipq5424.dtsi | 86 +++++++++++++----------------
2 files changed, 41 insertions(+), 57 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index 793afc3ee82e..0c3370dba65b 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -74,14 +74,6 @@ vreg_misc_0p925: regulator-usb-0p925 {
};
};
-&dwc_0 {
- dr_mode = "host";
-};
-
-&dwc_1 {
- dr_mode = "host";
-};
-
&pcie2 {
pinctrl-0 = <&pcie2_default_state>;
pinctrl-names = "default";
@@ -284,10 +276,14 @@ &uart1 {
};
&usb2 {
+ dr_mode = "host";
+
status = "okay";
};
&usb3 {
+ dr_mode = "host";
+
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index 23f851e9241f..b1bfe31227e7 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -640,12 +640,9 @@ qusb_phy_1: phy@71000 {
status = "disabled";
};
- usb2: usb2@1ef8800 {
- compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
- reg = <0 0x01ef8800 0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ usb2: usb2@1e00000 {
+ compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3";
+ reg = <0 0x01e00000 0 0xfc100>;
clocks = <&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_SLEEP_CLK>,
@@ -664,33 +661,31 @@ usb2: usb2@1ef8800 {
assigned-clock-rates = <200000000>,
<24000000>;
- interrupts-extended = <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
resets = <&gcc GCC_USB1_BCR>;
+
+ phys = <&qusb_phy_1>;
+ phy-names = "usb2-phy";
+
qcom,select-utmi-as-pipe-clk;
- status = "disabled";
- dwc_1: usb@1e00000 {
- compatible = "snps,dwc3";
- reg = <0 0x01e00000 0 0xe000>;
- clocks = <&gcc GCC_USB1_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_1>;
- phy-names = "usb2-phy";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
+ status = "disabled";
};
qusb_phy_0: phy@7b000 {
@@ -746,13 +741,9 @@ restart_reason: restartreason-sram@7b0 {
};
};
- usb3: usb3@8af8800 {
- compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
- reg = <0 0x08af8800 0 0x400>;
-
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ usb3: usb3@8a00000 {
+ compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3";
+ reg = <0 0x08a00000 0 0xfc100>;
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_SLEEP_CLK>,
@@ -771,34 +762,31 @@ usb3: usb3@8af8800 {
assigned-clock-rates = <200000000>,
<24000000>;
- interrupts-extended = <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"dm_hs_phy_irq",
"dp_hs_phy_irq";
resets = <&gcc GCC_USB_BCR>;
- status = "disabled";
- dwc_0: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0 0x08a00000 0 0xcd00>;
- clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_0>, <&ssphy_0>;
- phy-names = "usb2-phy", "usb3-phy";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- snps,dis-u1-entry-quirk;
- snps,dis-u2-entry-quirk;
- };
+ phys = <&qusb_phy_0>, <&ssphy_0>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+
+ status = "disabled";
};
timer@f420000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH v4 3/8] arm64: dts: qcom: ipq5424: Flatten usb controller nodes
2026-10-01 7:53 ` [PATCH v4 3/8] arm64: dts: qcom: ipq5424: Flatten usb controller nodes George Moussalem via B4 Relay
@ 2026-10-01 8:04 ` sashiko-bot
0 siblings, 0 replies; 10+ messages in thread
From: sashiko-bot @ 2026-10-01 8:04 UTC (permalink / raw)
To: George Moussalem; +Cc: devicetree, conor+dt, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: IPQ5424 USB clocks and interrupts order violates qcom,snps-dwc3 schema
--
commit 37ae00028e39229f3da1503fa9411f44830ec187
Author: George Moussalem <george.moussalem@outlook.com>
arm64: dts: qcom: ipq5424: Flatten usb controller nodes
Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.
> diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> index 23f851e9241fe..b1bfe31227e76 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
[ ... ]
> @@ -640,12 +640,9 @@ qusb_phy_1: phy@71000 {
> status = "disabled";
> };
>
> - usb2: usb2@1ef8800 {
> - compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
> - reg = <0 0x01ef8800 0 0x400>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> + usb2: usb2@1e00000 {
> + compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3";
> + reg = <0 0x01e00000 0 0xfc100>;
>
> clocks = <&gcc GCC_USB1_MASTER_CLK>,
> <&gcc GCC_USB1_SLEEP_CLK>,
[Severity: Low]
Does changing the compatible string to qcom,snps-dwc3 cause a dtbs_check
validation failure here?
The existing array sequence for clocks in this node does not match the strict
ordering (cfg_noc, core, iface, sleep, mock_utmi) mandated by the newly
applied qcom,snps-dwc3 schema.
[ ... ]
> @@ -664,33 +661,31 @@ usb2: usb2@1ef8800 {
> assigned-clock-rates = <200000000>,
> <24000000>;
>
> - interrupts-extended = <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> + interrupts-extended = <&intc GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
> <&intc GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
> <&intc GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
> <&intc GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "pwr_event",
> + interrupt-names = "dwc_usb3",
> + "pwr_event",
> "qusb2_phy",
> "dm_hs_phy_irq",
> "dp_hs_phy_irq";
[Severity: Low]
Is the order of interrupts correct for the new schema?
The newly applied qcom,snps-dwc3 schema dictates that dp_hs_phy_irq must be
declared before dm_hs_phy_irq, but they are listed in the reverse order here.
This will cause dtbs_check to fail.
[ ... ]
> - usb3: usb3@8af8800 {
> - compatible = "qcom,ipq5424-dwc3", "qcom,dwc3";
> - reg = <0 0x08af8800 0 0x400>;
> -
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> + usb3: usb3@8a00000 {
> + compatible = "qcom,ipq5424-dwc3", "qcom,snps-dwc3";
> + reg = <0 0x08a00000 0 0xfc100>;
>
> clocks = <&gcc GCC_USB0_MASTER_CLK>,
> <&gcc GCC_USB0_SLEEP_CLK>,
[Severity: Low]
Does changing the compatible string to qcom,snps-dwc3 cause a dtbs_check
validation failure here?
The existing array sequence for clocks in this node does not match the strict
ordering (cfg_noc, core, iface, sleep, mock_utmi) mandated by the newly
applied qcom,snps-dwc3 schema.
[ ... ]
> @@ -771,34 +762,31 @@ usb3: usb3@8af8800 {
> assigned-clock-rates = <200000000>,
> <24000000>;
>
> - interrupts-extended = <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> + interrupts-extended = <&intc GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
> + <&intc GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
> <&intc GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
> <&intc GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> <&intc GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "pwr_event",
> + interrupt-names = "dwc_usb3",
> + "pwr_event",
> "qusb2_phy",
> "dm_hs_phy_irq",
> "dp_hs_phy_irq";
[Severity: Low]
Is the order of interrupts correct for the new schema?
The newly applied qcom,snps-dwc3 schema dictates that dp_hs_phy_irq must be
declared before dm_hs_phy_irq, but they are listed in the reverse order here.
This will cause dtbs_check to fail.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261001-ipq-flatten-usb-v4-0-486a4d5ede30@outlook.com?part=3
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 4/8] arm64: dts: qcom: ipq6018: move DR mode to board DTS
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
` (2 preceding siblings ...)
2026-10-01 7:53 ` [PATCH v4 3/8] arm64: dts: qcom: ipq5424: Flatten usb controller nodes George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 5/8] arm64: dts: qcom: ipq6018: Flatten usb controller nodes George Moussalem via B4 Relay
` (3 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
The controller is DRD capable, but it's currently set to host mode in
the SoC dtsi. Unset it in the SoC dtsi and set it as host mode in the
cp01-c1 board DTS file.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 ++++
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 --
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index 9c69d3027b43..a366be17c251 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -48,6 +48,10 @@ flash@0 {
};
};
+&dwc_1 {
+ dr_mode = "host";
+};
+
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio42", "gpio43";
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 0701517275d4..c02110ad9cb0 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -460,7 +460,6 @@ dwc_1: usb@7000000 {
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
- dr_mode = "host";
};
};
@@ -716,7 +715,6 @@ dwc_0: usb@8a00000 {
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
- dr_mode = "host";
};
};
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v4 5/8] arm64: dts: qcom: ipq6018: Flatten usb controller nodes
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
` (3 preceding siblings ...)
2026-10-01 7:53 ` [PATCH v4 4/8] arm64: dts: qcom: ipq6018: move DR mode to board DTS George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 6/8] arm64: dts: qcom: ipq8074: move DR mode to board DTS George Moussalem via B4 Relay
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 6 +-
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 93 +++++++++++++---------------
2 files changed, 44 insertions(+), 55 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index a366be17c251..dfc3aac955e8 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -48,10 +48,6 @@ flash@0 {
};
};
-&dwc_1 {
- dr_mode = "host";
-};
-
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio42", "gpio43";
@@ -88,5 +84,7 @@ &qusb_phy_1 {
};
&usb2 {
+ dr_mode = "host";
+
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index c02110ad9cb0..4f5f8b628bf2 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -423,12 +423,10 @@ pwm: pwm@1941010 {
status = "disabled";
};
- usb2: usb@70f8800 {
- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
- reg = <0x0 0x070f8800 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ usb2: usb@7000000 {
+ compatible = "qcom,ipq6018-dwc3", "qcom,snps-dwc3";
+ reg = <0x0 0x07000000 0x0 0xfc100>;
+
clocks = <&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_SLEEP_CLK>,
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
@@ -441,26 +439,25 @@ usb2: usb@70f8800 {
assigned-clock-rates = <133330000>,
<24000000>;
- interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy";
resets = <&gcc GCC_USB1_BCR>;
- status = "disabled";
- dwc_1: usb@7000000 {
- compatible = "snps,dwc3";
- reg = <0x0 0x07000000 0x0 0xcd00>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_1>;
- phy-names = "usb2-phy";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ phys = <&qusb_phy_1>;
+ phy-names = "usb2-phy";
+
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
+ status = "disabled";
};
sdhc: mmc@7804000 {
@@ -668,21 +665,18 @@ qpic_nand: nand-controller@79b0000 {
status = "disabled";
};
- usb3: usb@8af8800 {
- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
- reg = <0x0 0x08af8800 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ usb3: usb@8a00000 {
+ compatible = "qcom,ipq6018-dwc3", "qcom,snps-dwc3";
+ reg = <0x0 0x08a00000 0x0 0xfc100>;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_SLEEP_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
@@ -691,31 +685,28 @@ usb3: usb@8af8800 {
<133330000>,
<24000000>;
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"ss_phy_irq";
resets = <&gcc GCC_USB0_BCR>;
- status = "disabled";
- dwc_0: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x0 0x08a00000 0x0 0xcd00>;
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_0>, <&ssphy_0>;
- phy-names = "usb2-phy", "usb3-phy";
- clocks = <&xo>;
- clock-names = "ref";
- tx-fifo-resize;
- snps,parkmode-disable-ss-quirk;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ phys = <&qusb_phy_0>, <&ssphy_0>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ tx-fifo-resize;
+ snps,parkmode-disable-ss-quirk;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
+ status = "disabled";
};
intc: interrupt-controller@b000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v4 6/8] arm64: dts: qcom: ipq8074: move DR mode to board DTS
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
` (4 preceding siblings ...)
2026-10-01 7:53 ` [PATCH v4 5/8] arm64: dts: qcom: ipq6018: Flatten usb controller nodes George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 7/8] arm64: dts: qcom: ipq8074: Flatten usb controller nodes George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 8/8] arm64: dts: qcom: ipq9574: Flatten usb controller node George Moussalem via B4 Relay
7 siblings, 0 replies; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
Both controllers are DRD capable, but DR mode currently set to host mode
in the SoC dtsi. Unset it in the SoC dtsi and set it as host mode in the
hk01 board DTS file.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 8 ++++++++
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 --
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index dea5ece600d4..75827676bde9 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -52,6 +52,14 @@ &blsp1_uart5 {
status = "okay";
};
+&dwc_0 {
+ dr_mode = "host";
+};
+
+&dwc_1 {
+ dr_mode = "host";
+};
+
&pcie0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 75a5ae30d966..5c57d9cd72fc 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -671,7 +671,6 @@ dwc_0: usb@8a00000 {
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
- dr_mode = "host";
};
};
@@ -721,7 +720,6 @@ dwc_1: usb@8c00000 {
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
- dr_mode = "host";
};
};
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v4 7/8] arm64: dts: qcom: ipq8074: Flatten usb controller nodes
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
` (5 preceding siblings ...)
2026-10-01 7:53 ` [PATCH v4 6/8] arm64: dts: qcom: ipq8074: move DR mode to board DTS George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
2026-10-01 7:53 ` [PATCH v4 8/8] arm64: dts: qcom: ipq9574: Flatten usb controller node George Moussalem via B4 Relay
7 siblings, 0 replies; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.
In addition, fix indentation of properties in both nodes.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 12 ++--
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 108 ++++++++++++++----------------
2 files changed, 54 insertions(+), 66 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 75827676bde9..2a3b497f9598 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -52,14 +52,6 @@ &blsp1_uart5 {
status = "okay";
};
-&dwc_0 {
- dr_mode = "host";
-};
-
-&dwc_1 {
- dr_mode = "host";
-};
-
&pcie0 {
status = "okay";
};
@@ -125,9 +117,13 @@ &ssphy_1 {
};
&usb_0 {
+ dr_mode = "host";
+
status = "okay";
};
&usb_1 {
+ dr_mode = "host";
+
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 5c57d9cd72fc..45745b58495c 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -625,102 +625,94 @@ qpic_nand: nand-controller@79b0000 {
status = "disabled";
};
- usb_0: usb@8af8800 {
- compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ usb_0: usb@8a00000 {
+ compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_SLEEP_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
- <133330000>,
- <19200000>;
+ <133330000>,
+ <19200000>;
- interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"ss_phy_irq";
power-domains = <&gcc USB0_GDSC>;
+ phys = <&qusb_phy_0>, <&ssphy_0>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ snps,parkmode-disable-ss-quirk;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
resets = <&gcc GCC_USB0_BCR>;
- status = "disabled";
- dwc_0: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x8a00000 0xcd00>;
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_0>, <&ssphy_0>;
- phy-names = "usb2-phy", "usb3-phy";
- snps,parkmode-disable-ss-quirk;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ status = "disabled";
};
- usb_1: usb@8cf8800 {
- compatible = "qcom,ipq8074-dwc3", "qcom,dwc3";
- reg = <0x08cf8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ usb_1: usb@8c00000 {
+ compatible = "qcom,ipq8074-dwc3", "qcom,snps-dwc3";
+ reg = <0x08c00000 0xfc100>;
clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,
- <&gcc GCC_USB1_MASTER_CLK>,
- <&gcc GCC_USB1_SLEEP_CLK>,
- <&gcc GCC_USB1_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB1_MASTER_CLK>,
+ <&gcc GCC_USB1_SLEEP_CLK>,
+ <&gcc GCC_USB1_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB1_AXI_CLK>,
<&gcc GCC_USB1_MASTER_CLK>,
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
assigned-clock-rates = <133330000>,
- <133330000>,
- <19200000>;
+ <133330000>,
+ <19200000>;
- interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
"ss_phy_irq";
power-domains = <&gcc USB1_GDSC>;
+ phys = <&qusb_phy_1>, <&ssphy_1>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ snps,parkmode-disable-ss-quirk;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
resets = <&gcc GCC_USB1_BCR>;
- status = "disabled";
- dwc_1: usb@8c00000 {
- compatible = "snps,dwc3";
- reg = <0x8c00000 0xcd00>;
- interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&qusb_phy_1>, <&ssphy_1>;
- phy-names = "usb2-phy", "usb3-phy";
- snps,parkmode-disable-ss-quirk;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ status = "disabled";
};
intc: interrupt-controller@b000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v4 8/8] arm64: dts: qcom: ipq9574: Flatten usb controller node
2026-10-01 7:53 [PATCH v4 0/8] Flatten USB Controller Nodes on IPQ SoCs George Moussalem via B4 Relay
` (6 preceding siblings ...)
2026-10-01 7:53 ` [PATCH v4 7/8] arm64: dts: qcom: ipq8074: Flatten usb controller nodes George Moussalem via B4 Relay
@ 2026-10-01 7:53 ` George Moussalem via B4 Relay
7 siblings, 0 replies; 10+ messages in thread
From: George Moussalem via B4 Relay @ 2026-10-01 7:53 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Thinh Nguyen, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: linux-arm-msm, linux-usb, devicetree, linux-kernel,
Varadarajan Narayanan, Kathiravan Thirumoorthy, George Moussalem,
Abel Vesa, Konrad Dybcio
From: George Moussalem <george.moussalem@outlook.com>
Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.
In addition, swap interrupts for dp_hs_phy_irq and dm_hs_phy_irq as
per order in updated binding.
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 6 +--
arch/arm64/boot/dts/qcom/ipq9574.dtsi | 48 +++++++++++-------------
2 files changed, 23 insertions(+), 31 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
index 86138529ba77..68616590815b 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
@@ -254,10 +254,6 @@ flash@0 {
};
};
-&usb_0_dwc3 {
- dr_mode = "host";
-};
-
&usb_0_qmpphy {
vdda-pll-supply = <&mp5496_l5>;
vdda-phy-supply = <®ulator_fixed_0p925>;
@@ -274,6 +270,8 @@ &usb_0_qusbphy {
};
&usb3 {
+ dr_mode = "host";
+
status = "okay";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 771a59585645..abb7a8391b46 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -757,12 +757,9 @@ usb_0_qmpphy: phy@7d000 {
status = "disabled";
};
- usb3: usb@8af8800 {
- compatible = "qcom,ipq9574-dwc3", "qcom,dwc3";
- reg = <0x08af8800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ usb3: usb@8a00000 {
+ compatible = "qcom,ipq9574-dwc3", "qcom,snps-dwc3";
+ reg = <0x08a00000 0xfc100>;
clocks = <&gcc GCC_SNOC_USB_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
@@ -781,32 +778,29 @@ usb3: usb@8af8800 {
assigned-clock-rates = <200000000>,
<24000000>;
- interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
- <&intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
- <&intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ <&intc GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"qusb2_phy",
- "dm_hs_phy_irq",
- "dp_hs_phy_irq";
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq";
resets = <&gcc GCC_USB_BCR>;
- status = "disabled";
- usb_0_dwc3: usb@8a00000 {
- compatible = "snps,dwc3";
- reg = <0x8a00000 0xcd00>;
- clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
- clock-names = "ref";
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb_0_qusbphy>, <&usb_0_qmpphy>;
- phy-names = "usb2-phy", "usb3-phy";
- tx-fifo-resize;
- snps,is-utmi-l1-suspend;
- snps,hird-threshold = /bits/ 8 <0x0>;
- snps,dis_u2_susphy_quirk;
- snps,dis_u3_susphy_quirk;
- };
+ phys = <&usb_0_qusbphy>, <&usb_0_qmpphy>;
+ phy-names = "usb2-phy", "usb3-phy";
+
+ tx-fifo-resize;
+ snps,is-utmi-l1-suspend;
+ snps,hird-threshold = /bits/ 8 <0x0>;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+
+ status = "disabled";
};
intc: interrupt-controller@b000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 10+ messages in thread