* [PATCH v4 1/6] media: iris: wait for vpu NoC to enter low power during power off
2026-10-01 15:17 [PATCH v4 0/6] media: iris: add support for kaanapali platform Vikash Garodia
@ 2026-10-01 15:17 ` Vikash Garodia
2026-10-01 15:28 ` sashiko-bot
2026-10-01 15:17 ` [PATCH v4 2/6] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding Vikash Garodia
` (4 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Vikash Garodia @ 2026-10-01 15:17 UTC (permalink / raw)
To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Hans Verkuil, Vishnu Reddy, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stanimir Varbanov,
Bjorn Andersson, Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, linux-kernel, Krzysztof Kozlowski,
devicetree, Vikash Garodia, stable
The recommended hardware sequence requires software to wait for vpu NoC
to enter in low power mode and then deassert the low power idle (LPI)
control. Add the missing LPI status poll and move the LPI control
deassertion after the hardware acks LPI mode. This avoids any pending
transactions on vpu NoC before shutting it down.
Fixes: dde659d37036 ("media: iris: Introduce vpu ops for vpu4 with necessary hooks")
Cc: stable@vger.kernel.org
Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
---
drivers/media/platform/qcom/iris/iris_vpu4x.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/platform/qcom/iris/iris_vpu4x.c
index 02e100a4045fced33d7a3545b632cc5f0955233f..32a161c8d534a34eee4e7778426b4947b6c17003 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu4x.c
+++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c
@@ -316,6 +316,10 @@ static void iris_vpu4x_power_off_hardware(struct iris_core *core)
if (!handshake_done && handshake_busy)
dev_err(core->dev, "LPI handshake timeout\n");
+ readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS,
+ value, value & BIT(0), 200, 2000);
+ writel(0x0, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
+
writel(MVP_NOC_RESET_REQ_MASK, core->reg_base + AON_WRAPPER_MVP_NOC_RESET_REQ);
ret = readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_RESET_ACK,
value, value & MVP_NOC_RESET_REQ_MASK, 200, 2000);
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v4 1/6] media: iris: wait for vpu NoC to enter low power during power off
2026-10-01 15:17 ` [PATCH v4 1/6] media: iris: wait for vpu NoC to enter low power during power off Vikash Garodia
@ 2026-10-01 15:28 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-10-01 15:28 UTC (permalink / raw)
To: Vikash Garodia; +Cc: media-ci, devicetree, robh, conor+dt
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] media: iris: unhandled timeout on VPU NoC LPI status poll
- [Low] media: iris: magic number used instead of NOC_LPI_STATUS_DONE
--
commit ad8593fbbb8fd303ff77853725986ef7bd6d05a9
Author: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
media: iris: wait for vpu NoC to enter low power during power off
The recommended hardware sequence requires software to wait for vpu NoC
to enter in low power mode and then deassert the low power idle (LPI)
control. Add the missing LPI status poll and move the LPI control
deassertion after the hardware acks LPI mode. This avoids any pending
transactions on vpu NoC before shutting it down.
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu4x.c b/drivers/media/platform/qcom/iris/iris_vpu4x.c
> index 02e100a4045fc..32a161c8d534a 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu4x.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu4x.c
> @@ -316,6 +316,10 @@ static void iris_vpu4x_power_off_hardware(struct iris_core *core)
> if (!handshake_done && handshake_busy)
> dev_err(core->dev, "LPI handshake timeout\n");
>
> + readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS,
> + value, value & BIT(0), 200, 2000);
[Severity: Low]
This isn't a bug, but could NOC_LPI_STATUS_DONE be used here instead of the
magic number BIT(0) to remain consistent with the rest of the function?
[Severity: Medium]
Is it intentional to discard the return value of readl_poll_timeout() here?
If the poll times out, the code silently proceeds to deassert LPI control and
reset the NoC, which could lead to hardware stalls from pending transactions.
Additionally, if the preceding do-while loop times out, LPI_CONTROL is left
at 0x0. This appears to guarantee the new poll will unconditionally fail and
wait the full 2000 microseconds.
Could this return value be assigned to 'ret' and handled similarly to the
other polling loops in this function?
> + writel(0x0, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL);
> +
> writel(MVP_NOC_RESET_REQ_MASK, core->reg_base + AON_WRAPPER_MVP_NOC_RESET_REQ);
> ret = readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_RESET_ACK,
> value, value & MVP_NOC_RESET_REQ_MASK, 200, 2000);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261001-kaanapali-iris-v4-0-642f9ac5e699@oss.qualcomm.com?part=1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v4 2/6] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding
2026-10-01 15:17 [PATCH v4 0/6] media: iris: add support for kaanapali platform Vikash Garodia
2026-10-01 15:17 ` [PATCH v4 1/6] media: iris: wait for vpu NoC to enter low power during power off Vikash Garodia
@ 2026-10-01 15:17 ` Vikash Garodia
2026-10-01 15:28 ` sashiko-bot
2026-10-03 14:30 ` Krzysztof Kozlowski
2026-10-01 15:17 ` [PATCH v4 3/6] media: iris: add iris4 specific H265 line buffer calculation Vikash Garodia
` (3 subsequent siblings)
5 siblings, 2 replies; 11+ messages in thread
From: Vikash Garodia @ 2026-10-01 15:17 UTC (permalink / raw)
To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Hans Verkuil, Vishnu Reddy, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stanimir Varbanov,
Bjorn Andersson, Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, linux-kernel, Krzysztof Kozlowski,
devicetree, Vikash Garodia
Kaanapali SOC brings in the new generation of video IP i.e iris4. When
compared to previous generation, iris3x, it has,
- separate power domains for stream and pixel processing hardware blocks
(bse and vpp).
- additional power domain for apv codec.
- power domains for individual pipes (VPPx).
- different clocks and reset lines.
Update maxitems constraints for clocks, power-domains, and non-pixel
IOMMUs in the common venus schema to accommodate additional bindings in
kaanapali. Kaanapali platform-specific schema defines fixed constraints
for these properties, so the common schema now serves as an upper bound.
As a result, add explicit maxitems constraints for the non-pixel IOMMUs
in the qcom,sm8550-iris and qcom,sm8750-iris schemas to preserve their
respective fixed constraints.
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
---
.../bindings/media/qcom,kaanapali-iris.yaml | 227 +++++++++++++++++++++
.../bindings/media/qcom,sm8550-iris.yaml | 6 +
.../bindings/media/qcom,sm8750-iris.yaml | 6 +
.../bindings/media/qcom,venus-common.yaml | 11 +-
4 files changed, 245 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..02b3fa3b5e11b863cb354240915a2de2c2beb3e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml
@@ -0,0 +1,227 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/qcom,kaanapali-iris.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Kaanapali Iris video encoder and decoder
+
+maintainers:
+ - Vikash Garodia <vikash.garodia@oss.qualcomm.com>
+ - Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
+
+description:
+ The iris video processing unit is a video encode and decode accelerator
+ present on Qualcomm Kaanapali SoC.
+
+properties:
+ compatible:
+ const: qcom,kaanapali-iris
+
+ clocks:
+ maxItems: 10
+
+ clock-names:
+ items:
+ - const: iface
+ - const: core
+ - const: vcodec0_core
+ - const: iface1
+ - const: core_freerun
+ - const: vcodec0_core_freerun
+ - const: vcodec_bse
+ - const: vcodec_vpp0
+ - const: vcodec_vpp1
+ - const: vcodec_apv
+
+ dma-coherent: true
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: cpu-cfg
+ - const: video-mem
+
+ non-pixel:
+ type: object
+ properties:
+ iommus:
+ maxItems: 3
+
+ operating-points-v2: true
+ opp-table:
+ type: object
+
+ power-domains:
+ maxItems: 7
+
+ power-domain-names:
+ items:
+ - const: venus
+ - const: vcodec0
+ - const: mxc
+ - const: mmcx
+ - const: vpp0
+ - const: vpp1
+ - const: apv
+
+ resets:
+ maxItems: 4
+
+ reset-names:
+ items:
+ - const: bus0
+ - const: bus1
+ - const: core
+ - const: vcodec0_core
+
+required:
+ - compatible
+ - dma-coherent
+ - interconnects
+ - interconnect-names
+ - power-domain-names
+ - resets
+ - reset-names
+
+allOf:
+ - $ref: qcom,venus-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom,rpmhpd.h>
+
+ video-codec@2000000 {
+ compatible = "qcom,kaanapali-iris";
+ reg = <0x02000000 0xf0000>;
+
+ clocks = <&gcc_video_axi0_clk>,
+ <&video_cc_mvs0c_clk>,
+ <&video_cc_mvs0_clk>,
+ <&gcc_video_axi1_clk>,
+ <&video_cc_mvs0c_freerun_clk>,
+ <&video_cc_mvs0_freerun_clk>,
+ <&video_cc_mvs0b_clk>,
+ <&video_cc_mvs0_vpp0_clk>,
+ <&video_cc_mvs0_vpp1_clk>,
+ <&video_cc_mvs0a_clk>;
+ clock-names = "iface",
+ "core",
+ "vcodec0_core",
+ "iface1",
+ "core_freerun",
+ "vcodec0_core_freerun",
+ "vcodec_bse",
+ "vcodec_vpp0",
+ "vcodec_vpp1",
+ "vcodec_apv";
+
+ dma-coherent;
+
+ interconnects = <&gem_noc_master_appss_proc &config_noc_slave_venus_cfg>,
+ <&mmss_noc_master_video_mvp &mc_virt_slave_ebi1>;
+ interconnect-names = "cpu-cfg",
+ "video-mem";
+
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+ memory-region = <&video_mem>;
+
+ operating-points-v2 = <&iris_opp_table>;
+
+ power-domains = <&video_cc_mvs0c_gdsc>,
+ <&video_cc_mvs0_gdsc>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&video_cc_mvs0_vpp0_gdsc>,
+ <&video_cc_mvs0_vpp1_gdsc>,
+ <&video_cc_mvs0a_gdsc>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mxc",
+ "mmcx",
+ "vpp0",
+ "vpp1",
+ "apv";
+
+ resets = <&gcc_video_axi0_clk_ares>,
+ <&gcc_video_axi1_clk_ares>,
+ <&video_cc_mvs0c_freerun_clk_ares>,
+ <&video_cc_mvs0_freerun_clk_ares>;
+ reset-names = "bus0",
+ "bus1",
+ "core",
+ "vcodec0_core";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ dma-ranges = <0x0 0x0 0xffc00000>;
+
+ non-pixel {
+ iommus = <&apps_smmu 0x1940 0x0>,
+ <&apps_smmu 0x1944 0x0>,
+ <&apps_smmu 0x1a20 0x0>;
+ iommu-ranges = <0x25800000 0xda400000>;
+ };
+
+ pixel {
+ iommus = <&apps_smmu 0x1943 0x0>;
+ };
+
+ iris_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-240000000 {
+ opp-hz = /bits/ 64 <240000000 240000000 240000000 360000000>;
+ required-opps = <&rpmhpd_opp_low_svs_d1>,
+ <&rpmhpd_opp_low_svs_d1>;
+ };
+
+ opp-338000000 {
+ opp-hz = /bits/ 64 <338000000 338000000 338000000 507000000>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-420000000 {
+ opp-hz = /bits/ 64 <420000000 420000000 420000000 630000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs>;
+ };
+
+ opp-444000000 {
+ opp-hz = /bits/ 64 <444000000 444000000 444000000 666000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-533000000 {
+ opp-hz = /bits/ 64 <533000000 533000000 533000000 800000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_nom>;
+ };
+
+ opp-630000000 {
+ opp-hz = /bits/ 64 <630000000 630000000 630000000 1104000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_turbo>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000 630000000 630000000 1260000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_turbo_l0>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000 630000000 850000000 1260000000>;
+ required-opps = <&rpmhpd_opp_nom>,
+ <&rpmhpd_opp_turbo_l1>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml
index 6ee9d23554cffb30c92017ef99de15c2493455ac..81d35be565f9a9b2129fea0dec1c9a76ae81da6c 100644
--- a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml
@@ -81,6 +81,12 @@ properties:
iommus:
maxItems: 2
+ non-pixel:
+ type: object
+ properties:
+ iommus:
+ maxItems: 1
+
dma-coherent: true
memory-region:
diff --git a/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml
index b6d5ded1aae6a1a6836c2c24b1dae548cdc6f9d2..6c1ed1b9fdde45fbcf02625e6e08bdb5b74f7d07 100644
--- a/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,sm8750-iris.yaml
@@ -43,6 +43,12 @@ properties:
iommus:
maxItems: 2
+ non-pixel:
+ type: object
+ properties:
+ iommus:
+ maxItems: 1
+
operating-points-v2: true
opp-table:
type: object
diff --git a/Documentation/devicetree/bindings/media/qcom,venus-common.yaml b/Documentation/devicetree/bindings/media/qcom,venus-common.yaml
index 68d5e592a028c5eecde04ce72cd5ae6815ba5c82..85d015d8b021af27da4e81ae8d890d3d855c690f 100644
--- a/Documentation/devicetree/bindings/media/qcom,venus-common.yaml
+++ b/Documentation/devicetree/bindings/media/qcom,venus-common.yaml
@@ -20,11 +20,11 @@ properties:
clocks:
minItems: 3
- maxItems: 7
+ maxItems: 10
clock-names:
minItems: 3
- maxItems: 7
+ maxItems: 10
firmware-name:
maxItems: 1
@@ -41,11 +41,11 @@ properties:
power-domains:
minItems: 1
- maxItems: 4
+ maxItems: 7
power-domain-names:
minItems: 1
- maxItems: 4
+ maxItems: 7
'#address-cells':
const: 1
@@ -64,7 +64,8 @@ properties:
properties:
iommus:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
iommu-ranges:
maxItems: 1
required:
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v4 2/6] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding
2026-10-01 15:17 ` [PATCH v4 2/6] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding Vikash Garodia
@ 2026-10-01 15:28 ` sashiko-bot
2026-10-03 14:30 ` Krzysztof Kozlowski
1 sibling, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-10-01 15:28 UTC (permalink / raw)
To: Vikash Garodia; +Cc: media-ci, robh, devicetree, conor+dt
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] dt-bindings: missing minItems constraint for Kaanapali non-pixel IOMMUs
--
commit 6f9f95b21ddb33d1c70e144093a6e9d9d8fc8379
Author: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding
This commit introduces device tree bindings for the video encoding and
decoding hardware on the Qualcomm Kaanapali SoC. It creates a new
platform-specific schema for Kaanapali and increases the maximum item
constraints in the common venus schema to accommodate it. It also adds
explicit constraints to existing iris schemas to maintain their fixed
upper bounds.
> diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml
> new file mode 100644
> index 0000000000000..02b3fa3b5e11b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-iris.yaml
> @@ -0,0 +1,227 @@
[ ... ]
> + interconnect-names:
> + items:
> + - const: cpu-cfg
> + - const: video-mem
> +
> + non-pixel:
> + type: object
> + properties:
> + iommus:
> + maxItems: 3
[Severity: Low]
The commit message notes that the platform-specific schema defines fixed
constraints for these properties. Since the common schema specifies
minItems: 1 for the non-pixel iommus, does this omission of minItems here
allow a configuration with 1 or 2 items to pass validation?
Should there be a minItems: 3 constraint added to enforce the exact
hardware requirement for Kaanapali?
> +
> + operating-points-v2: true
> + opp-table:
> + type: object
> +
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261001-kaanapali-iris-v4-0-642f9ac5e699@oss.qualcomm.com?part=2
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v4 2/6] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding
2026-10-01 15:17 ` [PATCH v4 2/6] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding Vikash Garodia
2026-10-01 15:28 ` sashiko-bot
@ 2026-10-03 14:30 ` Krzysztof Kozlowski
1 sibling, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2026-10-03 14:30 UTC (permalink / raw)
To: Vikash Garodia
Cc: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Hans Verkuil, Vishnu Reddy, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stanimir Varbanov,
Bjorn Andersson, Konrad Dybcio, Abel Vesa, linux-media,
linux-arm-msm, linux-kernel, devicetree
On Thu, Oct 01, 2026 at 08:47:22PM +0530, Vikash Garodia wrote:
> Kaanapali SOC brings in the new generation of video IP i.e iris4. When
> compared to previous generation, iris3x, it has,
> - separate power domains for stream and pixel processing hardware blocks
> (bse and vpp).
> - additional power domain for apv codec.
> - power domains for individual pipes (VPPx).
> - different clocks and reset lines.
>
> Update maxitems constraints for clocks, power-domains, and non-pixel
> IOMMUs in the common venus schema to accommodate additional bindings in
> kaanapali. Kaanapali platform-specific schema defines fixed constraints
> for these properties, so the common schema now serves as an upper bound.
> As a result, add explicit maxitems constraints for the non-pixel IOMMUs
> in the qcom,sm8550-iris and qcom,sm8750-iris schemas to preserve their
> respective fixed constraints.
>
> Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
> ---
> .../bindings/media/qcom,kaanapali-iris.yaml | 227 +++++++++++++++++++++
This patchset has multiple dependencies and pieces of the binding are
not even in the next from Friday, so it will have to wait. I had
impression the non-pixel bindings were picked up, but apparently not.
Honestly, amount of patches built on top of other patches on top of
other patches and depending on dtschema is not making any of this easy
for review. I know it is not your fault, we talked, thus I do not
complain. Just heads up why this will wait with review.
> .../bindings/media/qcom,sm8550-iris.yaml | 6 +
> .../bindings/media/qcom,sm8750-iris.yaml | 6 +
> .../bindings/media/qcom,venus-common.yaml | 11 +-
> 4 files changed, 245 insertions(+), 5 deletions(-)
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v4 3/6] media: iris: add iris4 specific H265 line buffer calculation
2026-10-01 15:17 [PATCH v4 0/6] media: iris: add support for kaanapali platform Vikash Garodia
2026-10-01 15:17 ` [PATCH v4 1/6] media: iris: wait for vpu NoC to enter low power during power off Vikash Garodia
2026-10-01 15:17 ` [PATCH v4 2/6] media: dt-bindings: qcom-kaanapali-iris: Add kaanapali video codec binding Vikash Garodia
@ 2026-10-01 15:17 ` Vikash Garodia
2026-10-01 15:32 ` sashiko-bot
2026-10-01 15:17 ` [PATCH v4 4/6] media: iris: add platform data for kaanapali Vikash Garodia
` (2 subsequent siblings)
5 siblings, 1 reply; 11+ messages in thread
From: Vikash Garodia @ 2026-10-01 15:17 UTC (permalink / raw)
To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Hans Verkuil, Vishnu Reddy, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stanimir Varbanov,
Bjorn Andersson, Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, linux-kernel, Krzysztof Kozlowski,
devicetree, Vikash Garodia
The H265 decoder line buffer size calculation for iris4 (VPU4) was
previously reusing the iris3 formula. While this works for most
resolutions, certain configurations require a larger buffer size on
iris4, causing firmware errors during decode. This resolves firmware
failures seen with specific test vectors on kaanapali (iris4), and fixes
the following failing fluster tests
- PICSIZE_C_Bossen_1
- WPP_E_ericsson_MAIN_2
10bit tests
- DBLK_A_MAIN10_VIXS_4
- INITQP_B_Main10_Sony_1
- WP_A_MAIN10_Toshiba_3
- WP_MAIN10_B_Toshiba_3
- WPP_A_ericsson_MAIN10_2
- WPP_B_ericsson_MAIN10_2
- WPP_C_ericsson_MAIN10_2
- WPP_E_ericsson_MAIN10_2
- WPP_F_ericsson_MAIN10_2
Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
---
drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 59 +++++++++++++++++++++-
drivers/media/platform/qcom/iris/iris_vpu_buffer.h | 16 ++++++
2 files changed, 74 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
index faebb54728660cc621f8822dabf2e44ce8c55c58..a99b8030e3dd052da1b7f70b9701f88c8ae50e74 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
+++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
@@ -1814,6 +1814,63 @@ static u32 hfi_vpu4x_buffer_line_vp9d(u32 frame_width, u32 frame_height, u32 _yu
return lb_size + dpb_obp_size;
}
+static u32 hfi_vpu4x_buffer_line_h265d(u32 frame_width, u32 frame_height, bool is_opb,
+ u32 num_vpp_pipes)
+{
+ u32 num_lcu_per_pipe, se_left_lb, vsp_left_lb, top_lb, qp_size;
+ u32 fe_left_lb = 0, dpb_obp = 0, lcu_size = LCU_SIZE_16;
+ int i;
+
+ for (i = 0; i < num_vpp_pipes; i++) {
+ num_lcu_per_pipe = (DIV_ROUND_UP(frame_height, lcu_size) / num_vpp_pipes);
+ if (i == 0)
+ num_lcu_per_pipe += (DIV_ROUND_UP(frame_height, lcu_size) % num_vpp_pipes);
+
+ fe_left_lb += DMA_ALIGNMENT * FE_LFT_CTRL_BYTES_PER_PACKETS * num_lcu_per_pipe *
+ FE_LFT_CTRL_LINE_NUMBERS;
+ fe_left_lb += DMA_ALIGNMENT * FE_LFT_DB_LUMA_CHROMA_BYTES_PER_PACKETS *
+ num_lcu_per_pipe * FE_LFT_DB_DATA_LINE_NUMBERS;
+ fe_left_lb += DMA_ALIGNMENT * FE_LFT_SAO_LUMA_BYTES_PER_PACKETS *
+ num_lcu_per_pipe;
+ fe_left_lb += DMA_ALIGNMENT * FE_LFT_SAO_CHROMA_BYTES_PER_PACKETS *
+ num_lcu_per_pipe;
+ fe_left_lb += DMA_ALIGNMENT * FE_LFT_LR_LUMA_CHROMA_BYTES_PER_PACKETS *
+ num_lcu_per_pipe * FE_LFT_LR_DATA_LINE_NUMBERS;
+ }
+
+ if (is_opb)
+ dpb_obp = size_dpb_opb(frame_height, lcu_size) * num_vpp_pipes;
+
+ se_left_lb = max3(((frame_height + LCU_SIZE_16 - 1) / H265_MIN_SE_CTRL_BLOCK_SIZE) *
+ MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE,
+ ((frame_height + LCU_SIZE_32 - 1) / H265_MIN_SE_CTRL_BLOCK_SIZE) *
+ MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE,
+ ((frame_height + LCU_SIZE_64 - 1) / H265_MIN_SE_CTRL_BLOCK_SIZE) *
+ MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE);
+
+ vsp_left_lb = ALIGN(DIV_ROUND_UP(frame_height, LCU_SIZE_64) *
+ H265_NUM_TILE_ROW, DMA_ALIGNMENT);
+
+ top_lb = DMA_ALIGNMENT * FE_TOP_CTRL_BYTES_PER_PACKETS *
+ DIV_ROUND_UP(frame_width, lcu_size) * FE_TOP_CTRL_LINE_NUMBERS;
+ top_lb += DMA_ALIGNMENT * FE_TOP_LUMA_BYTES_PER_PACKETS *
+ DIV_ROUND_UP(frame_width, lcu_size) * FE_TOP_DATA_LUMA_LINE_NUMBERS;
+ top_lb += DMA_ALIGNMENT * FE_TOP_CHROMA_BYTES_PER_PACKETS *
+ (DIV_ROUND_UP(frame_width, lcu_size) + 1) * FE_TOP_DATA_CHROMA_LINE_NUMBERS;
+ top_lb += ALIGN(((frame_width + LCU_SIZE_64 - 1) / H265_MIN_SE_CTRL_BLOCK_SIZE) *
+ MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE, DMA_ALIGNMENT);
+ top_lb += ALIGN(ALIGN(frame_width, LCU_SIZE_64) * PE_TOP_RECON_DATA_BYTES_PER_PACKETS,
+ DMA_ALIGNMENT);
+ top_lb += size_h265d_lb_vsp_top(frame_width, frame_height);
+
+ qp_size = size_h265d_qp(frame_width, frame_height);
+
+ return ((ALIGN(dpb_obp, DMA_ALIGNMENT) + ALIGN(se_left_lb, DMA_ALIGNMENT) +
+ ALIGN(vsp_left_lb, DMA_ALIGNMENT)) * num_vpp_pipes) +
+ ALIGN(fe_left_lb, DMA_ALIGNMENT) + ALIGN(top_lb, DMA_ALIGNMENT) +
+ ALIGN(qp_size, DMA_ALIGNMENT);
+}
+
static u32 iris_vpu4x_dec_line_size(struct iris_inst *inst)
{
u32 num_vpp_pipes = inst->core->iris_platform_data->num_vpp_pipe;
@@ -1829,7 +1886,7 @@ static u32 iris_vpu4x_dec_line_size(struct iris_inst *inst)
if (inst->codec == V4L2_PIX_FMT_H264)
return hfi_buffer_line_h264d(width, height, is_opb, num_vpp_pipes);
else if (inst->codec == V4L2_PIX_FMT_HEVC)
- return hfi_buffer_line_h265d(width, height, is_opb, num_vpp_pipes);
+ return hfi_vpu4x_buffer_line_h265d(width, height, is_opb, num_vpp_pipes);
else if (inst->codec == V4L2_PIX_FMT_VP9)
return hfi_vpu4x_buffer_line_vp9d(width, height, out_min_count, is_opb,
num_vpp_pipes);
diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.h b/drivers/media/platform/qcom/iris/iris_vpu_buffer.h
index 8c0d6b7b5de85f7d7aaa8fc36218e8d095419569..d482906712243ecb8b5478a4419fc16cb9efd6ce 100644
--- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.h
+++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.h
@@ -150,6 +150,22 @@ struct iris_inst;
#define BITS_PER_CTRL_PACK 128
#define NUM_CTRL_PACK_LCU 10
+#define LCU_SIZE_16 16
+#define LCU_SIZE_32 32
+#define LCU_SIZE_64 64
+
+#define H265_MIN_SE_CTRL_BLOCK_SIZE 8
+#define FE_LFT_CTRL_BYTES_PER_PACKETS 1
+#define FE_LFT_DB_LUMA_CHROMA_BYTES_PER_PACKETS 2
+#define FE_LFT_SAO_LUMA_BYTES_PER_PACKETS 1
+#define FE_LFT_SAO_CHROMA_BYTES_PER_PACKETS 2
+#define FE_LFT_LR_LUMA_CHROMA_BYTES_PER_PACKETS 8
+
+#define FE_TOP_CTRL_BYTES_PER_PACKETS 1
+#define FE_TOP_LUMA_BYTES_PER_PACKETS 2
+#define FE_TOP_CHROMA_BYTES_PER_PACKETS 2
+#define PE_TOP_RECON_DATA_BYTES_PER_PACKETS 6
+
static inline u32 size_h264d_lb_fe_top_data(u32 frame_width)
{
return MAX_FE_NBR_DATA_LUMA_LINE_BUFFER_SIZE * ALIGN(frame_width, 16) * 3;
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v4 3/6] media: iris: add iris4 specific H265 line buffer calculation
2026-10-01 15:17 ` [PATCH v4 3/6] media: iris: add iris4 specific H265 line buffer calculation Vikash Garodia
@ 2026-10-01 15:32 ` sashiko-bot
0 siblings, 0 replies; 11+ messages in thread
From: sashiko-bot @ 2026-10-01 15:32 UTC (permalink / raw)
To: Vikash Garodia; +Cc: media-ci, devicetree, conor+dt, robh
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] media: iris: quadratic scaling of dpb_obp due to double multiplication
--
commit 8ebbe0addefc2c9da9b09f0ae52a879bbb0ec3f3
Author: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
media: iris: add iris4 specific H265 line buffer calculation
This commit introduces a new H265 decoder line buffer size calculation
formula for iris4 (VPU4). It resolves firmware failures seen with specific
test vectors by providing a larger buffer size for certain configurations.
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
> index faebb54728660..a99b8030e3dd0 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
[ ... ]
> @@ -1814,6 +1814,63 @@ static u32 hfi_vpu4x_buffer_line_vp9d(u32 frame_width, u32 frame_height, u32 _yu
[ ... ]
> +static u32 hfi_vpu4x_buffer_line_h265d(u32 frame_width, u32 frame_height, bool is_opb,
> + u32 num_vpp_pipes)
> +{
[ ... ]
> + if (is_opb)
> + dpb_obp = size_dpb_opb(frame_height, lcu_size) * num_vpp_pipes;
> +
[ ... ]
> + return ((ALIGN(dpb_obp, DMA_ALIGNMENT) + ALIGN(se_left_lb, DMA_ALIGNMENT) +
> + ALIGN(vsp_left_lb, DMA_ALIGNMENT)) * num_vpp_pipes) +
[Severity: Medium]
Does this code multiply dpb_obp by num_vpp_pipes twice?
Earlier in this function, dpb_obp is calculated with a multiplication by
num_vpp_pipes. Then it is included in the return statement here, where the
sum containing dpb_obp is multiplied by num_vpp_pipes again.
This results in quadratic scaling for the dpb_obp portion of the buffer
size. Is this double multiplication intentional, or should one of the
multipliers be removed to prevent over-allocating the line buffer?
> + ALIGN(fe_left_lb, DMA_ALIGNMENT) + ALIGN(top_lb, DMA_ALIGNMENT) +
> + ALIGN(qp_size, DMA_ALIGNMENT);
> +}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261001-kaanapali-iris-v4-0-642f9ac5e699@oss.qualcomm.com?part=3
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v4 4/6] media: iris: add platform data for kaanapali
2026-10-01 15:17 [PATCH v4 0/6] media: iris: add support for kaanapali platform Vikash Garodia
` (2 preceding siblings ...)
2026-10-01 15:17 ` [PATCH v4 3/6] media: iris: add iris4 specific H265 line buffer calculation Vikash Garodia
@ 2026-10-01 15:17 ` Vikash Garodia
2026-10-01 15:17 ` [PATCH v4 5/6] arm64: dts: qcom: kaanapali: add iris video node Vikash Garodia
2026-10-01 15:17 ` [PATCH v4 6/6] arm64: dts: qcom: kaanapali-mtp: enable iris video node on mtp board Vikash Garodia
5 siblings, 0 replies; 11+ messages in thread
From: Vikash Garodia @ 2026-10-01 15:17 UTC (permalink / raw)
To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Hans Verkuil, Vishnu Reddy, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stanimir Varbanov,
Bjorn Andersson, Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, linux-kernel, Krzysztof Kozlowski,
devicetree, Vikash Garodia
Add support for the kaanapali platform in the iris driver to support
video functionality on kaanapali platform.
Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
---
drivers/media/platform/qcom/iris/Makefile | 2 +
.../platform/qcom/iris/iris_platform_common.h | 4 ++
.../platform/qcom/iris/iris_platform_kaanapali.c | 58 +++++++++++++++++++
.../platform/qcom/iris/iris_platform_kaanapali.h | 15 +++++
.../media/platform/qcom/iris/iris_platform_vpu4x.c | 66 ++++++++++++++++++++++
drivers/media/platform/qcom/iris/iris_probe.c | 4 ++
6 files changed, 149 insertions(+)
diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/platform/qcom/iris/Makefile
index 48e415cbc4390bc596f6239fefa2a2ad2cd3a2bb..65ad965515a3a368c0f4c9115263e101252b7c0a 100644
--- a/drivers/media/platform/qcom/iris/Makefile
+++ b/drivers/media/platform/qcom/iris/Makefile
@@ -12,8 +12,10 @@ qcom-iris-objs += iris_buffer.o \
iris_hfi_gen2_packet.o \
iris_hfi_gen2_response.o \
iris_hfi_queue.o \
+ iris_platform_kaanapali.o \
iris_platform_vpu2.o \
iris_platform_vpu3x.o \
+ iris_platform_vpu4x.o \
iris_power.o \
iris_probe.o \
iris_resources.o \
diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h
index 9748095091461ba13443c63955a42906fa4f050c..e8ed0e7c769f37443148cb9418d4efafdc21485b 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_common.h
+++ b/drivers/media/platform/qcom/iris/iris_platform_common.h
@@ -39,6 +39,9 @@ struct iris_inst;
#define MAX_HEVC_VBR_LAYER_HP_SLIDING_WINDOW 5
#define MAX_HIER_CODING_LAYER_GEN1 6
+#define VIDEO_REGION_VM0_SECURE_NP_ID 1
+#define VIDEO_REGION_VM0_NONSECURE_NP_ID 5
+
enum stage_type {
STAGE_1 = 1,
STAGE_2 = 2,
@@ -54,6 +57,7 @@ extern const struct iris_firmware_data iris_hfi_gen1_data;
extern const struct iris_firmware_data iris_hfi_gen2_data;
extern const struct iris_firmware_data iris_hfi_milos_data;
+extern const struct iris_platform_data kaanapali_data;
extern const struct iris_platform_data milos_data;
extern const struct iris_platform_data qcs8300_data;
extern const struct iris_platform_data sc7280_data;
diff --git a/drivers/media/platform/qcom/iris/iris_platform_kaanapali.c b/drivers/media/platform/qcom/iris/iris_platform_kaanapali.c
new file mode 100644
index 0000000000000000000000000000000000000000..cc7529e22d84a0a9bc55ff528686166b2f3c6a87
--- /dev/null
+++ b/drivers/media/platform/qcom/iris/iris_platform_kaanapali.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "iris_core.h"
+#include "iris_platform_common.h"
+
+const char *const iris_kaanapali_clk_reset_table[] = {
+ "bus0",
+ "bus1",
+ "core",
+ "vcodec0_core",
+};
+
+const char *const iris_kaanapali_pmdomain_table[] = {
+ "venus",
+ "vcodec0",
+ "vpp0",
+ "vpp1",
+ "apv",
+};
+
+const struct platform_clk_data iris_kaanapali_clk_table[] = {
+ {IRIS_AXI_CLK, "iface" },
+ {IRIS_CTRL_CLK, "core" },
+ {IRIS_HW_CLK, "vcodec0_core" },
+ {IRIS_AXI1_CLK, "iface1" },
+ {IRIS_CTRL_FREERUN_CLK, "core_freerun" },
+ {IRIS_HW_FREERUN_CLK, "vcodec0_core_freerun" },
+ {IRIS_BSE_HW_CLK, "vcodec_bse" },
+ {IRIS_VPP0_HW_CLK, "vcodec_vpp0" },
+ {IRIS_VPP1_HW_CLK, "vcodec_vpp1" },
+ {IRIS_APV_HW_CLK, "vcodec_apv" },
+};
+
+const char *const iris_kaanapali_opp_clk_table[] = {
+ "vcodec0_core",
+ "vcodec_apv",
+ "vcodec_bse",
+ "core",
+ NULL,
+};
+
+struct tz_cp_config iris_kaanapali_tz_cp_config[] = {
+ {
+ .cp_start = VIDEO_REGION_VM0_SECURE_NP_ID,
+ .cp_size = 0,
+ .cp_nonpixel_start = 0x01000000,
+ .cp_nonpixel_size = 0x24800000,
+ },
+ {
+ .cp_start = VIDEO_REGION_VM0_NONSECURE_NP_ID,
+ .cp_size = 0,
+ .cp_nonpixel_start = 0x25800000,
+ .cp_nonpixel_size = 0xda400000,
+ },
+};
diff --git a/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h b/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h
new file mode 100644
index 0000000000000000000000000000000000000000..33ac3f5aad9149d78d8f4b83a0d6305b7fa09b2d
--- /dev/null
+++ b/drivers/media/platform/qcom/iris/iris_platform_kaanapali.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef __IRIS_PLATFORM_KAANAPALI_H__
+#define __IRIS_PLATFORM_KAANAPALI_H__
+
+extern const char *const iris_kaanapali_clk_reset_table[4];
+extern const char *const iris_kaanapali_pmdomain_table[5];
+extern const struct platform_clk_data iris_kaanapali_clk_table[10];
+extern const char *const iris_kaanapali_opp_clk_table[5];
+extern struct tz_cp_config iris_kaanapali_tz_cp_config[2];
+
+#endif /* __IRIS_PLATFORM_KAANAPALI_H__ */
diff --git a/drivers/media/platform/qcom/iris/iris_platform_vpu4x.c b/drivers/media/platform/qcom/iris/iris_platform_vpu4x.c
new file mode 100644
index 0000000000000000000000000000000000000000..0d515adf331d7f451408826136539e6b6fd4a1af
--- /dev/null
+++ b/drivers/media/platform/qcom/iris/iris_platform_vpu4x.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include "iris_hfi_gen2.h"
+#include "iris_vpu_buffer.h"
+#include "iris_vpu_common.h"
+
+#include "iris_platform_sm8550.h"
+#include "iris_platform_kaanapali.h"
+
+static const struct iris_firmware_desc iris_vpu40_p2_s7_gen2_desc = {
+ .firmware_data = &iris_hfi_gen2_data,
+ .get_vpu_buffer_size = iris_vpu4x_buf_size,
+ .fwname = "qcom/vpu/vpu40_p2_s7.mbn",
+};
+
+static const u32 iris_fmts_vpu4x_dec[] = {
+ [IRIS_FMT_H264] = V4L2_PIX_FMT_H264,
+ [IRIS_FMT_HEVC] = V4L2_PIX_FMT_HEVC,
+ [IRIS_FMT_VP9] = V4L2_PIX_FMT_VP9,
+};
+
+static const struct icc_info iris_icc_info_vpu4x[] = {
+ { "cpu-cfg", 1000, 1000 },
+ { "video-mem", 1000, 15000000 },
+};
+
+static const struct bw_info iris_bw_table_dec_vpu4x[] = {
+ { ((4096 * 2160) / 256) * 60, 1608000 },
+ { ((4096 * 2160) / 256) * 30, 826000 },
+ { ((1920 * 1080) / 256) * 60, 567000 },
+ { ((1920 * 1080) / 256) * 30, 294000 },
+};
+
+static const char * const iris_opp_pd_table_vpu4x[] = { "mxc", "mmcx" };
+
+const struct iris_platform_data kaanapali_data = {
+ .firmware_desc_gen2 = &iris_vpu40_p2_s7_gen2_desc,
+ .vpu_ops = &iris_vpu4x_ops,
+ .icc_tbl = iris_icc_info_vpu4x,
+ .icc_tbl_size = ARRAY_SIZE(iris_icc_info_vpu4x),
+ .clk_rst_tbl = iris_kaanapali_clk_reset_table,
+ .clk_rst_tbl_size = ARRAY_SIZE(iris_kaanapali_clk_reset_table),
+ .bw_tbl_dec = iris_bw_table_dec_vpu4x,
+ .bw_tbl_dec_size = ARRAY_SIZE(iris_bw_table_dec_vpu4x),
+ .pmdomain_tbl = iris_kaanapali_pmdomain_table,
+ .pmdomain_tbl_size = ARRAY_SIZE(iris_kaanapali_pmdomain_table),
+ .opp_pd_tbl = iris_opp_pd_table_vpu4x,
+ .opp_pd_tbl_size = ARRAY_SIZE(iris_opp_pd_table_vpu4x),
+ .clk_tbl = iris_kaanapali_clk_table,
+ .clk_tbl_size = ARRAY_SIZE(iris_kaanapali_clk_table),
+ .opp_clk_tbl = iris_kaanapali_opp_clk_table,
+ /* Upper bound of DMA address range */
+ .dma_mask = 0xffc00000 - 1,
+ .inst_iris_fmts = iris_fmts_vpu4x_dec,
+ .inst_iris_fmts_size = ARRAY_SIZE(iris_fmts_vpu4x_dec),
+ .inst_caps = &platform_inst_cap_sm8550,
+ .tz_cp_config_data = iris_kaanapali_tz_cp_config,
+ .tz_cp_config_data_size = ARRAY_SIZE(iris_kaanapali_tz_cp_config),
+ .num_vpp_pipe = 2,
+ .max_session_count = 16,
+ .max_core_mbpf = NUM_MBS_8K * 2,
+ .max_core_mbps = ((8192 * 4320) / 256) * 60,
+};
diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c
index 4bdb078d83b5c331869dab2409bc4d10ab302737..be3e799edfbe4e13321ef1ecfe6e558eb7a69e01 100644
--- a/drivers/media/platform/qcom/iris/iris_probe.c
+++ b/drivers/media/platform/qcom/iris/iris_probe.c
@@ -427,6 +427,10 @@ static const struct dev_pm_ops iris_pm_ops = {
};
static const struct of_device_id iris_dt_match[] = {
+ {
+ .compatible = "qcom,kaanapali-iris",
+ .data = &kaanapali_data,
+ },
{
.compatible = "qcom,milos-iris",
.data = &milos_data,
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v4 5/6] arm64: dts: qcom: kaanapali: add iris video node
2026-10-01 15:17 [PATCH v4 0/6] media: iris: add support for kaanapali platform Vikash Garodia
` (3 preceding siblings ...)
2026-10-01 15:17 ` [PATCH v4 4/6] media: iris: add platform data for kaanapali Vikash Garodia
@ 2026-10-01 15:17 ` Vikash Garodia
2026-10-01 15:17 ` [PATCH v4 6/6] arm64: dts: qcom: kaanapali-mtp: enable iris video node on mtp board Vikash Garodia
5 siblings, 0 replies; 11+ messages in thread
From: Vikash Garodia @ 2026-10-01 15:17 UTC (permalink / raw)
To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Hans Verkuil, Vishnu Reddy, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stanimir Varbanov,
Bjorn Andersson, Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, linux-kernel, Krzysztof Kozlowski,
devicetree, Vikash Garodia
Add iris video codec to kaanapali SoC, which comes with significantly
different powering up sequence than previous iris generation, thus
different clocks, power domains and resets.
Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 142 ++++++++++++++++++++++++++++++++
1 file changed, 142 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
index 146eaf9f0b9a9e1cac764fb598ea2433c0af6631..0708815f9ef9565f9560969100153fc532b803d6 100644
--- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
+++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
@@ -2663,6 +2663,148 @@ tcsr: clock-controller@1fc0000 {
#reset-cells = <1>;
};
+ iris: video-codec@2000000 {
+ compatible = "qcom,kaanapali-iris";
+ reg = <0x0 0x02000000 0x0 0xf0000>;
+
+ clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
+ <&videocc VIDEO_CC_MVS0C_CLK>,
+ <&videocc VIDEO_CC_MVS0_CLK>,
+ <&gcc GCC_VIDEO_AXI1_CLK>,
+ <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>,
+ <&videocc VIDEO_CC_MVS0_FREERUN_CLK>,
+ <&videocc VIDEO_CC_MVS0B_CLK>,
+ <&videocc VIDEO_CC_MVS0_VPP0_CLK>,
+ <&videocc VIDEO_CC_MVS0_VPP1_CLK>,
+ <&videocc VIDEO_CC_MVS0A_CLK>;
+ clock-names = "iface",
+ "core",
+ "vcodec0_core",
+ "iface1",
+ "core_freerun",
+ "vcodec0_core_freerun",
+ "vcodec_bse",
+ "vcodec_vpp0",
+ "vcodec_vpp1",
+ "vcodec_apv";
+
+ dma-coherent;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_VIDEO_MVP QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "cpu-cfg",
+ "video-mem";
+
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+ memory-region = <&video_mem>;
+
+ operating-points-v2 = <&iris_opp_table>;
+
+ power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
+ <&videocc VIDEO_CC_MVS0_GDSC>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_MMCX>,
+ <&videocc VIDEO_CC_MVS0_VPP0_GDSC>,
+ <&videocc VIDEO_CC_MVS0_VPP1_GDSC>,
+ <&videocc VIDEO_CC_MVS0A_GDSC>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mxc",
+ "mmcx",
+ "vpp0",
+ "vpp1",
+ "apv";
+
+ resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
+ <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>;
+ reset-names = "bus0",
+ "bus1",
+ "core",
+ "vcodec0_core";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ dma-ranges = <0x0 0x0 0x0 0xffc00000>;
+
+ status = "disabled";
+
+ non-pixel {
+ iommus = <&apps_smmu 0x1940 0x0>,
+ <&apps_smmu 0x1944 0x0>,
+ <&apps_smmu 0x1a20 0x0>;
+ iommu-ranges = <0x25800000 0xda400000>;
+ };
+
+ pixel {
+ iommus = <&apps_smmu 0x1943 0x0>;
+ };
+
+ iris_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-240000000 {
+ opp-hz = /bits/ 64 <240000000 240000000
+ 240000000 360000000>;
+ required-opps = <&rpmhpd_opp_low_svs_d1>,
+ <&rpmhpd_opp_low_svs_d1>;
+ };
+
+ opp-338000000 {
+ opp-hz = /bits/ 64 <338000000 338000000
+ 338000000 507000000>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-420000000 {
+ opp-hz = /bits/ 64 <420000000 420000000
+ 420000000 630000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs>;
+ };
+
+ opp-444000000 {
+ opp-hz = /bits/ 64 <444000000 444000000
+ 444000000 666000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-533000000 {
+ opp-hz = /bits/ 64 <533000000 533000000
+ 533000000 800000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_nom>;
+ };
+
+ opp-630000000 {
+ opp-hz = /bits/ 64 <630000000 630000000
+ 630000000 1104000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_turbo>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000 630000000
+ 630000000 1260000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_turbo_l0>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000 630000000
+ 850000000 1260000000>;
+ required-opps = <&rpmhpd_opp_nom>,
+ <&rpmhpd_opp_turbo_l1>;
+ };
+ };
+ };
+
videocc: clock-controller@20f0000 {
compatible = "qcom,kaanapali-videocc";
reg = <0x0 0x020f0000 0x0 0x10000>;
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v4 6/6] arm64: dts: qcom: kaanapali-mtp: enable iris video node on mtp board
2026-10-01 15:17 [PATCH v4 0/6] media: iris: add support for kaanapali platform Vikash Garodia
` (4 preceding siblings ...)
2026-10-01 15:17 ` [PATCH v4 5/6] arm64: dts: qcom: kaanapali: add iris video node Vikash Garodia
@ 2026-10-01 15:17 ` Vikash Garodia
5 siblings, 0 replies; 11+ messages in thread
From: Vikash Garodia @ 2026-10-01 15:17 UTC (permalink / raw)
To: Dikshita Agarwal, Abhinav Kumar, Bryan O'Donoghue,
Mauro Carvalho Chehab, Hans Verkuil, Vishnu Reddy, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Stanimir Varbanov,
Bjorn Andersson, Konrad Dybcio, Abel Vesa
Cc: linux-media, linux-arm-msm, linux-kernel, Krzysztof Kozlowski,
devicetree, Vikash Garodia
Enable the iris video codec on the kaanapali MTP reference board.
Co-developed-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kaanapali-mtp.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts b/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts
index 9eb02fd09dab6b3e3646753a880e4704a1abd503..4463ab8b136c6f3999198e159335e3096e181fd0 100644
--- a/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts
@@ -916,6 +916,12 @@ &gpu_zap_shader {
firmware-name = "qcom/kaanapali/gen80200_zap.mbn";
};
+&iris {
+ firmware-name = "qcom/vpu/vpu40_p2_s7.mbn";
+
+ status = "okay";
+};
+
&lpass_vamacro {
pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
pinctrl-names = "default";
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread