[PATCH v2 0/2] PM / devfreq: add Airoha SoC Subsystem scale support

[PATCH v2 0/2] PM / devfreq: add Airoha SoC Subsystem scale support

[Christian Marangi]

Airoha SoC contains multiple subsystem that are scaled to a
specific OPP taking the CPU clock as reference. Such sybsystem
can enter idle or performance state based on the system load
and power consumption conditions.

Example of such subsystem are GSW (Gigabit Switch), NPU (Custom
Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...

Changes v2:
- Rename to a more symbolic name
- Address some sashiko bot warning
- Better describe the use of this devfreq driver

Christian Marangi (2):
  dt-bindings: devfreq: Document support for Airoha Subsystem Scale
  PM / devfreq: add Airoha SoC Subsystem devfreq driver

 .../devfreq/airoha,subsystem-scale.yaml       | 114 ++++++++++++++++++
 drivers/devfreq/Kconfig                       |  10 ++
 drivers/devfreq/Makefile                      |   1 +
 drivers/devfreq/airoha-subsystem-devfreq.c    | 100 +++++++++++++++
 4 files changed, 225 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
 create mode 100644 drivers/devfreq/airoha-subsystem-devfreq.c

-- 
2.55.0

[PATCH v2 1/2] dt-bindings: devfreq: Document support for Airoha Subsystem Scale

[Christian Marangi]

Airoha SoC contains multiple subsystems that are scaled to a
specific OPP taking the CPU clock as reference. Such subsystem
can enter idle or performance state based on the system load
and power consumption conditions.

Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...

Document all the required property and provide examples for the various
subsystem OPP + subsystem scale nodes.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 .../devfreq/airoha,subsystem-scale.yaml       | 114 ++++++++++++++++++
 1 file changed, 114 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml

diff --git a/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
new file mode 100644
index 000000000000..2cf7f23a926c
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/devfreq/airoha,subsystem-scale.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Airoha SoC Subsystem Scale Driver
+
+maintainers:
+  - Christian Marangi <ansuelsmth@gmail.com>
+
+description:
+  Airoha SoC contains multiple subsystems that are scaled to a
+  specific OPP taking the CPU clock as reference. Such subsystem
+  can enter idle or performance state based on the system load
+  and power consumption conditions.
+
+  Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
+  Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...
+
+properties:
+  compatible:
+    const: airoha,an7581-subsystem-scale
+
+  clocks:
+    maxItems: 1
+
+  operating-points-v2:
+    description:
+      OPP table of the related subsystem supported rates that referenced
+      clocks will be scaled to.
+
+required:
+  - compatible
+  - clocks
+  - operating-points-v2
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/en7523-clk.h>
+
+    npu_opp_table: opp-table-npu {
+        compatible = "operating-points-v2";
+
+        npu_low: opp-400000000 {
+           opp-hz = /bits/ 64 <400000000>;
+        };
+
+        npu_high: opp-720000000 {
+           opp-hz = /bits/ 64 <720000000>;
+        };
+    };
+
+    emi_opp_table: opp-table-emi {
+        compatible = "operating-points-v2";
+
+        emi_low: opp-400000000 {
+            opp-hz = /bits/ 64 <400000000>;
+        };
+
+        emi_high: opp-540000000 {
+           opp-hz = /bits/ 64 <540000000>;
+        };
+    };
+
+    bus_opp_table: opp-table-bus {
+        compatible = "operating-points-v2";
+
+        bus_low: opp-200000000 {
+           opp-hz = /bits/ 64 <200000000>;
+        };
+
+        bus_high: opp-300000000 {
+           opp-hz = /bits/ 64 <300000000>;
+        };
+    };
+
+    gsw_opp_table: opp-table-gsw {
+        compatible = "operating-points-v2";
+
+        gsw_low: opp-200000000 {
+            opp-hz = /bits/ 64 <200000000>;
+        };
+
+        gsw_high: opp-500000000 {
+           opp-hz = /bits/ 64 <500000000>;
+        };
+    };
+
+    npu-subsystem {
+        compatible = "airoha,an7581-subsystem-scale";
+        operating-points-v2 = <&npu_opp_table>;
+        clocks = <&scuclk EN7523_CLK_NPU>;
+    };
+
+    emi-subsystem {
+        compatible = "airoha,an7581-subsystem-scale";
+        operating-points-v2 = <&emi_opp_table>;
+        clocks = <&scuclk EN7523_CLK_EMI>;
+    };
+
+    bus-subsystem {
+        compatible = "airoha,an7581-subsystem-scale";
+        operating-points-v2 = <&bus_opp_table>;
+        clocks = <&scuclk EN7523_CLK_BUS>;
+    };
+
+    gsw-subsystem {
+        compatible = "airoha,an7581-subsystem-scale";
+        operating-points-v2 = <&gsw_opp_table>;
+        clocks = <&scuclk EN7523_CLK_GSW>;
+    };
-- 
2.55.0

Re: [PATCH v2 1/2] dt-bindings: devfreq: Document support for Airoha Subsystem Scale

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dt-bindings: devfreq: airoha: virtual nodes created for software driver instantiation
--

commit d2ff6805653f5553cb072876dd17890e25aca955
Author: Christian Marangi <ansuelsmth@gmail.com>

dt-bindings: devfreq: Document support for Airoha Subsystem Scale

Airoha SoC contains multiple subsystems that are scaled to a
specific OPP taking the CPU clock as reference. Such subsystem
can enter idle or performance state based on the system load
and power consumption conditions.

> diff --git a/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> new file mode 100644
> index 0000000000000..2cf7f23a926c9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> @@ -0,0 +1,114 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/devfreq/airoha,subsystem-scale.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha SoC Subsystem Scale Driver

[Severity: Medium]
Does this binding describe a software driver instead of a physical hardware
block?

Devicetree is fundamentally designed to describe physical hardware structure,
not software driver architecture or internal Linux models. The title highlights
a conceptual flaw by explicitly referencing a driver rather than the physical
hardware.

[ ... ]

> +examples:
> +  - |
> +    #include <dt-bindings/clock/en7523-clk.h>

[ ... ]

> +    npu-subsystem {
> +        compatible = "airoha,an7581-subsystem-scale";
> +        operating-points-v2 = <&npu_opp_table>;
> +        clocks = <&scuclk EN7523_CLK_NPU>;
> +    };

[Severity: Medium]
Are these purely virtual hardware nodes functioning solely as a hook to
instantiate and probe a generic devfreq driver?

These nodes lack physical hardware resources, such as reg addresses or
interrupts, and appear to exist only as glue to bind an OPP table to a clock.
Introducing purely virtual nodes into the device tree creates an invalid
hardware description and pollutes the DT ABI with Linux-specific software
abstractions.

Instead of introducing virtual nodes, should the clocks and
operating-points-v2 properties be attached directly to the actual hardware
consumer nodes (e.g., the physical NPU, GSW, or BUS devices)?

The respective drivers for those hardware blocks, or generic frameworks like
PM domains and interconnects, could then be responsible for managing their own
power and performance scaling.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009073330.18175-1-ansuelsmth@gmail.com?part=1

Re: [PATCH v2 1/2] dt-bindings: devfreq: Document support for Airoha Subsystem Scale

[Conor Dooley]

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On Fri, Oct 09, 2026 at 09:33:28AM +0200, Christian Marangi wrote:
> Airoha SoC contains multiple subsystems that are scaled to a
> specific OPP taking the CPU clock as reference. Such subsystem
> can enter idle or performance state based on the system load
> and power consumption conditions.
> 
> Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
> Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...

The device you document here does not appear to exist at all, since it
just consumes a clock without any registers or anything. Why can't these
operating points be added to the actual consumers: the switch, the npu,
or event the bus itself in one case. In the bus case, I think that's
exactly what simple-pm-bus does?

Confused,
Conor.

> 
> Document all the required property and provide examples for the various
> subsystem OPP + subsystem scale nodes.
> 
> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> ---
>  .../devfreq/airoha,subsystem-scale.yaml       | 114 ++++++++++++++++++
>  1 file changed, 114 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> 
> diff --git a/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> new file mode 100644
> index 000000000000..2cf7f23a926c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> @@ -0,0 +1,114 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/devfreq/airoha,subsystem-scale.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha SoC Subsystem Scale Driver
> +
> +maintainers:
> +  - Christian Marangi <ansuelsmth@gmail.com>
> +
> +description:
> +  Airoha SoC contains multiple subsystems that are scaled to a
> +  specific OPP taking the CPU clock as reference. Such subsystem
> +  can enter idle or performance state based on the system load
> +  and power consumption conditions.
> +
> +  Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
> +  Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...
> +
> +properties:
> +  compatible:
> +    const: airoha,an7581-subsystem-scale
> +
> +  clocks:
> +    maxItems: 1
> +
> +  operating-points-v2:
> +    description:
> +      OPP table of the related subsystem supported rates that referenced
> +      clocks will be scaled to.
> +
> +required:
> +  - compatible
> +  - clocks
> +  - operating-points-v2
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/en7523-clk.h>
> +
> +    npu_opp_table: opp-table-npu {
> +        compatible = "operating-points-v2";
> +
> +        npu_low: opp-400000000 {
> +           opp-hz = /bits/ 64 <400000000>;
> +        };
> +
> +        npu_high: opp-720000000 {
> +           opp-hz = /bits/ 64 <720000000>;
> +        };
> +    };
> +
> +    emi_opp_table: opp-table-emi {
> +        compatible = "operating-points-v2";
> +
> +        emi_low: opp-400000000 {
> +            opp-hz = /bits/ 64 <400000000>;
> +        };
> +
> +        emi_high: opp-540000000 {
> +           opp-hz = /bits/ 64 <540000000>;
> +        };
> +    };
> +
> +    bus_opp_table: opp-table-bus {
> +        compatible = "operating-points-v2";
> +
> +        bus_low: opp-200000000 {
> +           opp-hz = /bits/ 64 <200000000>;
> +        };
> +
> +        bus_high: opp-300000000 {
> +           opp-hz = /bits/ 64 <300000000>;
> +        };
> +    };
> +
> +    gsw_opp_table: opp-table-gsw {
> +        compatible = "operating-points-v2";
> +
> +        gsw_low: opp-200000000 {
> +            opp-hz = /bits/ 64 <200000000>;
> +        };
> +
> +        gsw_high: opp-500000000 {
> +           opp-hz = /bits/ 64 <500000000>;
> +        };
> +    };
> +
> +    npu-subsystem {
> +        compatible = "airoha,an7581-subsystem-scale";
> +        operating-points-v2 = <&npu_opp_table>;
> +        clocks = <&scuclk EN7523_CLK_NPU>;
> +    };
> +
> +    emi-subsystem {
> +        compatible = "airoha,an7581-subsystem-scale";
> +        operating-points-v2 = <&emi_opp_table>;
> +        clocks = <&scuclk EN7523_CLK_EMI>;
> +    };
> +
> +    bus-subsystem {
> +        compatible = "airoha,an7581-subsystem-scale";
> +        operating-points-v2 = <&bus_opp_table>;
> +        clocks = <&scuclk EN7523_CLK_BUS>;
> +    };
> +
> +    gsw-subsystem {
> +        compatible = "airoha,an7581-subsystem-scale";
> +        operating-points-v2 = <&gsw_opp_table>;
> +        clocks = <&scuclk EN7523_CLK_GSW>;
> +    };
> -- 
> 2.55.0
> 

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Re: [PATCH v2 1/2] dt-bindings: devfreq: Document support for Airoha Subsystem Scale

[Christian Marangi (Ansuel)]

Il giorno ven 9 ott 2026 alle ore 17:06 Conor Dooley
<conor@kernel.org> ha scritto:
>
> On Fri, Oct 09, 2026 at 09:33:28AM +0200, Christian Marangi wrote:
> > Airoha SoC contains multiple subsystems that are scaled to a
> > specific OPP taking the CPU clock as reference. Such subsystem
> > can enter idle or performance state based on the system load
> > and power consumption conditions.
> >
> > Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
> > Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...
>
> The device you document here does not appear to exist at all, since it
> just consumes a clock without any registers or anything. Why can't these
> operating points be added to the actual consumers: the switch, the npu,
> or event the bus itself in one case. In the bus case, I think that's
> exactly what simple-pm-bus does?
>

Can the consumer be registered as a devfreq with all the other thing?
Isn't that problematic?

Also one big problem is that some subsystem are used internally.
Example SOE and BUS. (and also NPU)

How those can be configured to follow the CPU frequency and
use the required-opp and opp?

> >
> > Document all the required property and provide examples for the various
> > subsystem OPP + subsystem scale nodes.
> >
> > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > ---
> >  .../devfreq/airoha,subsystem-scale.yaml       | 114 ++++++++++++++++++
> >  1 file changed, 114 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> > new file mode 100644
> > index 000000000000..2cf7f23a926c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/devfreq/airoha,subsystem-scale.yaml
> > @@ -0,0 +1,114 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/devfreq/airoha,subsystem-scale.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Airoha SoC Subsystem Scale Driver
> > +
> > +maintainers:
> > +  - Christian Marangi <ansuelsmth@gmail.com>
> > +
> > +description:
> > +  Airoha SoC contains multiple subsystems that are scaled to a
> > +  specific OPP taking the CPU clock as reference. Such subsystem
> > +  can enter idle or performance state based on the system load
> > +  and power consumption conditions.
> > +
> > +  Example of such subsystems are GSW (Gigabit Switch), NPU (Custom
> > +  Risc Co-Processor for Network acceleration), SOE (Crypto Module) BUS...
> > +
> > +properties:
> > +  compatible:
> > +    const: airoha,an7581-subsystem-scale
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  operating-points-v2:
> > +    description:
> > +      OPP table of the related subsystem supported rates that referenced
> > +      clocks will be scaled to.
> > +
> > +required:
> > +  - compatible
> > +  - clocks
> > +  - operating-points-v2
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/en7523-clk.h>
> > +
> > +    npu_opp_table: opp-table-npu {
> > +        compatible = "operating-points-v2";
> > +
> > +        npu_low: opp-400000000 {
> > +           opp-hz = /bits/ 64 <400000000>;
> > +        };
> > +
> > +        npu_high: opp-720000000 {
> > +           opp-hz = /bits/ 64 <720000000>;
> > +        };
> > +    };
> > +
> > +    emi_opp_table: opp-table-emi {
> > +        compatible = "operating-points-v2";
> > +
> > +        emi_low: opp-400000000 {
> > +            opp-hz = /bits/ 64 <400000000>;
> > +        };
> > +
> > +        emi_high: opp-540000000 {
> > +           opp-hz = /bits/ 64 <540000000>;
> > +        };
> > +    };
> > +
> > +    bus_opp_table: opp-table-bus {
> > +        compatible = "operating-points-v2";
> > +
> > +        bus_low: opp-200000000 {
> > +           opp-hz = /bits/ 64 <200000000>;
> > +        };
> > +
> > +        bus_high: opp-300000000 {
> > +           opp-hz = /bits/ 64 <300000000>;
> > +        };
> > +    };
> > +
> > +    gsw_opp_table: opp-table-gsw {
> > +        compatible = "operating-points-v2";
> > +
> > +        gsw_low: opp-200000000 {
> > +            opp-hz = /bits/ 64 <200000000>;
> > +        };
> > +
> > +        gsw_high: opp-500000000 {
> > +           opp-hz = /bits/ 64 <500000000>;
> > +        };
> > +    };
> > +
> > +    npu-subsystem {
> > +        compatible = "airoha,an7581-subsystem-scale";
> > +        operating-points-v2 = <&npu_opp_table>;
> > +        clocks = <&scuclk EN7523_CLK_NPU>;
> > +    };
> > +
> > +    emi-subsystem {
> > +        compatible = "airoha,an7581-subsystem-scale";
> > +        operating-points-v2 = <&emi_opp_table>;
> > +        clocks = <&scuclk EN7523_CLK_EMI>;
> > +    };
> > +
> > +    bus-subsystem {
> > +        compatible = "airoha,an7581-subsystem-scale";
> > +        operating-points-v2 = <&bus_opp_table>;
> > +        clocks = <&scuclk EN7523_CLK_BUS>;
> > +    };
> > +
> > +    gsw-subsystem {
> > +        compatible = "airoha,an7581-subsystem-scale";
> > +        operating-points-v2 = <&gsw_opp_table>;
> > +        clocks = <&scuclk EN7523_CLK_GSW>;
> > +    };
> > --
> > 2.55.0
> >

[PATCH v2 2/2] PM / devfreq: add Airoha SoC Subsystem devfreq driver

[Christian Marangi]

Add simple Airoha SoC devfreq driver. This simple driver register a
driver from a given clock and register a passive governor to scale the
frequency with the CPU frequency.

Each subsystem is scaled to idle, nominal or turbo state based on the CPU
frequency to reflect the performance state required by the SoC.

required-opp on the CPU frequency will be used to correctly bind the
clock to the related CPU frequency.

GSW, NPU, SOE, BUS and many other clock will register this devfreq
driver to scale all these internal peripheral  from idle to performance
mode.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 drivers/devfreq/Kconfig                    |  10 +++
 drivers/devfreq/Makefile                   |   1 +
 drivers/devfreq/airoha-subsystem-devfreq.c | 100 +++++++++++++++++++++
 3 files changed, 111 insertions(+)
 create mode 100644 drivers/devfreq/airoha-subsystem-devfreq.c

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index c999c4a1e567..e8ea0c0af319 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -75,6 +75,16 @@ config DEVFREQ_GOV_PASSIVE
 
 comment "DEVFREQ Drivers"
 
+config ARM_AIROHA_SUBSYSTEM_DEVFREQ
+	tristate "Scaling support for Airoha SoC Subsystems"
+	depends on ARCH_AIROHA || COMPILE_TEST
+	select DEVFREQ_GOV_PASSIVE
+	help
+	  This adds the DEVFREQ driver for the Airoha SoC Subsystems.
+
+	  The driver register with the cpufreq notifier and find the right frequency
+	  based on the required OPP set in DT.
+
 config ARM_EXYNOS_BUS_DEVFREQ
 	tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver"
 	depends on ARCH_EXYNOS || COMPILE_TEST
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 404179d79a9d..31cdfe8fb704 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)	+= governor_userspace.o
 obj-$(CONFIG_DEVFREQ_GOV_PASSIVE)	+= governor_passive.o
 
 # DEVFREQ Drivers
+obj-$(CONFIG_ARM_AIROHA_SUBSYSTEM_DEVFREQ)	+= airoha-subsystem-devfreq.o
 obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)	+= exynos-bus.o
 obj-$(CONFIG_ARM_HISI_UNCORE_DEVFREQ)	+= hisi_uncore_freq.o
 obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ)	+= imx-bus.o
diff --git a/drivers/devfreq/airoha-subsystem-devfreq.c b/drivers/devfreq/airoha-subsystem-devfreq.c
new file mode 100644
index 000000000000..4b89121f7b8e
--- /dev/null
+++ b/drivers/devfreq/airoha-subsystem-devfreq.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/cpufreq.h>
+#include <linux/devfreq.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/pm_opp.h>
+
+struct airoha_devfreq_data {
+	struct clk *clk;
+
+	struct devfreq_passive_data gov_data;
+};
+
+static int airoha_devfreq_get_cur_freq(struct device *dev, unsigned long *freq)
+{
+	struct airoha_devfreq_data *data = dev_get_drvdata(dev);
+
+	*freq = clk_get_rate(data->clk);
+
+	return 0;
+}
+
+static int airoha_devfreq_target(struct device *dev, unsigned long *freq,
+				 u32 flags)
+{
+	struct airoha_devfreq_data *data = dev_get_drvdata(dev);
+
+	return clk_set_rate(data->clk, *freq);
+}
+
+static int airoha_devfreq_get_dev_status(struct device *dev,
+					 struct devfreq_dev_status *stat)
+{
+	struct airoha_devfreq_data *data = dev_get_drvdata(dev);
+
+	stat->busy_time = 0;
+	stat->total_time = 0;
+	stat->current_frequency = clk_get_rate(data->clk);
+
+	return 0;
+}
+
+static struct devfreq_dev_profile airoha_devfreq_devfreq_profile = {
+	.target = airoha_devfreq_target,
+	.get_dev_status = airoha_devfreq_get_dev_status,
+	.get_cur_freq = airoha_devfreq_get_cur_freq
+};
+
+static int airoha_devfreq_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct airoha_devfreq_data *data;
+	struct devfreq *devfreq;
+	int ret;
+
+	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->clk = devm_clk_get_enabled(dev, NULL);
+	if (IS_ERR(data->clk))
+		return dev_err_probe(dev, PTR_ERR(data->clk), "failed to get clk\n");
+
+	ret = devm_pm_opp_of_add_table(dev);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to parse fab freq thresholds\n");
+
+	dev_set_drvdata(dev, data);
+
+	data->gov_data.parent_type = CPUFREQ_PARENT_DEV;
+	devfreq = devm_devfreq_add_device(dev, &airoha_devfreq_devfreq_profile,
+					  DEVFREQ_GOV_PASSIVE, &data->gov_data);
+
+	return PTR_ERR_OR_ZERO(devfreq);
+}
+
+static const struct of_device_id airoha_devfreq_match_table[] = {
+	{ .compatible = "airoha,devfreq" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, airoha_devfreq_match_table);
+
+static struct platform_driver airoha_devfreq_driver = {
+	.probe		= airoha_devfreq_probe,
+	.driver		= {
+		.name   = "airoha-subsystem-devfreq",
+		.of_match_table = airoha_devfreq_match_table,
+	},
+};
+module_platform_driver(airoha_devfreq_driver);
+
+MODULE_DESCRIPTION("Airoha Devfreq driver");
+MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
+MODULE_LICENSE("GPL");
-- 
2.55.0

Re: [PATCH v2 2/2] PM / devfreq: add Airoha SoC Subsystem devfreq driver

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] devfreq: target callback fails to update *freq to actual applied rate
--

commit ef9292d19d56ca62518a03cc0a714b29d6101475
Author: Christian Marangi <ansuelsmth@gmail.com>

PM / devfreq: add Airoha SoC Subsystem devfreq driver

Add simple Airoha SoC devfreq driver. This simple driver register a
driver from a given clock and register a passive governor to scale the
frequency with the CPU frequency.

> diff --git a/drivers/devfreq/airoha-subsystem-devfreq.c b/drivers/devfreq/airoha-subsystem-devfreq.c
> new file mode 100644
> index 0000000000000..4b89121f7b8ec
> --- /dev/null
> +++ b/drivers/devfreq/airoha-subsystem-devfreq.c
[ ... ]
> +static int airoha_devfreq_target(struct device *dev, unsigned long *freq,
> +				 u32 flags)
> +{
> +	struct airoha_devfreq_data *data = dev_get_drvdata(dev);
> +
> +	return clk_set_rate(data->clk, *freq);
> +}

[Severity: Medium]
Does this target callback need to update the freq pointer to the actual
frequency applied?

When the devfreq core or governor requests a frequency transition, it calls
the .target callback with the requested frequency in the freq parameter. This
happens on every frequency transition triggered by the governor.

The devfreq core's internal state (devfreq->previous_freq) and statistics
track the frequency returned in the freq pointer. If the unrounded or
interpolated requested frequency is blindly passed to clk_set_rate() and
left unchanged instead of being updated to the actual frequency applied to
the hardware, this can cause -EINVAL lookup errors in devfreq_get_freq_level()
and break statistics.

Could devfreq_recommended_opp() be used here to constrain the requested
frequency to a valid OPP and update freq before applying it?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261009073330.18175-1-ansuelsmth@gmail.com?part=2