Re: [PATCH net-next v13 04/12] dpll: sit9531x: read DPLL types and pin properties from system firmware

[Ali Rouhi <arouhi@sitime.com>]

On Wed, 14 Oct 2026, sashiko-bot@kernel.org wrote:

Reply inline.

> > +           sitdev->ref[index].freq = sitdev->xtal_freq;
>
> [Severity: Low] Does this code leak state if an allocation fails
> later in the function? The comment later in sit9531x_pin_props_get()
> explicitly states that the allocation for ranges is the last thing
> that can fail, and a call that reports failure must not leave the
> device's cached rate changed behind it. However, if the allocation
> for ranges fails, the function returns -ENOMEM and leaves
> sitdev->ref[index].freq permanently modified for the XO pin. Should
> the update to sitdev->ref[index].freq be deferred to the end of the
> function here as well, rather than doing it early in this block?

Right, and v14 defers it.  The XO branch wrote the cached rate before
the allocation that can fail, which is the one thing the comment
further down says must not happen.

v14 drops that assignment.  The XO pin now takes the same path as
every other input pin: the rate is stored after the allocation, in the
one place in the function that writes the cache.