From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Icenowy Zheng" <zhengxingda@iscas.ac.cn>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>
Cc: devicetree@vger.kernel.org,
"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] Enable LPC interrupt controller on MIPS LS7A systems
Date: Wed, 29 Apr 2026 10:35:34 +0100 [thread overview]
Message-ID: <3194da09-3bfc-4482-b179-04b6d5df4a00@app.fastmail.com> (raw)
In-Reply-To: <20260411101744.4020216-1-zhengxingda@iscas.ac.cn>
On Sat, 11 Apr 2026, at 11:17 AM, Icenowy Zheng wrote:
> This patchset tries to enable support for LPC interrupts on MIPS-based
> Loongson systems with Loongson 7A1000 PCH chip.
>
> The corresponding irqchip support (along with the DT binding) is already
> added to the tip tree.
>
> Tested on a Haier Boyue G51 system with legacy i8042 keyboard/mouse as
> integrated ones.
>
> This patchset is splitted from the original patchset that contains both
> driver part and DT part.
For the series:
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
>
> Icenowy Zheng (2):
> MIPS: Loongson64: dts: Sort nodes
> MIPS: Loongson64: dts: Add node for LS7A PCH LPC
>
> arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 17 +++++++++++++----
> 1 file changed, 13 insertions(+), 4 deletions(-)
>
> --
> 2.52.0
--
- Jiaxun
prev parent reply other threads:[~2026-04-29 9:36 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-11 10:17 [PATCH 0/2] Enable LPC interrupt controller on MIPS LS7A systems Icenowy Zheng
2026-04-11 10:17 ` [PATCH 1/2] MIPS: Loongson64: dts: Sort nodes Icenowy Zheng
2026-04-11 10:17 ` [PATCH 2/2] MIPS: Loongson64: dts: Add node for LS7A PCH LPC Icenowy Zheng
2026-04-29 9:35 ` Jiaxun Yang [this message]
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