[PATCH 0/2] Enable LPC interrupt controller on MIPS LS7A systems

[PATCH 0/2] Enable LPC interrupt controller on MIPS LS7A systems

[Icenowy Zheng]

This patchset tries to enable support for LPC interrupts on MIPS-based
Loongson systems with Loongson 7A1000 PCH chip.

The corresponding irqchip support (along with the DT binding) is already
added to the tip tree.

Tested on a Haier Boyue G51 system with legacy i8042 keyboard/mouse as
integrated ones.

This patchset is splitted from the original patchset that contains both
driver part and DT part.

Icenowy Zheng (2):
  MIPS: Loongson64: dts: Sort nodes
  MIPS: Loongson64: dts: Add node for LS7A PCH LPC

 arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

-- 
2.52.0

[PATCH 1/2] MIPS: Loongson64: dts: Sort nodes

[Icenowy Zheng]

The RTC's address is after UARTs, however the node is currently before
them.

Re-order the node to match address sequence.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
---
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index 6dee85909f5a6..59ca1ef0a7b64 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -19,13 +19,6 @@ pic: interrupt-controller@10000000 {
 			#interrupt-cells = <2>;
 		};
 
-		rtc0: rtc@100d0100 {
-			compatible = "loongson,ls7a-rtc";
-			reg = <0 0x100d0100 0 0x78>;
-			interrupt-parent = <&pic>;
-			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
-		};
-
 		ls7a_uart0: serial@10080000 {
 			compatible = "ns16550a";
 			reg = <0 0x10080000 0 0x100>;
@@ -65,6 +58,13 @@ ls7a_uart3: serial@10080300 {
 			no-loopback-test;
 		};
 
+		rtc0: rtc@100d0100 {
+			compatible = "loongson,ls7a-rtc";
+			reg = <0 0x100d0100 0 0x78>;
+			interrupt-parent = <&pic>;
+			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		pci@1a000000 {
 			compatible = "loongson,ls7a-pci";
 			device_type = "pci";
-- 
2.52.0

[PATCH 2/2] MIPS: Loongson64: dts: Add node for LS7A PCH LPC

[Icenowy Zheng]

Loongson 7A series PCH contain a LPC IRQ controller.

Add the device tree node of it.

Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
---
 arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
index 59ca1ef0a7b64..f304f99946f16 100644
--- a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -19,6 +19,15 @@ pic: interrupt-controller@10000000 {
 			#interrupt-cells = <2>;
 		};
 
+		lpc: interrupt-controller@10002000 {
+			compatible = "loongson,ls7a-lpc";
+			reg = <0 0x10002000 0 0x1000>;
+			interrupt-controller;
+			interrupt-parent = <&pic>;
+			interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
+			#interrupt-cells = <2>;
+		};
+
 		ls7a_uart0: serial@10080000 {
 			compatible = "ns16550a";
 			reg = <0 0x10080000 0 0x100>;
-- 
2.52.0

Re: [PATCH 0/2] Enable LPC interrupt controller on MIPS LS7A systems

[Jiaxun Yang]

On Sat, 11 Apr 2026, at 11:17 AM, Icenowy Zheng wrote:
> This patchset tries to enable support for LPC interrupts on MIPS-based
> Loongson systems with Loongson 7A1000 PCH chip.
>
> The corresponding irqchip support (along with the DT binding) is already
> added to the tip tree.
>
> Tested on a Haier Boyue G51 system with legacy i8042 keyboard/mouse as
> integrated ones.
>
> This patchset is splitted from the original patchset that contains both
> driver part and DT part.

For the series:

Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

>
> Icenowy Zheng (2):
>   MIPS: Loongson64: dts: Sort nodes
>   MIPS: Loongson64: dts: Add node for LS7A PCH LPC
>
>  arch/mips/boot/dts/loongson/ls7a-pch.dtsi | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
>
> -- 
> 2.52.0

-- 
- Jiaxun