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* Re: [PATCH v1 2/2] LRW UART: serial: add driver for the LRW UART
@ 2026-05-13  8:43 liu.qingtao2
  2026-05-13 18:05 ` Krzysztof Kozlowski
  0 siblings, 1 reply; 3+ messages in thread
From: liu.qingtao2 @ 2026-05-13  8:43 UTC (permalink / raw)
  To: krzk
  Cc: gregkh, jirislaby, robh, krzk+dt, conor+dt, marex, pjw, palmer,
	aou, alex, rdunlap, geert+renesas, quic_zongjian,
	arturs.artamonovs, robert.marko, hvilleneuve, thierry.bultel.yh,
	julianbraha, flavra, prabhakar.mahadev-lad.rj, linux-serial,
	linux-kernel, devicetree, linux-riscv, liu.wenhong35,
	dai.hualiang, deng.weixian, jia.yunxiang, bai.lu5, yang.susheng,
	shen.lin1, zuo.jiang, hu.shengming, gao.rui, tan.hu, liu.qingtao2

> On 13/02/2026 10:33, LiuQingtao wrote:
> > From: Wenhong Liu <liu.wenhong35@zte.com.cn>
> >
> > This commit introduces a serial driver for the LRW UART controller
> Please do not use "This commit/patch/change", but imperative mood. See
> longer explanation here:
> https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94

Thanks. I change subject to "Add support for the ZTE LRX UART controller with the following features"
in the following patches.

> >
> > Key features implemented:
> > - Support for FIFO mode (16-byte depth)
> > - Baud rate configuration
> > - Standard asynchronous communication formats:
> > * Data bits: 5, 6, 7, 8, 9 bits
> > * Parity: odd, even, fixed, none
> > * Stop bits: 1 or 2 bits
> > - Hardware flow control (RTS/CTS)
> > - Multiple interrupt reporting mechanisms
> >
> > Signed-off-by: Wenhong Liu <liu.wenhong35@zte.com.cn>
> > Signed-off-by: Qingtao Liu <liu.qingtao2@zte.com.cn>
> Mismatched DCO/SoB.
> Run checkpatch on your code.

Thanks for your notice. This patch is co-developed by Qingtao Liu.
SoB will be modified in v2 patches:

Co-developed-by: Qingtao Liu <liu.qingtao2@zte.com.cn>
Signed-off-by: Qingtao Liu <liu.qingtao2@zte.com.cn>
Signed-off-by: Wenhong Liu <liu.wenhong35@zte.com.cn>

> > ---
> > MAINTAINERS | 3 +
> > drivers/tty/serial/Kconfig | 33 +
> > drivers/tty/serial/Makefile | 1 +
> > drivers/tty/serial/lrw_uart.c | 2822 ++++++++++++++++++++++++++++++
> > include/uapi/linux/serial_core.h | 3 +
> > 5 files changed, 2862 insertions(+)
> > create mode 100644 drivers/tty/serial/lrw_uart.c
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index ad6acbe24544..a97fbd205f75 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -15041,6 +15041,9 @@ R: Qingtao Liu <liu.qingtao2@zte.com.cn>
> > L: linux-serial@vger.kernel.org
> > S: Maintained
> > F: Documentation/devicetree/bindings/serial/lrw,lrw-uart.yaml
> > +F: drivers/tty/serial/Kconfig
> > +F: drivers/tty/serial/Makefile
>
> Why do you claim you maintain these files?
>

Oh sorry, now i only added these files in v2 patch.
+F: Documentation/devicetree/bindings/serial/zte,lrx-uart.yaml
+F: drivers/tty/serial/lrx_uart.c


> > +F: drivers/tty/serial/lrw_uart.c
> >
> ....
> > +
> > +static int lrw_uart_probe(struct platform_device *pdev)
> > +{
> > + struct lrw_uart_port *sup;
> > + struct resource *r;
> > + int portnr, ret;
> > + unsigned int clk;
> > + unsigned int baudrate;
> > +
> > + /*
> > + * Check the mandatory baud rate parameter in the DT node early
> > + * so that we can easily exit with the error.
> > + */
> > + if (pdev->dev.of_node) {
> > + struct device_node *np = pdev->dev.of_node;
> > +
> > + ret = of_property_read_u32(np, "current-speed", &baudrate);
>
> Test your code/DTS - there is no such property allowed and you would see
> warnings on DTS.
>
> Best regards,
> Krzysztof

Oh, i've lost this property in dt-bindings. It will be added in the
v2 patches and no more warnings.

^ permalink raw reply	[flat|nested] 3+ messages in thread
* Re: [PATCH v1 2/2] LRW UART: serial: add driver for the LRW UART
@ 2026-05-13  8:44 liu.qingtao2
  0 siblings, 0 replies; 3+ messages in thread
From: liu.qingtao2 @ 2026-05-13  8:44 UTC (permalink / raw)
  To: gregkh
  Cc: krzk, jirislaby, robh, krzk+dt, conor+dt, marex, pjw, palmer, aou,
	alex, rdunlap, geert+renesas, quic_zongjian, arturs.artamonovs,
	robert.marko, hvilleneuve, thierry.bultel.yh, julianbraha, flavra,
	prabhakar.mahadev-lad.rj, linux-serial, linux-kernel, devicetree,
	linux-riscv, liu.wenhong35, dai.hualiang, deng.weixian,
	jia.yunxiang, bai.lu5, yang.susheng, shen.lin1, zuo.jiang,
	hu.shengming, gao.rui, tan.hu, liu.qingtao2

> On Fri, Feb 13, 2026 at 05:33:34PM +0800, LiuQingtao wrote:
> > From: Wenhong Liu <liu.wenhong35@zte.com.cn>
> >
> > This commit introduces a serial driver for the LRW UART controller
> >
> > Key features implemented:
> > - Support for FIFO mode (16-byte depth)
> > - Baud rate configuration
> > - Standard asynchronous communication formats:
> >   * Data bits: 5, 6, 7, 8, 9 bits
> >   * Parity: odd, even, fixed, none
> >   * Stop bits: 1 or 2 bits
> > - Hardware flow control (RTS/CTS)
> > - Multiple interrupt reporting mechanisms
> >
> > Signed-off-by: Wenhong Liu <liu.wenhong35@zte.com.cn>
> > Signed-off-by: Qingtao Liu <liu.qingtao2@zte.com.cn>
> > ---
> >  MAINTAINERS                      |    3 +
> >  drivers/tty/serial/Kconfig       |   33 +
> >  drivers/tty/serial/Makefile      |    1 +
> >  drivers/tty/serial/lrw_uart.c    | 2822 ++++++++++++++++++++++++++++++
>
> This really is a totally new uart?  No relation to any existing devices
> at all?  Why would that be created?
>
> Anyway, this doesn't seem to build properly, how was it tested?

Yes, it`s a new uart for lrx SoC. The lrx SoC with its related docs will be released soon.

The uart TX & RX test environment:
1.Kernel: linux-next, commit 4cd074ae20bbcc293bbbce9163abe99d68ae6ae0(Tue May 5 14:57:23 2026 +0200),
with CONFIG_SERIAL_LRX_UART and SERIAL_LRX_UART_CONSOLE selected.
2.GCC: 14.1.0.
3.SoC: lrx SoC.


> > --- a/include/uapi/linux/serial_core.h
> > +++ b/include/uapi/linux/serial_core.h
> > @@ -231,6 +231,9 @@
> >  /* Sunplus UART */
> >  #define PORT_SUNPLUS    123
> >  
> > +/* LRW UART */
> > +#define PORT_LRW    124
>
> Why is this id needed?
>
> thanks,
>
> greg k-h

Thanks for notice. This id is not needed actually.
According to https://lore.kernel.org/all/20231008001804.889727-1-jcmvbkbc@gmail.com/, the specific type
of the port is not important to the userspace.

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2026-05-13  8:43 [PATCH v1 2/2] LRW UART: serial: add driver for the LRW UART liu.qingtao2
2026-05-13 18:05 ` Krzysztof Kozlowski
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