From: Alastair D'Silva <alastair@d-silva.org>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
James Hilliard <james.hilliard1@gmail.com>,
richard.genoud@bootlin.com
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>
Subject: Re: [PATCH net-next 4/4] net: stmmac: dwmac-sun8i: Add Allwinner H616 EMAC clock index and internal PHY support
Date: Wed, 16 Sep 2026 16:45:06 +1000 [thread overview]
Message-ID: <4404f56f441a4f61e01ebde721ca0220cc96a948.camel@d-silva.org> (raw)
In-Reply-To: <579d7650-583e-49bd-aa51-02fc52940ea1@bootlin.com>
On Wed, 2026-09-16 at 08:24 +0200, Maxime Chevallier wrote:
> Hi,
>
> >
<snip>
> > .../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 65
> > ++++++++++++++++---
> > 1 file changed, 55 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> > b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> > index 48c52eb96233..1728893589a6 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> > @@ -130,6 +130,16 @@ static const struct emac_variant
> > emac_variant_a64 = {
> > .tx_delay_max = 7,
> > };
> >
> > +static const struct emac_variant emac_variant_h616_internal = {
> > + .syscon_field = &sun8i_syscon_reg_field,
> > + .soc_has_internal_phy = true,
> > + .support_mii = true,
> > + .support_rmii = true,
> > + .support_rgmii = true,
> > + .rx_delay_max = 31,
> > + .tx_delay_max = 7,
> > +};
> James's series [1] says this SoC only supports RMII (yet includes
> RGMII timing
> control), and here for seemingly the same device, there's MII and
> RGMII
> support listed.
>
> [1] : https://lore.kernel.org/r/20260915-submit-h616-emac1-v1-v1-0-
> 195de0bb1f8a@gmail.com
>
> Maybe you can coordinate with one another, can we connect that SoC to
> a non-internal PHY ?
> If so, can we use MII, RMII and RGMII ? or is it just RMII ?
>
> Maxime
I just double checked, MII & RGMII are bogus.
Only EMAC0 can be connected to an external PHY.
--
Alastair D'Silva
next prev parent reply other threads:[~2026-09-16 6:45 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-16 4:41 [PATCH net-next 0/4] net: Add Allwinner H616/H618 EMAC1 and AC300 EPHY support Alastair D'Silva
2026-09-16 4:41 ` [PATCH net-next 1/4] dt-bindings: net: phy: Add Allwinner AC300 EPHY binding Alastair D'Silva
2026-09-16 14:49 ` Andrew Lunn
2026-09-16 15:22 ` Rob Herring (Arm)
2026-09-17 4:42 ` sashiko-bot
2026-09-16 4:41 ` [PATCH net-next 2/4] net: phy: Add Allwinner AC300 EPHY driver Alastair D'Silva
2026-09-16 15:05 ` Andrew Lunn
2026-09-17 4:42 ` sashiko-bot
2026-09-16 4:41 ` [PATCH net-next 3/4] dt-bindings: net: allwinner,sun8i-a83t-emac: Add Allwinner H616 EMAC1 and syscon index Alastair D'Silva
2026-09-16 15:22 ` Rob Herring (Arm)
2026-09-17 4:42 ` sashiko-bot
2026-09-16 4:41 ` [PATCH net-next 4/4] net: stmmac: dwmac-sun8i: Add Allwinner H616 EMAC clock index and internal PHY support Alastair D'Silva
2026-09-16 6:24 ` Maxime Chevallier
2026-09-16 6:29 ` James Hilliard
2026-09-16 6:45 ` Alastair D'Silva [this message]
2026-09-16 6:47 ` Andre Przywara
2026-09-17 4:42 ` sashiko-bot
2026-09-16 4:56 ` [PATCH net-next 0/4] net: Add Allwinner H616/H618 EMAC1 and AC300 EPHY support Chen-Yu Tsai
2026-09-16 5:12 ` James Hilliard
2026-09-16 6:49 ` Alastair D'Silva
2026-09-16 7:06 ` Maxime Chevallier
2026-09-16 8:02 ` Alastair D'Silva
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