[PATCH v4 0/7] ASoC: qcom: add AudioReach TDM backend support

[PATCH v4 0/7] ASoC: qcom: add AudioReach TDM backend support

[Prasad Kumpatla]

Add AudioReach support for LPASS Audio IF based TDM backends and wire it
up for the sc8280xp machine driver.

The series first adds topology-driven Audio IF source/sink handling so
the DSP interface parameters can be described by topology while runtime
media format and slot configuration still come from the machine driver.
It then adds TDM DAI operations for q6apm-lpass-dais, exposes the Audio
IF clock IDs through the q6dsp-lpass-ports binding and q6prm clock
tables, and introduces common QCOM helpers for parsing standard
dai-tdm-slot-* properties from backend CPU and codec endpoints.

Finally, sc8280xp uses the common helpers during hw_params to program
CPU and codec TDM slots, derive the backend bit clock from the active
PCM parameters, and request the CPU and codec clocks before the stream is
started.

Changes in v4:
	- Addressed comments related to bindings from Rob.
	- Link to v3: https://lore.kernel.org/all/20260707190106.2876465-1-prasad.kumpatla@oss.qualcomm.com/

Changes in v3:
	- Reusing of tdm-slot.yaml and update the bindings.
	- Link to v2: https://lore.kernel.org/all/20260630091605.4043426-1-prasad.kumpatla@oss.qualcomm.com/

Changes in v2:
	- Update AR Module token definitions and validation prefixes.
	- Reorder module addresses.
	- Add kernel-doc for `struct param_id_audio_if_intf_cfg`.
	- Remove unused code and stale comments.
	- Clean up comments and naming in q6apm-lpass-ports.h.
	- Add bindings for TDM slots.
	- Link to v1: https://lore.kernel.org/all/20260610154517.134570-1-prasad.kumpatla@oss.qualcomm.com/

This series depends on:
	- https://lore.kernel.org/all/20260711125740.3083236-1-mohammad.rafi.shaik@oss.qualcomm.com/

Prasad Kumpatla (7):
  ASoC: qcom: qdsp6: add topology-driven Audio IF support
  ASoC: qcom: q6apm-lpass-dais: add TDM DAI operations
  ASoC: dt-bindings: qcom,q6dsp-lpass-ports: add Audio IF clocks
  ASoC: qcom: qdsp6: q6prm: add Audio IF clock IDs
  Asoc: dt-bindings: qcom,sm8250: Add TDM slot properties
  ASoC: qcom: common: add DAI-node TDM slot helpers
  ASoC: qcom: sc8280xp: add TDM hw_params support

 .../bindings/sound/qcom,sm8250.yaml           |  16 ++
 .../sound/qcom,q6dsp-lpass-ports.h            |  29 +++
 include/uapi/sound/snd_ar_tokens.h            |  89 ++++++++++
 sound/soc/qcom/common.c                       | 165 ++++++++++++++++++
 sound/soc/qcom/common.h                       |  14 ++
 sound/soc/qcom/qdsp6/audioreach.c             |  97 ++++++++++
 sound/soc/qcom/qdsp6/audioreach.h             |  81 +++++++++
 sound/soc/qcom/qdsp6/q6apm-lpass-dais.c       |  57 ++++++
 sound/soc/qcom/qdsp6/q6prm-clocks.c           |  28 +++
 sound/soc/qcom/qdsp6/q6prm.h                  |  29 +++
 sound/soc/qcom/qdsp6/topology.c               | 105 +++++++++++
 sound/soc/qcom/sc8280xp.c                     |  60 +++++++
 12 files changed, 770 insertions(+)


base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1
prerequisite-patch-id: 28f571976819748d886ecdd32e1ea3976440374b
prerequisite-patch-id: 1b00c4a50852a4058eb2e1e609769ba067fd8d4a
prerequisite-patch-id: 6320a0e2ad587fa5c7fe999ae168689af724a4af
-- 
2.34.1

[PATCH v4 1/7] ASoC: qcom: qdsp6: add topology-driven Audio IF support

[Prasad Kumpatla]

Add topology parsing and media-format programming for Audio IF source and
sink modules.

Add the Audio IF module IDs, the required topology tokens, and a dedicated
topology loader that stores the parsed interface configuration in the
AudioReach module state. Also add the Audio IF media-format path that
sends the interface configuration, hardware endpoint media format, and
frame-duration parameters for Audio IF modules.

This keeps the serial-interface configuration topology-driven while still
allowing the machine driver to provide runtime slot and media format
settings. The same Audio IF path can then be reused for TDM, PCM, and I2S
style backends.

The new UAPI tokens (AR_TKN_U16_MODULE_SYNC_SRC=262 through
AR_TKN_U8_MODULE_INV_EXT_BIT_CLK=276) are added, together with the value
defines used by the sync source, sync mode, data delay, interface mode,
bit clock type, and polarity tokens.

MODULE_ID_AUDIO_IF_SINK (0x0700117C) and MODULE_ID_AUDIO_IF_SOURCE
(0x0700117D) are introduced in this patch.

This Module is validated on Hawi and Shikra platforms.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 include/uapi/sound/snd_ar_tokens.h |  89 ++++++++++++++++++++++++
 sound/soc/qcom/qdsp6/audioreach.c  |  97 ++++++++++++++++++++++++++
 sound/soc/qcom/qdsp6/audioreach.h  |  81 ++++++++++++++++++++++
 sound/soc/qcom/qdsp6/topology.c    | 105 +++++++++++++++++++++++++++++
 4 files changed, 372 insertions(+)

diff --git a/include/uapi/sound/snd_ar_tokens.h b/include/uapi/sound/snd_ar_tokens.h
index 6b8102eaa..bda65311c 100644
--- a/include/uapi/sound/snd_ar_tokens.h
+++ b/include/uapi/sound/snd_ar_tokens.h
@@ -168,6 +168,58 @@ enum ar_event_types {
  *						LOG_WAIT = 0,
  *						LOG_IMMEDIATELY = 1
  *
+ * %AR_TKN_U16_MODULE_SYNC_SRC:			Frame sync source
+ *						AR_AUDIO_IF_SYNC_SRC_EXTERNAL = 0,
+ *						AR_AUDIO_IF_SYNC_SRC_INTERNAL = 1
+ *
+ * %AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE:	Enable data-out tri-state control
+ *						AR_AUDIO_IF_CTRL_DATA_OE_DISABLE = 0,
+ *						AR_AUDIO_IF_CTRL_DATA_OE_ENABLE = 1
+ *
+ * %AR_TKN_U32_MODULE_SLOT_MASK:			Active TDM slot bitmask
+ *
+ * %AR_TKN_U16_MODULE_NSLOTS_PER_FRAME:		Number of slots per TDM frame
+ *
+ * %AR_TKN_U16_MODULE_SLOT_WIDTH:		Slot width in bits (16 or 32)
+ *
+ * %AR_TKN_U16_MODULE_SYNC_MODE:			Frame sync mode
+ *						AR_AUDIO_IF_FRAME_SYNC_MODE_SHORT = 0,
+ *						AR_AUDIO_IF_FRAME_SYNC_MODE_ONE_SLOT = 1,
+ *						AR_AUDIO_IF_FRAME_SYNC_MODE_LONG = 2
+ *
+ * %AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE:	Invert frame sync pulse polarity
+ *						AR_AUDIO_IF_SYNC_NORMAL = 0,
+ *						AR_AUDIO_IF_SYNC_INVERTED = 1
+ *
+ * %AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY:	Data delay relative to frame sync
+ *						AR_AUDIO_IF_DATA_DELAY_NONE = 0,
+ *						AR_AUDIO_IF_DATA_DELAY_1_CYCLE = 1,
+ *						AR_AUDIO_IF_DATA_DELAY_2_CYCLE = 2
+ *
+ * %AR_TKN_U16_MODULE_INTF_MODE:			Audio IF interface mode
+ *						AR_AUDIO_IF_INTF_MODE_TDM = 0,
+ *						AR_AUDIO_IF_INTF_MODE_PCM = 1,
+ *						AR_AUDIO_IF_INTF_MODE_I2S = 2
+ *
+ * %AR_TKN_U16_MODULE_QAIF_TYPE:			QAIF hardware port type index
+ *
+ * %AR_TKN_U32_MODULE_ACTIVE_LANE_MASK:		Active lane bitmask for multi-lane
+ *
+ * %AR_TKN_U32_MODULE_FRAME_SYNC_RATE:		Frame sync rate in Hz
+ *
+ * %AR_TKN_U16_MODULE_BIT_CLK_TYPE:		Bit clock type
+ *						AR_AUDIO_IF_BIT_CLK_INTERNAL = 0,
+ *						AR_AUDIO_IF_BIT_CLK_EXTERNAL = 1,
+ *						AR_AUDIO_IF_BIT_CLK_SKIP = 2
+ *
+ * %AR_TKN_U8_MODULE_INV_INT_BIT_CLK:		Invert internal bit clock
+ *						AR_AUDIO_IF_CLK_NORMAL = 0,
+ *						AR_AUDIO_IF_CLK_INVERTED = 1
+ *
+ * %AR_TKN_U8_MODULE_INV_EXT_BIT_CLK:		Invert external bit clock
+ *						AR_AUDIO_IF_CLK_NORMAL = 0,
+ *						AR_AUDIO_IF_CLK_INVERTED = 1
+ *
  * %AR_TKN_DAI_INDEX:				dai index
  *
  */
@@ -240,6 +292,43 @@ enum ar_event_types {
 #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID	260
 #define AR_TKN_U32_MODULE_LOG_MODE		261
 
+#define AR_TKN_U16_MODULE_SYNC_SRC		262
+#define AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE	263
+#define AR_TKN_U32_MODULE_SLOT_MASK		264
+#define AR_TKN_U16_MODULE_NSLOTS_PER_FRAME	265
+#define AR_TKN_U16_MODULE_SLOT_WIDTH		266
+#define AR_TKN_U16_MODULE_SYNC_MODE		267
+#define AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE	268
+#define AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY	269
+#define AR_TKN_U16_MODULE_INTF_MODE		270
+#define AR_TKN_U16_MODULE_QAIF_TYPE		271
+#define AR_TKN_U32_MODULE_ACTIVE_LANE_MASK	272
+#define AR_TKN_U32_MODULE_FRAME_SYNC_RATE	273
+#define AR_TKN_U16_MODULE_BIT_CLK_TYPE		274
+#define AR_TKN_U8_MODULE_INV_INT_BIT_CLK	275
+#define AR_TKN_U8_MODULE_INV_EXT_BIT_CLK	276
+
+#define AR_AUDIO_IF_SYNC_SRC_EXTERNAL		0
+#define AR_AUDIO_IF_SYNC_SRC_INTERNAL		1
+#define AR_AUDIO_IF_CTRL_DATA_OE_DISABLE	0
+#define AR_AUDIO_IF_CTRL_DATA_OE_ENABLE		1
+#define AR_AUDIO_IF_INTF_MODE_TDM		0
+#define AR_AUDIO_IF_INTF_MODE_PCM		1
+#define AR_AUDIO_IF_INTF_MODE_I2S		2
+#define AR_AUDIO_IF_FRAME_SYNC_MODE_SHORT	0
+#define AR_AUDIO_IF_FRAME_SYNC_MODE_ONE_SLOT	1
+#define AR_AUDIO_IF_FRAME_SYNC_MODE_LONG	2
+#define AR_AUDIO_IF_SYNC_NORMAL			0
+#define AR_AUDIO_IF_SYNC_INVERTED		1
+#define AR_AUDIO_IF_DATA_DELAY_NONE		0
+#define AR_AUDIO_IF_DATA_DELAY_1_CYCLE		1
+#define AR_AUDIO_IF_DATA_DELAY_2_CYCLE		2
+#define AR_AUDIO_IF_BIT_CLK_INTERNAL		0
+#define AR_AUDIO_IF_BIT_CLK_EXTERNAL		1
+#define AR_AUDIO_IF_BIT_CLK_SKIP		2
+#define AR_AUDIO_IF_CLK_NORMAL			0
+#define AR_AUDIO_IF_CLK_INVERTED		1
+
 #define SND_SOC_AR_TPLG_MODULE_CFG_TYPE 0x01001006
 struct audioreach_module_priv_data {
 	__le32 size;	/* size in bytes of the array, including all elements */
diff --git a/sound/soc/qcom/qdsp6/audioreach.c b/sound/soc/qcom/qdsp6/audioreach.c
index e6e9eb2e8..62140ce8e 100644
--- a/sound/soc/qcom/qdsp6/audioreach.c
+++ b/sound/soc/qcom/qdsp6/audioreach.c
@@ -152,6 +152,13 @@ struct apm_i2s_module_intf_cfg {
 
 #define APM_I2S_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_i2s_module_intf_cfg), 8)
 
+struct apm_audio_if_module_intf_cfg {
+	struct apm_module_param_data param_data;
+	struct param_id_audio_if_intf_cfg cfg;
+} __packed;
+
+#define APM_AUDIO_IF_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_audio_if_module_intf_cfg), 8)
+
 struct apm_module_hw_ep_mf_cfg {
 	struct apm_module_param_data param_data;
 	struct param_id_hw_ep_mf mf;
@@ -168,6 +175,13 @@ struct apm_module_frame_size_factor_cfg {
 
 #define APM_FS_CFG_PSIZE ALIGN(sizeof(struct apm_module_frame_size_factor_cfg), 8)
 
+struct apm_module_hw_ep_frame_duration_cfg {
+	struct apm_module_param_data param_data;
+	struct param_id_hw_ep_frame_duration frame_duration;
+} __packed;
+
+#define APM_HW_EP_FRAME_DURATION_PSIZE ALIGN(sizeof(struct apm_module_hw_ep_frame_duration_cfg), 8)
+
 struct apm_module_hw_ep_power_mode_cfg {
 	struct apm_module_param_data param_data;
 	struct param_id_hw_ep_power_mode_cfg power_mode;
@@ -1042,6 +1056,85 @@ static int audioreach_i2s_set_media_format(struct q6apm_graph *graph,
 	return q6apm_send_cmd_sync(graph->apm, pkt, 0);
 }
 
+static int audioreach_audio_if_set_media_format(struct q6apm_graph *graph,
+						const struct audioreach_module *module,
+						const struct audioreach_module_config *cfg)
+{
+	struct apm_module_hw_ep_frame_duration_cfg *fd_cfg;
+	struct apm_module_param_data *param_data;
+	struct apm_audio_if_module_intf_cfg *intf_cfg;
+	struct apm_module_hw_ep_mf_cfg *hw_cfg;
+	int ic_sz = APM_AUDIO_IF_INTF_CFG_PSIZE;
+	int ep_sz = APM_HW_EP_CFG_PSIZE;
+	int fd_sz = APM_HW_EP_FRAME_DURATION_PSIZE;
+	int size = ic_sz + ep_sz + fd_sz;
+	/*
+	 * A zero machine override means use the topology default; zero is not
+	 * a valid override for these TDM slot fields.
+	 */
+	u32 slot_mask = cfg->slot_mask ? cfg->slot_mask : module->slot_mask;
+	u16 nslots_per_frame = cfg->nslots_per_frame ?
+				 (u16)cfg->nslots_per_frame : module->nslots_per_frame;
+	u16 slot_width = cfg->slot_width ? (u16)cfg->slot_width : module->slot_width;
+	void *p;
+
+	struct gpr_pkt *pkt __free(kfree) = audioreach_alloc_apm_cmd_pkt(size, APM_CMD_SET_CFG, 0);
+	if (IS_ERR(pkt))
+		return PTR_ERR(pkt);
+
+	p = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
+	intf_cfg = p;
+
+	param_data = &intf_cfg->param_data;
+	param_data->module_instance_id = module->instance_id;
+	param_data->error_code = 0;
+	param_data->param_id = PARAM_ID_AUDIO_IF_INTF_CFG;
+	param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
+	intf_cfg->cfg.qaif_type = module->qaif_type;
+	intf_cfg->cfg.intf_idx = (u16)module->hw_interface_idx;
+	intf_cfg->cfg.intf_mode = module->intf_mode;
+	intf_cfg->cfg.ctrl_data_out_enable = module->ctrl_data_out_enable;
+	intf_cfg->cfg.active_slot_mask = slot_mask;
+	intf_cfg->cfg.nslots_per_frame = nslots_per_frame;
+	intf_cfg->cfg.slot_width = slot_width;
+	intf_cfg->cfg.active_lane_mask = module->active_lane_mask;
+	intf_cfg->cfg.frame_sync_rate = module->frame_sync_rate;
+	intf_cfg->cfg.frame_sync_src = module->sync_src;
+	intf_cfg->cfg.frame_sync_mode = module->sync_mode;
+	intf_cfg->cfg.invert_frame_sync_pulse = module->ctrl_invert_sync_pulse;
+	intf_cfg->cfg.frame_sync_data_delay = module->ctrl_sync_data_delay;
+	intf_cfg->cfg.bit_clk_type = module->bit_clk_type;
+	intf_cfg->cfg.inv_int_bit_clk = module->inv_int_bit_clk;
+	intf_cfg->cfg.inv_ext_bit_clk = module->inv_ext_bit_clk;
+
+	p += ic_sz;
+	hw_cfg = p;
+	param_data = &hw_cfg->param_data;
+	param_data->module_instance_id = module->instance_id;
+	param_data->error_code = 0;
+	param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
+	param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
+
+	hw_cfg->mf.sample_rate = cfg->sample_rate;
+	hw_cfg->mf.bit_width = cfg->bit_width;
+	hw_cfg->mf.num_channels = cfg->num_channels;
+	hw_cfg->mf.data_format = module->data_format;
+
+	p += ep_sz;
+	fd_cfg = p;
+	param_data = &fd_cfg->param_data;
+	param_data->module_instance_id = module->instance_id;
+	param_data->error_code = 0;
+	param_data->param_id = PARAM_ID_HW_EP_FRAME_DURATION;
+	param_data->param_size = fd_sz - APM_MODULE_PARAM_DATA_SIZE;
+	fd_cfg->frame_duration.frame_duration_in_us = AUDIO_IF_FRAME_DURATION_US;
+	fd_cfg->frame_duration.allow_frame_duration_normalization = 1;
+	fd_cfg->frame_duration.min_normalized_frame_dur_us = 1;
+	fd_cfg->frame_duration.max_normalized_frame_dur_us = 100000;
+
+	return q6apm_send_cmd_sync(graph->apm, pkt, 0);
+}
+
 static int audioreach_logging_set_media_format(struct q6apm_graph *graph,
 					       const struct audioreach_module *module)
 {
@@ -1411,6 +1504,10 @@ int audioreach_set_media_format(struct q6apm_graph *graph,
 		if (!rc)
 			rc = audioreach_module_enable(graph, module, true);
 		break;
+	case MODULE_ID_AUDIO_IF_SOURCE:
+	case MODULE_ID_AUDIO_IF_SINK:
+		rc = audioreach_audio_if_set_media_format(graph, module, cfg);
+		break;
 
 	default:
 		rc = 0;
diff --git a/sound/soc/qcom/qdsp6/audioreach.h b/sound/soc/qcom/qdsp6/audioreach.h
index 62a2fd79b..d57ba4e6a 100644
--- a/sound/soc/qcom/qdsp6/audioreach.h
+++ b/sound/soc/qcom/qdsp6/audioreach.h
@@ -36,6 +36,8 @@ struct q6apm_graph;
 #define MODULE_ID_SPEAKER_PROTECTION	0x070010E2
 #define MODULE_ID_SPEAKER_PROTECTION_VI	0x070010E3
 #define MODULE_ID_OPUS_DEC		0x07001174
+#define MODULE_ID_AUDIO_IF_SINK		0x0700117C
+#define MODULE_ID_AUDIO_IF_SOURCE	0x0700117D
 
 #define APM_CMD_GET_SPF_STATE		0x01001021
 #define APM_CMD_RSP_GET_SPF_STATE	0x02001007
@@ -544,6 +546,65 @@ struct param_id_i2s_intf_cfg {
 #define PORT_ID_I2S_OUPUT		1
 #define I2S_STACK_SIZE			2048
 
+#define PARAM_ID_AUDIO_IF_INTF_CFG	0x08001B11
+
+#define AUDIO_IF_INTF_MODE_TDM		AR_AUDIO_IF_INTF_MODE_TDM
+#define AUDIO_IF_INTF_MODE_PCM		AR_AUDIO_IF_INTF_MODE_PCM
+#define AUDIO_IF_INTF_MODE_I2S		AR_AUDIO_IF_INTF_MODE_I2S
+
+/*
+ * struct param_id_audio_if_intf_cfg - Audio interface configuration
+ * @qaif_type: Audio interface type (e.g. QAIF, QAIF_VA)
+ * @intf_idx: Interface instance index
+ * @intf_mode: Interface operating mode (TDM/PCM/I2S)
+ * @ctrl_data_out_enable: Enable sharing of data-out signal with other masters
+ * @active_slot_mask: Bitmask indicating active slots
+ * @nslots_per_frame: Number of slots per audio frame
+ * @slot_width: Width of each slot in bits
+ * @active_lane_mask: Bitmask of active data lanes
+ * @frame_sync_rate: Frame sync rate in Hz
+ * @frame_sync_src: Frame sync source selection
+ * @frame_sync_mode: Frame sync mode configuration
+ * @invert_frame_sync_pulse: Invert frame sync polarity when set
+ * @frame_sync_data_delay: Data delay from frame sync in bit clocks
+ * @bit_clk_type: Bit clock type (internal / external)
+ * @inv_int_bit_clk: Invert internal bit clock when set
+ * @inv_ext_bit_clk: Invert external bit clock when set
+ *
+ * This structure defines configuration parameters for the Qualcomm
+ * Audio Interface (QAIF) block. It is used to program interface
+ * characteristics such as slot configuration, clocking and frame
+ * synchronization behaviour.
+ */
+struct param_id_audio_if_intf_cfg {
+	u16 qaif_type;
+	u16 intf_idx;
+	u16 intf_mode;
+	u16 ctrl_data_out_enable;
+	u32 active_slot_mask;
+	u16 nslots_per_frame;
+	u16 slot_width;
+	u32 active_lane_mask;
+	u32 frame_sync_rate;
+	u16 frame_sync_src;
+	u16 frame_sync_mode;
+	u16 invert_frame_sync_pulse;
+	u16 frame_sync_data_delay;
+	u16 bit_clk_type;
+	u8 inv_int_bit_clk;
+	u8 inv_ext_bit_clk;
+} __packed;
+
+#define PARAM_ID_HW_EP_FRAME_DURATION	0x08001B2F
+#define AUDIO_IF_FRAME_DURATION_US		1000
+
+struct param_id_hw_ep_frame_duration {
+	u32 frame_duration_in_us;
+	u32 allow_frame_duration_normalization;
+	u32 min_normalized_frame_dur_us;
+	u32 max_normalized_frame_dur_us;
+} __packed;
+
 #define PARAM_ID_DISPLAY_PORT_INTF_CFG		0x08001154
 
 struct param_id_display_port_intf_cfg {
@@ -877,6 +938,23 @@ struct audioreach_module {
 	uint32_t data_format;
 	uint32_t hw_interface_type;
 
+	/* Audio IF module (TDM/PCM/I2S) */
+	u32 slot_mask;
+	u32 active_lane_mask;
+	u32 frame_sync_rate;
+	u16 qaif_type;
+	u16 sync_src;
+	u16 ctrl_data_out_enable;
+	u16 nslots_per_frame;
+	u16 slot_width;
+	u16 intf_mode;
+	u16 sync_mode;
+	u16 ctrl_invert_sync_pulse;
+	u16 ctrl_sync_data_delay;
+	u16 bit_clk_type;
+	u8 inv_int_bit_clk;
+	u8 inv_ext_bit_clk;
+
 	/* PCM module specific */
 	uint32_t interleave_type;
 
@@ -907,6 +985,9 @@ struct audioreach_module_config {
 	u32	channel_allocation;
 	u32	sd_line_mask;
 	int	fmt;
+	u32	slot_mask;
+	u16	nslots_per_frame;
+	u16	slot_width;
 	struct snd_codec codec;
 	u8 channel_map[AR_PCM_MAX_NUM_CHANNEL];
 };
diff --git a/sound/soc/qcom/qdsp6/topology.c b/sound/soc/qcom/qdsp6/topology.c
index 1f69fba6d..3dd0a5c29 100644
--- a/sound/soc/qcom/qdsp6/topology.c
+++ b/sound/soc/qcom/qdsp6/topology.c
@@ -753,6 +753,105 @@ static int audioreach_widget_i2s_module_load(struct audioreach_module *mod,
 	return 0;
 }
 
+static int audioreach_widget_audio_if_module_load(struct audioreach_module *mod,
+						  const struct snd_soc_tplg_vendor_array *mod_array)
+{
+	const struct snd_soc_tplg_vendor_value_elem *mod_elem;
+	int tkn_count = 0;
+	u32 val;
+
+	mod_elem = mod_array->value;
+
+	while (tkn_count < le32_to_cpu(mod_array->num_elems)) {
+		val = le32_to_cpu(mod_elem->value);
+		switch (le32_to_cpu(mod_elem->token)) {
+		case AR_TKN_U32_MODULE_HW_IF_IDX:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->hw_interface_idx = val;
+			break;
+		case AR_TKN_U32_MODULE_FMT_DATA:
+			mod->data_format = val;
+			break;
+		case AR_TKN_U16_MODULE_SYNC_SRC:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->sync_src = (u16)val;
+			break;
+		case AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->ctrl_data_out_enable = (u16)val;
+			break;
+		case AR_TKN_U32_MODULE_SLOT_MASK:
+			mod->slot_mask = val;
+			break;
+		case AR_TKN_U16_MODULE_NSLOTS_PER_FRAME:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->nslots_per_frame = (u16)val;
+			break;
+		case AR_TKN_U16_MODULE_SLOT_WIDTH:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->slot_width = (u16)val;
+			break;
+		case AR_TKN_U16_MODULE_INTF_MODE:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->intf_mode = (u16)val;
+			break;
+		case AR_TKN_U16_MODULE_SYNC_MODE:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->sync_mode = (u16)val;
+			break;
+		case AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->ctrl_invert_sync_pulse = (u16)val;
+			break;
+		case AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->ctrl_sync_data_delay = (u16)val;
+			break;
+		case AR_TKN_U16_MODULE_QAIF_TYPE:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->qaif_type = (u16)val;
+			break;
+		case AR_TKN_U32_MODULE_ACTIVE_LANE_MASK:
+			mod->active_lane_mask = val;
+			break;
+		case AR_TKN_U32_MODULE_FRAME_SYNC_RATE:
+			mod->frame_sync_rate = val;
+			break;
+		case AR_TKN_U16_MODULE_BIT_CLK_TYPE:
+			if (val > U16_MAX)
+				return -EINVAL;
+			mod->bit_clk_type = (u16)val;
+			break;
+		case AR_TKN_U8_MODULE_INV_INT_BIT_CLK:
+			if (val > U8_MAX)
+				return -EINVAL;
+			mod->inv_int_bit_clk = (u8)val;
+			break;
+		case AR_TKN_U8_MODULE_INV_EXT_BIT_CLK:
+			if (val > U8_MAX)
+				return -EINVAL;
+			mod->inv_ext_bit_clk = (u8)val;
+			break;
+		default:
+			break;
+		}
+		tkn_count++;
+		mod_elem++;
+	}
+
+	return 0;
+}
+
 static int audioreach_widget_dp_module_load(struct audioreach_module *mod,
 					    const struct snd_soc_tplg_vendor_array *mod_array)
 {
@@ -806,6 +905,12 @@ static int audioreach_widget_load_buffer(struct snd_soc_component *component,
 	case MODULE_ID_I2S_SOURCE:
 		audioreach_widget_i2s_module_load(mod, mod_array);
 		break;
+	case MODULE_ID_AUDIO_IF_SINK:
+	case MODULE_ID_AUDIO_IF_SOURCE:
+		ret = audioreach_widget_audio_if_module_load(mod, mod_array);
+		if (ret)
+			return ret;
+		break;
 	case MODULE_ID_DISPLAY_PORT_SINK:
 		audioreach_widget_dp_module_load(mod, mod_array);
 		break;
-- 
2.34.1

Re: [PATCH v4 1/7] ASoC: qcom: qdsp6: add topology-driven Audio IF support

[Srinivas Kandagatla]

On 7/12/26 2:41 PM, Prasad Kumpatla wrote:
> Add topology parsing and media-format programming for Audio IF source and
> sink modules.
> 
> Add the Audio IF module IDs, the required topology tokens, and a dedicated
> topology loader that stores the parsed interface configuration in the
> AudioReach module state. Also add the Audio IF media-format path that
> sends the interface configuration, hardware endpoint media format, and
> frame-duration parameters for Audio IF modules.
> 
> This keeps the serial-interface configuration topology-driven while still
> allowing the machine driver to provide runtime slot and media format
> settings. The same Audio IF path can then be reused for TDM, PCM, and I2S
> style backends.
> 
> The new UAPI tokens (AR_TKN_U16_MODULE_SYNC_SRC=262 through
> AR_TKN_U8_MODULE_INV_EXT_BIT_CLK=276) are added, together with the value
> defines used by the sync source, sync mode, data delay, interface mode,
> bit clock type, and polarity tokens.
> 
> MODULE_ID_AUDIO_IF_SINK (0x0700117C) and MODULE_ID_AUDIO_IF_SOURCE
> (0x0700117D) are introduced in this patch.
> 
> This Module is validated on Hawi and Shikra platforms.
> 
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
> ---
>  include/uapi/sound/snd_ar_tokens.h |  89 ++++++++++++++++++++++++
>  sound/soc/qcom/qdsp6/audioreach.c  |  97 ++++++++++++++++++++++++++
>  sound/soc/qcom/qdsp6/audioreach.h  |  81 ++++++++++++++++++++++
>  sound/soc/qcom/qdsp6/topology.c    | 105 +++++++++++++++++++++++++++++
>  4 files changed, 372 insertions(+)
> 
> diff --git a/include/uapi/sound/snd_ar_tokens.h b/include/uapi/sound/snd_ar_tokens.h
> index 6b8102eaa..bda65311c 100644
> --- a/include/uapi/sound/snd_ar_tokens.h
> +++ b/include/uapi/sound/snd_ar_tokens.h
> @@ -168,6 +168,58 @@ enum ar_event_types {
>   *						LOG_WAIT = 0,
>   *						LOG_IMMEDIATELY = 1
>   *
> + * %AR_TKN_U16_MODULE_SYNC_SRC:			Frame sync source
> + *						AR_AUDIO_IF_SYNC_SRC_EXTERNAL = 0,
> + *						AR_AUDIO_IF_SYNC_SRC_INTERNAL = 1
> + *
> + * %AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE:	Enable data-out tri-state control
> + *						AR_AUDIO_IF_CTRL_DATA_OE_DISABLE = 0,
> + *						AR_AUDIO_IF_CTRL_DATA_OE_ENABLE = 1
> + *
> + * %AR_TKN_U32_MODULE_SLOT_MASK:			Active TDM slot bitmask
> + *
> + * %AR_TKN_U16_MODULE_NSLOTS_PER_FRAME:		Number of slots per TDM frame
> + *
> + * %AR_TKN_U16_MODULE_SLOT_WIDTH:		Slot width in bits (16 or 32)
> + *
> + * %AR_TKN_U16_MODULE_SYNC_MODE:			Frame sync mode
> + *						AR_AUDIO_IF_FRAME_SYNC_MODE_SHORT = 0,
> + *						AR_AUDIO_IF_FRAME_SYNC_MODE_ONE_SLOT = 1,
> + *						AR_AUDIO_IF_FRAME_SYNC_MODE_LONG = 2
> + *
> + * %AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE:	Invert frame sync pulse polarity
> + *						AR_AUDIO_IF_SYNC_NORMAL = 0,
> + *						AR_AUDIO_IF_SYNC_INVERTED = 1
> + *
> + * %AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY:	Data delay relative to frame sync
> + *						AR_AUDIO_IF_DATA_DELAY_NONE = 0,
> + *						AR_AUDIO_IF_DATA_DELAY_1_CYCLE = 1,
> + *						AR_AUDIO_IF_DATA_DELAY_2_CYCLE = 2
> + *
> + * %AR_TKN_U16_MODULE_INTF_MODE:			Audio IF interface mode
> + *						AR_AUDIO_IF_INTF_MODE_TDM = 0,
> + *						AR_AUDIO_IF_INTF_MODE_PCM = 1,
> + *						AR_AUDIO_IF_INTF_MODE_I2S = 2
> + *
> + * %AR_TKN_U16_MODULE_QAIF_TYPE:			QAIF hardware port type index
> + *
> + * %AR_TKN_U32_MODULE_ACTIVE_LANE_MASK:		Active lane bitmask for multi-lane
> + *
> + * %AR_TKN_U32_MODULE_FRAME_SYNC_RATE:		Frame sync rate in Hz
> + *
> + * %AR_TKN_U16_MODULE_BIT_CLK_TYPE:		Bit clock type
> + *						AR_AUDIO_IF_BIT_CLK_INTERNAL = 0,
> + *						AR_AUDIO_IF_BIT_CLK_EXTERNAL = 1,
> + *						AR_AUDIO_IF_BIT_CLK_SKIP = 2
> + *
> + * %AR_TKN_U8_MODULE_INV_INT_BIT_CLK:		Invert internal bit clock
> + *						AR_AUDIO_IF_CLK_NORMAL = 0,
> + *						AR_AUDIO_IF_CLK_INVERTED = 1
> + *
> + * %AR_TKN_U8_MODULE_INV_EXT_BIT_CLK:		Invert external bit clock
> + *						AR_AUDIO_IF_CLK_NORMAL = 0,
> + *						AR_AUDIO_IF_CLK_INVERTED = 1
> + *
>   * %AR_TKN_DAI_INDEX:				dai index
>   *
>   */
> @@ -240,6 +292,43 @@ enum ar_event_types {
>  #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID	260
>  #define AR_TKN_U32_MODULE_LOG_MODE		261
>  
> +#define AR_TKN_U16_MODULE_SYNC_SRC		262
> +#define AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE	263
> +#define AR_TKN_U32_MODULE_SLOT_MASK		264
> +#define AR_TKN_U16_MODULE_NSLOTS_PER_FRAME	265
> +#define AR_TKN_U16_MODULE_SLOT_WIDTH		266
> +#define AR_TKN_U16_MODULE_SYNC_MODE		267
> +#define AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE	268
> +#define AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY	269
> +#define AR_TKN_U16_MODULE_INTF_MODE		270
> +#define AR_TKN_U16_MODULE_QAIF_TYPE		271
> +#define AR_TKN_U32_MODULE_ACTIVE_LANE_MASK	272
> +#define AR_TKN_U32_MODULE_FRAME_SYNC_RATE	273
> +#define AR_TKN_U16_MODULE_BIT_CLK_TYPE		274
> +#define AR_TKN_U8_MODULE_INV_INT_BIT_CLK	275
> +#define AR_TKN_U8_MODULE_INV_EXT_BIT_CLK	276
> +
> +#define AR_AUDIO_IF_SYNC_SRC_EXTERNAL		0
> +#define AR_AUDIO_IF_SYNC_SRC_INTERNAL		1
> +#define AR_AUDIO_IF_CTRL_DATA_OE_DISABLE	0
> +#define AR_AUDIO_IF_CTRL_DATA_OE_ENABLE		1
> +#define AR_AUDIO_IF_INTF_MODE_TDM		0
> +#define AR_AUDIO_IF_INTF_MODE_PCM		1
> +#define AR_AUDIO_IF_INTF_MODE_I2S		2
> +#define AR_AUDIO_IF_FRAME_SYNC_MODE_SHORT	0
> +#define AR_AUDIO_IF_FRAME_SYNC_MODE_ONE_SLOT	1
> +#define AR_AUDIO_IF_FRAME_SYNC_MODE_LONG	2
> +#define AR_AUDIO_IF_SYNC_NORMAL			0
> +#define AR_AUDIO_IF_SYNC_INVERTED		1
> +#define AR_AUDIO_IF_DATA_DELAY_NONE		0
> +#define AR_AUDIO_IF_DATA_DELAY_1_CYCLE		1
> +#define AR_AUDIO_IF_DATA_DELAY_2_CYCLE		2
> +#define AR_AUDIO_IF_BIT_CLK_INTERNAL		0
> +#define AR_AUDIO_IF_BIT_CLK_EXTERNAL		1
> +#define AR_AUDIO_IF_BIT_CLK_SKIP		2
> +#define AR_AUDIO_IF_CLK_NORMAL			0
> +#define AR_AUDIO_IF_CLK_INVERTED		1
> +
>  #define SND_SOC_AR_TPLG_MODULE_CFG_TYPE 0x01001006
>  struct audioreach_module_priv_data {
>  	__le32 size;	/* size in bytes of the array, including all elements */
> diff --git a/sound/soc/qcom/qdsp6/audioreach.c b/sound/soc/qcom/qdsp6/audioreach.c
> index e6e9eb2e8..62140ce8e 100644
> --- a/sound/soc/qcom/qdsp6/audioreach.c
> +++ b/sound/soc/qcom/qdsp6/audioreach.c
> @@ -152,6 +152,13 @@ struct apm_i2s_module_intf_cfg {
>  
>  #define APM_I2S_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_i2s_module_intf_cfg), 8)
>  
> +struct apm_audio_if_module_intf_cfg {
> +	struct apm_module_param_data param_data;
> +	struct param_id_audio_if_intf_cfg cfg;
> +} __packed;
> +
> +#define APM_AUDIO_IF_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_audio_if_module_intf_cfg), 8)
> +
>  struct apm_module_hw_ep_mf_cfg {
>  	struct apm_module_param_data param_data;
>  	struct param_id_hw_ep_mf mf;
> @@ -168,6 +175,13 @@ struct apm_module_frame_size_factor_cfg {
>  
>  #define APM_FS_CFG_PSIZE ALIGN(sizeof(struct apm_module_frame_size_factor_cfg), 8)
>  
> +struct apm_module_hw_ep_frame_duration_cfg {
> +	struct apm_module_param_data param_data;
> +	struct param_id_hw_ep_frame_duration frame_duration;
> +} __packed;
> +
> +#define APM_HW_EP_FRAME_DURATION_PSIZE ALIGN(sizeof(struct apm_module_hw_ep_frame_duration_cfg), 8)
> +
>  struct apm_module_hw_ep_power_mode_cfg {
>  	struct apm_module_param_data param_data;
>  	struct param_id_hw_ep_power_mode_cfg power_mode;
> @@ -1042,6 +1056,85 @@ static int audioreach_i2s_set_media_format(struct q6apm_graph *graph,
>  	return q6apm_send_cmd_sync(graph->apm, pkt, 0);
>  }
>  
> +static int audioreach_audio_if_set_media_format(struct q6apm_graph *graph,
> +						const struct audioreach_module *module,
> +						const struct audioreach_module_config *cfg)
> +{
> +	struct apm_module_hw_ep_frame_duration_cfg *fd_cfg;
> +	struct apm_module_param_data *param_data;
> +	struct apm_audio_if_module_intf_cfg *intf_cfg;
> +	struct apm_module_hw_ep_mf_cfg *hw_cfg;
> +	int ic_sz = APM_AUDIO_IF_INTF_CFG_PSIZE;
> +	int ep_sz = APM_HW_EP_CFG_PSIZE;
> +	int fd_sz = APM_HW_EP_FRAME_DURATION_PSIZE;
> +	int size = ic_sz + ep_sz + fd_sz;
> +	/*
> +	 * A zero machine override means use the topology default; zero is not
> +	 * a valid override for these TDM slot fields.
> +	 */
What is this comment about, it does not make any sense w.r.t to where
its placed, either remove it or put it correct place.

> +	u32 slot_mask = cfg->slot_mask ? cfg->slot_mask : module->slot_mask;
> +	u16 nslots_per_frame = cfg->nslots_per_frame ?
> +				 (u16)cfg->nslots_per_frame : module->nslots_per_frame;
> +	u16 slot_width = cfg->slot_width ? (u16)cfg->slot_width : module->slot_width;
> +	void *p;
> +
> +	struct gpr_pkt *pkt __free(kfree) = audioreach_alloc_apm_cmd_pkt(size, APM_CMD_SET_CFG, 0);
> +	if (IS_ERR(pkt))
> +		return PTR_ERR(pkt);
> +
> +	p = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
> +	intf_cfg = p;
> +
> +	param_data = &intf_cfg->param_data;
> +	param_data->module_instance_id = module->instance_id;
> +	param_data->error_code = 0;
> +	param_data->param_id = PARAM_ID_AUDIO_IF_INTF_CFG;
> +	param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
> +	intf_cfg->cfg.qaif_type = module->qaif_type;
> +	intf_cfg->cfg.intf_idx = (u16)module->hw_interface_idx;
> +	intf_cfg->cfg.intf_mode = module->intf_mode;
> +	intf_cfg->cfg.ctrl_data_out_enable = module->ctrl_data_out_enable;
> +	intf_cfg->cfg.active_slot_mask = slot_mask;
> +	intf_cfg->cfg.nslots_per_frame = nslots_per_frame;
> +	intf_cfg->cfg.slot_width = slot_width;
> +	intf_cfg->cfg.active_lane_mask = module->active_lane_mask;
> +	intf_cfg->cfg.frame_sync_rate = module->frame_sync_rate;
> +	intf_cfg->cfg.frame_sync_src = module->sync_src;
> +	intf_cfg->cfg.frame_sync_mode = module->sync_mode;
> +	intf_cfg->cfg.invert_frame_sync_pulse = module->ctrl_invert_sync_pulse;
> +	intf_cfg->cfg.frame_sync_data_delay = module->ctrl_sync_data_delay;
> +	intf_cfg->cfg.bit_clk_type = module->bit_clk_type;
> +	intf_cfg->cfg.inv_int_bit_clk = module->inv_int_bit_clk;
> +	intf_cfg->cfg.inv_ext_bit_clk = module->inv_ext_bit_clk;
> +
> +	p += ic_sz;
> +	hw_cfg = p;
> +	param_data = &hw_cfg->param_data;
> +	param_data->module_instance_id = module->instance_id;
> +	param_data->error_code = 0;
> +	param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
> +	param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
> +
> +	hw_cfg->mf.sample_rate = cfg->sample_rate;
> +	hw_cfg->mf.bit_width = cfg->bit_width;
> +	hw_cfg->mf.num_channels = cfg->num_channels;
> +	hw_cfg->mf.data_format = module->data_format;
> +
> +	p += ep_sz;
> +	fd_cfg = p;
> +	param_data = &fd_cfg->param_data;
> +	param_data->module_instance_id = module->instance_id;
> +	param_data->error_code = 0;
> +	param_data->param_id = PARAM_ID_HW_EP_FRAME_DURATION;
> +	param_data->param_size = fd_sz - APM_MODULE_PARAM_DATA_SIZE;
> +	fd_cfg->frame_duration.frame_duration_in_us = AUDIO_IF_FRAME_DURATION_US;
> +	fd_cfg->frame_duration.allow_frame_duration_normalization = 1;
> +	fd_cfg->frame_duration.min_normalized_frame_dur_us = 1;
> +	fd_cfg->frame_duration.max_normalized_frame_dur_us = 100000;

Can we define these magic values somewhere as default values.

> +
> +	return q6apm_send_cmd_sync(graph->apm, pkt, 0);
> +}
> +
>  static int audioreach_logging_set_media_format(struct q6apm_graph *graph,
>  					       const struct audioreach_module *module)
>  {
> @@ -1411,6 +1504,10 @@ int audioreach_set_media_format(struct q6apm_graph *graph,
>  		if (!rc)
>  			rc = audioreach_module_enable(graph, module, true);
>  		break;
> +	case MODULE_ID_AUDIO_IF_SOURCE:
> +	case MODULE_ID_AUDIO_IF_SINK:
> +		rc = audioreach_audio_if_set_media_format(graph, module, cfg);
> +		break;
>  
>  	default:
>  		rc = 0;
> diff --git a/sound/soc/qcom/qdsp6/audioreach.h b/sound/soc/qcom/qdsp6/audioreach.h
> index 62a2fd79b..d57ba4e6a 100644
> --- a/sound/soc/qcom/qdsp6/audioreach.h
> +++ b/sound/soc/qcom/qdsp6/audioreach.h
> @@ -36,6 +36,8 @@ struct q6apm_graph;
>  #define MODULE_ID_SPEAKER_PROTECTION	0x070010E2
>  #define MODULE_ID_SPEAKER_PROTECTION_VI	0x070010E3
>  #define MODULE_ID_OPUS_DEC		0x07001174
> +#define MODULE_ID_AUDIO_IF_SINK		0x0700117C
> +#define MODULE_ID_AUDIO_IF_SOURCE	0x0700117D
>  
>  #define APM_CMD_GET_SPF_STATE		0x01001021
>  #define APM_CMD_RSP_GET_SPF_STATE	0x02001007
> @@ -544,6 +546,65 @@ struct param_id_i2s_intf_cfg {
>  #define PORT_ID_I2S_OUPUT		1
>  #define I2S_STACK_SIZE			2048
>  
> +#define PARAM_ID_AUDIO_IF_INTF_CFG	0x08001B11
> +
> +#define AUDIO_IF_INTF_MODE_TDM		AR_AUDIO_IF_INTF_MODE_TDM
> +#define AUDIO_IF_INTF_MODE_PCM		AR_AUDIO_IF_INTF_MODE_PCM
> +#define AUDIO_IF_INTF_MODE_I2S		AR_AUDIO_IF_INTF_MODE_I2S
> +
> +/*
> + * struct param_id_audio_if_intf_cfg - Audio interface configuration
> + * @qaif_type: Audio interface type (e.g. QAIF, QAIF_VA)
> + * @intf_idx: Interface instance index
> + * @intf_mode: Interface operating mode (TDM/PCM/I2S)
> + * @ctrl_data_out_enable: Enable sharing of data-out signal with other masters
> + * @active_slot_mask: Bitmask indicating active slots
> + * @nslots_per_frame: Number of slots per audio frame
> + * @slot_width: Width of each slot in bits
> + * @active_lane_mask: Bitmask of active data lanes
> + * @frame_sync_rate: Frame sync rate in Hz
> + * @frame_sync_src: Frame sync source selection
> + * @frame_sync_mode: Frame sync mode configuration
> + * @invert_frame_sync_pulse: Invert frame sync polarity when set
> + * @frame_sync_data_delay: Data delay from frame sync in bit clocks
> + * @bit_clk_type: Bit clock type (internal / external)
> + * @inv_int_bit_clk: Invert internal bit clock when set
> + * @inv_ext_bit_clk: Invert external bit clock when set
> + *
> + * This structure defines configuration parameters for the Qualcomm
> + * Audio Interface (QAIF) block. It is used to program interface
> + * characteristics such as slot configuration, clocking and frame
> + * synchronization behaviour.
> + */
> +struct param_id_audio_if_intf_cfg {
> +	u16 qaif_type;
> +	u16 intf_idx;
> +	u16 intf_mode;
> +	u16 ctrl_data_out_enable;
> +	u32 active_slot_mask;
this header uses uint32_t types, please stick to such style for consistency.
> +	u16 nslots_per_frame;
> +	u16 slot_width;
> +	u32 active_lane_mask;
> +	u32 frame_sync_rate;
> +	u16 frame_sync_src;
> +	u16 frame_sync_mode;
> +	u16 invert_frame_sync_pulse;
> +	u16 frame_sync_data_delay;
> +	u16 bit_clk_type;
> +	u8 inv_int_bit_clk;
> +	u8 inv_ext_bit_clk;
> +} __packed;
> +
> +#define PARAM_ID_HW_EP_FRAME_DURATION	0x08001B2F
> +#define AUDIO_IF_FRAME_DURATION_US		1000
> +
> +struct param_id_hw_ep_frame_duration {
> +	u32 frame_duration_in_us;
> +	u32 allow_frame_duration_normalization;
> +	u32 min_normalized_frame_dur_us;
> +	u32 max_normalized_frame_dur_us;
> +} __packed;
> +
>  #define PARAM_ID_DISPLAY_PORT_INTF_CFG		0x08001154
>  
>  struct param_id_display_port_intf_cfg {
> @@ -877,6 +938,23 @@ struct audioreach_module {
>  	uint32_t data_format;
>  	uint32_t hw_interface_type;
>  
> +	/* Audio IF module (TDM/PCM/I2S) */
> +	u32 slot_mask;
> +	u32 active_lane_mask;
> +	u32 frame_sync_rate;
> +	u16 qaif_type;
> +	u16 sync_src;
> +	u16 ctrl_data_out_enable;
> +	u16 nslots_per_frame;
> +	u16 slot_width;
> +	u16 intf_mode;
> +	u16 sync_mode;
> +	u16 ctrl_invert_sync_pulse;
> +	u16 ctrl_sync_data_delay;
> +	u16 bit_clk_type;
> +	u8 inv_int_bit_clk;
> +	u8 inv_ext_bit_clk;
> +
>  	/* PCM module specific */
>  	uint32_t interleave_type;
>  
> @@ -907,6 +985,9 @@ struct audioreach_module_config {
>  	u32	channel_allocation;
>  	u32	sd_line_mask;
>  	int	fmt;
> +	u32	slot_mask;
> +	u16	nslots_per_frame;
> +	u16	slot_width;
>  	struct snd_codec codec;
>  	u8 channel_map[AR_PCM_MAX_NUM_CHANNEL];
>  };
> diff --git a/sound/soc/qcom/qdsp6/topology.c b/sound/soc/qcom/qdsp6/topology.c
> index 1f69fba6d..3dd0a5c29 100644
> --- a/sound/soc/qcom/qdsp6/topology.c
> +++ b/sound/soc/qcom/qdsp6/topology.c
> @@ -753,6 +753,105 @@ static int audioreach_widget_i2s_module_load(struct audioreach_module *mod,
>  	return 0;
>  }
>  
> +static int audioreach_widget_audio_if_module_load(struct audioreach_module *mod,
> +						  const struct snd_soc_tplg_vendor_array *mod_array)
> +{
> +	const struct snd_soc_tplg_vendor_value_elem *mod_elem;
> +	int tkn_count = 0;
> +	u32 val;
> +
> +	mod_elem = mod_array->value;
> +
> +	while (tkn_count < le32_to_cpu(mod_array->num_elems)) {
> +		val = le32_to_cpu(mod_elem->value);
> +		switch (le32_to_cpu(mod_elem->token)) {
> +		case AR_TKN_U32_MODULE_HW_IF_IDX:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->hw_interface_idx = val;
> +			break;
> +		case AR_TKN_U32_MODULE_FMT_DATA:
> +			mod->data_format = val;
> +			break;
> +		case AR_TKN_U16_MODULE_SYNC_SRC:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->sync_src = (u16)val;
> +			break;
> +		case AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->ctrl_data_out_enable = (u16)val;
> +			break;
> +		case AR_TKN_U32_MODULE_SLOT_MASK:
> +			mod->slot_mask = val;
> +			break;
> +		case AR_TKN_U16_MODULE_NSLOTS_PER_FRAME:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->nslots_per_frame = (u16)val;
> +			break;
> +		case AR_TKN_U16_MODULE_SLOT_WIDTH:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->slot_width = (u16)val;
> +			break;
> +		case AR_TKN_U16_MODULE_INTF_MODE:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->intf_mode = (u16)val;
> +			break;
> +		case AR_TKN_U16_MODULE_SYNC_MODE:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->sync_mode = (u16)val;
> +			break;
> +		case AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->ctrl_invert_sync_pulse = (u16)val;
> +			break;
> +		case AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->ctrl_sync_data_delay = (u16)val;
> +			break;
> +		case AR_TKN_U16_MODULE_QAIF_TYPE:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->qaif_type = (u16)val;
> +			break;
> +		case AR_TKN_U32_MODULE_ACTIVE_LANE_MASK:
> +			mod->active_lane_mask = val;
> +			break;
> +		case AR_TKN_U32_MODULE_FRAME_SYNC_RATE:
> +			mod->frame_sync_rate = val;
> +			break;
> +		case AR_TKN_U16_MODULE_BIT_CLK_TYPE:
> +			if (val > U16_MAX)
> +				return -EINVAL;
> +			mod->bit_clk_type = (u16)val;
> +			break;
> +		case AR_TKN_U8_MODULE_INV_INT_BIT_CLK:
> +			if (val > U8_MAX)
> +				return -EINVAL;
> +			mod->inv_int_bit_clk = (u8)val;
> +			break;
> +		case AR_TKN_U8_MODULE_INV_EXT_BIT_CLK:
> +			if (val > U8_MAX)
> +				return -EINVAL;
> +			mod->inv_ext_bit_clk = (u8)val;
> +			break;
> +		default:
> +			break;
> +		}
> +		tkn_count++;
> +		mod_elem++;
> +	}
> +
> +	return 0;
> +}
> +
>  static int audioreach_widget_dp_module_load(struct audioreach_module *mod,
>  					    const struct snd_soc_tplg_vendor_array *mod_array)
>  {
> @@ -806,6 +905,12 @@ static int audioreach_widget_load_buffer(struct snd_soc_component *component,
>  	case MODULE_ID_I2S_SOURCE:
>  		audioreach_widget_i2s_module_load(mod, mod_array);
>  		break;
> +	case MODULE_ID_AUDIO_IF_SINK:
> +	case MODULE_ID_AUDIO_IF_SOURCE:
> +		ret = audioreach_widget_audio_if_module_load(mod, mod_array);
> +		if (ret)
> +			return ret;
> +		break;
>  	case MODULE_ID_DISPLAY_PORT_SINK:
>  		audioreach_widget_dp_module_load(mod, mod_array);
>  		break;

Re: [PATCH v4 1/7] ASoC: qcom: qdsp6: add topology-driven Audio IF support

[Prasad Kumpatla]

On 7/14/2026 1:54 PM, Srinivas Kandagatla wrote:
>
> On 7/12/26 2:41 PM, Prasad Kumpatla wrote:
>> Add topology parsing and media-format programming for Audio IF source and
>> sink modules.
>>
>> Add the Audio IF module IDs, the required topology tokens, and a dedicated
>> topology loader that stores the parsed interface configuration in the
>> AudioReach module state. Also add the Audio IF media-format path that
>> sends the interface configuration, hardware endpoint media format, and
>> frame-duration parameters for Audio IF modules.
>>
>> This keeps the serial-interface configuration topology-driven while still
>> allowing the machine driver to provide runtime slot and media format
>> settings. The same Audio IF path can then be reused for TDM, PCM, and I2S
>> style backends.
>>
>> The new UAPI tokens (AR_TKN_U16_MODULE_SYNC_SRC=262 through
>> AR_TKN_U8_MODULE_INV_EXT_BIT_CLK=276) are added, together with the value
>> defines used by the sync source, sync mode, data delay, interface mode,
>> bit clock type, and polarity tokens.
>>
>> MODULE_ID_AUDIO_IF_SINK (0x0700117C) and MODULE_ID_AUDIO_IF_SOURCE
>> (0x0700117D) are introduced in this patch.
>>
>> This Module is validated on Hawi and Shikra platforms.
>>
>> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
>> ---
>>   include/uapi/sound/snd_ar_tokens.h |  89 ++++++++++++++++++++++++
>>   sound/soc/qcom/qdsp6/audioreach.c  |  97 ++++++++++++++++++++++++++
>>   sound/soc/qcom/qdsp6/audioreach.h  |  81 ++++++++++++++++++++++
>>   sound/soc/qcom/qdsp6/topology.c    | 105 +++++++++++++++++++++++++++++
>>   4 files changed, 372 insertions(+)
>>
>> diff --git a/include/uapi/sound/snd_ar_tokens.h b/include/uapi/sound/snd_ar_tokens.h
>> index 6b8102eaa..bda65311c 100644
>> --- a/include/uapi/sound/snd_ar_tokens.h
>> +++ b/include/uapi/sound/snd_ar_tokens.h
>> @@ -168,6 +168,58 @@ enum ar_event_types {
>>    *						LOG_WAIT = 0,
>>    *						LOG_IMMEDIATELY = 1
>>    *
>> + * %AR_TKN_U16_MODULE_SYNC_SRC:			Frame sync source
>> + *						AR_AUDIO_IF_SYNC_SRC_EXTERNAL = 0,
>> + *						AR_AUDIO_IF_SYNC_SRC_INTERNAL = 1
>> + *
>> + * %AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE:	Enable data-out tri-state control
>> + *						AR_AUDIO_IF_CTRL_DATA_OE_DISABLE = 0,
>> + *						AR_AUDIO_IF_CTRL_DATA_OE_ENABLE = 1
>> + *
>> + * %AR_TKN_U32_MODULE_SLOT_MASK:			Active TDM slot bitmask
>> + *
>> + * %AR_TKN_U16_MODULE_NSLOTS_PER_FRAME:		Number of slots per TDM frame
>> + *
>> + * %AR_TKN_U16_MODULE_SLOT_WIDTH:		Slot width in bits (16 or 32)
>> + *
>> + * %AR_TKN_U16_MODULE_SYNC_MODE:			Frame sync mode
>> + *						AR_AUDIO_IF_FRAME_SYNC_MODE_SHORT = 0,
>> + *						AR_AUDIO_IF_FRAME_SYNC_MODE_ONE_SLOT = 1,
>> + *						AR_AUDIO_IF_FRAME_SYNC_MODE_LONG = 2
>> + *
>> + * %AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE:	Invert frame sync pulse polarity
>> + *						AR_AUDIO_IF_SYNC_NORMAL = 0,
>> + *						AR_AUDIO_IF_SYNC_INVERTED = 1
>> + *
>> + * %AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY:	Data delay relative to frame sync
>> + *						AR_AUDIO_IF_DATA_DELAY_NONE = 0,
>> + *						AR_AUDIO_IF_DATA_DELAY_1_CYCLE = 1,
>> + *						AR_AUDIO_IF_DATA_DELAY_2_CYCLE = 2
>> + *
>> + * %AR_TKN_U16_MODULE_INTF_MODE:			Audio IF interface mode
>> + *						AR_AUDIO_IF_INTF_MODE_TDM = 0,
>> + *						AR_AUDIO_IF_INTF_MODE_PCM = 1,
>> + *						AR_AUDIO_IF_INTF_MODE_I2S = 2
>> + *
>> + * %AR_TKN_U16_MODULE_QAIF_TYPE:			QAIF hardware port type index
>> + *
>> + * %AR_TKN_U32_MODULE_ACTIVE_LANE_MASK:		Active lane bitmask for multi-lane
>> + *
>> + * %AR_TKN_U32_MODULE_FRAME_SYNC_RATE:		Frame sync rate in Hz
>> + *
>> + * %AR_TKN_U16_MODULE_BIT_CLK_TYPE:		Bit clock type
>> + *						AR_AUDIO_IF_BIT_CLK_INTERNAL = 0,
>> + *						AR_AUDIO_IF_BIT_CLK_EXTERNAL = 1,
>> + *						AR_AUDIO_IF_BIT_CLK_SKIP = 2
>> + *
>> + * %AR_TKN_U8_MODULE_INV_INT_BIT_CLK:		Invert internal bit clock
>> + *						AR_AUDIO_IF_CLK_NORMAL = 0,
>> + *						AR_AUDIO_IF_CLK_INVERTED = 1
>> + *
>> + * %AR_TKN_U8_MODULE_INV_EXT_BIT_CLK:		Invert external bit clock
>> + *						AR_AUDIO_IF_CLK_NORMAL = 0,
>> + *						AR_AUDIO_IF_CLK_INVERTED = 1
>> + *
>>    * %AR_TKN_DAI_INDEX:				dai index
>>    *
>>    */
>> @@ -240,6 +292,43 @@ enum ar_event_types {
>>   #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID	260
>>   #define AR_TKN_U32_MODULE_LOG_MODE		261
>>   
>> +#define AR_TKN_U16_MODULE_SYNC_SRC		262
>> +#define AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE	263
>> +#define AR_TKN_U32_MODULE_SLOT_MASK		264
>> +#define AR_TKN_U16_MODULE_NSLOTS_PER_FRAME	265
>> +#define AR_TKN_U16_MODULE_SLOT_WIDTH		266
>> +#define AR_TKN_U16_MODULE_SYNC_MODE		267
>> +#define AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE	268
>> +#define AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY	269
>> +#define AR_TKN_U16_MODULE_INTF_MODE		270
>> +#define AR_TKN_U16_MODULE_QAIF_TYPE		271
>> +#define AR_TKN_U32_MODULE_ACTIVE_LANE_MASK	272
>> +#define AR_TKN_U32_MODULE_FRAME_SYNC_RATE	273
>> +#define AR_TKN_U16_MODULE_BIT_CLK_TYPE		274
>> +#define AR_TKN_U8_MODULE_INV_INT_BIT_CLK	275
>> +#define AR_TKN_U8_MODULE_INV_EXT_BIT_CLK	276
>> +
>> +#define AR_AUDIO_IF_SYNC_SRC_EXTERNAL		0
>> +#define AR_AUDIO_IF_SYNC_SRC_INTERNAL		1
>> +#define AR_AUDIO_IF_CTRL_DATA_OE_DISABLE	0
>> +#define AR_AUDIO_IF_CTRL_DATA_OE_ENABLE		1
>> +#define AR_AUDIO_IF_INTF_MODE_TDM		0
>> +#define AR_AUDIO_IF_INTF_MODE_PCM		1
>> +#define AR_AUDIO_IF_INTF_MODE_I2S		2
>> +#define AR_AUDIO_IF_FRAME_SYNC_MODE_SHORT	0
>> +#define AR_AUDIO_IF_FRAME_SYNC_MODE_ONE_SLOT	1
>> +#define AR_AUDIO_IF_FRAME_SYNC_MODE_LONG	2
>> +#define AR_AUDIO_IF_SYNC_NORMAL			0
>> +#define AR_AUDIO_IF_SYNC_INVERTED		1
>> +#define AR_AUDIO_IF_DATA_DELAY_NONE		0
>> +#define AR_AUDIO_IF_DATA_DELAY_1_CYCLE		1
>> +#define AR_AUDIO_IF_DATA_DELAY_2_CYCLE		2
>> +#define AR_AUDIO_IF_BIT_CLK_INTERNAL		0
>> +#define AR_AUDIO_IF_BIT_CLK_EXTERNAL		1
>> +#define AR_AUDIO_IF_BIT_CLK_SKIP		2
>> +#define AR_AUDIO_IF_CLK_NORMAL			0
>> +#define AR_AUDIO_IF_CLK_INVERTED		1
>> +
>>   #define SND_SOC_AR_TPLG_MODULE_CFG_TYPE 0x01001006
>>   struct audioreach_module_priv_data {
>>   	__le32 size;	/* size in bytes of the array, including all elements */
>> diff --git a/sound/soc/qcom/qdsp6/audioreach.c b/sound/soc/qcom/qdsp6/audioreach.c
>> index e6e9eb2e8..62140ce8e 100644
>> --- a/sound/soc/qcom/qdsp6/audioreach.c
>> +++ b/sound/soc/qcom/qdsp6/audioreach.c
>> @@ -152,6 +152,13 @@ struct apm_i2s_module_intf_cfg {
>>   
>>   #define APM_I2S_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_i2s_module_intf_cfg), 8)
>>   
>> +struct apm_audio_if_module_intf_cfg {
>> +	struct apm_module_param_data param_data;
>> +	struct param_id_audio_if_intf_cfg cfg;
>> +} __packed;
>> +
>> +#define APM_AUDIO_IF_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_audio_if_module_intf_cfg), 8)
>> +
>>   struct apm_module_hw_ep_mf_cfg {
>>   	struct apm_module_param_data param_data;
>>   	struct param_id_hw_ep_mf mf;
>> @@ -168,6 +175,13 @@ struct apm_module_frame_size_factor_cfg {
>>   
>>   #define APM_FS_CFG_PSIZE ALIGN(sizeof(struct apm_module_frame_size_factor_cfg), 8)
>>   
>> +struct apm_module_hw_ep_frame_duration_cfg {
>> +	struct apm_module_param_data param_data;
>> +	struct param_id_hw_ep_frame_duration frame_duration;
>> +} __packed;
>> +
>> +#define APM_HW_EP_FRAME_DURATION_PSIZE ALIGN(sizeof(struct apm_module_hw_ep_frame_duration_cfg), 8)
>> +
>>   struct apm_module_hw_ep_power_mode_cfg {
>>   	struct apm_module_param_data param_data;
>>   	struct param_id_hw_ep_power_mode_cfg power_mode;
>> @@ -1042,6 +1056,85 @@ static int audioreach_i2s_set_media_format(struct q6apm_graph *graph,
>>   	return q6apm_send_cmd_sync(graph->apm, pkt, 0);
>>   }
>>   
>> +static int audioreach_audio_if_set_media_format(struct q6apm_graph *graph,
>> +						const struct audioreach_module *module,
>> +						const struct audioreach_module_config *cfg)
>> +{
>> +	struct apm_module_hw_ep_frame_duration_cfg *fd_cfg;
>> +	struct apm_module_param_data *param_data;
>> +	struct apm_audio_if_module_intf_cfg *intf_cfg;
>> +	struct apm_module_hw_ep_mf_cfg *hw_cfg;
>> +	int ic_sz = APM_AUDIO_IF_INTF_CFG_PSIZE;
>> +	int ep_sz = APM_HW_EP_CFG_PSIZE;
>> +	int fd_sz = APM_HW_EP_FRAME_DURATION_PSIZE;
>> +	int size = ic_sz + ep_sz + fd_sz;
>> +	/*
>> +	 * A zero machine override means use the topology default; zero is not
>> +	 * a valid override for these TDM slot fields.
>> +	 */
> What is this comment about, it does not make any sense w.r.t to where
> its placed, either remove it or put it correct place.
Ack, Will remove in next patch.
>
>> +	u32 slot_mask = cfg->slot_mask ? cfg->slot_mask : module->slot_mask;
>> +	u16 nslots_per_frame = cfg->nslots_per_frame ?
>> +				 (u16)cfg->nslots_per_frame : module->nslots_per_frame;
>> +	u16 slot_width = cfg->slot_width ? (u16)cfg->slot_width : module->slot_width;
>> +	void *p;
>> +
>> +	struct gpr_pkt *pkt __free(kfree) = audioreach_alloc_apm_cmd_pkt(size, APM_CMD_SET_CFG, 0);
>> +	if (IS_ERR(pkt))
>> +		return PTR_ERR(pkt);
>> +
>> +	p = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
>> +	intf_cfg = p;
>> +
>> +	param_data = &intf_cfg->param_data;
>> +	param_data->module_instance_id = module->instance_id;
>> +	param_data->error_code = 0;
>> +	param_data->param_id = PARAM_ID_AUDIO_IF_INTF_CFG;
>> +	param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
>> +	intf_cfg->cfg.qaif_type = module->qaif_type;
>> +	intf_cfg->cfg.intf_idx = (u16)module->hw_interface_idx;
>> +	intf_cfg->cfg.intf_mode = module->intf_mode;
>> +	intf_cfg->cfg.ctrl_data_out_enable = module->ctrl_data_out_enable;
>> +	intf_cfg->cfg.active_slot_mask = slot_mask;
>> +	intf_cfg->cfg.nslots_per_frame = nslots_per_frame;
>> +	intf_cfg->cfg.slot_width = slot_width;
>> +	intf_cfg->cfg.active_lane_mask = module->active_lane_mask;
>> +	intf_cfg->cfg.frame_sync_rate = module->frame_sync_rate;
>> +	intf_cfg->cfg.frame_sync_src = module->sync_src;
>> +	intf_cfg->cfg.frame_sync_mode = module->sync_mode;
>> +	intf_cfg->cfg.invert_frame_sync_pulse = module->ctrl_invert_sync_pulse;
>> +	intf_cfg->cfg.frame_sync_data_delay = module->ctrl_sync_data_delay;
>> +	intf_cfg->cfg.bit_clk_type = module->bit_clk_type;
>> +	intf_cfg->cfg.inv_int_bit_clk = module->inv_int_bit_clk;
>> +	intf_cfg->cfg.inv_ext_bit_clk = module->inv_ext_bit_clk;
>> +
>> +	p += ic_sz;
>> +	hw_cfg = p;
>> +	param_data = &hw_cfg->param_data;
>> +	param_data->module_instance_id = module->instance_id;
>> +	param_data->error_code = 0;
>> +	param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
>> +	param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
>> +
>> +	hw_cfg->mf.sample_rate = cfg->sample_rate;
>> +	hw_cfg->mf.bit_width = cfg->bit_width;
>> +	hw_cfg->mf.num_channels = cfg->num_channels;
>> +	hw_cfg->mf.data_format = module->data_format;
>> +
>> +	p += ep_sz;
>> +	fd_cfg = p;
>> +	param_data = &fd_cfg->param_data;
>> +	param_data->module_instance_id = module->instance_id;
>> +	param_data->error_code = 0;
>> +	param_data->param_id = PARAM_ID_HW_EP_FRAME_DURATION;
>> +	param_data->param_size = fd_sz - APM_MODULE_PARAM_DATA_SIZE;
>> +	fd_cfg->frame_duration.frame_duration_in_us = AUDIO_IF_FRAME_DURATION_US;
>> +	fd_cfg->frame_duration.allow_frame_duration_normalization = 1;
>> +	fd_cfg->frame_duration.min_normalized_frame_dur_us = 1;
>> +	fd_cfg->frame_duration.max_normalized_frame_dur_us = 100000;
> Can we define these magic values somewhere as default values.
Sure, Will do it.
>
>> +
>> +	return q6apm_send_cmd_sync(graph->apm, pkt, 0);
>> +}
>> +
>>   static int audioreach_logging_set_media_format(struct q6apm_graph *graph,
>>   					       const struct audioreach_module *module)
>>   {
>> @@ -1411,6 +1504,10 @@ int audioreach_set_media_format(struct q6apm_graph *graph,
>>   		if (!rc)
>>   			rc = audioreach_module_enable(graph, module, true);
>>   		break;
>> +	case MODULE_ID_AUDIO_IF_SOURCE:
>> +	case MODULE_ID_AUDIO_IF_SINK:
>> +		rc = audioreach_audio_if_set_media_format(graph, module, cfg);
>> +		break;
>>   
>>   	default:
>>   		rc = 0;
>> diff --git a/sound/soc/qcom/qdsp6/audioreach.h b/sound/soc/qcom/qdsp6/audioreach.h
>> index 62a2fd79b..d57ba4e6a 100644
>> --- a/sound/soc/qcom/qdsp6/audioreach.h
>> +++ b/sound/soc/qcom/qdsp6/audioreach.h
>> @@ -36,6 +36,8 @@ struct q6apm_graph;
>>   #define MODULE_ID_SPEAKER_PROTECTION	0x070010E2
>>   #define MODULE_ID_SPEAKER_PROTECTION_VI	0x070010E3
>>   #define MODULE_ID_OPUS_DEC		0x07001174
>> +#define MODULE_ID_AUDIO_IF_SINK		0x0700117C
>> +#define MODULE_ID_AUDIO_IF_SOURCE	0x0700117D
>>   
>>   #define APM_CMD_GET_SPF_STATE		0x01001021
>>   #define APM_CMD_RSP_GET_SPF_STATE	0x02001007
>> @@ -544,6 +546,65 @@ struct param_id_i2s_intf_cfg {
>>   #define PORT_ID_I2S_OUPUT		1
>>   #define I2S_STACK_SIZE			2048
>>   
>> +#define PARAM_ID_AUDIO_IF_INTF_CFG	0x08001B11
>> +
>> +#define AUDIO_IF_INTF_MODE_TDM		AR_AUDIO_IF_INTF_MODE_TDM
>> +#define AUDIO_IF_INTF_MODE_PCM		AR_AUDIO_IF_INTF_MODE_PCM
>> +#define AUDIO_IF_INTF_MODE_I2S		AR_AUDIO_IF_INTF_MODE_I2S
>> +
>> +/*
>> + * struct param_id_audio_if_intf_cfg - Audio interface configuration
>> + * @qaif_type: Audio interface type (e.g. QAIF, QAIF_VA)
>> + * @intf_idx: Interface instance index
>> + * @intf_mode: Interface operating mode (TDM/PCM/I2S)
>> + * @ctrl_data_out_enable: Enable sharing of data-out signal with other masters
>> + * @active_slot_mask: Bitmask indicating active slots
>> + * @nslots_per_frame: Number of slots per audio frame
>> + * @slot_width: Width of each slot in bits
>> + * @active_lane_mask: Bitmask of active data lanes
>> + * @frame_sync_rate: Frame sync rate in Hz
>> + * @frame_sync_src: Frame sync source selection
>> + * @frame_sync_mode: Frame sync mode configuration
>> + * @invert_frame_sync_pulse: Invert frame sync polarity when set
>> + * @frame_sync_data_delay: Data delay from frame sync in bit clocks
>> + * @bit_clk_type: Bit clock type (internal / external)
>> + * @inv_int_bit_clk: Invert internal bit clock when set
>> + * @inv_ext_bit_clk: Invert external bit clock when set
>> + *
>> + * This structure defines configuration parameters for the Qualcomm
>> + * Audio Interface (QAIF) block. It is used to program interface
>> + * characteristics such as slot configuration, clocking and frame
>> + * synchronization behaviour.
>> + */
>> +struct param_id_audio_if_intf_cfg {
>> +	u16 qaif_type;
>> +	u16 intf_idx;
>> +	u16 intf_mode;
>> +	u16 ctrl_data_out_enable;
>> +	u32 active_slot_mask;
> this header uses uint32_t types, please stick to such style for consistency.

Ack, will update in next patch.

Thanks,
Prasad

>> +	u16 nslots_per_frame;
>> +	u16 slot_width;
>> +	u32 active_lane_mask;
>> +	u32 frame_sync_rate;
>> +	u16 frame_sync_src;
>> +	u16 frame_sync_mode;
>> +	u16 invert_frame_sync_pulse;
>> +	u16 frame_sync_data_delay;
>> +	u16 bit_clk_type;
>> +	u8 inv_int_bit_clk;
>> +	u8 inv_ext_bit_clk;
>> +} __packed;
>> +
>> +#define PARAM_ID_HW_EP_FRAME_DURATION	0x08001B2F
>> +#define AUDIO_IF_FRAME_DURATION_US		1000
>> +
>> +struct param_id_hw_ep_frame_duration {
>> +	u32 frame_duration_in_us;
>> +	u32 allow_frame_duration_normalization;
>> +	u32 min_normalized_frame_dur_us;
>> +	u32 max_normalized_frame_dur_us;
>> +} __packed;
>> +
>>   #define PARAM_ID_DISPLAY_PORT_INTF_CFG		0x08001154
>>   
>>   struct param_id_display_port_intf_cfg {
>> @@ -877,6 +938,23 @@ struct audioreach_module {
>>   	uint32_t data_format;
>>   	uint32_t hw_interface_type;
>>   
>> +	/* Audio IF module (TDM/PCM/I2S) */
>> +	u32 slot_mask;
>> +	u32 active_lane_mask;
>> +	u32 frame_sync_rate;
>> +	u16 qaif_type;
>> +	u16 sync_src;
>> +	u16 ctrl_data_out_enable;
>> +	u16 nslots_per_frame;
>> +	u16 slot_width;
>> +	u16 intf_mode;
>> +	u16 sync_mode;
>> +	u16 ctrl_invert_sync_pulse;
>> +	u16 ctrl_sync_data_delay;
>> +	u16 bit_clk_type;
>> +	u8 inv_int_bit_clk;
>> +	u8 inv_ext_bit_clk;
>> +
>>   	/* PCM module specific */
>>   	uint32_t interleave_type;
>>   
>> @@ -907,6 +985,9 @@ struct audioreach_module_config {
>>   	u32	channel_allocation;
>>   	u32	sd_line_mask;
>>   	int	fmt;
>> +	u32	slot_mask;
>> +	u16	nslots_per_frame;
>> +	u16	slot_width;
>>   	struct snd_codec codec;
>>   	u8 channel_map[AR_PCM_MAX_NUM_CHANNEL];
>>   };
>> diff --git a/sound/soc/qcom/qdsp6/topology.c b/sound/soc/qcom/qdsp6/topology.c
>> index 1f69fba6d..3dd0a5c29 100644
>> --- a/sound/soc/qcom/qdsp6/topology.c
>> +++ b/sound/soc/qcom/qdsp6/topology.c
>> @@ -753,6 +753,105 @@ static int audioreach_widget_i2s_module_load(struct audioreach_module *mod,
>>   	return 0;
>>   }
>>   
>> +static int audioreach_widget_audio_if_module_load(struct audioreach_module *mod,
>> +						  const struct snd_soc_tplg_vendor_array *mod_array)
>> +{
>> +	const struct snd_soc_tplg_vendor_value_elem *mod_elem;
>> +	int tkn_count = 0;
>> +	u32 val;
>> +
>> +	mod_elem = mod_array->value;
>> +
>> +	while (tkn_count < le32_to_cpu(mod_array->num_elems)) {
>> +		val = le32_to_cpu(mod_elem->value);
>> +		switch (le32_to_cpu(mod_elem->token)) {
>> +		case AR_TKN_U32_MODULE_HW_IF_IDX:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->hw_interface_idx = val;
>> +			break;
>> +		case AR_TKN_U32_MODULE_FMT_DATA:
>> +			mod->data_format = val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_SYNC_SRC:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->sync_src = (u16)val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_CTRL_DATA_OUT_ENABLE:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->ctrl_data_out_enable = (u16)val;
>> +			break;
>> +		case AR_TKN_U32_MODULE_SLOT_MASK:
>> +			mod->slot_mask = val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_NSLOTS_PER_FRAME:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->nslots_per_frame = (u16)val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_SLOT_WIDTH:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->slot_width = (u16)val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_INTF_MODE:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->intf_mode = (u16)val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_SYNC_MODE:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->sync_mode = (u16)val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_CTRL_INVERT_SYNC_PULSE:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->ctrl_invert_sync_pulse = (u16)val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_CTRL_SYNC_DATA_DELAY:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->ctrl_sync_data_delay = (u16)val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_QAIF_TYPE:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->qaif_type = (u16)val;
>> +			break;
>> +		case AR_TKN_U32_MODULE_ACTIVE_LANE_MASK:
>> +			mod->active_lane_mask = val;
>> +			break;
>> +		case AR_TKN_U32_MODULE_FRAME_SYNC_RATE:
>> +			mod->frame_sync_rate = val;
>> +			break;
>> +		case AR_TKN_U16_MODULE_BIT_CLK_TYPE:
>> +			if (val > U16_MAX)
>> +				return -EINVAL;
>> +			mod->bit_clk_type = (u16)val;
>> +			break;
>> +		case AR_TKN_U8_MODULE_INV_INT_BIT_CLK:
>> +			if (val > U8_MAX)
>> +				return -EINVAL;
>> +			mod->inv_int_bit_clk = (u8)val;
>> +			break;
>> +		case AR_TKN_U8_MODULE_INV_EXT_BIT_CLK:
>> +			if (val > U8_MAX)
>> +				return -EINVAL;
>> +			mod->inv_ext_bit_clk = (u8)val;
>> +			break;
>> +		default:
>> +			break;
>> +		}
>> +		tkn_count++;
>> +		mod_elem++;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>>   static int audioreach_widget_dp_module_load(struct audioreach_module *mod,
>>   					    const struct snd_soc_tplg_vendor_array *mod_array)
>>   {
>> @@ -806,6 +905,12 @@ static int audioreach_widget_load_buffer(struct snd_soc_component *component,
>>   	case MODULE_ID_I2S_SOURCE:
>>   		audioreach_widget_i2s_module_load(mod, mod_array);
>>   		break;
>> +	case MODULE_ID_AUDIO_IF_SINK:
>> +	case MODULE_ID_AUDIO_IF_SOURCE:
>> +		ret = audioreach_widget_audio_if_module_load(mod, mod_array);
>> +		if (ret)
>> +			return ret;
>> +		break;
>>   	case MODULE_ID_DISPLAY_PORT_SINK:
>>   		audioreach_widget_dp_module_load(mod, mod_array);
>>   		break;

[PATCH v4 2/7] ASoC: qcom: q6apm-lpass-dais: add TDM DAI operations

[Prasad Kumpatla]

Add TDM DAI operations to q6apm-lpass-dais so AudioReach TDM
backends can be configured through the normal ASoC hw_params and DAI
setup flow.

The TDM set_tdm_slot() callback validates the supported slot width and
slot count, stores the active slot mask in the AudioReach module
configuration, and leaves existing DMA, I2S and HDMI paths unchanged.

Reuse the existing LPASS child-clock handling for TDM nodes as well as
MI2S nodes, since TDM backends also request optional backend clocks
through the machine driver set_sysclk() path.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 sound/soc/qcom/qdsp6/q6apm-lpass-dais.c | 57 +++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c b/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
index 5743586ff..672189625 100644
--- a/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
+++ b/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
@@ -372,6 +372,50 @@ static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 	return 0;
 }
 
+static int q6tdm_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
+			      unsigned int rx_mask, int slots, int slot_width)
+{
+	struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
+	struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
+	unsigned int cap_mask;
+
+	if (slot_width != 16 && slot_width != 32) {
+		dev_err(dai->dev, "%s: invalid slot_width %d\n", __func__, slot_width);
+		return -EINVAL;
+	}
+
+	switch (slots) {
+	case 2:
+		cap_mask = 0x03;
+		break;
+	case 4:
+		cap_mask = 0x0f;
+		break;
+	case 8:
+		cap_mask = 0xff;
+		break;
+	case 16:
+		cap_mask = 0xffff;
+		break;
+	default:
+		dev_err(dai->dev, "%s: invalid slots %d\n", __func__, slots);
+		return -EINVAL;
+	}
+
+	switch (dai->id) {
+	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
+		cfg->nslots_per_frame = slots;
+		cfg->slot_width = slot_width;
+		cfg->slot_mask = ((dai->id & 0x1) ? tx_mask : rx_mask) & cap_mask;
+		break;
+	default:
+		dev_err(dai->dev, "%s: invalid dai id 0x%x\n", __func__, dai->id);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 static const struct snd_soc_dai_ops q6dma_ops = {
 	.prepare	= q6apm_lpass_dai_prepare,
 	.startup	= q6apm_lpass_dai_startup,
@@ -401,6 +445,17 @@ static const struct snd_soc_dai_ops q6hdmi_ops = {
 	.trigger	= q6apm_lpass_dai_trigger,
 };
 
+static const struct snd_soc_dai_ops q6tdm_ops = {
+	.prepare	= q6apm_lpass_dai_prepare,
+	.startup	= q6apm_lpass_dai_startup,
+	.shutdown	= q6i2s_lpass_dai_shutdown,
+	.set_tdm_slot	= q6tdm_set_tdm_slot,
+	.hw_params	= q6dma_hw_params,
+	.set_fmt	= q6i2s_set_fmt,
+	.set_sysclk	= q6i2s_set_sysclk,
+	.trigger	= q6apm_lpass_dai_trigger,
+};
+
 static const struct snd_soc_component_driver q6apm_lpass_dai_component = {
 	.name = "q6apm-be-dai-component",
 	.of_xlate_dai_name = q6dsp_audio_ports_of_xlate_dai_name,
@@ -429,6 +484,7 @@ static int of_q6apm_parse_dai_data(struct device *dev,
 		case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
 		case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
 		case SENARY_MI2S_RX ... SENARY_MI2S_TX:
+		case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
 			priv = &data->priv[id];
 			priv->mclk = of_clk_get_by_name(node, "mclk");
 			if (IS_ERR(priv->mclk)) {
@@ -490,6 +546,7 @@ static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev)
 	cfg.q6i2s_ops = &q6i2s_ops;
 	cfg.q6dma_ops = &q6dma_ops;
 	cfg.q6hdmi_ops = &q6hdmi_ops;
+	cfg.q6tdm_ops = &q6tdm_ops;
 	dais = q6dsp_audio_ports_set_config(dev, &cfg, &num_dais);
 
 	ret = devm_snd_soc_register_component(dev, &q6apm_lpass_dai_component, dais, num_dais);
-- 
2.34.1

Re: [PATCH v4 2/7] ASoC: qcom: q6apm-lpass-dais: add TDM DAI operations

[Srinivas Kandagatla]

On 7/12/26 2:41 PM, Prasad Kumpatla wrote:
> Add TDM DAI operations to q6apm-lpass-dais so AudioReach TDM
> backends can be configured through the normal ASoC hw_params and DAI
> setup flow.
> 
> The TDM set_tdm_slot() callback validates the supported slot width and
> slot count, stores the active slot mask in the AudioReach module
> configuration, and leaves existing DMA, I2S and HDMI paths unchanged.
> 
> Reuse the existing LPASS child-clock handling for TDM nodes as well as
> MI2S nodes, since TDM backends also request optional backend clocks
> through the machine driver set_sysclk() path.
> 
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
> ---
>  sound/soc/qcom/qdsp6/q6apm-lpass-dais.c | 57 +++++++++++++++++++++++++
>  1 file changed, 57 insertions(+)
> 
> diff --git a/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c b/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
> index 5743586ff..672189625 100644
> --- a/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
> +++ b/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
> @@ -372,6 +372,50 @@ static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>  	return 0;
>  }
>  
> +static int q6tdm_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
> +			      unsigned int rx_mask, int slots, int slot_width)
> +{
> +	struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
> +	struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
> +	unsigned int cap_mask;
> +
> +	if (slot_width != 16 && slot_width != 32) {
> +		dev_err(dai->dev, "%s: invalid slot_width %d\n", __func__, slot_width);
> +		return -EINVAL;
> +	}
> +
> +	switch (slots) {
> +	case 2:
> +		cap_mask = 0x03;
> +		break;
> +	case 4:
> +		cap_mask = 0x0f;
> +		break;
> +	case 8:
> +		cap_mask = 0xff;
> +		break;
> +	case 16:
> +		cap_mask = 0xffff;
> +		break;

switch (slots) {
	case 2:
	case 4:
	case 8:
	case 16:
		cap_mask = GENMASK(slots - 1, 0);
		break;
?
> +	default:
> +		dev_err(dai->dev, "%s: invalid slots %d\n", __func__, slots);
> +		return -EINVAL;
> +	}
> +
> +	switch (dai->id) {
> +	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
> +		cfg->nslots_per_frame = slots;
> +		cfg->slot_width = slot_width;
> +		cfg->slot_mask = ((dai->id & 0x1) ? tx_mask : rx_mask) & cap_mask;

Should we validate the tx/rx mask here if its with in cap_mask range?
> +		break;
> +	default:
> +		dev_err(dai->dev, "%s: invalid dai id 0x%x\n", __func__, dai->id);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
>  static const struct snd_soc_dai_ops q6dma_ops = {
>  	.prepare	= q6apm_lpass_dai_prepare,
>  	.startup	= q6apm_lpass_dai_startup,
> @@ -401,6 +445,17 @@ static const struct snd_soc_dai_ops q6hdmi_ops = {
>  	.trigger	= q6apm_lpass_dai_trigger,
>  };
>  
> +static const struct snd_soc_dai_ops q6tdm_ops = {
> +	.prepare	= q6apm_lpass_dai_prepare,
> +	.startup	= q6apm_lpass_dai_startup,
> +	.shutdown	= q6i2s_lpass_dai_shutdown,
> +	.set_tdm_slot	= q6tdm_set_tdm_slot,
> +	.hw_params	= q6dma_hw_params,
> +	.set_fmt	= q6i2s_set_fmt,
> +	.set_sysclk	= q6i2s_set_sysclk,
> +	.trigger	= q6apm_lpass_dai_trigger,
> +};
> +
>  static const struct snd_soc_component_driver q6apm_lpass_dai_component = {
>  	.name = "q6apm-be-dai-component",
>  	.of_xlate_dai_name = q6dsp_audio_ports_of_xlate_dai_name,
> @@ -429,6 +484,7 @@ static int of_q6apm_parse_dai_data(struct device *dev,
>  		case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
>  		case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
>  		case SENARY_MI2S_RX ... SENARY_MI2S_TX:
> +		case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
>  			priv = &data->priv[id];
>  			priv->mclk = of_clk_get_by_name(node, "mclk");
>  			if (IS_ERR(priv->mclk)) {
> @@ -490,6 +546,7 @@ static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev)
>  	cfg.q6i2s_ops = &q6i2s_ops;
>  	cfg.q6dma_ops = &q6dma_ops;
>  	cfg.q6hdmi_ops = &q6hdmi_ops;
> +	cfg.q6tdm_ops = &q6tdm_ops;
>  	dais = q6dsp_audio_ports_set_config(dev, &cfg, &num_dais);
>  
>  	ret = devm_snd_soc_register_component(dev, &q6apm_lpass_dai_component, dais, num_dais);

Re: [PATCH v4 2/7] ASoC: qcom: q6apm-lpass-dais: add TDM DAI operations

[Prasad Kumpatla]

On 7/14/2026 2:02 PM, Srinivas Kandagatla wrote:
>
> On 7/12/26 2:41 PM, Prasad Kumpatla wrote:
>> Add TDM DAI operations to q6apm-lpass-dais so AudioReach TDM
>> backends can be configured through the normal ASoC hw_params and DAI
>> setup flow.
>>
>> The TDM set_tdm_slot() callback validates the supported slot width and
>> slot count, stores the active slot mask in the AudioReach module
>> configuration, and leaves existing DMA, I2S and HDMI paths unchanged.
>>
>> Reuse the existing LPASS child-clock handling for TDM nodes as well as
>> MI2S nodes, since TDM backends also request optional backend clocks
>> through the machine driver set_sysclk() path.
>>
>> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
>> ---
>>   sound/soc/qcom/qdsp6/q6apm-lpass-dais.c | 57 +++++++++++++++++++++++++
>>   1 file changed, 57 insertions(+)
>>
>> diff --git a/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c b/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
>> index 5743586ff..672189625 100644
>> --- a/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
>> +++ b/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
>> @@ -372,6 +372,50 @@ static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
>>   	return 0;
>>   }
>>   
>> +static int q6tdm_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
>> +			      unsigned int rx_mask, int slots, int slot_width)
>> +{
>> +	struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
>> +	struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
>> +	unsigned int cap_mask;
>> +
>> +	if (slot_width != 16 && slot_width != 32) {
>> +		dev_err(dai->dev, "%s: invalid slot_width %d\n", __func__, slot_width);
>> +		return -EINVAL;
>> +	}
>> +
>> +	switch (slots) {
>> +	case 2:
>> +		cap_mask = 0x03;
>> +		break;
>> +	case 4:
>> +		cap_mask = 0x0f;
>> +		break;
>> +	case 8:
>> +		cap_mask = 0xff;
>> +		break;
>> +	case 16:
>> +		cap_mask = 0xffff;
>> +		break;
> switch (slots) {
> 	case 2:
> 	case 4:
> 	case 8:
> 	case 16:
> 		cap_mask = GENMASK(slots - 1, 0);
> 		break;
> ?

Hi Srini,

Thanks for review.

Good suggestion. The mask is derived directly from the number of
slots, so using GENMASK(slots - 1, 0) is cleaner and avoids
maintaining hardcoded values. I'll update this in the next revision.

>> +	default:
>> +		dev_err(dai->dev, "%s: invalid slots %d\n", __func__, slots);
>> +		return -EINVAL;
>> +	}
>> +
>> +	switch (dai->id) {
>> +	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
>> +		cfg->nslots_per_frame = slots;
>> +		cfg->slot_width = slot_width;
>> +		cfg->slot_mask = ((dai->id & 0x1) ? tx_mask : rx_mask) & cap_mask;
> Should we validate the tx/rx mask here if its with in cap_mask range?
That's a good point. The current implementation silently truncates
any bits outside the valid slot range through & cap_mask. I'll add
validation to reject masks containing bits beyond the configured
number of slots and return -EINVAL instead of silently modifying
the requested configuration.

Thanks,
Prasad
>> +		break;
>> +	default:
>> +		dev_err(dai->dev, "%s: invalid dai id 0x%x\n", __func__, dai->id);
>> +		return -EINVAL;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>>   static const struct snd_soc_dai_ops q6dma_ops = {
>>   	.prepare	= q6apm_lpass_dai_prepare,
>>   	.startup	= q6apm_lpass_dai_startup,
>> @@ -401,6 +445,17 @@ static const struct snd_soc_dai_ops q6hdmi_ops = {
>>   	.trigger	= q6apm_lpass_dai_trigger,
>>   };
>>   
>> +static const struct snd_soc_dai_ops q6tdm_ops = {
>> +	.prepare	= q6apm_lpass_dai_prepare,
>> +	.startup	= q6apm_lpass_dai_startup,
>> +	.shutdown	= q6i2s_lpass_dai_shutdown,
>> +	.set_tdm_slot	= q6tdm_set_tdm_slot,
>> +	.hw_params	= q6dma_hw_params,
>> +	.set_fmt	= q6i2s_set_fmt,
>> +	.set_sysclk	= q6i2s_set_sysclk,
>> +	.trigger	= q6apm_lpass_dai_trigger,
>> +};
>> +
>>   static const struct snd_soc_component_driver q6apm_lpass_dai_component = {
>>   	.name = "q6apm-be-dai-component",
>>   	.of_xlate_dai_name = q6dsp_audio_ports_of_xlate_dai_name,
>> @@ -429,6 +484,7 @@ static int of_q6apm_parse_dai_data(struct device *dev,
>>   		case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
>>   		case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
>>   		case SENARY_MI2S_RX ... SENARY_MI2S_TX:
>> +		case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
>>   			priv = &data->priv[id];
>>   			priv->mclk = of_clk_get_by_name(node, "mclk");
>>   			if (IS_ERR(priv->mclk)) {
>> @@ -490,6 +546,7 @@ static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev)
>>   	cfg.q6i2s_ops = &q6i2s_ops;
>>   	cfg.q6dma_ops = &q6dma_ops;
>>   	cfg.q6hdmi_ops = &q6hdmi_ops;
>> +	cfg.q6tdm_ops = &q6tdm_ops;
>>   	dais = q6dsp_audio_ports_set_config(dev, &cfg, &num_dais);
>>   
>>   	ret = devm_snd_soc_register_component(dev, &q6apm_lpass_dai_component, dais, num_dais);

[PATCH v4 3/7] ASoC: dt-bindings: qcom,q6dsp-lpass-ports: add Audio IF clocks

[Prasad Kumpatla]

Add the LPASS Audio IF clock IDs used by newer backend interfaces.

Platforms using Audio IF module backends request the interface bit
clocks through q6prm. Add the Audio IF IBIT and EBIT IDs to the binding
header so these clocks can be referenced from device trees.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 .../sound/qcom,q6dsp-lpass-ports.h            | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
index 45850f2d4..a3aea029c 100644
--- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
+++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
@@ -233,6 +233,35 @@
 /* Clock ID for RX CORE MCLK2 2X  MCLK */
 #define LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK	70
 
+#define LPASS_CLK_ID_INTF0_IBIT		71
+#define LPASS_CLK_ID_INTF0_EBIT		72
+#define LPASS_CLK_ID_INTF1_IBIT		73
+#define LPASS_CLK_ID_INTF1_EBIT		74
+#define LPASS_CLK_ID_INTF2_IBIT		75
+#define LPASS_CLK_ID_INTF2_EBIT		76
+#define LPASS_CLK_ID_INTF3_IBIT		77
+#define LPASS_CLK_ID_INTF3_EBIT		78
+#define LPASS_CLK_ID_INTF4_IBIT		79
+#define LPASS_CLK_ID_INTF4_EBIT		80
+#define LPASS_CLK_ID_INTF5_IBIT		81
+#define LPASS_CLK_ID_INTF5_EBIT		82
+#define LPASS_CLK_ID_INTF6_IBIT		83
+#define LPASS_CLK_ID_INTF6_EBIT		84
+#define LPASS_CLK_ID_INTF7_IBIT		85
+#define LPASS_CLK_ID_INTF7_EBIT		86
+#define LPASS_CLK_ID_INTF8_IBIT		87
+#define LPASS_CLK_ID_INTF8_EBIT		88
+#define LPASS_CLK_ID_INTF9_IBIT		89
+#define LPASS_CLK_ID_INTF9_EBIT		90
+#define LPASS_CLK_ID_INTF10_IBIT	91
+#define LPASS_CLK_ID_INTF10_EBIT	92
+#define LPASS_CLK_ID_INTF11_IBIT	93
+#define LPASS_CLK_ID_INTF11_EBIT	94
+#define LPASS_CLK_ID_INTF12_IBIT	95
+#define LPASS_CLK_ID_INTF12_EBIT	96
+#define LPASS_CLK_ID_VA_INTF0_IBIT	97
+#define LPASS_CLK_ID_VA_INTF0_EBIT	98
+
 #define LPASS_HW_AVTIMER_VOTE		101
 #define LPASS_HW_MACRO_VOTE		102
 #define LPASS_HW_DCODEC_VOTE		103
-- 
2.34.1

Re: [PATCH v4 3/7] ASoC: dt-bindings: qcom,q6dsp-lpass-ports: add Audio IF clocks

[Srinivas Kandagatla]

On 7/12/26 2:41 PM, Prasad Kumpatla wrote:
> Add the LPASS Audio IF clock IDs used by newer backend interfaces.
> 
> Platforms using Audio IF module backends request the interface bit
> clocks through q6prm. Add the Audio IF IBIT and EBIT IDs to the binding
> header so these clocks can be referenced from device trees.
> 
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
> ---

lgtm,
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>

--srini
>  .../sound/qcom,q6dsp-lpass-ports.h            | 29 +++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> index 45850f2d4..a3aea029c 100644
> --- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> +++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
> @@ -233,6 +233,35 @@
>  /* Clock ID for RX CORE MCLK2 2X  MCLK */
>  #define LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK	70
>  
> +#define LPASS_CLK_ID_INTF0_IBIT		71
> +#define LPASS_CLK_ID_INTF0_EBIT		72
> +#define LPASS_CLK_ID_INTF1_IBIT		73
> +#define LPASS_CLK_ID_INTF1_EBIT		74
> +#define LPASS_CLK_ID_INTF2_IBIT		75
> +#define LPASS_CLK_ID_INTF2_EBIT		76
> +#define LPASS_CLK_ID_INTF3_IBIT		77
> +#define LPASS_CLK_ID_INTF3_EBIT		78
> +#define LPASS_CLK_ID_INTF4_IBIT		79
> +#define LPASS_CLK_ID_INTF4_EBIT		80
> +#define LPASS_CLK_ID_INTF5_IBIT		81
> +#define LPASS_CLK_ID_INTF5_EBIT		82
> +#define LPASS_CLK_ID_INTF6_IBIT		83
> +#define LPASS_CLK_ID_INTF6_EBIT		84
> +#define LPASS_CLK_ID_INTF7_IBIT		85
> +#define LPASS_CLK_ID_INTF7_EBIT		86
> +#define LPASS_CLK_ID_INTF8_IBIT		87
> +#define LPASS_CLK_ID_INTF8_EBIT		88
> +#define LPASS_CLK_ID_INTF9_IBIT		89
> +#define LPASS_CLK_ID_INTF9_EBIT		90
> +#define LPASS_CLK_ID_INTF10_IBIT	91
> +#define LPASS_CLK_ID_INTF10_EBIT	92
> +#define LPASS_CLK_ID_INTF11_IBIT	93
> +#define LPASS_CLK_ID_INTF11_EBIT	94
> +#define LPASS_CLK_ID_INTF12_IBIT	95
> +#define LPASS_CLK_ID_INTF12_EBIT	96
> +#define LPASS_CLK_ID_VA_INTF0_IBIT	97
> +#define LPASS_CLK_ID_VA_INTF0_EBIT	98
> +
>  #define LPASS_HW_AVTIMER_VOTE		101
>  #define LPASS_HW_MACRO_VOTE		102
>  #define LPASS_HW_DCODEC_VOTE		103

[PATCH v4 4/7] ASoC: qcom: qdsp6: q6prm: add Audio IF clock IDs

[Prasad Kumpatla]

Add the q6prm clock table entries and internal DSP clock IDs for LPASS
Audio IF backend clocks.

The public binding IDs map to q6prm DSP clock IDs starting at 0x500 for
Audio IF0 IBIT/EBIT. Add the internal definitions and register all Audio
IF IBIT and EBIT clocks so machine drivers can request them through the
APM clock controller.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 sound/soc/qcom/qdsp6/q6prm-clocks.c | 28 ++++++++++++++++++++++++++++
 sound/soc/qcom/qdsp6/q6prm.h        | 29 +++++++++++++++++++++++++++++
 2 files changed, 57 insertions(+)

diff --git a/sound/soc/qcom/qdsp6/q6prm-clocks.c b/sound/soc/qcom/qdsp6/q6prm-clocks.c
index 4c574b48a..38354ca8b 100644
--- a/sound/soc/qcom/qdsp6/q6prm-clocks.c
+++ b/sound/soc/qcom/qdsp6/q6prm-clocks.c
@@ -59,6 +59,34 @@ static const struct q6dsp_clk_init q6prm_clks[] = {
 	Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_MCLK),
 	Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK),
 	Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF0_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF0_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF1_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF1_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF2_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF2_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF3_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF3_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF4_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF4_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF5_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF5_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF6_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF6_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF7_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF7_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF8_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF8_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF9_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF9_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF10_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF10_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF11_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF11_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF12_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_INTF12_EBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_VA_INTF0_IBIT),
+	Q6PRM_CLK(LPASS_CLK_ID_VA_INTF0_EBIT),
 	Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE, Q6PRM_HW_CORE_ID_LPASS,
 		       "LPASS_HW_MACRO"),
 	Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE, Q6PRM_HW_CORE_ID_DCODEC,
diff --git a/sound/soc/qcom/qdsp6/q6prm.h b/sound/soc/qcom/qdsp6/q6prm.h
index bbbe6d368..1593f6bd4 100644
--- a/sound/soc/qcom/qdsp6/q6prm.h
+++ b/sound/soc/qcom/qdsp6/q6prm.h
@@ -87,6 +87,35 @@
 /* Clock ID for RX CORE MCLK2 2X  MCLK */
 #define Q6PRM_LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK 0x318
 
+#define Q6PRM_LPASS_CLK_ID_INTF0_IBIT		0x500
+#define Q6PRM_LPASS_CLK_ID_INTF0_EBIT		0x501
+#define Q6PRM_LPASS_CLK_ID_INTF1_IBIT		0x502
+#define Q6PRM_LPASS_CLK_ID_INTF1_EBIT		0x503
+#define Q6PRM_LPASS_CLK_ID_INTF2_IBIT		0x504
+#define Q6PRM_LPASS_CLK_ID_INTF2_EBIT		0x505
+#define Q6PRM_LPASS_CLK_ID_INTF3_IBIT		0x506
+#define Q6PRM_LPASS_CLK_ID_INTF3_EBIT		0x507
+#define Q6PRM_LPASS_CLK_ID_INTF4_IBIT		0x508
+#define Q6PRM_LPASS_CLK_ID_INTF4_EBIT		0x509
+#define Q6PRM_LPASS_CLK_ID_INTF5_IBIT		0x50A
+#define Q6PRM_LPASS_CLK_ID_INTF5_EBIT		0x50B
+#define Q6PRM_LPASS_CLK_ID_INTF6_IBIT		0x50C
+#define Q6PRM_LPASS_CLK_ID_INTF6_EBIT		0x50D
+#define Q6PRM_LPASS_CLK_ID_INTF7_IBIT		0x50E
+#define Q6PRM_LPASS_CLK_ID_INTF7_EBIT		0x50F
+#define Q6PRM_LPASS_CLK_ID_INTF8_IBIT		0x510
+#define Q6PRM_LPASS_CLK_ID_INTF8_EBIT		0x511
+#define Q6PRM_LPASS_CLK_ID_INTF9_IBIT		0x512
+#define Q6PRM_LPASS_CLK_ID_INTF9_EBIT		0x513
+#define Q6PRM_LPASS_CLK_ID_INTF10_IBIT		0x514
+#define Q6PRM_LPASS_CLK_ID_INTF10_EBIT		0x515
+#define Q6PRM_LPASS_CLK_ID_INTF11_IBIT		0x516
+#define Q6PRM_LPASS_CLK_ID_INTF11_EBIT		0x517
+#define Q6PRM_LPASS_CLK_ID_INTF12_IBIT		0x518
+#define Q6PRM_LPASS_CLK_ID_INTF12_EBIT		0x519
+#define Q6PRM_LPASS_CLK_ID_VA_INTF0_IBIT		0x550
+#define Q6PRM_LPASS_CLK_ID_VA_INTF0_EBIT		0x551
+
 #define Q6PRM_LPASS_CLK_SRC_INTERNAL	1
 #define Q6PRM_LPASS_CLK_ROOT_DEFAULT	0
 #define Q6PRM_HW_CORE_ID_LPASS		1
-- 
2.34.1

Re: [PATCH v4 4/7] ASoC: qcom: qdsp6: q6prm: add Audio IF clock IDs

[Srinivas Kandagatla]

On 7/12/26 2:41 PM, Prasad Kumpatla wrote:
> Add the q6prm clock table entries and internal DSP clock IDs for LPASS
> Audio IF backend clocks.
> 
> The public binding IDs map to q6prm DSP clock IDs starting at 0x500 for
> Audio IF0 IBIT/EBIT. Add the internal definitions and register all Audio
> IF IBIT and EBIT clocks so machine drivers can request them through the
> APM clock controller.
> 
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>

lgtm,
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>

--srini
> ---
>  sound/soc/qcom/qdsp6/q6prm-clocks.c | 28 ++++++++++++++++++++++++++++
>  sound/soc/qcom/qdsp6/q6prm.h        | 29 +++++++++++++++++++++++++++++
>  2 files changed, 57 insertions(+)
> 
> diff --git a/sound/soc/qcom/qdsp6/q6prm-clocks.c b/sound/soc/qcom/qdsp6/q6prm-clocks.c
> index 4c574b48a..38354ca8b 100644
> --- a/sound/soc/qcom/qdsp6/q6prm-clocks.c
> +++ b/sound/soc/qcom/qdsp6/q6prm-clocks.c
> @@ -59,6 +59,34 @@ static const struct q6dsp_clk_init q6prm_clks[] = {
>  	Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_MCLK),
>  	Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK),
>  	Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF0_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF0_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF1_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF1_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF2_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF2_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF3_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF3_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF4_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF4_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF5_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF5_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF6_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF6_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF7_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF7_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF8_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF8_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF9_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF9_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF10_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF10_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF11_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF11_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF12_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_INTF12_EBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_VA_INTF0_IBIT),
> +	Q6PRM_CLK(LPASS_CLK_ID_VA_INTF0_EBIT),
>  	Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE, Q6PRM_HW_CORE_ID_LPASS,
>  		       "LPASS_HW_MACRO"),
>  	Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE, Q6PRM_HW_CORE_ID_DCODEC,
> diff --git a/sound/soc/qcom/qdsp6/q6prm.h b/sound/soc/qcom/qdsp6/q6prm.h
> index bbbe6d368..1593f6bd4 100644
> --- a/sound/soc/qcom/qdsp6/q6prm.h
> +++ b/sound/soc/qcom/qdsp6/q6prm.h
> @@ -87,6 +87,35 @@
>  /* Clock ID for RX CORE MCLK2 2X  MCLK */
>  #define Q6PRM_LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK 0x318
>  
> +#define Q6PRM_LPASS_CLK_ID_INTF0_IBIT		0x500
> +#define Q6PRM_LPASS_CLK_ID_INTF0_EBIT		0x501
> +#define Q6PRM_LPASS_CLK_ID_INTF1_IBIT		0x502
> +#define Q6PRM_LPASS_CLK_ID_INTF1_EBIT		0x503
> +#define Q6PRM_LPASS_CLK_ID_INTF2_IBIT		0x504
> +#define Q6PRM_LPASS_CLK_ID_INTF2_EBIT		0x505
> +#define Q6PRM_LPASS_CLK_ID_INTF3_IBIT		0x506
> +#define Q6PRM_LPASS_CLK_ID_INTF3_EBIT		0x507
> +#define Q6PRM_LPASS_CLK_ID_INTF4_IBIT		0x508
> +#define Q6PRM_LPASS_CLK_ID_INTF4_EBIT		0x509
> +#define Q6PRM_LPASS_CLK_ID_INTF5_IBIT		0x50A
> +#define Q6PRM_LPASS_CLK_ID_INTF5_EBIT		0x50B
> +#define Q6PRM_LPASS_CLK_ID_INTF6_IBIT		0x50C
> +#define Q6PRM_LPASS_CLK_ID_INTF6_EBIT		0x50D
> +#define Q6PRM_LPASS_CLK_ID_INTF7_IBIT		0x50E
> +#define Q6PRM_LPASS_CLK_ID_INTF7_EBIT		0x50F
> +#define Q6PRM_LPASS_CLK_ID_INTF8_IBIT		0x510
> +#define Q6PRM_LPASS_CLK_ID_INTF8_EBIT		0x511
> +#define Q6PRM_LPASS_CLK_ID_INTF9_IBIT		0x512
> +#define Q6PRM_LPASS_CLK_ID_INTF9_EBIT		0x513
> +#define Q6PRM_LPASS_CLK_ID_INTF10_IBIT		0x514
> +#define Q6PRM_LPASS_CLK_ID_INTF10_EBIT		0x515
> +#define Q6PRM_LPASS_CLK_ID_INTF11_IBIT		0x516
> +#define Q6PRM_LPASS_CLK_ID_INTF11_EBIT		0x517
> +#define Q6PRM_LPASS_CLK_ID_INTF12_IBIT		0x518
> +#define Q6PRM_LPASS_CLK_ID_INTF12_EBIT		0x519
> +#define Q6PRM_LPASS_CLK_ID_VA_INTF0_IBIT		0x550
> +#define Q6PRM_LPASS_CLK_ID_VA_INTF0_EBIT		0x551
> +
>  #define Q6PRM_LPASS_CLK_SRC_INTERNAL	1
>  #define Q6PRM_LPASS_CLK_ROOT_DEFAULT	0
>  #define Q6PRM_HW_CORE_ID_LPASS		1

[PATCH v4 5/7] Asoc: dt-bindings: qcom,sm8250: Add TDM slot properties

[Prasad Kumpatla]

Add standard TDM slot properties in CPU and codec endpoint
nodes.

Some audio backends operate in TDM mode and require the slot
configuration to be described in Devicetree. The common TDM binding
defines dai-tdm-slot-num, dai-tdm-slot-width,
dai-tdm-slot-tx-mask and dai-tdm-slot-rx-mask for this purpose.

Permit these standard properties in endpoint nodes so TDM-capable
links can describe their slot configuration using the common binding.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 .../devicetree/bindings/sound/qcom,sm8250.yaml   | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
index dae440eca..28cf9289a 100644
--- a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
+++ b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml
@@ -85,12 +85,20 @@ patternProperties:
       cpu:
         description: Holds subnode which indicates cpu dai.
         type: object
+        $ref: tdm-slot.yaml#
+
         additionalProperties: false
 
         properties:
           sound-dai:
             maxItems: 1
 
+          dai-tdm-slot-num: true
+          dai-tdm-slot-width: true
+
+        patternProperties:
+          '^dai-tdm-slot-[rt]x-mask$': true
+
       platform:
         description: Holds subnode which indicates platform dai.
         type: object
@@ -103,6 +111,8 @@ patternProperties:
       codec:
         description: Holds subnode which indicates codec dai.
         type: object
+        $ref: tdm-slot.yaml#
+
         additionalProperties: false
 
         properties:
@@ -110,6 +120,12 @@ patternProperties:
             minItems: 1
             maxItems: 8
 
+          dai-tdm-slot-num: true
+          dai-tdm-slot-width: true
+
+        patternProperties:
+          '^dai-tdm-slot-[rt]x-mask$': true
+
     required:
       - link-name
       - cpu
-- 
2.34.1

Re: [PATCH v4 5/7] Asoc: dt-bindings: qcom,sm8250: Add TDM slot properties

[Krzysztof Kozlowski]

On Sun, Jul 12, 2026 at 07:11:08PM +0530, Prasad Kumpatla wrote:
> Add standard TDM slot properties in CPU and codec endpoint
> nodes.
> 
> Some audio backends operate in TDM mode and require the slot
> configuration to be described in Devicetree. The common TDM binding
> defines dai-tdm-slot-num, dai-tdm-slot-width,
> dai-tdm-slot-tx-mask and dai-tdm-slot-rx-mask for this purpose.
> 
> Permit these standard properties in endpoint nodes so TDM-capable
> links can describe their slot configuration using the common binding.
> 
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
> ---
>  .../devicetree/bindings/sound/qcom,sm8250.yaml   | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

[PATCH v4 6/7] ASoC: qcom: common: add DAI-node TDM slot helpers

[Prasad Kumpatla]

Add common helpers to parse standard dai-tdm-slot-* properties from the
CPU and codec child nodes of a backend DAI link and apply the result to
the active DAIs.

QCOM machine drivers already use qcom_snd_parse_of() to build links from
DT, but they lacked a shared helper to translate endpoint TDM properties
into snd_soc_dai_set_tdm_slot() calls. Boards therefore had to carry ad
hoc parsing or rely on non-standard DT properties.

The helpers parse endpoint masks, validate the shared slot count and
slot width, and program CPU and codec DAIs with the resulting slot
configuration. A cfg-based apply helper is provided for callers that
already parsed the DT data and want to avoid a second DT traversal.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 sound/soc/qcom/common.c | 165 ++++++++++++++++++++++++++++++++++++++++
 sound/soc/qcom/common.h |  14 ++++
 2 files changed, 179 insertions(+)

diff --git a/sound/soc/qcom/common.c b/sound/soc/qcom/common.c
index edc461169..08949b2c4 100644
--- a/sound/soc/qcom/common.c
+++ b/sound/soc/qcom/common.c
@@ -23,6 +23,171 @@ static const struct snd_soc_dapm_widget qcom_jack_snd_widgets[] = {
 	SND_SOC_DAPM_SPK("DP7 Jack", NULL),
 };
 
+static struct device_node *qcom_snd_get_link_node(struct snd_soc_pcm_runtime *rtd)
+{
+	struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
+	struct snd_soc_card *card = rtd->card;
+	struct device_node *np;
+	struct device_node *cpu_np;
+	struct of_phandle_args args;
+	int ret;
+
+	if (!card->dev || !card->dev->of_node)
+		return NULL;
+
+	for_each_available_child_of_node(card->dev->of_node, np) {
+		cpu_np = of_get_child_by_name(np, "cpu");
+		if (!cpu_np)
+			continue;
+
+		ret = of_parse_phandle_with_args(cpu_np, "sound-dai", "#sound-dai-cells", 0,
+						 &args);
+		of_node_put(cpu_np);
+		if (ret)
+			continue;
+
+		if (args.np == rtd->dai_link->cpus[0].of_node &&
+		    args.args_count == 1 && args.args[0] == cpu_dai->id) {
+			of_node_put(args.np);
+			return np;
+		}
+
+		of_node_put(args.np);
+	}
+
+	return NULL;
+}
+
+static int qcom_snd_parse_tdm_slot(struct device_node *np,
+				   struct qcom_snd_tdm_slot_cfg *cfg)
+{
+	memset(cfg, 0, sizeof(*cfg));
+
+	return snd_soc_of_parse_tdm_slot(np, &cfg->tx_mask, &cfg->rx_mask,
+					 &cfg->slots, &cfg->slot_width);
+}
+
+static int qcom_snd_normalize_tdm_slots(struct qcom_snd_tdm_slot_cfg *cpu_cfg,
+					struct qcom_snd_tdm_slot_cfg *codec_cfg)
+{
+	unsigned int slots;
+	unsigned int slot_width;
+
+	if (cpu_cfg->slots && codec_cfg->slots && cpu_cfg->slots != codec_cfg->slots)
+		return -EINVAL;
+
+	if (cpu_cfg->slot_width && codec_cfg->slot_width &&
+	    cpu_cfg->slot_width != codec_cfg->slot_width)
+		return -EINVAL;
+
+	slots = cpu_cfg->slots ?: codec_cfg->slots;
+	if (!slots)
+		return 0;
+
+	slot_width = cpu_cfg->slot_width ?: codec_cfg->slot_width;
+	if (!slot_width)
+		return -EINVAL;
+
+	cpu_cfg->slots = slots;
+	codec_cfg->slots = slots;
+	cpu_cfg->slot_width = slot_width;
+	codec_cfg->slot_width = slot_width;
+
+	return 0;
+}
+
+static int qcom_snd_parse_dai_tdm_slots(struct snd_soc_pcm_runtime *rtd,
+					struct qcom_snd_tdm_slot_cfg *cpu_cfg,
+					struct qcom_snd_tdm_slot_cfg *codec_cfg)
+{
+	struct device_node *link_np;
+	struct device_node *cpu_np = NULL;
+	struct device_node *codec_np = NULL;
+	int ret;
+
+	link_np = qcom_snd_get_link_node(rtd);
+	if (!link_np)
+		return -EINVAL;
+
+	cpu_np = of_get_child_by_name(link_np, "cpu");
+	codec_np = of_get_child_by_name(link_np, "codec");
+	if (!cpu_np || !codec_np) {
+		ret = -EINVAL;
+		goto out;
+	}
+
+	ret = qcom_snd_parse_tdm_slot(cpu_np, cpu_cfg);
+	if (ret)
+		goto out;
+
+	ret = qcom_snd_parse_tdm_slot(codec_np, codec_cfg);
+out:
+	of_node_put(codec_np);
+	of_node_put(cpu_np);
+	of_node_put(link_np);
+
+	return ret;
+}
+
+int qcom_snd_get_dai_tdm_slots(struct snd_soc_pcm_runtime *rtd,
+			       struct qcom_snd_tdm_slot_cfg *cpu_cfg,
+			       struct qcom_snd_tdm_slot_cfg *codec_cfg)
+{
+	int ret;
+
+	ret = qcom_snd_parse_dai_tdm_slots(rtd, cpu_cfg, codec_cfg);
+	if (ret)
+		return ret;
+
+	return qcom_snd_normalize_tdm_slots(cpu_cfg, codec_cfg);
+}
+EXPORT_SYMBOL_GPL(qcom_snd_get_dai_tdm_slots);
+
+int qcom_snd_apply_dai_tdm_slots_cfg(struct snd_soc_pcm_runtime *rtd,
+				     const struct qcom_snd_tdm_slot_cfg *cpu_cfg,
+				     const struct qcom_snd_tdm_slot_cfg *codec_cfg)
+{
+	struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
+	struct snd_soc_dai *codec_dai;
+	int i;
+	int ret;
+
+	if (!cpu_cfg->slots)
+		return 0;
+
+	ret = snd_soc_dai_set_tdm_slot(cpu_dai, cpu_cfg->tx_mask, cpu_cfg->rx_mask,
+				       cpu_cfg->slots, cpu_cfg->slot_width);
+	if (ret)
+		return ret;
+
+	for_each_rtd_codec_dais(rtd, i, codec_dai) {
+		ret = snd_soc_dai_set_tdm_slot(codec_dai,
+					       codec_cfg->tx_mask,
+					       codec_cfg->rx_mask,
+					       codec_cfg->slots,
+					       codec_cfg->slot_width);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(qcom_snd_apply_dai_tdm_slots_cfg);
+
+int qcom_snd_apply_dai_tdm_slots(struct snd_soc_pcm_runtime *rtd)
+{
+	struct qcom_snd_tdm_slot_cfg cpu_cfg;
+	struct qcom_snd_tdm_slot_cfg codec_cfg;
+	int ret;
+
+	ret = qcom_snd_get_dai_tdm_slots(rtd, &cpu_cfg, &codec_cfg);
+	if (ret)
+		return ret == -EINVAL ? 0 : ret;
+
+	return qcom_snd_apply_dai_tdm_slots_cfg(rtd, &cpu_cfg, &codec_cfg);
+}
+EXPORT_SYMBOL_GPL(qcom_snd_apply_dai_tdm_slots);
+
 int qcom_snd_parse_of(struct snd_soc_card *card)
 {
 	struct device *dev = card->dev;
diff --git a/sound/soc/qcom/common.h b/sound/soc/qcom/common.h
index ee6662885..02b24caec 100644
--- a/sound/soc/qcom/common.h
+++ b/sound/soc/qcom/common.h
@@ -9,7 +9,21 @@
 
 #define LPASS_MAX_PORT			(SENARY_MI2S_TX + 1)
 
+struct qcom_snd_tdm_slot_cfg {
+	unsigned int tx_mask;
+	unsigned int rx_mask;
+	unsigned int slots;
+	unsigned int slot_width;
+};
+
 int qcom_snd_parse_of(struct snd_soc_card *card);
+int qcom_snd_get_dai_tdm_slots(struct snd_soc_pcm_runtime *rtd,
+			       struct qcom_snd_tdm_slot_cfg *cpu_cfg,
+			       struct qcom_snd_tdm_slot_cfg *codec_cfg);
+int qcom_snd_apply_dai_tdm_slots_cfg(struct snd_soc_pcm_runtime *rtd,
+				     const struct qcom_snd_tdm_slot_cfg *cpu_cfg,
+				     const struct qcom_snd_tdm_slot_cfg *codec_cfg);
+int qcom_snd_apply_dai_tdm_slots(struct snd_soc_pcm_runtime *rtd);
 int qcom_snd_wcd_jack_setup(struct snd_soc_pcm_runtime *rtd,
 			    struct snd_soc_jack *jack, bool *jack_setup);
 int qcom_snd_dp_jack_setup(struct snd_soc_pcm_runtime *rtd,
-- 
2.34.1

[PATCH v4 7/7] ASoC: qcom: sc8280xp: add TDM hw_params support

[Prasad Kumpatla]

Add TDM backend handling to the sc8280xp machine driver.

Use the common QCOM DAI-node TDM helper to parse the standard
DAI TDM slot properties from backend CPU and codec endpoints. Reuse the
parsed configuration when programming DAIs so hw_params does not need a
second DT traversal.

Derive the LPASS backend bit clock from the runtime TDM parameters and
request it through the backend child-clock path using LPAIF_MI2S_BCLK.

Program codec sysclk in hw_params so codec PLL setup happens before the
stream is triggered.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 sound/soc/qcom/sc8280xp.c | 60 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c
index eea571de9..728300a57 100644
--- a/sound/soc/qcom/sc8280xp.c
+++ b/sound/soc/qcom/sc8280xp.c
@@ -84,6 +84,64 @@ static inline int sc8280xp_get_bclk_freq(struct snd_pcm_hw_params *params)
 			    snd_pcm_format_width(params_format(params)));
 }
 
+static int sc8280xp_tdm_hw_params(struct snd_pcm_substream *substream,
+				  struct snd_pcm_hw_params *params)
+{
+	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
+	struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
+	struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
+	struct snd_soc_dai *codec_dai;
+	struct qcom_snd_tdm_slot_cfg cpu_cfg;
+	struct qcom_snd_tdm_slot_cfg codec_cfg;
+	unsigned int bclk_freq;
+	int ret;
+	int i;
+
+	ret = qcom_snd_get_dai_tdm_slots(rtd, &cpu_cfg, &codec_cfg);
+	if (ret)
+		return ret == -EINVAL ? 0 : ret;
+
+	if (!cpu_cfg.slots)
+		return 0;
+
+	ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP);
+	if (ret)
+		return ret;
+
+	ret = qcom_snd_apply_dai_tdm_slots_cfg(rtd, &cpu_cfg, &codec_cfg);
+	if (ret)
+		return ret;
+
+	bclk_freq = snd_soc_tdm_params_to_bclk(params, cpu_cfg.slot_width,
+					       cpu_cfg.slots, 1);
+	if (!bclk_freq)
+		return -EINVAL;
+
+	if (data->snd_soc_common_priv->mi2s_bclk_enable) {
+		ret = snd_soc_dai_set_sysclk(cpu_dai, LPAIF_MI2S_BCLK, bclk_freq,
+					     SND_SOC_CLOCK_IN);
+		if (ret) {
+			dev_err(rtd->dev, "%s: failed to set cpu sysclk: %d\n",
+				__func__, ret);
+			return ret;
+		}
+	}
+
+	if (data->snd_soc_common_priv->codec_sysclk_set) {
+		for_each_rtd_codec_dais(rtd, i, codec_dai) {
+			ret = snd_soc_dai_set_sysclk(codec_dai, 0, bclk_freq,
+						     SND_SOC_CLOCK_IN);
+			if (ret) {
+				dev_err(rtd->dev, "%s: failed to set codec sysclk on %s: %d\n",
+					__func__, codec_dai->name, ret);
+				return ret;
+			}
+		}
+	}
+
+	return 0;
+}
+
 static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
 {
 	struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
@@ -206,6 +264,8 @@ static int sc8280xp_snd_hw_params(struct snd_pcm_substream *substream,
 				return ret;
 		}
 		break;
+	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
+		return sc8280xp_tdm_hw_params(substream, params);
 	default:
 		break;
 	}
-- 
2.34.1

Re: [PATCH v4 0/7] ASoC: qcom: add AudioReach TDM backend support

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 770 bytes --]

On Sun, Jul 12, 2026 at 07:11:03PM +0530, Prasad Kumpatla wrote:
> Add AudioReach support for LPASS Audio IF based TDM backends and wire it
> up for the sc8280xp machine driver.

> This series depends on:
> 	- https://lore.kernel.org/all/20260711125740.3083236-1-mohammad.rafi.shaik@oss.qualcomm.com/

Please resend this once there are enough dependencies in to allow it to
be applied.

Please include human readable descriptions of things like commits and
issues being discussed in e-mail in your mails, this makes them much
easier for humans to read especially when they have no internet access.
I do frequently catch up on my mail on flights or while otherwise
travelling so this is even more pressing for me than just being about
making things a bit easier to read.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

Re: [PATCH v4 0/7] ASoC: qcom: add AudioReach TDM backend support

[Prasad Kumpatla]

On 8/1/2026 5:35 AM, Mark Brown wrote:
> On Sun, Jul 12, 2026 at 07:11:03PM +0530, Prasad Kumpatla wrote:
>> Add AudioReach support for LPASS Audio IF based TDM backends and wire it
>> up for the sc8280xp machine driver.
>> This series depends on:
>> 	- https://lore.kernel.org/all/20260711125740.3083236-1-mohammad.rafi.shaik@oss.qualcomm.com/
> Please resend this once there are enough dependencies in to allow it to
> be applied.
>
> Please include human readable descriptions of things like commits and
> issues being discussed in e-mail in your mails, this makes them much
> easier for humans to read especially when they have no internet access.
> I do frequently catch up on my mail on flights or while otherwise
> travelling so this is even more pressing for me than just being about
> making things a bit easier to read.
Hi Mark,

Thank you for the feedback.

The dependencies have now been addressed, and I have already
sent the v5 series with the required prerequisite changes included.

Thanks,
Prasad