From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Ziyue Zhang <quic_ziyuzhan@quicinc.com>,
vkoul@kernel.org, kishon@kernel.org, dmitry.baryshkov@linaro.org,
abel.vesa@linaro.org, neil.armstrong@linaro.org,
manivannan.sadhasivam@linaro.org, andersson@kernel.org,
konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/3] phy: qcom: qmp-pcie: add current load vote/devote for PCIe PHY
Date: Thu, 5 Dec 2024 17:31:42 +0100 [thread overview]
Message-ID: <783bda0f-5d51-43e2-8923-a01577a4296d@oss.qualcomm.com> (raw)
In-Reply-To: <20241204105249.3544114-3-quic_ziyuzhan@quicinc.com>
On 4.12.2024 11:52 AM, Ziyue Zhang wrote:
> On some platform (eg.qcs615), the current that phy consumes will exceed
> the maximum current the regulator can provide in LPM mode, leading to
> over current protection and system boot up stuck. Fix this issue by
> setting regulator load to an expected value getting from phy device tree
> node during init so that the regulator can scale up to HPM to allow a
> larger current load.
> This change will also set load to zero during deinit to let regulator
> scale down to LPM mode to reduce itself's power consumptionif PCIe
> suspend.
>
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 35 ++++++++++++++++++++++--
> 1 file changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> index c8e39c147ba4..782d51ab5cf1 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> @@ -39,6 +39,7 @@
> #include "phy-qcom-qmp-pcie-qhp.h"
>
> #define PHY_INIT_COMPLETE_TIMEOUT 10000
> +#define MAX_PROP_SIZE 32
>
> /* set of registers with offsets different per-PHY */
> enum qphy_reg_layout {
> @@ -2905,6 +2906,7 @@ struct qmp_pcie {
> struct reset_control_bulk_data *resets;
> struct reset_control *nocsr_reset;
> struct regulator_bulk_data *vregs;
> + u32 *max_current_load;
>
> struct phy *phy;
> int mode;
> @@ -4087,6 +4089,17 @@ static int qmp_pcie_init(struct phy *phy)
> const struct qmp_phy_cfg *cfg = qmp->cfg;
> int ret;
>
> + for (int i = 0; i < cfg->num_vregs; i++) {
> + if (qmp->max_current_load[i]) {
> + ret = regulator_set_load(qmp->vregs[i].consumer, qmp->max_current_load[i]);
I think it's better if we just put this info in the driver, like with
e.g. the DSI PHY
Konrad
next prev parent reply other threads:[~2024-12-05 16:31 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-04 10:52 [PATCH 0/3] pci: qcom: Add PCIe setting current load support Ziyue Zhang
2024-12-04 10:52 ` [PATCH 1/3] dt-bindings: phy: qcom,qmp-pcie: add optional current load properties Ziyue Zhang
2024-12-05 10:23 ` Krzysztof Kozlowski
2024-12-11 6:20 ` Manivannan Sadhasivam
2024-12-11 8:09 ` Krzysztof Kozlowski
2024-12-11 8:24 ` Manivannan Sadhasivam
2024-12-11 9:52 ` Krzysztof Kozlowski
2024-12-11 10:34 ` Krzysztof Kozlowski
2024-12-11 11:50 ` Manivannan Sadhasivam
2024-12-12 7:29 ` Ziyue Zhang
2024-12-12 7:31 ` Krzysztof Kozlowski
2024-12-12 7:30 ` Krzysztof Kozlowski
2024-12-04 10:52 ` [PATCH 2/3] phy: qcom: qmp-pcie: add current load vote/devote for PCIe PHY Ziyue Zhang
2024-12-05 16:31 ` Konrad Dybcio [this message]
2024-12-04 10:52 ` [PATCH 3/3] arm64: dts: qcom: qcs615: add pcie phy max current property Ziyue Zhang
2024-12-11 6:26 ` Manivannan Sadhasivam
2024-12-12 7:32 ` Ziyue Zhang
2024-12-26 5:09 ` Bjorn Andersson
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