Re: [PATCH v9 0/2] Enable sdhc inline crypto engine for kodiak and monaco

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 8/24/26 10:43 AM, Kuldeep Singh wrote:
> On 21-07-2026 12:43, Kuldeep Singh wrote:
>> On 07-07-2026 12:41, Kuldeep Singh wrote:
>>> The series is combination of below 2 series sent in past. Since, both
>>> need to be picked together, combine them and send as one series.
>>> - https://lore.kernel.org/lkml/20260608041650.541502-1-neeraj.soni@oss.qualcomm.com/
>>> - https://lore.kernel.org/linux-arm-msm/20260409-ice_emmc_clock_addition-v2-0-90bbcc057361@oss.qualcomm.com/
>>>
>>> Document and wire the SDHCI to ICE relationship on Qualcomm platforms
>>> where ICE is modelled as a dedicated DT node.
>>>
>>> This series:
>>> - adds the qcom,ice phandle to the SDHCI binding and enforces the
>>>   qcom,ice vs embedded-reg modelling rule,
>>> - enables ICE for kodiak and monaco by wiring SDHC to the dedicated ICE
>>>   node,
>>> - adds interface clock and power-domain requirements for the ICE node in
>>>   affected DTS files.
>>
>> Konrad/Bjorn, could you please review and let me know for any comments.
> Thanks Konrad for review.
> Bjorn, can you please help in picking patch for v7.3-rc1.

I'm afraid you're unfamiliar with the release process and have
mismatched expectations. The feature development of 7.3 on
maintainer trees is done already and the RCs will only pull in
fixes to the new code.

After v7.3-rc1 is released (and we expect that to happen next
Sunday), for-next branches will be created atop it and maintainers
will be able to accept patches targetting v7.4

Konrad