Re: [PATCH] arm64: dts: qcom: eliza: Add PCIe PHY and controller nodes

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 6/26/26 5:15 PM, Abel Vesa wrote:
> On 26-06-26 09:46:03, Krishna Chaitanya Chundru wrote:
>>
>>
>> On 6/25/2026 3:42 PM, Abel Vesa wrote:
>>> On 26-06-10 17:40:09, Krishna Chaitanya Chundru wrote:
>>>> Eliza supports two PCIe instances: one 8GT/s x1 (PCIe0) and one 8GT/s x2
>>>> (PCIe1). Add PCIe controller and PHY nodes for both instances, and update
>>>> the GCC clock references to use the newly added PHY nodes instead of
>>>> placeholder zeros.
>>>>
>>>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
>>>> ---

[...]

>>> No pinctrl states?
>> As we are adding perst & wake gpio's in board specific file, it is better to
>> add the pincntrl also
>> there only.
> 
> I'll let Bjorn and Konrad reply, but most of the sm8*50.dtsi have
> them. Though some of the newer platforms moved them in the board dts.

Some folks argue (I believe purely ideologically) that the pin states
should be defined in the board DTSI, but I don't think we have a single
example of non-default routing in the many many years of linux-arm-msm,
so I think the reasonable decision is to keep them in the SoC DTSI.

Konrad