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* [PATCH] arm64: dts: qcom: sc8280xp: Flatten usb controller nodes
@ 2026-05-07 14:29 Xilin Wu
  2026-05-07 14:31 ` Bjorn Andersson
  0 siblings, 1 reply; 3+ messages in thread
From: Xilin Wu @ 2026-05-07 14:29 UTC (permalink / raw)
  To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley
  Cc: linux-arm-msm, devicetree, linux-kernel, Xilin Wu

Flatten usb controller nodes and update to using latest bindings
and flattened driver approach.

Signed-off-by: Xilin Wu <sophon@radxa.com>
---
 arch/arm64/boot/dts/qcom/sa8295p-adp.dts           |  12 +-
 arch/arm64/boot/dts/qcom/sa8540p-ride.dts          |   6 +-
 arch/arm64/boot/dts/qcom/sc8280xp-crd.dts          |  12 +-
 .../boot/dts/qcom/sc8280xp-huawei-gaokun3.dts      |  12 +-
 .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts     |  12 +-
 .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts    |  12 +-
 .../boot/dts/qcom/sc8280xp-microsoft-blackrock.dts |  18 +--
 arch/arm64/boot/dts/qcom/sc8280xp.dtsi             | 156 +++++++++------------
 8 files changed, 97 insertions(+), 143 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index d28d69162427..abd0f6a64b11 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -587,12 +587,10 @@ &ufs_card_phy {
 };
 
 &usb_0 {
-	status = "okay";
-};
-
-&usb_0_dwc3 {
 	/* TODO: Define USB-C connector properly */
 	dr_mode = "peripheral";
+
+	status = "okay";
 };
 
 &usb_0_hsphy {
@@ -611,12 +609,10 @@ &usb_0_qmpphy {
 };
 
 &usb_1 {
-	status = "okay";
-};
-
-&usb_1_dwc3 {
 	/* TODO: Define USB-C connector properly */
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_1_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index 44177e9b64b5..e794689f0777 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -462,11 +462,9 @@ &ufs_mem_phy {
 };
 
 &usb_0 {
-	status = "okay";
-};
-
-&usb_0_dwc3 {
 	dr_mode = "peripheral";
+
+	status = "okay";
 };
 
 &usb_0_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index c53e00cae465..3b624544b676 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -816,11 +816,9 @@ &ufs_mem_phy {
 };
 
 &usb_0 {
-	status = "okay";
-};
-
-&usb_0_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_0_dwc3_hs {
@@ -853,11 +851,9 @@ &usb_0_qmpphy_out {
 };
 
 &usb_1 {
-	status = "okay";
-};
-
-&usb_1_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
index 9819454abe13..dfc1341ccc5d 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
@@ -1129,11 +1129,9 @@ bluetooth {
 };
 
 &usb_0 {
-	status = "okay";
-};
-
-&usb_0_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_0_dwc3_hs {
@@ -1166,11 +1164,9 @@ &usb_0_qmpphy_out {
 };
 
 &usb_1 {
-	status = "okay";
-};
-
-&usb_1_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index d84ca010ab9d..a1e8e75fc553 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -1338,11 +1338,9 @@ bluetooth {
 };
 
 &usb_0 {
-	status = "okay";
-};
-
-&usb_0_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_0_dwc3_hs {
@@ -1376,11 +1374,9 @@ &usb_0_qmpphy_out {
 };
 
 &usb_1 {
-	status = "okay";
-};
-
-&usb_1_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
index f2b4470d4407..207c13adcb9d 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
@@ -755,11 +755,9 @@ embedded-controller {
 };
 
 &usb_0 {
-	status = "okay";
-};
-
-&usb_0_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_0_dwc3_hs {
@@ -792,11 +790,9 @@ &usb_0_qmpphy_out {
 };
 
 &usb_1 {
-	status = "okay";
-};
-
-&usb_1_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
index 00bbeeef6f14..0cfd69201cae 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
@@ -983,11 +983,9 @@ bluetooth {
 };
 
 &usb_0 {
-	status = "okay";
-};
-
-&usb_0_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_0_dwc3_hs {
@@ -1020,11 +1018,9 @@ &usb_0_qmpphy_out {
 };
 
 &usb_1 {
-	status = "okay";
-};
-
-&usb_1_dwc3 {
 	dr_mode = "host";
+
+	status = "okay";
 };
 
 &usb_1_dwc3_hs {
@@ -1060,12 +1056,10 @@ &usb_2 {
 	pinctrl-0 = <&usb2_en_state>;
 	pinctrl-names = "default";
 
-	status = "okay";
-};
-
-&usb_2_dwc3 {
 	phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>;
 	phy-names = "usb2-0", "usb3-0";
+
+	status = "okay";
 };
 
 &usb_2_hsphy0 {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 761f229e8f47..ecfc64d864fc 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -3940,12 +3940,9 @@ system-cache-controller@9200000 {
 			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		usb_2: usb@a4f8800 {
-			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";
-			reg = <0 0x0a4f8800 0 0x400>;
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
+		usb_2: usb@a400000 {
+			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3";
+			reg = <0 0x0a400000 0 0xfc100>;
 
 			clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
 				 <&gcc GCC_USB30_MP_MASTER_CLK>,
@@ -3963,7 +3960,8 @@ usb_2: usb@a4f8800 {
 					  <&gcc GCC_USB30_MP_MASTER_CLK>;
 			assigned-clock-rates = <19200000>, <200000000>;
 
-			interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+			interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+					      <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 					      <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
 					      <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,
 					      <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>,
@@ -3982,7 +3980,8 @@ usb_2: usb@a4f8800 {
 					      <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
 					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
 
-			interrupt-names = "pwr_event_1", "pwr_event_2",
+			interrupt-names = "dwc_usb3",
+					  "pwr_event_1", "pwr_event_2",
 					  "pwr_event_3", "pwr_event_4",
 					  "hs_phy_1",	 "hs_phy_2",
 					  "hs_phy_3",	 "hs_phy_4",
@@ -4003,33 +4002,25 @@ usb_2: usb@a4f8800 {
 
 			wakeup-source;
 
+			iommus = <&apps_smmu 0x800 0x0>;
+			phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,
+			       <&usb_2_hsphy1>, <&usb_2_qmpphy1>,
+			       <&usb_2_hsphy2>,
+			       <&usb_2_hsphy3>;
+			phy-names = "usb2-0", "usb3-0",
+				    "usb2-1", "usb3-1",
+				    "usb2-2",
+				    "usb2-3";
+			dr_mode = "host";
+			snps,dis-u1-entry-quirk;
+			snps,dis-u2-entry-quirk;
+
 			status = "disabled";
+		};
 
-			usb_2_dwc3: usb@a400000 {
-				compatible = "snps,dwc3";
-				reg = <0 0x0a400000 0 0xcd00>;
-				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
-				iommus = <&apps_smmu 0x800 0x0>;
-				phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,
-				       <&usb_2_hsphy1>, <&usb_2_qmpphy1>,
-				       <&usb_2_hsphy2>,
-				       <&usb_2_hsphy3>;
-				phy-names = "usb2-0", "usb3-0",
-					    "usb2-1", "usb3-1",
-					    "usb2-2",
-					    "usb2-3";
-				dr_mode = "host";
-				snps,dis-u1-entry-quirk;
-				snps,dis-u2-entry-quirk;
-			};
-		};
-
-		usb_0: usb@a6f8800 {
-			compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";
-			reg = <0 0x0a6f8800 0 0x400>;
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
+		usb_0: usb@a600000 {
+			compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3";
+			reg = <0 0x0a600000 0 0xfc100>;
 
 			clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
 				 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
@@ -4047,12 +4038,14 @@ usb_0: usb@a6f8800 {
 					  <&gcc GCC_USB30_PRIM_MASTER_CLK>;
 			assigned-clock-rates = <19200000>, <200000000>;
 
-			interrupts-extended = <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
+			interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>,
+					      <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
 					      <&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>,
 					      <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 138 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "pwr_event",
+			interrupt-names = "dwc_usb3",
+					  "pwr_event",
 					  "hs_phy_irq",
 					  "dp_hs_phy_irq",
 					  "dm_hs_phy_irq",
@@ -4069,46 +4062,38 @@ usb_0: usb@a6f8800 {
 
 			wakeup-source;
 
-			status = "disabled";
+			iommus = <&apps_smmu 0x820 0x0>;
+			phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
+			phy-names = "usb2-phy", "usb3-phy";
+			snps,dis-u1-entry-quirk;
+			snps,dis-u2-entry-quirk;
 
-			usb_0_dwc3: usb@a600000 {
-				compatible = "snps,dwc3";
-				reg = <0 0x0a600000 0 0xcd00>;
-				interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
-				iommus = <&apps_smmu 0x820 0x0>;
-				phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
-				phy-names = "usb2-phy", "usb3-phy";
-				snps,dis-u1-entry-quirk;
-				snps,dis-u2-entry-quirk;
+			status = "disabled";
 
-				ports {
-					#address-cells = <1>;
-					#size-cells = <0>;
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
 
-					port@0 {
-						reg = <0>;
+				port@0 {
+					reg = <0>;
 
-						usb_0_dwc3_hs: endpoint {
-						};
+					usb_0_dwc3_hs: endpoint {
 					};
+				};
 
-					port@1 {
-						reg = <1>;
+				port@1 {
+					reg = <1>;
 
-						usb_0_dwc3_ss: endpoint {
-							remote-endpoint = <&usb_0_qmpphy_usb_ss_in>;
-						};
+					usb_0_dwc3_ss: endpoint {
+						remote-endpoint = <&usb_0_qmpphy_usb_ss_in>;
 					};
 				};
 			};
 		};
 
-		usb_1: usb@a8f8800 {
-			compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";
-			reg = <0 0x0a8f8800 0 0x400>;
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
+		usb_1: usb@a800000 {
+			compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3";
+			reg = <0 0x0a800000 0 0xfc100>;
 
 			clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
 				 <&gcc GCC_USB30_SEC_MASTER_CLK>,
@@ -4126,12 +4111,14 @@ usb_1: usb@a8f8800 {
 					  <&gcc GCC_USB30_SEC_MASTER_CLK>;
 			assigned-clock-rates = <19200000>, <200000000>;
 
-			interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
+			interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>,
+					      <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
 					      <&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
 					      <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
 					      <&pdc 136 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "pwr_event",
+			interrupt-names = "dwc_usb3",
+					  "pwr_event",
 					  "hs_phy_irq",
 					  "dp_hs_phy_irq",
 					  "dm_hs_phy_irq",
@@ -4148,35 +4135,30 @@ usb_1: usb@a8f8800 {
 
 			wakeup-source;
 
-			status = "disabled";
+			iommus = <&apps_smmu 0x860 0x0>;
+			phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
+			phy-names = "usb2-phy", "usb3-phy";
+			snps,dis-u1-entry-quirk;
+			snps,dis-u2-entry-quirk;
 
-			usb_1_dwc3: usb@a800000 {
-				compatible = "snps,dwc3";
-				reg = <0 0x0a800000 0 0xcd00>;
-				interrupts = <GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>;
-				iommus = <&apps_smmu 0x860 0x0>;
-				phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
-				phy-names = "usb2-phy", "usb3-phy";
-				snps,dis-u1-entry-quirk;
-				snps,dis-u2-entry-quirk;
+			status = "disabled";
 
-				ports {
-					#address-cells = <1>;
-					#size-cells = <0>;
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
 
-					port@0 {
-						reg = <0>;
+				port@0 {
+					reg = <0>;
 
-						usb_1_dwc3_hs: endpoint {
-						};
+					usb_1_dwc3_hs: endpoint {
 					};
+				};
 
-					port@1 {
-						reg = <1>;
+				port@1 {
+					reg = <1>;
 
-						usb_1_dwc3_ss: endpoint {
-							remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
-						};
+					usb_1_dwc3_ss: endpoint {
+						remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
 					};
 				};
 			};

---
base-commit: 735d2f48cadaa9a87e7c7601667878de70c771c5
change-id: 20260507-sc8280xp-flatten-dwc3-2151039b64ba

Best regards,
--  
Xilin Wu <sophon@radxa.com>


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] arm64: dts: qcom: sc8280xp: Flatten usb controller nodes
  2026-05-07 14:29 [PATCH] arm64: dts: qcom: sc8280xp: Flatten usb controller nodes Xilin Wu
@ 2026-05-07 14:31 ` Bjorn Andersson
  2026-05-07 14:41   ` Xilin Wu
  0 siblings, 1 reply; 3+ messages in thread
From: Bjorn Andersson @ 2026-05-07 14:31 UTC (permalink / raw)
  To: Xilin Wu
  Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	linux-arm-msm, devicetree, linux-kernel

On Thu, May 07, 2026 at 10:29:24PM +0800, Xilin Wu wrote:
> Flatten usb controller nodes and update to using latest bindings
> and flattened driver approach.
> 

Can you please confirm that we survive a system suspend cycle with this?

Also, start your commit message with describing the problem you're
solving, not by describing an action.

Regards,
Bjorn

> Signed-off-by: Xilin Wu <sophon@radxa.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8295p-adp.dts           |  12 +-
>  arch/arm64/boot/dts/qcom/sa8540p-ride.dts          |   6 +-
>  arch/arm64/boot/dts/qcom/sc8280xp-crd.dts          |  12 +-
>  .../boot/dts/qcom/sc8280xp-huawei-gaokun3.dts      |  12 +-
>  .../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts     |  12 +-
>  .../boot/dts/qcom/sc8280xp-microsoft-arcata.dts    |  12 +-
>  .../boot/dts/qcom/sc8280xp-microsoft-blackrock.dts |  18 +--
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi             | 156 +++++++++------------
>  8 files changed, 97 insertions(+), 143 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> index d28d69162427..abd0f6a64b11 100644
> --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
> @@ -587,12 +587,10 @@ &ufs_card_phy {
>  };
>  
>  &usb_0 {
> -	status = "okay";
> -};
> -
> -&usb_0_dwc3 {
>  	/* TODO: Define USB-C connector properly */
>  	dr_mode = "peripheral";
> +
> +	status = "okay";
>  };
>  
>  &usb_0_hsphy {
> @@ -611,12 +609,10 @@ &usb_0_qmpphy {
>  };
>  
>  &usb_1 {
> -	status = "okay";
> -};
> -
> -&usb_1_dwc3 {
>  	/* TODO: Define USB-C connector properly */
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_1_hsphy {
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> index 44177e9b64b5..e794689f0777 100644
> --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> @@ -462,11 +462,9 @@ &ufs_mem_phy {
>  };
>  
>  &usb_0 {
> -	status = "okay";
> -};
> -
> -&usb_0_dwc3 {
>  	dr_mode = "peripheral";
> +
> +	status = "okay";
>  };
>  
>  &usb_0_hsphy {
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> index c53e00cae465..3b624544b676 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> @@ -816,11 +816,9 @@ &ufs_mem_phy {
>  };
>  
>  &usb_0 {
> -	status = "okay";
> -};
> -
> -&usb_0_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_0_dwc3_hs {
> @@ -853,11 +851,9 @@ &usb_0_qmpphy_out {
>  };
>  
>  &usb_1 {
> -	status = "okay";
> -};
> -
> -&usb_1_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_1_dwc3_hs {
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
> index 9819454abe13..dfc1341ccc5d 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
> @@ -1129,11 +1129,9 @@ bluetooth {
>  };
>  
>  &usb_0 {
> -	status = "okay";
> -};
> -
> -&usb_0_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_0_dwc3_hs {
> @@ -1166,11 +1164,9 @@ &usb_0_qmpphy_out {
>  };
>  
>  &usb_1 {
> -	status = "okay";
> -};
> -
> -&usb_1_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_1_dwc3_hs {
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> index d84ca010ab9d..a1e8e75fc553 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> @@ -1338,11 +1338,9 @@ bluetooth {
>  };
>  
>  &usb_0 {
> -	status = "okay";
> -};
> -
> -&usb_0_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_0_dwc3_hs {
> @@ -1376,11 +1374,9 @@ &usb_0_qmpphy_out {
>  };
>  
>  &usb_1 {
> -	status = "okay";
> -};
> -
> -&usb_1_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_1_dwc3_hs {
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
> index f2b4470d4407..207c13adcb9d 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
> @@ -755,11 +755,9 @@ embedded-controller {
>  };
>  
>  &usb_0 {
> -	status = "okay";
> -};
> -
> -&usb_0_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_0_dwc3_hs {
> @@ -792,11 +790,9 @@ &usb_0_qmpphy_out {
>  };
>  
>  &usb_1 {
> -	status = "okay";
> -};
> -
> -&usb_1_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_1_dwc3_hs {
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
> index 00bbeeef6f14..0cfd69201cae 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
> @@ -983,11 +983,9 @@ bluetooth {
>  };
>  
>  &usb_0 {
> -	status = "okay";
> -};
> -
> -&usb_0_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_0_dwc3_hs {
> @@ -1020,11 +1018,9 @@ &usb_0_qmpphy_out {
>  };
>  
>  &usb_1 {
> -	status = "okay";
> -};
> -
> -&usb_1_dwc3 {
>  	dr_mode = "host";
> +
> +	status = "okay";
>  };
>  
>  &usb_1_dwc3_hs {
> @@ -1060,12 +1056,10 @@ &usb_2 {
>  	pinctrl-0 = <&usb2_en_state>;
>  	pinctrl-names = "default";
>  
> -	status = "okay";
> -};
> -
> -&usb_2_dwc3 {
>  	phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>;
>  	phy-names = "usb2-0", "usb3-0";
> +
> +	status = "okay";
>  };
>  
>  &usb_2_hsphy0 {
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 761f229e8f47..ecfc64d864fc 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -3940,12 +3940,9 @@ system-cache-controller@9200000 {
>  			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
>  		};
>  
> -		usb_2: usb@a4f8800 {
> -			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";
> -			reg = <0 0x0a4f8800 0 0x400>;
> -			#address-cells = <2>;
> -			#size-cells = <2>;
> -			ranges;
> +		usb_2: usb@a400000 {
> +			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3";
> +			reg = <0 0x0a400000 0 0xfc100>;
>  
>  			clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
>  				 <&gcc GCC_USB30_MP_MASTER_CLK>,
> @@ -3963,7 +3960,8 @@ usb_2: usb@a4f8800 {
>  					  <&gcc GCC_USB30_MP_MASTER_CLK>;
>  			assigned-clock-rates = <19200000>, <200000000>;
>  
> -			interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> +			interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>,
> @@ -3982,7 +3980,8 @@ usb_2: usb@a4f8800 {
>  					      <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
>  
> -			interrupt-names = "pwr_event_1", "pwr_event_2",
> +			interrupt-names = "dwc_usb3",
> +					  "pwr_event_1", "pwr_event_2",
>  					  "pwr_event_3", "pwr_event_4",
>  					  "hs_phy_1",	 "hs_phy_2",
>  					  "hs_phy_3",	 "hs_phy_4",
> @@ -4003,33 +4002,25 @@ usb_2: usb@a4f8800 {
>  
>  			wakeup-source;
>  
> +			iommus = <&apps_smmu 0x800 0x0>;
> +			phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,
> +			       <&usb_2_hsphy1>, <&usb_2_qmpphy1>,
> +			       <&usb_2_hsphy2>,
> +			       <&usb_2_hsphy3>;
> +			phy-names = "usb2-0", "usb3-0",
> +				    "usb2-1", "usb3-1",
> +				    "usb2-2",
> +				    "usb2-3";
> +			dr_mode = "host";
> +			snps,dis-u1-entry-quirk;
> +			snps,dis-u2-entry-quirk;
> +
>  			status = "disabled";
> +		};
>  
> -			usb_2_dwc3: usb@a400000 {
> -				compatible = "snps,dwc3";
> -				reg = <0 0x0a400000 0 0xcd00>;
> -				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> -				iommus = <&apps_smmu 0x800 0x0>;
> -				phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,
> -				       <&usb_2_hsphy1>, <&usb_2_qmpphy1>,
> -				       <&usb_2_hsphy2>,
> -				       <&usb_2_hsphy3>;
> -				phy-names = "usb2-0", "usb3-0",
> -					    "usb2-1", "usb3-1",
> -					    "usb2-2",
> -					    "usb2-3";
> -				dr_mode = "host";
> -				snps,dis-u1-entry-quirk;
> -				snps,dis-u2-entry-quirk;
> -			};
> -		};
> -
> -		usb_0: usb@a6f8800 {
> -			compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";
> -			reg = <0 0x0a6f8800 0 0x400>;
> -			#address-cells = <2>;
> -			#size-cells = <2>;
> -			ranges;
> +		usb_0: usb@a600000 {
> +			compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3";
> +			reg = <0 0x0a600000 0 0xfc100>;
>  
>  			clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
>  				 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
> @@ -4047,12 +4038,14 @@ usb_0: usb@a6f8800 {
>  					  <&gcc GCC_USB30_PRIM_MASTER_CLK>;
>  			assigned-clock-rates = <19200000>, <200000000>;
>  
> -			interrupts-extended = <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
> +			interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&pdc 14 IRQ_TYPE_EDGE_BOTH>,
>  					      <&pdc 15 IRQ_TYPE_EDGE_BOTH>,
>  					      <&pdc 138 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "pwr_event",
> +			interrupt-names = "dwc_usb3",
> +					  "pwr_event",
>  					  "hs_phy_irq",
>  					  "dp_hs_phy_irq",
>  					  "dm_hs_phy_irq",
> @@ -4069,46 +4062,38 @@ usb_0: usb@a6f8800 {
>  
>  			wakeup-source;
>  
> -			status = "disabled";
> +			iommus = <&apps_smmu 0x820 0x0>;
> +			phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
> +			phy-names = "usb2-phy", "usb3-phy";
> +			snps,dis-u1-entry-quirk;
> +			snps,dis-u2-entry-quirk;
>  
> -			usb_0_dwc3: usb@a600000 {
> -				compatible = "snps,dwc3";
> -				reg = <0 0x0a600000 0 0xcd00>;
> -				interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
> -				iommus = <&apps_smmu 0x820 0x0>;
> -				phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
> -				phy-names = "usb2-phy", "usb3-phy";
> -				snps,dis-u1-entry-quirk;
> -				snps,dis-u2-entry-quirk;
> +			status = "disabled";
>  
> -				ports {
> -					#address-cells = <1>;
> -					#size-cells = <0>;
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
>  
> -					port@0 {
> -						reg = <0>;
> +				port@0 {
> +					reg = <0>;
>  
> -						usb_0_dwc3_hs: endpoint {
> -						};
> +					usb_0_dwc3_hs: endpoint {
>  					};
> +				};
>  
> -					port@1 {
> -						reg = <1>;
> +				port@1 {
> +					reg = <1>;
>  
> -						usb_0_dwc3_ss: endpoint {
> -							remote-endpoint = <&usb_0_qmpphy_usb_ss_in>;
> -						};
> +					usb_0_dwc3_ss: endpoint {
> +						remote-endpoint = <&usb_0_qmpphy_usb_ss_in>;
>  					};
>  				};
>  			};
>  		};
>  
> -		usb_1: usb@a8f8800 {
> -			compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";
> -			reg = <0 0x0a8f8800 0 0x400>;
> -			#address-cells = <2>;
> -			#size-cells = <2>;
> -			ranges;
> +		usb_1: usb@a800000 {
> +			compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3";
> +			reg = <0 0x0a800000 0 0xfc100>;
>  
>  			clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
>  				 <&gcc GCC_USB30_SEC_MASTER_CLK>,
> @@ -4126,12 +4111,14 @@ usb_1: usb@a8f8800 {
>  					  <&gcc GCC_USB30_SEC_MASTER_CLK>;
>  			assigned-clock-rates = <19200000>, <200000000>;
>  
> -			interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
> +			interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>,
> +					      <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
>  					      <&pdc 12 IRQ_TYPE_EDGE_BOTH>,
>  					      <&pdc 13 IRQ_TYPE_EDGE_BOTH>,
>  					      <&pdc 136 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "pwr_event",
> +			interrupt-names = "dwc_usb3",
> +					  "pwr_event",
>  					  "hs_phy_irq",
>  					  "dp_hs_phy_irq",
>  					  "dm_hs_phy_irq",
> @@ -4148,35 +4135,30 @@ usb_1: usb@a8f8800 {
>  
>  			wakeup-source;
>  
> -			status = "disabled";
> +			iommus = <&apps_smmu 0x860 0x0>;
> +			phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> +			phy-names = "usb2-phy", "usb3-phy";
> +			snps,dis-u1-entry-quirk;
> +			snps,dis-u2-entry-quirk;
>  
> -			usb_1_dwc3: usb@a800000 {
> -				compatible = "snps,dwc3";
> -				reg = <0 0x0a800000 0 0xcd00>;
> -				interrupts = <GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>;
> -				iommus = <&apps_smmu 0x860 0x0>;
> -				phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> -				phy-names = "usb2-phy", "usb3-phy";
> -				snps,dis-u1-entry-quirk;
> -				snps,dis-u2-entry-quirk;
> +			status = "disabled";
>  
> -				ports {
> -					#address-cells = <1>;
> -					#size-cells = <0>;
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
>  
> -					port@0 {
> -						reg = <0>;
> +				port@0 {
> +					reg = <0>;
>  
> -						usb_1_dwc3_hs: endpoint {
> -						};
> +					usb_1_dwc3_hs: endpoint {
>  					};
> +				};
>  
> -					port@1 {
> -						reg = <1>;
> +				port@1 {
> +					reg = <1>;
>  
> -						usb_1_dwc3_ss: endpoint {
> -							remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
> -						};
> +					usb_1_dwc3_ss: endpoint {
> +						remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
>  					};
>  				};
>  			};
> 
> ---
> base-commit: 735d2f48cadaa9a87e7c7601667878de70c771c5
> change-id: 20260507-sc8280xp-flatten-dwc3-2151039b64ba
> 
> Best regards,
> --  
> Xilin Wu <sophon@radxa.com>
> 

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] arm64: dts: qcom: sc8280xp: Flatten usb controller nodes
  2026-05-07 14:31 ` Bjorn Andersson
@ 2026-05-07 14:41   ` Xilin Wu
  0 siblings, 0 replies; 3+ messages in thread
From: Xilin Wu @ 2026-05-07 14:41 UTC (permalink / raw)
  To: Bjorn Andersson
  Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
	linux-arm-msm, devicetree, linux-kernel

On 5/7/2026 10:31 PM, Bjorn Andersson wrote:
> On Thu, May 07, 2026 at 10:29:24PM +0800, Xilin Wu wrote:
>> Flatten usb controller nodes and update to using latest bindings
>> and flattened driver approach.
>>
> 
> Can you please confirm that we survive a system suspend cycle with this?
> 

In my testing, s2idle works fine. The testing is being done with 
clk_ignore_unused though.

> Also, start your commit message with describing the problem you're
> solving, not by describing an action.
> 

Thanks for reminding me. I will fix the commit message in the next revision.

> Regards,
> Bjorn
> 



-- 
Best regards,
Xilin Wu <sophon@radxa.com>


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2026-05-07 14:41 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2026-05-07 14:29 [PATCH] arm64: dts: qcom: sc8280xp: Flatten usb controller nodes Xilin Wu
2026-05-07 14:31 ` Bjorn Andersson
2026-05-07 14:41   ` Xilin Wu

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