[PATCH v2 0/2] ARM: dts: renesas: r9a06g032-rzn1d400: GPIO updates

[PATCH v2 0/2] ARM: dts: renesas: r9a06g032-rzn1d400: GPIO updates

[Wolfram Sang]

While adding support for the GPIOs on CN12, I found a small cleanup
first. Here is the series.


Wolfram Sang (2):
  ARM: dts: renesas: r9a06g032-rzn1d400: don't enable gpiochips which
    are always on
  ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

 .../boot/dts/renesas/r9a06g032-rzn1d400-db.dts   |  1 -
 .../boot/dts/renesas/r9a06g032-rzn1d400-eb.dts   | 16 ++++++++++++++--
 2 files changed, 14 insertions(+), 3 deletions(-)

-- 
2.47.3

[PATCH v2 1/2] ARM: dts: renesas: r9a06g032-rzn1d400: don't enable gpiochips which are always on

[Wolfram Sang]

gpiochips are always enabled, no need to enable them explicitly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---

Changes since v1:
* new patch

 arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts | 1 -
 arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts | 4 ----
 2 files changed, 5 deletions(-)

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 5626d7fd6c3e..49f2def1bb12 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -194,7 +194,6 @@ &gpioirqmux {
 &gpio2 {
 	pinctrl-0 = <&pins_gpio2>;
 	pinctrl-names = "default";
-	status = "okay";
 };
 
 &i2c2 {
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
index ead379988fb1..303b5926d8d1 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
@@ -53,10 +53,6 @@ led@1 {
 	};
 };
 
-&gpio2 {
-	status = "okay";
-};
-
 &i2c2 {
 	/* Sensors are different across revisions. All are LM75B compatible */
 	sensor@49 {
-- 
2.47.3

Re: [PATCH v2 1/2] ARM: dts: renesas: r9a06g032-rzn1d400: don't enable gpiochips which are always on

[Geert Uytterhoeven]

On Thu, 16 Jul 2026 at 11:59, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> gpiochips are always enabled, no need to enable them explicitly.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v7.4.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

[Wolfram Sang]

CN12 offers some GPIOs independently of switch settings. Add the nodes.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---

Changes since v1:
* dropped setting 'status' to 'okay'

 .../boot/dts/renesas/r9a06g032-rzn1d400-eb.dts   | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
index 303b5926d8d1..e6c064bc49c8 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
@@ -53,6 +53,11 @@ led@1 {
 	};
 };
 
+&gpio2b {
+	pinctrl-0 = <&pins_gpio2b>;
+	pinctrl-names = "default";
+};
+
 &i2c2 {
 	/* Sensors are different across revisions. All are LM75B compatible */
 	sensor@49 {
@@ -132,6 +137,17 @@ pins_eth2: pins-eth2 {
 		bias-disable;
 	};
 
+	pins_gpio2b: pins-gpio2b {
+		pinmux = <RZN1_PINMUX(164, RZN1_FUNC_GPIO)>,
+			 <RZN1_PINMUX(165, RZN1_FUNC_GPIO)>,
+			 <RZN1_PINMUX(166, RZN1_FUNC_GPIO)>,
+			 <RZN1_PINMUX(167, RZN1_FUNC_GPIO)>,
+			 <RZN1_PINMUX(168, RZN1_FUNC_GPIO)>,
+			 <RZN1_PINMUX(169, RZN1_FUNC_GPIO)>;
+		drive-strength = <6>;
+		bias-disable;
+	};
+
 	pins_mdio0: pins-mdio0 {
 		pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>,
 			 <RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>;
-- 
2.47.3

Re: [PATCH v2 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The `pinctrl-0` and `pinctrl-names` properties are placed on the `&gpio2b` child node, where they are silently ignored and violate the DT schema.
--

--- Patch [2]: [PATCH v2 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12 ---
commit 273d06c90b129bacc41e41473c190af6105d730d
Author: Wolfram Sang <wsa+renesas@sang-engineering.com>

ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

This patch adds device tree nodes to enable some GPIOs available on the
CN12 connector independently of switch settings.

> diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
> index 303b5926d8d17..e6c064bc49c8e 100644
> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts

[ ... ]

> @@ -53,6 +53,11 @@ led@1 {
>  	};
>  };
>  
> +&gpio2b {
> +	pinctrl-0 = <&pins_gpio2b>;
> +	pinctrl-names = "default";
> +};

[Severity: Medium]
Will these pinctrl settings actually be applied here?

The gpio-dwapb driver parses its child nodes using
device_for_each_child_node_scoped(), but they are not registered as
independent platform devices. Since the Linux driver core only invokes
pinctrl_bind_pins() for devices bound to a driver, won't placing
pinctrl-0 on the &gpio2b child node cause it to be silently ignored and
fail DT schema validation?

Should these properties be placed in the parent &gpio2 node instead?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260716095935.13329-4-wsa+renesas@sang-engineering.com?part=2

Re: [PATCH v2 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

[Wolfram Sang]

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> [Severity: Medium]
> Will these pinctrl settings actually be applied here?

Yes, see reasoning in v1.

> Should these properties be placed in the parent &gpio2 node instead?

No, it obviously works.


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Re: [PATCH v2 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

[Geert Uytterhoeven]

Hi Wolfram,

On Thu, 16 Jul 2026 at 11:59, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> CN12 offers some GPIOs independently of switch settings. Add the nodes.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thanks for your patch!

> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
> @@ -53,6 +53,11 @@ led@1 {
>         };
>  };
>
> +&gpio2b {
> +       pinctrl-0 = <&pins_gpio2b>;
> +       pinctrl-names = "default";
> +};
> +
>  &i2c2 {
>         /* Sensors are different across revisions. All are LM75B compatible */
>         sensor@49 {
> @@ -132,6 +137,17 @@ pins_eth2: pins-eth2 {
>                 bias-disable;
>         };
>
> +       pins_gpio2b: pins-gpio2b {

pins-cn12?

> +               pinmux = <RZN1_PINMUX(164, RZN1_FUNC_GPIO)>,
> +                        <RZN1_PINMUX(165, RZN1_FUNC_GPIO)>,
> +                        <RZN1_PINMUX(166, RZN1_FUNC_GPIO)>,
> +                        <RZN1_PINMUX(167, RZN1_FUNC_GPIO)>,
> +                        <RZN1_PINMUX(168, RZN1_FUNC_GPIO)>,
> +                        <RZN1_PINMUX(169, RZN1_FUNC_GPIO)>;
> +               drive-strength = <6>;
> +               bias-disable;

These pins don't have any external pull-ups, so disabling bias will
make them pick-up random EM noise when left unconnected.

> +       };
> +
>         pins_mdio0: pins-mdio0 {
>                 pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>,
>                          <RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>;

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 886 bytes --]

> > +       pins_gpio2b: pins-gpio2b {
> 
> pins-cn12?

Okay.

> > +               pinmux = <RZN1_PINMUX(164, RZN1_FUNC_GPIO)>,
> > +                        <RZN1_PINMUX(165, RZN1_FUNC_GPIO)>,
> > +                        <RZN1_PINMUX(166, RZN1_FUNC_GPIO)>,
> > +                        <RZN1_PINMUX(167, RZN1_FUNC_GPIO)>,
> > +                        <RZN1_PINMUX(168, RZN1_FUNC_GPIO)>,
> > +                        <RZN1_PINMUX(169, RZN1_FUNC_GPIO)>;
> > +               drive-strength = <6>;
> > +               bias-disable;
> 
> These pins don't have any external pull-ups, so disabling bias will
> make them pick-up random EM noise when left unconnected.

Can fix, but is this bad? I'd assume the connected pins will handle it.
And if not, the DT needs to be adapted to that use case. Otherwise, a
default pull-up needs to be disabled for another use case.


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Re: [PATCH v2 2/2] ARM: dts: renesas: r9a06g032-rzn1d400-eb: enable GPIOs on CN12

[Geert Uytterhoeven]

Hi Wolfram,

On Tue, 11 Aug 2026 at 03:51, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > > +       pins_gpio2b: pins-gpio2b {
> >
> > pins-cn12?
>
> Okay.
>
> > > +               pinmux = <RZN1_PINMUX(164, RZN1_FUNC_GPIO)>,
> > > +                        <RZN1_PINMUX(165, RZN1_FUNC_GPIO)>,
> > > +                        <RZN1_PINMUX(166, RZN1_FUNC_GPIO)>,
> > > +                        <RZN1_PINMUX(167, RZN1_FUNC_GPIO)>,
> > > +                        <RZN1_PINMUX(168, RZN1_FUNC_GPIO)>,
> > > +                        <RZN1_PINMUX(169, RZN1_FUNC_GPIO)>;
> > > +               drive-strength = <6>;
> > > +               bias-disable;
> >
> > These pins don't have any external pull-ups, so disabling bias will
> > make them pick-up random EM noise when left unconnected.
>
> Can fix, but is this bad? I'd assume the connected pins will handle it.
> And if not, the DT needs to be adapted to that use case. Otherwise, a
> default pull-up needs to be disabled for another use case.

Currently, nothing is connected to these pins. Unconnected CMOS
inputs must never be left floating, as that can cause oscillations
and increased power consumption.

Default I/O configuration is "2’b01: Pull up (default value)" for bias.

While at it, why did you lower drive strength from the "2’b10: 8 mA
(default value)" 6 mA?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds