Re: [PATCH 5/8] i3c: mipi-i3c-hci: Add support for the AST2700 I3C controller

[Frank Li <Frank.li@oss.nxp.com>]

On Tue, Sep 01, 2026 at 07:35:32PM +0800, Billy Tsai wrote:
> The AST2700 I3C controller carries an ASPEED vendor extended
> capability describing an in-house control block and a PHY programming
> window. Recognize the ASPEED MIPI vendor ID in the extended capability
> parser and cache both register bases via the generic vendor_data
> pointer, which other vendors (e.g. NXP) also populate; add is_aspeed()
> to identify ASPEED specifically.
>
> Bringing the controller up for transfers needs more than the generic
> HCI reset sequence: the vendor block has to be switched to master
> mode, PHY timing registers programmed from the selected bus rates
> (with aspeed,* device tree properties to override values derived under
> nominal bus loading), and all interrupts funneled through a vendor
> summary register whose handler dispatches to the same core and IO
> handlers as the generic path. Master clock stall is enabled alongside
> master-mode init so an underrun pauses and resumes the transfer
> instead of aborting it. Hook this initialization into bus setup and
> resume behind is_aspeed(), and acquire the core clock and reset-names
> resources the binding describes for it.
>
> During normal operation, the vendor DAA index registers must be told
> which DAT slot is being assigned during ENTDAA, and the PIO/IBI FIFOs
> need resetting after a DMA error or abort — which the core already
> implements behind HCI_QUIRK_DMA_ABORT_REQUIRES_PIO_RESET, so set that
> quirk rather than open-coding a separate recovery path.
>
> With the required support in place, make the "aspeed,ast2700-i3c-hci"
> compatible matchable with the DAT_INDEX_IS_ADDR, DMA_64BIT,
> DMA_ABORT_REQUIRES_PIO_RESET and TX_START_THLD quirks, and set
> is_aspeed() from the same compatible.
>
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> Assisted-by: Claude:claude-fable-5
> ---
>  drivers/i3c/master/mipi-i3c-hci/Makefile        |   2 +-
>  drivers/i3c/master/mipi-i3c-hci/cmd_v1.c        |  21 +++
>  drivers/i3c/master/mipi-i3c-hci/core.c          | 175 ++++++++++++++++--
>  drivers/i3c/master/mipi-i3c-hci/ext_caps.c      |  15 ++
>  drivers/i3c/master/mipi-i3c-hci/ext_caps.h      |   1 +
>  drivers/i3c/master/mipi-i3c-hci/vendor_aspeed.c | 234 ++++++++++++++++++++++++
>  drivers/i3c/master/mipi-i3c-hci/vendor_aspeed.h | 174 ++++++++++++++++++

needn't "vendor"

>  7 files changed, 606 insertions(+), 16 deletions(-)
>
...
> +++ b/drivers/i3c/master/mipi-i3c-hci/vendor_aspeed.h
> @@ -0,0 +1,174 @@
> +/* SPDX-License-Identifier: BSD-3-Clause */
> +/*
> + * Copyright (c) 2026 ASPEED Technology Inc.
> + *
> + * AST2700 specific MIPI I3C HCI definitions
> + */
> +
> +#ifndef VENDOR_ASPEED_H
> +#define VENDOR_ASPEED_H
> +
> +#include <linux/bitfield.h>
> +#include <linux/of.h>
> +
> +#include "ext_caps.h"
> +
> +struct clk;
> +struct reset_control;
> +
> +/*
> + * The AST2700 vendor extended capability points to an in-house control
> + * block and a PHY programming window inside the controller's register
> + * space. The core clock and reset lines are only specified in the
> + * AST2700 binding as well. All of it is ASPEED-specific, so it is kept
> + * out of the generic struct i3c_hci and reached instead through its
> + * vendor_data pointer.
> + */
> +struct aspeed_i3c_vendor_data {
> +	void __iomem *inhouse_regs;
> +	void __iomem *phy_regs;
> +	struct reset_control *rst;
> +	struct reset_control *dma_rst;
> +	struct clk *clk;
> +};

should be in aspeed.c

> +
> +/*
> + * hci->master.dev.of_node is only valid once i3c_master_register() has
> + * run device_set_node() on it; probe() pre-populates it before that
> + * point (see i3c_hci_probe()) so this works from early init onward too.
> + */
> +static inline bool is_aspeed(struct i3c_hci *hci)
> +{
> +	return of_device_is_compatible(hci->master.dev.of_node,
> +					"aspeed,ast2700-i3c-hci");
> +}

Don't suggest is_aspeed(), you split each feature and use drvdata like
previous QUIRK.

It will become complex if new chip appear, such aspeed,ast2800-i3c-hci,

Frank