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From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>,
	Jingyi Wang <jingyi.wang@oss.qualcomm.com>,
	Abel Vesa <abel.vesa@oss.qualcomm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@arm.com>,
	James Clark <james.clark@linaro.org>, Leo Yan <leo.yan@arm.com>,
	Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>,
	Abel Vesa <abelvesa@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 1/5] dt-bindings: arm: coresight-tnoc: Drop arm,primecell to bind on platform bus
Date: Thu, 9 Jul 2026 17:02:04 +0800	[thread overview]
Message-ID: <c120ec84-c125-4dec-945a-da12624d82e7@oss.qualcomm.com> (raw)
In-Reply-To: <02baada9-3f87-4e60-a469-44af5ebe1afe@kernel.org>



On 7/9/2026 4:46 PM, Krzysztof Kozlowski wrote:
> On 09/07/2026 10:34, Jie Gan wrote:
>>
>>
>> On 7/9/2026 3:59 PM, Krzysztof Kozlowski wrote:
>>> On Tue, Jul 07, 2026 at 05:08:49PM +0800, Jie Gan wrote:
>>>> The TNOC compatible previously required the two-string AMBA form
>>>> "qcom,coresight-tnoc", "arm,primecell", which forces the device onto the
>>>> AMBA bus.
>>>>
>>>> Change the compatible to a single "qcom,coresight-tnoc" string with no
>>>> "arm,primecell" entry, so the device is created on the platform bus and
>>>> bound by the platform driver through its compatible string.
>>>
>>> I asked already: this is not a valid reason. References to Linux
>>> structures are not correct here. If this is your reason, then answer is:
>>> fix drivers, by renaming or doing whatever is necessary to platform bus
>>> to behave like amba bus.
>>
>> The issue is that we are not allowed to introduce a DT property to
>> bypass the AMBA bus validation, which reads the Component ID (CID)
> 
> It is the first time "bypass the AMBU bus validation" appears in this
> patch. You do not see that as a problem?
> 
> Again, third time and the last: describe the actual hardware and the
> actual problem coming from the hardware.

Understood, will focus on describe the hardware and the hardware issue.

Commit message description updated like below:

The Aggregator TraceNoC hardware exposes CID registers, but the 
Component ID value read from those registers is 0 instead of a valid 
AMBA Component ID. As a result, the device cannot be identified by the 
AMBA bus and is not discovered as an AMBA device.

Since the hardware does not provide a valid AMBA identification, 
describe the Aggregator TraceNoC using a dedicated compatible string and 
bind it to the existing platform driver.

Thanks,
Jie

> 
> Best regards,
> Krzysztof


  reply	other threads:[~2026-07-09  9:02 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-07  9:08 [PATCH v5 0/5] Fix traceNoC probe issue on multiple QCOM platforms Jie Gan
2026-07-07  9:08 ` [PATCH v5 1/5] dt-bindings: arm: coresight-tnoc: Drop arm,primecell to bind on platform bus Jie Gan
2026-07-07  9:22   ` sashiko-bot
2026-07-09  7:59   ` Krzysztof Kozlowski
2026-07-09  8:34     ` Jie Gan
2026-07-09  8:46       ` Krzysztof Kozlowski
2026-07-09  9:02         ` Jie Gan [this message]
2026-07-09  9:17           ` Krzysztof Kozlowski
2026-07-07  9:08 ` [PATCH v5 2/5] coresight: tnoc: Bind Aggregator TNOC on the " Jie Gan
2026-07-07  9:22   ` sashiko-bot
2026-07-07  9:08 ` [PATCH v5 3/5] arm64: dts: qcom: kaanapali: fix traceNoC probe issue Jie Gan
2026-07-07  9:21   ` sashiko-bot
2026-07-07  9:08 ` [PATCH v5 4/5] arm64: dts: qcom: sm8750: " Jie Gan
2026-07-07  9:30   ` sashiko-bot
2026-07-07  9:08 ` [PATCH v5 5/5] arm64: dts: qcom: glymur: use Aggregator TNOC compatible Jie Gan

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