[PATCH] drivers/of: Make device tree code work on any arch.

[PATCH] drivers/of: Make device tree code work on any arch.

[Stephen Neuendorffer]

These functions need to get abstracted.
---
 drivers/of/address.c |    5 +++++
 drivers/of/device.c  |    7 ++++++-
 2 files changed, 11 insertions(+), 1 deletions(-)

diff --git a/drivers/of/address.c b/drivers/of/address.c
index fcadb72..61e652b 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -539,7 +539,12 @@ static int __of_address_to_resource(struct device_node *dev, const u32 *addrp,
 	memset(r, 0, sizeof(struct resource));
 	if (flags & IORESOURCE_IO) {
 		unsigned long port;
+		// FIXME: utter hack...
+#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_POWERPC)
 		port = pci_address_to_pio(taddr);
+#else
+		port = -1;
+#endif
 		if (port == (unsigned long)-1)
 			return -EINVAL;
 		r->start = port;
diff --git a/drivers/of/device.c b/drivers/of/device.c
index d44e1a6..8436d00 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -147,8 +147,13 @@ int of_device_register(struct of_device *ofdev)
 	/* device_add will assume that this device is on the same node as
 	 * the parent. If there is no parent defined, set the node
 	 * explicitly */
-	if (!ofdev->dev.parent)
+	if (!ofdev->dev.parent) {
+#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_POWERPC) || defined(CONFIG_SPARC) 
 		set_dev_node(&ofdev->dev, of_node_to_nid(ofdev->dev.of_node));
+#else
+		set_dev_node(&ofdev->dev, -1);
+#endif
+	}
 
 	of_device_claim_resources(ofdev);
 
-- 
1.5.6.6



This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

[PATCH] of/fdt: Add unflatten_partial_device_tree

[Stephen Neuendorffer]

This code allows a user to parse a partial device tree blob, which is
structurally independent of any toplevel blob.
Previously, this code assumed that the blob comes from initial_boot_params.
Now, unflatten_partial_device_tree can take a blob from an arbitrary position,
and the location of the blob gets passed around to the various support functions.
Some of the functions are still tied to the initial_boot_params blob, although
perhaps they should get abstracted as well?
---
 drivers/of/fdt.c       |  147 ++++++++++++++++++++++++++++++++++++------------
 include/linux/of_fdt.h |   10 ++-
 2 files changed, 118 insertions(+), 39 deletions(-)

diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
index 66401bc..628ba4f 100644
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -11,10 +11,12 @@
 
 #include <linux/kernel.h>
 #include <linux/initrd.h>
+#include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_fdt.h>
 #include <linux/string.h>
 #include <linux/errno.h>
+#include <linux/slab.h>
 
 #ifdef CONFIG_PPC
 #include <asm/machdep.h>
@@ -22,15 +24,16 @@
 
 #include <asm/page.h>
 
-int __initdata dt_root_addr_cells;
-int __initdata dt_root_size_cells;
+int dt_root_addr_cells;
+int dt_root_size_cells;
 
 struct boot_param_header *initial_boot_params;
 
-char *find_flat_dt_string(u32 offset)
+char *find_flat_dt_string(u32 offset,
+			  struct boot_param_header *blob)
 {
-	return ((char *)initial_boot_params) +
-		be32_to_cpu(initial_boot_params->off_dt_strings) + offset;
+	return ((char *)blob) +
+		be32_to_cpu(blob->off_dt_strings) + offset;
 }
 
 /**
@@ -42,7 +45,7 @@ char *find_flat_dt_string(u32 offset)
  * used to extract the memory information at boot before we can
  * unflatten the tree
  */
-int __init of_scan_flat_dt(int (*it)(unsigned long node,
+int  of_scan_flat_dt(int (*it)(unsigned long node,
 				     const char *uname, int depth,
 				     void *data),
 			   void *data)
@@ -102,7 +105,7 @@ int __init of_scan_flat_dt(int (*it)(unsigned long node,
 /**
  * of_get_flat_dt_root - find the root node in the flat blob
  */
-unsigned long __init of_get_flat_dt_root(void)
+unsigned long  of_get_flat_dt_root(void)
 {
 	unsigned long p = ((unsigned long)initial_boot_params) +
 		be32_to_cpu(initial_boot_params->off_dt_struct);
@@ -120,8 +123,9 @@ unsigned long __init of_get_flat_dt_root(void)
  * This function can be used within scan_flattened_dt callback to get
  * access to properties
  */
-void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
-				 unsigned long *size)
+void * of_get_flat_dt_prop(unsigned long node, const char *name,
+				 unsigned long *size,
+				 struct boot_param_header *blob)
 {
 	unsigned long p = node;
 
@@ -142,7 +146,7 @@ void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
 		if (be32_to_cpu(initial_boot_params->version) < 0x10)
 			p = ALIGN(p, sz >= 8 ? 8 : 4);
 
-		nstr = find_flat_dt_string(noff);
+		nstr = find_flat_dt_string(noff, blob);
 		if (nstr == NULL) {
 			pr_warning("Can't find property index name !\n");
 			return NULL;
@@ -162,12 +166,13 @@ void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
  * @node: node to test
  * @compat: compatible string to compare with compatible list.
  */
-int __init of_flat_dt_is_compatible(unsigned long node, const char *compat)
+int  of_flat_dt_is_compatible(unsigned long node, const char *compat,
+				 struct boot_param_header *blob)
 {
 	const char *cp;
 	unsigned long cplen, l;
 
-	cp = of_get_flat_dt_prop(node, "compatible", &cplen);
+	cp = of_get_flat_dt_prop(node, "compatible", &cplen, blob);
 	if (cp == NULL)
 		return 0;
 	while (cplen > 0) {
@@ -181,7 +186,7 @@ int __init of_flat_dt_is_compatible(unsigned long node, const char *compat)
 	return 0;
 }
 
-static void *__init unflatten_dt_alloc(unsigned long *mem, unsigned long size,
+static void * unflatten_dt_alloc(unsigned long *mem, unsigned long size,
 				       unsigned long align)
 {
 	void *res;
@@ -200,11 +205,12 @@ static void *__init unflatten_dt_alloc(unsigned long *mem, unsigned long size,
  * @allnextpp: pointer to ->allnext from last allocated device_node
  * @fpsize: Size of the node path up at the current depth.
  */
-unsigned long __init unflatten_dt_node(unsigned long mem,
+unsigned long  unflatten_dt_node(unsigned long mem,
 					unsigned long *p,
 					struct device_node *dad,
 					struct device_node ***allnextpp,
-					unsigned long fpsize)
+					unsigned long fpsize,
+				 struct boot_param_header *blob)
 {
 	struct device_node *np;
 	struct property *pp, **prev_pp = NULL;
@@ -300,10 +306,10 @@ unsigned long __init unflatten_dt_node(unsigned long mem,
 		sz = be32_to_cpup((__be32 *)(*p));
 		noff = be32_to_cpup((__be32 *)((*p) + 4));
 		*p += 8;
-		if (be32_to_cpu(initial_boot_params->version) < 0x10)
+		if (be32_to_cpu(blob->version) < 0x10)
 			*p = ALIGN(*p, sz >= 8 ? 8 : 4);
 
-		pname = find_flat_dt_string(noff);
+		pname = find_flat_dt_string(noff, blob);
 		if (pname == NULL) {
 			pr_info("Can't find property name in list !\n");
 			break;
@@ -382,7 +388,7 @@ unsigned long __init unflatten_dt_node(unsigned long mem,
 		if (tag == OF_DT_NOP)
 			*p += 4;
 		else
-			mem = unflatten_dt_node(mem, p, np, allnextpp, fpsize);
+			mem = unflatten_dt_node(mem, p, np, allnextpp, fpsize, blob);
 		tag = be32_to_cpup((__be32 *)(*p));
 	}
 	if (tag != OF_DT_END_NODE) {
@@ -393,24 +399,26 @@ unsigned long __init unflatten_dt_node(unsigned long mem,
 	return mem;
 }
 
+#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_POWERPC) || defined(CONFIG_SPARC)
+
 #ifdef CONFIG_BLK_DEV_INITRD
 /**
  * early_init_dt_check_for_initrd - Decode initrd location from flat tree
  * @node: reference to node containing initrd location ('chosen')
  */
-void __init early_init_dt_check_for_initrd(unsigned long node)
+void  early_init_dt_check_for_initrd(unsigned long node)
 {
 	unsigned long start, end, len;
 	__be32 *prop;
 
 	pr_debug("Looking for initrd properties... ");
 
-	prop = of_get_flat_dt_prop(node, "linux,initrd-start", &len);
+	prop = of_get_flat_dt_prop(node, "linux,initrd-start", &len, initial_boot_params);
 	if (!prop)
 		return;
 	start = of_read_ulong(prop, len/4);
 
-	prop = of_get_flat_dt_prop(node, "linux,initrd-end", &len);
+	prop = of_get_flat_dt_prop(node, "linux,initrd-end", &len, initial_boot_params);
 	if (!prop)
 		return;
 	end = of_read_ulong(prop, len/4);
@@ -427,7 +435,7 @@ inline void early_init_dt_check_for_initrd(unsigned long node)
 /**
  * early_init_dt_scan_root - fetch the top level address and size cells
  */
-int __init early_init_dt_scan_root(unsigned long node, const char *uname,
+int  early_init_dt_scan_root(unsigned long node, const char *uname,
 				   int depth, void *data)
 {
 	__be32 *prop;
@@ -438,12 +446,12 @@ int __init early_init_dt_scan_root(unsigned long node, const char *uname,
 	dt_root_size_cells = OF_ROOT_NODE_SIZE_CELLS_DEFAULT;
 	dt_root_addr_cells = OF_ROOT_NODE_ADDR_CELLS_DEFAULT;
 
-	prop = of_get_flat_dt_prop(node, "#size-cells", NULL);
+	prop = of_get_flat_dt_prop(node, "#size-cells", NULL, initial_boot_params);
 	if (prop)
 		dt_root_size_cells = be32_to_cpup(prop);
 	pr_debug("dt_root_size_cells = %x\n", dt_root_size_cells);
 
-	prop = of_get_flat_dt_prop(node, "#address-cells", NULL);
+	prop = of_get_flat_dt_prop(node, "#address-cells", NULL, initial_boot_params);
 	if (prop)
 		dt_root_addr_cells = be32_to_cpup(prop);
 	pr_debug("dt_root_addr_cells = %x\n", dt_root_addr_cells);
@@ -452,7 +460,7 @@ int __init early_init_dt_scan_root(unsigned long node, const char *uname,
 	return 1;
 }
 
-u64 __init dt_mem_next_cell(int s, __be32 **cellp)
+u64  dt_mem_next_cell(int s, __be32 **cellp)
 {
 	__be32 *p = *cellp;
 
@@ -463,10 +471,10 @@ u64 __init dt_mem_next_cell(int s, __be32 **cellp)
 /**
  * early_init_dt_scan_memory - Look for an parse memory nodes
  */
-int __init early_init_dt_scan_memory(unsigned long node, const char *uname,
+int  early_init_dt_scan_memory(unsigned long node, const char *uname,
 				     int depth, void *data)
 {
-	char *type = of_get_flat_dt_prop(node, "device_type", NULL);
+	char *type = of_get_flat_dt_prop(node, "device_type", NULL, initial_boot_params);
 	__be32 *reg, *endp;
 	unsigned long l;
 
@@ -481,9 +489,9 @@ int __init early_init_dt_scan_memory(unsigned long node, const char *uname,
 	} else if (strcmp(type, "memory") != 0)
 		return 0;
 
-	reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
+	reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l, initial_boot_params);
 	if (reg == NULL)
-		reg = of_get_flat_dt_prop(node, "reg", &l);
+		reg = of_get_flat_dt_prop(node, "reg", &l, initial_boot_params);
 	if (reg == NULL)
 		return 0;
 
@@ -509,7 +517,7 @@ int __init early_init_dt_scan_memory(unsigned long node, const char *uname,
 	return 0;
 }
 
-int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
+int  early_init_dt_scan_chosen(unsigned long node, const char *uname,
 				     int depth, void *data)
 {
 	unsigned long l;
@@ -523,12 +531,12 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
 
 	early_init_dt_check_for_initrd(node);
 
+#ifdef CONFIG_CMDLINE
 	/* Retreive command line */
-	p = of_get_flat_dt_prop(node, "bootargs", &l);
+	p = of_get_flat_dt_prop(node, "bootargs", &l, initial_boot_params);
 	if (p != NULL && l > 0)
 		strlcpy(cmd_line, p, min((int)l, COMMAND_LINE_SIZE));
 
-#ifdef CONFIG_CMDLINE
 #ifndef CONFIG_CMDLINE_FORCE
 	if (p == NULL || l == 0 || (l == 1 && (*p) == 0))
 #endif
@@ -537,12 +545,14 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
 
 	early_init_dt_scan_chosen_arch(node);
 
+#ifdef CONFIG_CMDLINE
 	pr_debug("Command line is: %s\n", cmd_line);
+#endif /* CONFIG_CMDLINE */
 
 	/* break now */
 	return 1;
 }
-
+	      
 /**
  * unflatten_device_tree - create tree of device_nodes from flat blob
  *
@@ -551,7 +561,7 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
  * pointers of the nodes so the normal device-tree walking functions
  * can be used.
  */
-void __init unflatten_device_tree(void)
+void unflatten_device_tree(void)
 {
 	unsigned long start, mem, size;
 	struct device_node **allnextp = &allnodes;
@@ -576,7 +586,7 @@ void __init unflatten_device_tree(void)
 	/* First pass, scan for size */
 	start = ((unsigned long)initial_boot_params) +
 		be32_to_cpu(initial_boot_params->off_dt_struct);
-	size = unflatten_dt_node(0, &start, NULL, NULL, 0);
+	size = unflatten_dt_node(0, &start, NULL, NULL, 0, initial_boot_params);
 	size = (size | 3) + 1;
 
 	pr_debug("  size is %lx, allocating...\n", size);
@@ -593,7 +603,7 @@ void __init unflatten_device_tree(void)
 	/* Second pass, do actual unflattening */
 	start = ((unsigned long)initial_boot_params) +
 		be32_to_cpu(initial_boot_params->off_dt_struct);
-	unflatten_dt_node(mem, &start, NULL, &allnextp, 0);
+	unflatten_dt_node(mem, &start, NULL, &allnextp, 0, initial_boot_params);
 	if (be32_to_cpup((__be32 *)start) != OF_DT_END)
 		pr_warning("Weird tag at end of tree: %08x\n", *((u32 *)start));
 	if (be32_to_cpu(((__be32 *)mem)[size / 4]) != 0xdeadbeef)
@@ -608,3 +618,68 @@ void __init unflatten_device_tree(void)
 
 	pr_debug(" <- unflatten_device_tree()\n");
 }
+
+#endif
+
+/**
+ * unflatten_partial_device_tree - create tree of device_nodes from flat blob
+ *
+ * unflattens the device-tree passed by the firmware, creating the
+ * tree of struct device_node. It also fills the "name" and "type"
+ * pointers of the nodes so the normal device-tree walking functions
+ * can be used.
+ */
+void unflatten_partial_device_tree(unsigned long *blob, struct device_node **mynodes)
+{
+  struct boot_param_header *device_tree = (struct boot_param_header *)blob;
+        unsigned long start, mem, size;
+	struct device_node **allnextp = mynodes;
+
+	pr_debug(" -> unflatten_partial_device_tree()\n");
+
+	if (!device_tree) {
+		pr_debug("No device tree pointer\n");
+		return;
+	}
+
+	pr_debug("Unflattening device tree:\n");
+	pr_debug("magic: %08x\n", be32_to_cpu(device_tree->magic));
+	pr_debug("size: %08x\n", be32_to_cpu(device_tree->totalsize));
+	pr_debug("version: %08x\n", be32_to_cpu(device_tree->version));
+
+	if (be32_to_cpu(device_tree->magic) != OF_DT_HEADER) {
+	  pr_err("Invalid device tree blob header %x \n", be32_to_cpu(device_tree->magic));
+		return;
+	}
+
+	/* First pass, scan for size */
+	start = ((unsigned long)device_tree) +
+		be32_to_cpu(device_tree->off_dt_struct);
+	size = unflatten_dt_node(0, &start, NULL, NULL, 0, device_tree);
+	size = (size | 3) + 1;
+
+	pr_debug("  size is %lx, allocating...\n", size);
+
+	/* Allocate memory for the expanded device tree */
+	mem = (unsigned long) kzalloc(size + 4,
+		      __alignof__(struct device_node));
+
+	((__be32 *)mem)[size / 4] = cpu_to_be32(0xdeadbeef);
+
+	pr_debug("  unflattening %lx...\n", mem);
+
+	/* Second pass, do actual unflattening */
+	start = ((unsigned long)device_tree) +
+		be32_to_cpu(device_tree->off_dt_struct);
+	unflatten_dt_node(mem, &start, NULL, &allnextp, 0, device_tree);
+	if (be32_to_cpup((__be32 *)start) != OF_DT_END)
+		pr_warning("Weird tag at end of tree: %08x\n", *((u32 *)start));
+	if (be32_to_cpu(((__be32 *)mem)[size / 4]) != 0xdeadbeef)
+		pr_warning("End of tree marker overwritten: %08x\n",
+			   be32_to_cpu(((__be32 *)mem)[size / 4]));
+	*allnextp = NULL;
+
+	pr_debug(" <- unflatten_partial_device_tree()\n");
+}
+
+EXPORT_SYMBOL(unflatten_partial_device_tree);
diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h
index 71e1a91..008f520 100644
--- a/include/linux/of_fdt.h
+++ b/include/linux/of_fdt.h
@@ -64,13 +64,16 @@ extern int __initdata dt_root_size_cells;
 extern struct boot_param_header *initial_boot_params;
 
 /* For scanning the flat device-tree at boot time */
-extern char *find_flat_dt_string(u32 offset);
+extern char *find_flat_dt_string(u32 offset,
+			  struct boot_param_header *blob);
 extern int of_scan_flat_dt(int (*it)(unsigned long node, const char *uname,
 				     int depth, void *data),
 			   void *data);
 extern void *of_get_flat_dt_prop(unsigned long node, const char *name,
-				 unsigned long *size);
-extern int of_flat_dt_is_compatible(unsigned long node, const char *name);
+				 unsigned long *size,
+			  struct boot_param_header *blob);
+extern int of_flat_dt_is_compatible(unsigned long node, const char *name,
+			  struct boot_param_header *blob);
 extern unsigned long of_get_flat_dt_root(void);
 extern void early_init_dt_scan_chosen_arch(unsigned long node);
 extern int early_init_dt_scan_chosen(unsigned long node, const char *uname,
@@ -98,6 +101,7 @@ extern int early_init_dt_scan_root(unsigned long node, const char *uname,
 
 /* Other Prototypes */
 extern void unflatten_device_tree(void);
+extern void unflatten_partial_device_tree(unsigned long *blob, struct device_node **mynodes);
 extern void early_init_devtree(void *);
 #else /* CONFIG_OF_FLATTREE */
 static inline void unflatten_device_tree(void) {}
-- 
1.5.6.6



This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

Re: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Grant Likely]

On Mon, Jun 28, 2010 at 10:47 AM, Stephen Neuendorffer
<stephen.neuendorffer-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> wrote:
> This code allows a user to parse a partial device tree blob, which is
> structurally independent of any toplevel blob.
> Previously, this code assumed that the blob comes from initial_boot_params.
> Now, unflatten_partial_device_tree can take a blob from an arbitrary position,
> and the location of the blob gets passed around to the various support functions.
> Some of the functions are still tied to the initial_boot_params blob, although
> perhaps they should get abstracted as well?

At the very least, all the references in drivers/of should probably be
abstracted.  I'm not to worried about the stuff in arch/* unless the
functions there are also needed for partial tree parsing.

The code in unflatten_partial_device_tree is also (as you know) a
blatant copy and paste from unflatten_device_tree.  The two functions
should be consolidated.

Another question is what to do with the unflattened tree once it is
unflattened.  Some of the existing code expects the node to be part of
the global tree.  Those could either be refactored, or the new partial
tree could be grafted into the global tree.  Grafting will have the
least impact, but it probably isn't a good idea in the long term.
Grafting together unrelated trees seems messy to me.

Cheers,
g.

> ---
>  drivers/of/fdt.c       |  147 ++++++++++++++++++++++++++++++++++++------------
>  include/linux/of_fdt.h |   10 ++-
>  2 files changed, 118 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
> index 66401bc..628ba4f 100644
> --- a/drivers/of/fdt.c
> +++ b/drivers/of/fdt.c
> @@ -11,10 +11,12 @@
>
>  #include <linux/kernel.h>
>  #include <linux/initrd.h>
> +#include <linux/module.h>
>  #include <linux/of.h>
>  #include <linux/of_fdt.h>
>  #include <linux/string.h>
>  #include <linux/errno.h>
> +#include <linux/slab.h>
>
>  #ifdef CONFIG_PPC
>  #include <asm/machdep.h>
> @@ -22,15 +24,16 @@
>
>  #include <asm/page.h>
>
> -int __initdata dt_root_addr_cells;
> -int __initdata dt_root_size_cells;
> +int dt_root_addr_cells;
> +int dt_root_size_cells;
>
>  struct boot_param_header *initial_boot_params;
>
> -char *find_flat_dt_string(u32 offset)
> +char *find_flat_dt_string(u32 offset,
> +                         struct boot_param_header *blob)
>  {
> -       return ((char *)initial_boot_params) +
> -               be32_to_cpu(initial_boot_params->off_dt_strings) + offset;
> +       return ((char *)blob) +
> +               be32_to_cpu(blob->off_dt_strings) + offset;
>  }
>
>  /**
> @@ -42,7 +45,7 @@ char *find_flat_dt_string(u32 offset)
>  * used to extract the memory information at boot before we can
>  * unflatten the tree
>  */
> -int __init of_scan_flat_dt(int (*it)(unsigned long node,
> +int  of_scan_flat_dt(int (*it)(unsigned long node,
>                                     const char *uname, int depth,
>                                     void *data),
>                           void *data)
> @@ -102,7 +105,7 @@ int __init of_scan_flat_dt(int (*it)(unsigned long node,
>  /**
>  * of_get_flat_dt_root - find the root node in the flat blob
>  */
> -unsigned long __init of_get_flat_dt_root(void)
> +unsigned long  of_get_flat_dt_root(void)
>  {
>        unsigned long p = ((unsigned long)initial_boot_params) +
>                be32_to_cpu(initial_boot_params->off_dt_struct);
> @@ -120,8 +123,9 @@ unsigned long __init of_get_flat_dt_root(void)
>  * This function can be used within scan_flattened_dt callback to get
>  * access to properties
>  */
> -void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
> -                                unsigned long *size)
> +void * of_get_flat_dt_prop(unsigned long node, const char *name,
> +                                unsigned long *size,
> +                                struct boot_param_header *blob)
>  {
>        unsigned long p = node;
>
> @@ -142,7 +146,7 @@ void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
>                if (be32_to_cpu(initial_boot_params->version) < 0x10)
>                        p = ALIGN(p, sz >= 8 ? 8 : 4);
>
> -               nstr = find_flat_dt_string(noff);
> +               nstr = find_flat_dt_string(noff, blob);
>                if (nstr == NULL) {
>                        pr_warning("Can't find property index name !\n");
>                        return NULL;
> @@ -162,12 +166,13 @@ void *__init of_get_flat_dt_prop(unsigned long node, const char *name,
>  * @node: node to test
>  * @compat: compatible string to compare with compatible list.
>  */
> -int __init of_flat_dt_is_compatible(unsigned long node, const char *compat)
> +int  of_flat_dt_is_compatible(unsigned long node, const char *compat,
> +                                struct boot_param_header *blob)
>  {
>        const char *cp;
>        unsigned long cplen, l;
>
> -       cp = of_get_flat_dt_prop(node, "compatible", &cplen);
> +       cp = of_get_flat_dt_prop(node, "compatible", &cplen, blob);
>        if (cp == NULL)
>                return 0;
>        while (cplen > 0) {
> @@ -181,7 +186,7 @@ int __init of_flat_dt_is_compatible(unsigned long node, const char *compat)
>        return 0;
>  }
>
> -static void *__init unflatten_dt_alloc(unsigned long *mem, unsigned long size,
> +static void * unflatten_dt_alloc(unsigned long *mem, unsigned long size,
>                                       unsigned long align)
>  {
>        void *res;
> @@ -200,11 +205,12 @@ static void *__init unflatten_dt_alloc(unsigned long *mem, unsigned long size,
>  * @allnextpp: pointer to ->allnext from last allocated device_node
>  * @fpsize: Size of the node path up at the current depth.
>  */
> -unsigned long __init unflatten_dt_node(unsigned long mem,
> +unsigned long  unflatten_dt_node(unsigned long mem,
>                                        unsigned long *p,
>                                        struct device_node *dad,
>                                        struct device_node ***allnextpp,
> -                                       unsigned long fpsize)
> +                                       unsigned long fpsize,
> +                                struct boot_param_header *blob)
>  {
>        struct device_node *np;
>        struct property *pp, **prev_pp = NULL;
> @@ -300,10 +306,10 @@ unsigned long __init unflatten_dt_node(unsigned long mem,
>                sz = be32_to_cpup((__be32 *)(*p));
>                noff = be32_to_cpup((__be32 *)((*p) + 4));
>                *p += 8;
> -               if (be32_to_cpu(initial_boot_params->version) < 0x10)
> +               if (be32_to_cpu(blob->version) < 0x10)
>                        *p = ALIGN(*p, sz >= 8 ? 8 : 4);
>
> -               pname = find_flat_dt_string(noff);
> +               pname = find_flat_dt_string(noff, blob);
>                if (pname == NULL) {
>                        pr_info("Can't find property name in list !\n");
>                        break;
> @@ -382,7 +388,7 @@ unsigned long __init unflatten_dt_node(unsigned long mem,
>                if (tag == OF_DT_NOP)
>                        *p += 4;
>                else
> -                       mem = unflatten_dt_node(mem, p, np, allnextpp, fpsize);
> +                       mem = unflatten_dt_node(mem, p, np, allnextpp, fpsize, blob);
>                tag = be32_to_cpup((__be32 *)(*p));
>        }
>        if (tag != OF_DT_END_NODE) {
> @@ -393,24 +399,26 @@ unsigned long __init unflatten_dt_node(unsigned long mem,
>        return mem;
>  }
>
> +#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_POWERPC) || defined(CONFIG_SPARC)
> +
>  #ifdef CONFIG_BLK_DEV_INITRD
>  /**
>  * early_init_dt_check_for_initrd - Decode initrd location from flat tree
>  * @node: reference to node containing initrd location ('chosen')
>  */
> -void __init early_init_dt_check_for_initrd(unsigned long node)
> +void  early_init_dt_check_for_initrd(unsigned long node)
>  {
>        unsigned long start, end, len;
>        __be32 *prop;
>
>        pr_debug("Looking for initrd properties... ");
>
> -       prop = of_get_flat_dt_prop(node, "linux,initrd-start", &len);
> +       prop = of_get_flat_dt_prop(node, "linux,initrd-start", &len, initial_boot_params);
>        if (!prop)
>                return;
>        start = of_read_ulong(prop, len/4);
>
> -       prop = of_get_flat_dt_prop(node, "linux,initrd-end", &len);
> +       prop = of_get_flat_dt_prop(node, "linux,initrd-end", &len, initial_boot_params);
>        if (!prop)
>                return;
>        end = of_read_ulong(prop, len/4);
> @@ -427,7 +435,7 @@ inline void early_init_dt_check_for_initrd(unsigned long node)
>  /**
>  * early_init_dt_scan_root - fetch the top level address and size cells
>  */
> -int __init early_init_dt_scan_root(unsigned long node, const char *uname,
> +int  early_init_dt_scan_root(unsigned long node, const char *uname,
>                                   int depth, void *data)
>  {
>        __be32 *prop;
> @@ -438,12 +446,12 @@ int __init early_init_dt_scan_root(unsigned long node, const char *uname,
>        dt_root_size_cells = OF_ROOT_NODE_SIZE_CELLS_DEFAULT;
>        dt_root_addr_cells = OF_ROOT_NODE_ADDR_CELLS_DEFAULT;
>
> -       prop = of_get_flat_dt_prop(node, "#size-cells", NULL);
> +       prop = of_get_flat_dt_prop(node, "#size-cells", NULL, initial_boot_params);
>        if (prop)
>                dt_root_size_cells = be32_to_cpup(prop);
>        pr_debug("dt_root_size_cells = %x\n", dt_root_size_cells);
>
> -       prop = of_get_flat_dt_prop(node, "#address-cells", NULL);
> +       prop = of_get_flat_dt_prop(node, "#address-cells", NULL, initial_boot_params);
>        if (prop)
>                dt_root_addr_cells = be32_to_cpup(prop);
>        pr_debug("dt_root_addr_cells = %x\n", dt_root_addr_cells);
> @@ -452,7 +460,7 @@ int __init early_init_dt_scan_root(unsigned long node, const char *uname,
>        return 1;
>  }
>
> -u64 __init dt_mem_next_cell(int s, __be32 **cellp)
> +u64  dt_mem_next_cell(int s, __be32 **cellp)
>  {
>        __be32 *p = *cellp;
>
> @@ -463,10 +471,10 @@ u64 __init dt_mem_next_cell(int s, __be32 **cellp)
>  /**
>  * early_init_dt_scan_memory - Look for an parse memory nodes
>  */
> -int __init early_init_dt_scan_memory(unsigned long node, const char *uname,
> +int  early_init_dt_scan_memory(unsigned long node, const char *uname,
>                                     int depth, void *data)
>  {
> -       char *type = of_get_flat_dt_prop(node, "device_type", NULL);
> +       char *type = of_get_flat_dt_prop(node, "device_type", NULL, initial_boot_params);
>        __be32 *reg, *endp;
>        unsigned long l;
>
> @@ -481,9 +489,9 @@ int __init early_init_dt_scan_memory(unsigned long node, const char *uname,
>        } else if (strcmp(type, "memory") != 0)
>                return 0;
>
> -       reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
> +       reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l, initial_boot_params);
>        if (reg == NULL)
> -               reg = of_get_flat_dt_prop(node, "reg", &l);
> +               reg = of_get_flat_dt_prop(node, "reg", &l, initial_boot_params);
>        if (reg == NULL)
>                return 0;
>
> @@ -509,7 +517,7 @@ int __init early_init_dt_scan_memory(unsigned long node, const char *uname,
>        return 0;
>  }
>
> -int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
> +int  early_init_dt_scan_chosen(unsigned long node, const char *uname,
>                                     int depth, void *data)
>  {
>        unsigned long l;
> @@ -523,12 +531,12 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
>
>        early_init_dt_check_for_initrd(node);
>
> +#ifdef CONFIG_CMDLINE
>        /* Retreive command line */
> -       p = of_get_flat_dt_prop(node, "bootargs", &l);
> +       p = of_get_flat_dt_prop(node, "bootargs", &l, initial_boot_params);
>        if (p != NULL && l > 0)
>                strlcpy(cmd_line, p, min((int)l, COMMAND_LINE_SIZE));
>
> -#ifdef CONFIG_CMDLINE
>  #ifndef CONFIG_CMDLINE_FORCE
>        if (p == NULL || l == 0 || (l == 1 && (*p) == 0))
>  #endif
> @@ -537,12 +545,14 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
>
>        early_init_dt_scan_chosen_arch(node);
>
> +#ifdef CONFIG_CMDLINE
>        pr_debug("Command line is: %s\n", cmd_line);
> +#endif /* CONFIG_CMDLINE */
>
>        /* break now */
>        return 1;
>  }
> -
> +
>  /**
>  * unflatten_device_tree - create tree of device_nodes from flat blob
>  *
> @@ -551,7 +561,7 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname,
>  * pointers of the nodes so the normal device-tree walking functions
>  * can be used.
>  */
> -void __init unflatten_device_tree(void)
> +void unflatten_device_tree(void)
>  {
>        unsigned long start, mem, size;
>        struct device_node **allnextp = &allnodes;
> @@ -576,7 +586,7 @@ void __init unflatten_device_tree(void)
>        /* First pass, scan for size */
>        start = ((unsigned long)initial_boot_params) +
>                be32_to_cpu(initial_boot_params->off_dt_struct);
> -       size = unflatten_dt_node(0, &start, NULL, NULL, 0);
> +       size = unflatten_dt_node(0, &start, NULL, NULL, 0, initial_boot_params);
>        size = (size | 3) + 1;
>
>        pr_debug("  size is %lx, allocating...\n", size);
> @@ -593,7 +603,7 @@ void __init unflatten_device_tree(void)
>        /* Second pass, do actual unflattening */
>        start = ((unsigned long)initial_boot_params) +
>                be32_to_cpu(initial_boot_params->off_dt_struct);
> -       unflatten_dt_node(mem, &start, NULL, &allnextp, 0);
> +       unflatten_dt_node(mem, &start, NULL, &allnextp, 0, initial_boot_params);
>        if (be32_to_cpup((__be32 *)start) != OF_DT_END)
>                pr_warning("Weird tag at end of tree: %08x\n", *((u32 *)start));
>        if (be32_to_cpu(((__be32 *)mem)[size / 4]) != 0xdeadbeef)
> @@ -608,3 +618,68 @@ void __init unflatten_device_tree(void)
>
>        pr_debug(" <- unflatten_device_tree()\n");
>  }
> +
> +#endif
> +
> +/**
> + * unflatten_partial_device_tree - create tree of device_nodes from flat blob
> + *
> + * unflattens the device-tree passed by the firmware, creating the
> + * tree of struct device_node. It also fills the "name" and "type"
> + * pointers of the nodes so the normal device-tree walking functions
> + * can be used.
> + */
> +void unflatten_partial_device_tree(unsigned long *blob, struct device_node **mynodes)
> +{
> +  struct boot_param_header *device_tree = (struct boot_param_header *)blob;
> +        unsigned long start, mem, size;
> +       struct device_node **allnextp = mynodes;
> +
> +       pr_debug(" -> unflatten_partial_device_tree()\n");
> +
> +       if (!device_tree) {
> +               pr_debug("No device tree pointer\n");
> +               return;
> +       }
> +
> +       pr_debug("Unflattening device tree:\n");
> +       pr_debug("magic: %08x\n", be32_to_cpu(device_tree->magic));
> +       pr_debug("size: %08x\n", be32_to_cpu(device_tree->totalsize));
> +       pr_debug("version: %08x\n", be32_to_cpu(device_tree->version));
> +
> +       if (be32_to_cpu(device_tree->magic) != OF_DT_HEADER) {
> +         pr_err("Invalid device tree blob header %x \n", be32_to_cpu(device_tree->magic));
> +               return;
> +       }
> +
> +       /* First pass, scan for size */
> +       start = ((unsigned long)device_tree) +
> +               be32_to_cpu(device_tree->off_dt_struct);
> +       size = unflatten_dt_node(0, &start, NULL, NULL, 0, device_tree);
> +       size = (size | 3) + 1;
> +
> +       pr_debug("  size is %lx, allocating...\n", size);
> +
> +       /* Allocate memory for the expanded device tree */
> +       mem = (unsigned long) kzalloc(size + 4,
> +                     __alignof__(struct device_node));
> +
> +       ((__be32 *)mem)[size / 4] = cpu_to_be32(0xdeadbeef);
> +
> +       pr_debug("  unflattening %lx...\n", mem);
> +
> +       /* Second pass, do actual unflattening */
> +       start = ((unsigned long)device_tree) +
> +               be32_to_cpu(device_tree->off_dt_struct);
> +       unflatten_dt_node(mem, &start, NULL, &allnextp, 0, device_tree);
> +       if (be32_to_cpup((__be32 *)start) != OF_DT_END)
> +               pr_warning("Weird tag at end of tree: %08x\n", *((u32 *)start));
> +       if (be32_to_cpu(((__be32 *)mem)[size / 4]) != 0xdeadbeef)
> +               pr_warning("End of tree marker overwritten: %08x\n",
> +                          be32_to_cpu(((__be32 *)mem)[size / 4]));
> +       *allnextp = NULL;
> +
> +       pr_debug(" <- unflatten_partial_device_tree()\n");
> +}
> +
> +EXPORT_SYMBOL(unflatten_partial_device_tree);
> diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h
> index 71e1a91..008f520 100644
> --- a/include/linux/of_fdt.h
> +++ b/include/linux/of_fdt.h
> @@ -64,13 +64,16 @@ extern int __initdata dt_root_size_cells;
>  extern struct boot_param_header *initial_boot_params;
>
>  /* For scanning the flat device-tree at boot time */
> -extern char *find_flat_dt_string(u32 offset);
> +extern char *find_flat_dt_string(u32 offset,
> +                         struct boot_param_header *blob);
>  extern int of_scan_flat_dt(int (*it)(unsigned long node, const char *uname,
>                                     int depth, void *data),
>                           void *data);
>  extern void *of_get_flat_dt_prop(unsigned long node, const char *name,
> -                                unsigned long *size);
> -extern int of_flat_dt_is_compatible(unsigned long node, const char *name);
> +                                unsigned long *size,
> +                         struct boot_param_header *blob);
> +extern int of_flat_dt_is_compatible(unsigned long node, const char *name,
> +                         struct boot_param_header *blob);
>  extern unsigned long of_get_flat_dt_root(void);
>  extern void early_init_dt_scan_chosen_arch(unsigned long node);
>  extern int early_init_dt_scan_chosen(unsigned long node, const char *uname,
> @@ -98,6 +101,7 @@ extern int early_init_dt_scan_root(unsigned long node, const char *uname,
>
>  /* Other Prototypes */
>  extern void unflatten_device_tree(void);
> +extern void unflatten_partial_device_tree(unsigned long *blob, struct device_node **mynodes);
>  extern void early_init_devtree(void *);
>  #else /* CONFIG_OF_FLATTREE */
>  static inline void unflatten_device_tree(void) {}
> --
> 1.5.6.6
>
>
>
> This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
>
>
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH] of/fdt: Add unflatten_partial_device_tree

[David Gibson]

On Mon, Jun 28, 2010 at 04:18:27PM -0700, Grant Likely wrote:
> On Mon, Jun 28, 2010 at 10:47 AM, Stephen Neuendorffer
> <stephen.neuendorffer-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> wrote:
> > This code allows a user to parse a partial device tree blob, which is
> > structurally independent of any toplevel blob.
> > Previously, this code assumed that the blob comes from initial_boot_params.
> > Now, unflatten_partial_device_tree can take a blob from an arbitrary position,
> > and the location of the blob gets passed around to the various support functions.
> > Some of the functions are still tied to the initial_boot_params blob, although
> > perhaps they should get abstracted as well?
> 
> At the very least, all the references in drivers/of should probably be
> abstracted.  I'm not to worried about the stuff in arch/* unless the
> functions there are also needed for partial tree parsing.
> 
> The code in unflatten_partial_device_tree is also (as you know) a
> blatant copy and paste from unflatten_device_tree.  The two functions
> should be consolidated.
> 
> Another question is what to do with the unflattened tree once it is
> unflattened.  Some of the existing code expects the node to be part of
> the global tree.  Those could either be refactored, or the new partial
> tree could be grafted into the global tree.  Grafting will have the
> least impact, but it probably isn't a good idea in the long term.
> Grafting together unrelated trees seems messy to me.

I think I must have missed an earlier discussion.  What's the use case
for multiple fdt blobs?

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Grant Likely]

>> Another question is what to do with the unflattened tree once it is
>> unflattened.  Some of the existing code expects the node to be part of
>> the global tree.  Those could either be refactored, or the new partial
>> tree could be grafted into the global tree.  Grafting will have the
>> least impact, but it probably isn't a good idea in the long term.
>> Grafting together unrelated trees seems messy to me.
>
>I think I must have missed an earlier discussion.  What's the use case
>for multiple fdt blobs?

FPGA on an add-on board in an x86 host.  Device tree fragment describes the fpga design.  There could be multiple boards in a system.

g.



-- 
Sent from my Android phone with K-9 Mail. Please excuse my brevity.

Re: [PATCH] of/fdt: Add unflatten_partial_device_tree

[M. Warner Losh]

In message: <cf16ff7b-9208-4f47-8cea-ed8a8e52d30e-2ueSQiBKiTY7tOexoI0I+QC/G2K4zDHf@public.gmane.org>
            Grant Likely <glikely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> writes:
: 
: >> Another question is what to do with the unflattened tree once it is
: >> unflattened.  Some of the existing code expects the node to be part of
: >> the global tree.  Those could either be refactored, or the new partial
: >> tree could be grafted into the global tree.  Grafting will have the
: >> least impact, but it probably isn't a good idea in the long term.
: >> Grafting together unrelated trees seems messy to me.
: >
: >I think I must have missed an earlier discussion.  What's the use case
: >for multiple fdt blobs?
: 
: FPGA on an add-on board in an x86 host.  Device tree fragment
: describes the fpga design.  There could be multiple boards in a
: system.

How do you imagine these fragments getting loaded into the system?

Warner

RE: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Stephen Neuendorffer]

> -----Original Message-----
> From:
devicetree-discuss-bounces+stephen.neuendorffer=xilinx.com-uLR06cmDAlaKREJ1Ck/qmQ@public.gmane.org
org [mailto:devicetree-
> discuss-bounces+stephen.neuendorffer=xilinx.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org] On
Behalf Of M. Warner Losh
> Sent: Tuesday, June 29, 2010 9:25 AM
> To: glikely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Subject: Re: [PATCH] of/fdt: Add unflatten_partial_device_tree
> 
> In message: <cf16ff7b-9208-4f47-8cea-ed8a8e52d30e-2ueSQiBKiTY7tOexoI0I+QC/G2K4zDHf@public.gmane.org>
>             Grant Likely <glikely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> writes:
> :
> : >> Another question is what to do with the unflattened tree once it
is
> : >> unflattened.  Some of the existing code expects the node to be
part of
> : >> the global tree.  Those could either be refactored, or the new
partial
> : >> tree could be grafted into the global tree.  Grafting will have
the
> : >> least impact, but it probably isn't a good idea in the long term.
> : >> Grafting together unrelated trees seems messy to me.
> : >
> : >I think I must have missed an earlier discussion.  What's the use
case
> : >for multiple fdt blobs?
> :
> : FPGA on an add-on board in an x86 host.  Device tree fragment
> : describes the fpga design.  There could be multiple boards in a
> : system.
> 
> How do you imagine these fragments getting loaded into the system?

Not sure yet.  We also been working on partially reconfiguring the
FPGAs, too:

My current thought is that the 'base design' has a fixed FPGA structure
and a single
corresponding device tree: For convenience I've hardcoded this device
tree into
the pci device driver, although it should probably be separated out.
Independently,
the FPGA design may also have a 'reconfigurable' part, which can be
configured by
giving a (separate) device driver an FPGA bitstream and another device
tree description.
>From the 'parse a device tree' perspective, the problems are the same,
it's just a
matter of whether it is a device tree that describes hardware which is
relatively static
or relatively more dynamic.

Steve

This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

Re: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Grant Likely]

"M. Warner Losh" <imp-uzTCJ5RojNnQT0dZR+AlfA@public.gmane.org> wrote:

>In message: <cf16ff7b-9208-4f47-8cea-ed8a8e52d30e-2ueSQiBKiTY7tOexoI0I+QC/G2K4zDHf@public.gmane.org>
>            Grant Likely <glikely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> writes:
>: FPGA on an add-on board in an x86 host.  Device tree fragment
>: describes the fpga design.  There could be multiple boards in a
>: system.
>
>How do you imagine these fragments getting loaded into the system?

I think the driver should use the firmware loading interface.

g.

-- 
Sent from my Android phone with K-9 Mail. Please excuse my brevity.

RE: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Stephen Neuendorffer]

[-- Attachment #1.1: Type: text/plain, Size: 1949 bytes --]


>> Another question is what to do with the unflattened tree once it is
>> unflattened.  Some of the existing code expects the node to be part of
>> the global tree.  Those could either be refactored, or the new partial
>> tree could be grafted into the global tree.  Grafting will have the
>> least impact, but it probably isn't a good idea in the long term.
>> Grafting together unrelated trees seems messy to me.
>
>I think I must have missed an earlier discussion.  What's the use case
>for multiple fdt blobs?

Basically, we are building systems which have an FPGA sitting on a PCIe.  The
FPGA contains an internal bus with lots of devices.  From the structural point
of view, it seems to make sense to describe the connectivity of this subsystem
with a device tree: albeit a slightly strange one with no processor: just a pcie<->plb
bridge and a number of devices.  Since this subsystem is, in fact, architecture independent
(you could physically plug it into a PCIe slot on a system with any processor architecture)
it is a bit of a poster case for generalizing more of the device tree infrastructure.
In particular, we are most interested in doing this in X86 systems.

Which leads me back to the first question: My approach so far is that the device
tree fragment is completely independent of any toplevel device tree, for the simple
reason that on X86, there *isn't* a toplevel device tree...   The devices that get generated
are in the regular device structure, which is similar to the way pci bridges and pcimcia
drivers work.

Steve



This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.


[-- Attachment #1.2: Type: text/html, Size: 2565 bytes --]

[-- Attachment #2: Type: text/plain, Size: 192 bytes --]

_______________________________________________
devicetree-discuss mailing list
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
https://lists.ozlabs.org/listinfo/devicetree-discuss

RE: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Stephen Neuendorffer]

> -----Original Message-----
> From:
devicetree-discuss-bounces+stephen.neuendorffer=xilinx.com-uLR06cmDAlaKREJ1Ck/qmQ@public.gmane.org
org [mailto:devicetree-
> discuss-bounces+stephen.neuendorffer=xilinx.com-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org] On
Behalf Of Stephen Neuendorffer
> Sent: Monday, June 28, 2010 9:51 PM
> To: David Gibson; grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Subject: RE: [PATCH] of/fdt: Add unflatten_partial_device_tree
> 
> 
> >> Another question is what to do with the unflattened tree once it is
> >> unflattened.  Some of the existing code expects the node to be part
of
> >> the global tree.  Those could either be refactored, or the new
partial
> >> tree could be grafted into the global tree.  Grafting will have the
> >> least impact, but it probably isn't a good idea in the long term.
> >> Grafting together unrelated trees seems messy to me.
> >
> >I think I must have missed an earlier discussion.  What's the use
case
> >for multiple fdt blobs?
> 
> Basically, we are building systems which have an FPGA sitting on a
PCIe.  The
> FPGA contains an internal bus with lots of devices.  From the
structural point
> of view, it seems to make sense to describe the connectivity of this
subsystem
> with a device tree: albeit a slightly strange one with no processor:
just a pcie<->plb
> bridge and a number of devices.  Since this subsystem is, in fact,
architecture independent
> (you could physically plug it into a PCIe slot on a system with any
processor architecture)
> it is a bit of a poster case for generalizing more of the device tree
infrastructure.
> In particular, we are most interested in doing this in X86 systems.
> 
> Which leads me back to the first question: My approach so far is that
the device
> tree fragment is completely independent of any toplevel device tree,
for the simple
> reason that on X86, there *isn't* a toplevel device tree...   The
devices that get generated
> are in the regular device structure, which is similar to the way pci
bridges and pcimcia
> drivers work.

Going down this path, I've taken an approach where the PCI driver reads
the PCI BARs which are set earlier
and stuffs the correct ranges=<> property into the device tree.  I think
this is necessary because (I believe)
powerpc programs the BARs based on the flat device tree, whereas on X86,
the BIOS enumerates the BARs and
everyone else just deals with it.  This should enable the device driver
to use the existing address translation
code in driver/of/address.c:of_address_to_resource().  The current
status is that I get something like:

OF: ** translation for device /plb@0/xps-hwicap@80030000 **
OF: bus is default (na=1, ns=1) on /plb@0
OF: translating address: 80030000
OF: parent bus is default (na=1, ns=1) on /
OF: walking ranges...
OF: default map, cp=80000000, s=10000000, da=80030000
OF: parent translation for: d0000000
OF: with offset: 30000
OF: one level translation: d0030000
OF: reached root node
of_icap d0030000.xps-hwicap: Xilinx icap port driver
of_icap d0030000.xps-hwicap: Couldn't lock memory region at d0030000
of_icap: probe of d0030000.xps-hwicap failed with error -16

Apparently because the address region is already assigned to the PCI
device.  I think I need to figure out how
PCI bridges declare their address range but don't lock it, so that the
device in the FPGA (in this case the ICAP) can
claim it later.

Steve




This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

Re: [PATCH] of/fdt: Add unflatten_partial_device_tree

[David Gibson]

On Thu, Jul 01, 2010 at 08:59:16AM -0700, Stephen Neuendorffer wrote:
[snip]
> Going down this path, I've taken an approach where the PCI driver reads
> the PCI BARs which are set earlier
> and stuffs the correct ranges=<> property into the device tree.  I think
> this is necessary because (I believe)
> powerpc programs the BARs based on the flat device tree, whereas on X86,
> the BIOS enumerates the BARs and

Only on some powerpc subplatforms, I believe.  Some platforms have
minimal firmwares that either don't configure the BARs at all, or get
them so hopelessly wrong that we have to reconfigure everything anyway.

> everyone else just deals with it.  This should enable the device driver
> to use the existing address translation
> code in driver/of/address.c:of_address_to_resource().  The current
> status is that I get something like:
> 
> OF: ** translation for device /plb@0/xps-hwicap@80030000 **
> OF: bus is default (na=1, ns=1) on /plb@0
> OF: translating address: 80030000
> OF: parent bus is default (na=1, ns=1) on /
> OF: walking ranges...
> OF: default map, cp=80000000, s=10000000, da=80030000
> OF: parent translation for: d0000000
> OF: with offset: 30000
> OF: one level translation: d0030000
> OF: reached root node
> of_icap d0030000.xps-hwicap: Xilinx icap port driver
> of_icap d0030000.xps-hwicap: Couldn't lock memory region at d0030000
> of_icap: probe of d0030000.xps-hwicap failed with error -16
> 
> Apparently because the address region is already assigned to the PCI
> device.  I think I need to figure out how
> PCI bridges declare their address range but don't lock it, so that the
> device in the FPGA (in this case the ICAP) can
> claim it later.
> 
> Steve
> 
> 
> 
> 
> This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
> 
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

Re: [PATCH] of/fdt: Add unflatten_partial_device_tree

[Grant Likely]

On Thu, Jul 1, 2010 at 10:18 PM, David Gibson
<david-xT8FGy+AXnRB3Ne2BGzF6laj5H9X9Tb+@public.gmane.org> wrote:
> On Thu, Jul 01, 2010 at 08:59:16AM -0700, Stephen Neuendorffer wrote:
> [snip]
>> Going down this path, I've taken an approach where the PCI driver reads
>> the PCI BARs which are set earlier
>> and stuffs the correct ranges=<> property into the device tree.  I think
>> this is necessary because (I believe)
>> powerpc programs the BARs based on the flat device tree, whereas on X86,
>> the BIOS enumerates the BARs and
>
> Only on some powerpc subplatforms, I believe.  Some platforms have
> minimal firmwares that either don't configure the BARs at all, or get
> them so hopelessly wrong that we have to reconfigure everything anyway.

On powerpc without OFW, typically the device tree specifies the host
bridge BARs, and then the kernel enumerates the devices.  The device
tree usually doesn't specify where the child devices get located, but
it does tell the PCI subsystem what address ranges are available.

If OFW is present, then the kernel can usually adopt whatever OFW did
during enumeration.

In your situation, yes you will have to read the BAR settings provided
by the PCI subsystem and populate the ranges property correctly.

>> OF: ** translation for device /plb@0/xps-hwicap@80030000 **
>> OF: bus is default (na=1, ns=1) on /plb@0
>> OF: translating address: 80030000
>> OF: parent bus is default (na=1, ns=1) on /
>> OF: walking ranges...
>> OF: default map, cp=80000000, s=10000000, da=80030000
>> OF: parent translation for: d0000000
>> OF: with offset: 30000
>> OF: one level translation: d0030000
>> OF: reached root node
>> of_icap d0030000.xps-hwicap: Xilinx icap port driver
>> of_icap d0030000.xps-hwicap: Couldn't lock memory region at d0030000
>> of_icap: probe of d0030000.xps-hwicap failed with error -16
>>
>> Apparently because the address region is already assigned to the PCI
>> device.  I think I need to figure out how
>> PCI bridges declare their address range but don't lock it, so that the
>> device in the FPGA (in this case the ICAP) can
>> claim it later.

You also need to make sure your devices are children of the pci_device
so that they can claim the memory regions that they use.  If it isn't
a child, then it cannot claim the same region.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

[PATCH] arch/x86: Add support for device tree code.

[Stephen Neuendorffer]

A few support functions that x86 didn't have before.  I have no
idea if continuing to add these functions to every arch is a good thing
or whether they should (for instance) be weak symbols with a
generic definition.
---
 arch/x86/include/asm/device.h |    3 ++
 arch/x86/include/asm/irq.h    |    4 +++
 arch/x86/kernel/Makefile      |    1 +
 arch/x86/kernel/device_tree.c |   55 +++++++++++++++++++++++++++++++++++++++++
 include/linux/of_irq.h        |    1 +
 5 files changed, 64 insertions(+), 0 deletions(-)
 create mode 100644 arch/x86/kernel/device_tree.c

diff --git a/arch/x86/include/asm/device.h b/arch/x86/include/asm/device.h
index 029f230..0bf0a17 100644
--- a/arch/x86/include/asm/device.h
+++ b/arch/x86/include/asm/device.h
@@ -16,4 +16,7 @@ struct dma_map_ops *dma_ops;
 struct pdev_archdata {
 };
 
+/* Don't override the default bus id behaviour */
+#define of_device_make_bus_id __of_device_make_bus_id
+
 #endif /* _ASM_X86_DEVICE_H */
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index 5458380..6c61992 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -10,6 +10,10 @@
 #include <asm/apicdef.h>
 #include <asm/irq_vectors.h>
 
+#define NO_IRQ (-1)
+
+#define irq_dispose_mapping(...)
+
 static inline int irq_canonicalize(int irq)
 {
 	return ((irq == 2) ? 9 : irq);
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index e77b220..a5c20e8 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -105,6 +105,7 @@ scx200-y			+= scx200_32.o
 
 obj-$(CONFIG_OLPC)		+= olpc.o
 obj-$(CONFIG_X86_MRST)		+= mrst.o
+obj-$(CONFIG_OF)		+= device_tree.o
 
 microcode-y				:= microcode_core.o
 microcode-$(CONFIG_MICROCODE_INTEL)	+= microcode_intel.o
diff --git a/arch/x86/kernel/device_tree.c b/arch/x86/kernel/device_tree.c
new file mode 100644
index 0000000..ff067f6
--- /dev/null
+++ b/arch/x86/kernel/device_tree.c
@@ -0,0 +1,55 @@
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/pci_regs.h>
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+/*
+ * The list of OF IDs below is used for matching bus types in the
+ * system whose devices are to be exposed as of_platform_devices.
+ *
+ * This is the default list valid for most platforms. This file provides
+ * functions who can take an explicit list if necessary though
+ *
+ * The search is always performed recursively looking for children of
+ * the provided device_node and recursively if such a children matches
+ * a bus type in the list
+ */
+
+const struct of_device_id of_default_bus_ids[] = {
+	{ .type = "soc", },
+	{ .compatible = "soc", },
+	{ .type = "plb5", },
+	{ .type = "plb4", },
+	{ .type = "opb", },
+	{ .type = "simple", },
+	{},
+};
+
+/*
+ * Interrupt remapper
+ */
+
+struct device_node *of_irq_find_parent_by_phandle(phandle p)
+{
+	return of_find_node_by_phandle(p);
+}
+
+int of_irq_map_one(struct device_node *device,
+			int index, struct of_irq *out_irq)
+{
+	return __of_irq_map_one(device, index, out_irq);
+}
+EXPORT_SYMBOL_GPL(of_irq_map_one);
+
+unsigned int irq_create_of_mapping(struct device_node *controller,
+				   const u32 *intspec, unsigned int intsize)
+{
+	return intspec[0];
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index 935a14d..8a6482a 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -6,6 +6,7 @@ struct of_irq;
 #include <linux/types.h>
 #include <linux/of.h>
 #include <linux/ioport.h>
+#include <linux/irq.h>
 
 /*
  * irq_of_parse_and_map() is used ba all OF enabled platforms; but SPARC
-- 
1.5.6.6



This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

[PATCH] xilinx_pcipr: Added Xilinx reconfigurable PCI endpoint driver.

[Stephen Neuendorffer]

This bus has an internal bus which contains some devices, which
are described in a device tree.  This code is *very* preliminary
and mainly exists to exercise the device tree code on an arbitrary
architecture.
---
 drivers/pci/Kconfig        |    9 ++
 drivers/pci/Makefile       |    2 +
 drivers/pci/xilinx_pcipr.c |  203 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 214 insertions(+), 0 deletions(-)
 create mode 100644 drivers/pci/xilinx_pcipr.c

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 34ef70d..ec9b25d 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -65,3 +65,12 @@ config PCI_IOAPIC
 	depends on ACPI
 	depends on HOTPLUG
 	default y
+
+config XILINX_PCIPR
+	tristate "Xilinx OF-based PCI endpoint"
+	depends on PCI
+	select OF
+	select OF_FLATTREE
+        select OF_DEVICE
+	help
+	  Enable support for Xilinx PCIPR endpoint
\ No newline at end of file
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 0b51857..ec44c21 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -62,6 +62,8 @@ obj-$(CONFIG_PCI_SYSCALL) += syscall.o
 
 obj-$(CONFIG_PCI_STUB) += pci-stub.o
 
+obj-$(CONFIG_XILINX_PCIPR) += xilinx_pcipr.o
+
 ifeq ($(CONFIG_PCI_DEBUG),y)
 EXTRA_CFLAGS += -DDEBUG
 endif
diff --git a/drivers/pci/xilinx_pcipr.c b/drivers/pci/xilinx_pcipr.c
new file mode 100644
index 0000000..17fde0b
--- /dev/null
+++ b/drivers/pci/xilinx_pcipr.c
@@ -0,0 +1,203 @@
+/*
+ *  Copyright 2010 Xilinx, Inc.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/ide.h>
+#include <linux/init.h>
+#include <linux/dmi.h>
+
+#include <linux/of_fdt.h>
+#include <linux/of_platform.h>
+
+
+#include <asm/io.h>
+
+#define DRV_NAME "xilinx_pcipr"
+
+
+unsigned char pcipr_dtb[] = {
+  0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x01, 0x6a, 0x00, 0x00, 0x00, 0x38,
+  0x00, 0x00, 0x01, 0x24, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11,
+  0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46,
+  0x00, 0x00, 0x00, 0xec, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03,
+  0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x01,
+  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x00, 0x1b,
+  0x78, 0x6c, 0x6e, 0x78, 0x2c, 0x70, 0x6c, 0x62, 0x2d, 0x76, 0x34, 0x36,
+  0x2d, 0x31, 0x2e, 0x30, 0x33, 0x2e, 0x61, 0x00, 0x78, 0x6c, 0x6e, 0x78,
+  0x2c, 0x70, 0x6c, 0x62, 0x2d, 0x76, 0x34, 0x36, 0x2d, 0x31, 0x2e, 0x30,
+  0x30, 0x2e, 0x61, 0x00, 0x73, 0x69, 0x6d, 0x70, 0x6c, 0x65, 0x2d, 0x62,
+  0x75, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x78, 0x70, 0x73, 0x2d,
+  0x68, 0x77, 0x69, 0x63, 0x61, 0x70, 0x40, 0x38, 0x30, 0x30, 0x33, 0x30,
+  0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x17,
+  0x00, 0x00, 0x00, 0x1b, 0x78, 0x6c, 0x6e, 0x78, 0x2c, 0x78, 0x70, 0x73,
+  0x2d, 0x68, 0x77, 0x69, 0x63, 0x61, 0x70, 0x2d, 0x31, 0x2e, 0x30, 0x30,
+  0x2e, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x08,
+  0x00, 0x00, 0x00, 0x26, 0x80, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x2a,
+  0x76, 0x69, 0x72, 0x74, 0x65, 0x78, 0x35, 0x00, 0x00, 0x00, 0x00, 0x03,
+  0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x36, 0x66, 0x61, 0x6c, 0x73,
+  0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02,
+  0x00, 0x00, 0x00, 0x09, 0x23, 0x61, 0x64, 0x64, 0x72, 0x65, 0x73, 0x73,
+  0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00, 0x23, 0x73, 0x69, 0x7a, 0x65,
+  0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00, 0x63, 0x6f, 0x6d, 0x70, 0x61,
+  0x74, 0x69, 0x62, 0x6c, 0x65, 0x00, 0x72, 0x65, 0x67, 0x00, 0x78, 0x6c,
+  0x6e, 0x78, 0x2c, 0x66, 0x61, 0x6d, 0x69, 0x6c, 0x79, 0x00, 0x78, 0x6c,
+  0x6e, 0x78, 0x2c, 0x73, 0x69, 0x6d, 0x75, 0x6c, 0x61, 0x74, 0x69, 0x6f,
+  0x6e, 0x00
+};
+unsigned int pcipr_dtb_len = 362;
+
+
+struct xilinx_pcipr_drvdata {
+	unsigned long *blob;
+	struct device_node *child_nodes;
+};
+
+/**
+ *	xilinx_pcipr_probe - Setup the endpoint
+ *	@dev: PCI device to set up
+ */
+static int __devinit xilinx_pcipr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+  int ret;
+  struct xilinx_pcipr_drvdata *drvdata;
+	dev_dbg(&pdev->dev, "xilinx_pcipr_probe\n");
+
+	drvdata = kzalloc(sizeof(struct xilinx_pcipr_drvdata), GFP_KERNEL);
+	if (!drvdata) {
+		dev_err(&pdev->dev, "Couldn't allocate device private record\n");
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	dev_set_drvdata(&pdev->dev, (void *)drvdata);
+
+/* 	/\* */
+/* 	 * If we failed to assign proper bus numbers for this cardbus */
+/* 	 * controller during PCI probe, its subordinate pci_bus is NULL. */
+/* 	 * Bail out if so. */
+/* 	 *\/ */
+/* 	if (!dev->subordinate) { */
+/* 		dev_printk(KERN_ERR, &dev->dev, "no bus associated! " */
+/* 			   "(try 'pci=assign-busses')\n"); */
+/* 		return -ENODEV; */
+/* 	} */
+
+	/*
+	 * Do some basic sanity checking..
+	 */
+	if (pci_enable_device(pdev)) {
+		ret = -EBUSY;
+		goto free;
+	}
+
+	ret = pci_request_regions(pdev, "xilinx_pcipr");
+	if (ret)
+		goto disable;
+
+	if (!pci_resource_start(pdev, 0)) {
+		dev_printk(KERN_ERR, &pdev->dev, "No cardbus resource!\n");
+		ret = -ENODEV;
+		goto release;
+	}
+
+	drvdata->blob = pcipr_dtb;
+
+/* 	/\* */
+/* 	 * Ok, start setup.. Map the cardbus registers, */
+/* 	 * and request the IRQ. */
+/* 	 *\/ */
+/* 	socket->base = ioremap(pci_resource_start(pdev, 0), 0x1000); */
+/* 	if (!socket->base) { */
+/* 		ret = -ENOMEM; */
+/* 		goto release; */
+/* 	} */
+
+	/*
+	 * report the subsystem vendor and device for help debugging
+	 * the irq stuff...
+	 */
+	dev_printk(KERN_INFO, &pdev->dev, "Xilinx PCIPR bridge found [%04x:%04x]\n",
+		   pdev->subsystem_vendor, pdev->subsystem_device);
+
+
+	//	yenta_fixup_parent_bridge(dev->subordinate);
+
+	// initialize our sub-devices.
+
+	
+	unflatten_partial_device_tree(drvdata->blob, &drvdata->child_nodes);
+	of_platform_bus_probe(drvdata->child_nodes, NULL, &pdev->dev);
+
+/* 	printk(KERN_CRIT DRIVER_NAME ": Discovered %d devices.\n", */
+/* 	       devices->num_devices); */
+/* 	for (i = 0; i < devices->num_devices; i++) { */
+/* 		printk(KERN_CRIT DRIVER_NAME ": Adding device %s.\n", */
+/* 		       devices->device[i].name); */
+/* 		devices->device[i].dev.release = do_nothing_release; */
+/* 		platform_device_register(&(devices->device[i])); */
+/* 		// sysfs_create_link(&(xilinx_socket_dev.dev->kobj), &(xilinx_socket_dev.dev->kobj), "x"); */
+/* 	} */
+
+/* 	printk(KERN_CRIT DRIVER_NAME ": Done probing socket.\n"); */
+
+
+ release:
+	pci_release_regions(pdev);
+ disable:
+	pci_disable_device(pdev);
+ free:
+	kfree(drvdata);
+ out:
+	return ret;
+}
+
+static int __devexit xilinx_pcipr_remove(struct pci_dev *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct xilinx_pcipr_drvdata *drvdata = dev_get_drvdata(dev);
+
+	return 0;
+}
+
+
+static const struct pci_device_id xilinx_pcipr_ids[] = {
+	{ PCI_VDEVICE(XILINX, 0x0505), 0 },
+	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
+	{ 0, },
+};
+MODULE_DEVICE_TABLE(pci, xilinx_pcipr_ids);
+
+static struct pci_driver  xilinx_pcipr_driver = {
+	.name		= "XILINX_PCIPR",
+	.id_table	= xilinx_pcipr_ids,
+	.probe		= xilinx_pcipr_probe,
+	.remove		= xilinx_pcipr_remove,
+	//	.suspend	= ide_pci_suspend,
+	//	.resume		= ide_pci_resume,
+};
+
+static int __init xilinx_pcipr_init(void)
+{
+  return ide_pci_register_driver(&xilinx_pcipr_driver);
+}
+
+static void __exit xilinx_pcipr_exit(void)
+{
+	pci_unregister_driver(&xilinx_pcipr_driver);
+}
+
+module_init(xilinx_pcipr_init);
+module_exit(xilinx_pcipr_exit);
+
+MODULE_AUTHOR("Xilinx Research Labs");
+MODULE_DESCRIPTION("PCI driver for PCI reconfigurable endpoint");
+MODULE_LICENSE("GPL");
-- 
1.5.6.6



This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.

Re: [PATCH] xilinx_pcipr: Added Xilinx reconfigurable PCI endpoint driver.

[Grant Likely]

On Mon, Jun 28, 2010 at 10:47 AM, Stephen Neuendorffer
<stephen.neuendorffer-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> wrote:
> This bus has an internal bus which contains some devices, which
> are described in a device tree.  This code is *very* preliminary
> and mainly exists to exercise the device tree code on an arbitrary
> architecture.
> ---
>  drivers/pci/Kconfig        |    9 ++
>  drivers/pci/Makefile       |    2 +
>  drivers/pci/xilinx_pcipr.c |  203 ++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 214 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/pci/xilinx_pcipr.c
>
> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index 34ef70d..ec9b25d 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -65,3 +65,12 @@ config PCI_IOAPIC
>        depends on ACPI
>        depends on HOTPLUG
>        default y
> +
> +config XILINX_PCIPR
> +       tristate "Xilinx OF-based PCI endpoint"
> +       depends on PCI
> +       select OF
> +       select OF_FLATTREE
> +        select OF_DEVICE
> +       help
> +         Enable support for Xilinx PCIPR endpoint
> \ No newline at end of file
> diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
> index 0b51857..ec44c21 100644
> --- a/drivers/pci/Makefile
> +++ b/drivers/pci/Makefile
> @@ -62,6 +62,8 @@ obj-$(CONFIG_PCI_SYSCALL) += syscall.o
>
>  obj-$(CONFIG_PCI_STUB) += pci-stub.o
>
> +obj-$(CONFIG_XILINX_PCIPR) += xilinx_pcipr.o
> +
>  ifeq ($(CONFIG_PCI_DEBUG),y)
>  EXTRA_CFLAGS += -DDEBUG
>  endif
> diff --git a/drivers/pci/xilinx_pcipr.c b/drivers/pci/xilinx_pcipr.c
> new file mode 100644
> index 0000000..17fde0b
> --- /dev/null
> +++ b/drivers/pci/xilinx_pcipr.c
> @@ -0,0 +1,203 @@
> +/*
> + *  Copyright 2010 Xilinx, Inc.
> + *
> + */
> +
> +#include <linux/module.h>
> +#include <linux/types.h>
> +#include <linux/kernel.h>
> +#include <linux/pci.h>
> +#include <linux/ide.h>
> +#include <linux/init.h>
> +#include <linux/dmi.h>
> +
> +#include <linux/of_fdt.h>
> +#include <linux/of_platform.h>
> +
> +
> +#include <asm/io.h>
> +
> +#define DRV_NAME "xilinx_pcipr"
> +
> +
> +unsigned char pcipr_dtb[] = {
> +  0xd0, 0x0d, 0xfe, 0xed, 0x00, 0x00, 0x01, 0x6a, 0x00, 0x00, 0x00, 0x38,
> +  0x00, 0x00, 0x01, 0x24, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x11,
> +  0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46,
> +  0x00, 0x00, 0x00, 0xec, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
> +  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x04,
> +  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03,
> +  0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x01,
> +  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x33, 0x00, 0x00, 0x00, 0x1b,
> +  0x78, 0x6c, 0x6e, 0x78, 0x2c, 0x70, 0x6c, 0x62, 0x2d, 0x76, 0x34, 0x36,
> +  0x2d, 0x31, 0x2e, 0x30, 0x33, 0x2e, 0x61, 0x00, 0x78, 0x6c, 0x6e, 0x78,
> +  0x2c, 0x70, 0x6c, 0x62, 0x2d, 0x76, 0x34, 0x36, 0x2d, 0x31, 0x2e, 0x30,
> +  0x30, 0x2e, 0x61, 0x00, 0x73, 0x69, 0x6d, 0x70, 0x6c, 0x65, 0x2d, 0x62,
> +  0x75, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x78, 0x70, 0x73, 0x2d,
> +  0x68, 0x77, 0x69, 0x63, 0x61, 0x70, 0x40, 0x38, 0x30, 0x30, 0x33, 0x30,
> +  0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x17,
> +  0x00, 0x00, 0x00, 0x1b, 0x78, 0x6c, 0x6e, 0x78, 0x2c, 0x78, 0x70, 0x73,
> +  0x2d, 0x68, 0x77, 0x69, 0x63, 0x61, 0x70, 0x2d, 0x31, 0x2e, 0x30, 0x30,
> +  0x2e, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x08,
> +  0x00, 0x00, 0x00, 0x26, 0x80, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
> +  0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x2a,
> +  0x76, 0x69, 0x72, 0x74, 0x65, 0x78, 0x35, 0x00, 0x00, 0x00, 0x00, 0x03,
> +  0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x36, 0x66, 0x61, 0x6c, 0x73,
> +  0x65, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02,
> +  0x00, 0x00, 0x00, 0x09, 0x23, 0x61, 0x64, 0x64, 0x72, 0x65, 0x73, 0x73,
> +  0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00, 0x23, 0x73, 0x69, 0x7a, 0x65,
> +  0x2d, 0x63, 0x65, 0x6c, 0x6c, 0x73, 0x00, 0x63, 0x6f, 0x6d, 0x70, 0x61,
> +  0x74, 0x69, 0x62, 0x6c, 0x65, 0x00, 0x72, 0x65, 0x67, 0x00, 0x78, 0x6c,
> +  0x6e, 0x78, 0x2c, 0x66, 0x61, 0x6d, 0x69, 0x6c, 0x79, 0x00, 0x78, 0x6c,
> +  0x6e, 0x78, 0x2c, 0x73, 0x69, 0x6d, 0x75, 0x6c, 0x61, 0x74, 0x69, 0x6f,
> +  0x6e, 0x00
> +};
> +unsigned int pcipr_dtb_len = 362;
> +
> +
> +struct xilinx_pcipr_drvdata {
> +       unsigned long *blob;
> +       struct device_node *child_nodes;
> +};
> +
> +/**
> + *     xilinx_pcipr_probe - Setup the endpoint
> + *     @dev: PCI device to set up
> + */
> +static int __devinit xilinx_pcipr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> +{
> +  int ret;
> +  struct xilinx_pcipr_drvdata *drvdata;
> +       dev_dbg(&pdev->dev, "xilinx_pcipr_probe\n");
> +
> +       drvdata = kzalloc(sizeof(struct xilinx_pcipr_drvdata), GFP_KERNEL);
> +       if (!drvdata) {
> +               dev_err(&pdev->dev, "Couldn't allocate device private record\n");
> +               ret = -ENOMEM;
> +               goto out;
> +       }
> +
> +       dev_set_drvdata(&pdev->dev, (void *)drvdata);
> +
> +/*     /\* */
> +/*      * If we failed to assign proper bus numbers for this cardbus */
> +/*      * controller during PCI probe, its subordinate pci_bus is NULL. */
> +/*      * Bail out if so. */
> +/*      *\/ */
> +/*     if (!dev->subordinate) { */
> +/*             dev_printk(KERN_ERR, &dev->dev, "no bus associated! " */
> +/*                        "(try 'pci=assign-busses')\n"); */
> +/*             return -ENODEV; */
> +/*     } */
> +
> +       /*
> +        * Do some basic sanity checking..
> +        */
> +       if (pci_enable_device(pdev)) {
> +               ret = -EBUSY;
> +               goto free;
> +       }
> +
> +       ret = pci_request_regions(pdev, "xilinx_pcipr");
> +       if (ret)
> +               goto disable;
> +
> +       if (!pci_resource_start(pdev, 0)) {
> +               dev_printk(KERN_ERR, &pdev->dev, "No cardbus resource!\n");
> +               ret = -ENODEV;
> +               goto release;
> +       }
> +
> +       drvdata->blob = pcipr_dtb;
> +
> +/*     /\* */
> +/*      * Ok, start setup.. Map the cardbus registers, */
> +/*      * and request the IRQ. */
> +/*      *\/ */
> +/*     socket->base = ioremap(pci_resource_start(pdev, 0), 0x1000); */
> +/*     if (!socket->base) { */
> +/*             ret = -ENOMEM; */
> +/*             goto release; */
> +/*     } */
> +
> +       /*
> +        * report the subsystem vendor and device for help debugging
> +        * the irq stuff...
> +        */
> +       dev_printk(KERN_INFO, &pdev->dev, "Xilinx PCIPR bridge found [%04x:%04x]\n",
> +                  pdev->subsystem_vendor, pdev->subsystem_device);
> +
> +
> +       //      yenta_fixup_parent_bridge(dev->subordinate);
> +
> +       // initialize our sub-devices.
> +
> +
> +       unflatten_partial_device_tree(drvdata->blob, &drvdata->child_nodes);
> +       of_platform_bus_probe(drvdata->child_nodes, NULL, &pdev->dev);

This looks fairly sane.  As we talked about before, you'll probably
want to use the firmware loading mechanism to inject the dtb fragment
into the kernel.

g.