From: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com>
To: Caleb James DeLisle <cjd@cjdns.fr>, linux-mips@vger.kernel.org
Cc: naseefkm@gmail.com, daniel.lezcano@kernel.org, tglx@kernel.org,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] clocksource/timer-econet-en751221: Support irq number per timer
Date: Wed, 6 May 2026 16:39:13 +0200 [thread overview]
Message-ID: <e5851014-3f9f-4e5b-bdfe-8c277f581155@oss.qualcomm.com> (raw)
In-Reply-To: <20260416175101.958073-3-cjd@cjdns.fr>
On 4/16/26 19:51, Caleb James DeLisle wrote:
> This timer was first developed on the EN751221 which is a MIPS 34Kc
> and therefore has a custom interrupt controller. The hardware for
> econet,en751221-intc implements percpu routing of the timer
> interrupts.
>
> However, the EN751627 and EN7528 are MIPS 1004Kc based, and
> therefore use the standard mti,gic compatible interrupt controller.
> This interrupt controller uses a different IRQ number for each
> timer interrupt.
>
> Add support for both models in this timer driver.
Given the changes done in this driver, the description is short and does
not explain why the code is so impacted.
I suggest to split the changes in order to facilitate the review process
[ ... ]
next prev parent reply other threads:[~2026-05-06 14:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-16 17:50 [PATCH 0/2] clocksource/timer-econet-en751221: Support irq number per timer Caleb James DeLisle
2026-04-16 17:51 ` [PATCH 1/2] dt-bindings: timer: econet: Update EN751627 for multi-IRQ Caleb James DeLisle
2026-04-17 16:17 ` Conor Dooley
2026-04-16 17:51 ` [PATCH 2/2] clocksource/timer-econet-en751221: Support irq number per timer Caleb James DeLisle
2026-05-06 14:39 ` Daniel Lezcano [this message]
2026-05-06 15:27 ` Caleb James DeLisle
2026-05-06 15:39 ` Daniel Lezcano
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