* [PATCH v8 11/14] ARM: dts: omap5-uevm: Provide USB PHY clock
From: Roger Quadros @ 2014-02-20 11:40 UTC (permalink / raw)
To: tony, bcousson, lee.jones
Cc: balbi, nm, khilman, linux-omap, linux-arm-kernel, linux-kernel,
devicetree, linux-usb, Roger Quadros
In-Reply-To: <1392896409-5101-1-git-send-email-rogerq@ti.com>
The HS USB 2 PHY gets its clock from AUXCLK1. Provide this
information.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/boot/dts/omap5-uevm.dts | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 002fa70..3b99ec2 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -31,12 +31,8 @@
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
- /**
- * FIXME
- * Put the right clock phandle here when available
- * clocks = <&auxclk1>;
- * clock-names = "main_clk";
- */
+ clocks = <&auxclk1_ck>;
+ clock-names = "main_clk";
clock-frequency = <19200000>;
};
--
1.8.3.2
^ permalink raw reply related
* [PATCH v8 12/14] ARM: OMAP2+: Remove legacy_init_ehci_clk()
From: Roger Quadros @ 2014-02-20 11:40 UTC (permalink / raw)
To: tony, bcousson, lee.jones
Cc: balbi, nm, khilman, linux-omap, linux-arm-kernel, linux-kernel,
devicetree, linux-usb, Roger Quadros
In-Reply-To: <1392896409-5101-1-git-send-email-rogerq@ti.com>
The necessary clock phandle for the EHCI clock is now provided
via device tree so we no longer need this legacy method.
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
arch/arm/mach-omap2/pdata-quirks.c | 16 ----------------
1 file changed, 16 deletions(-)
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 3d5b24d..f1ecd86 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -31,20 +31,6 @@ struct pdata_init {
struct of_dev_auxdata omap_auxdata_lookup[];
static struct twl4030_gpio_platform_data twl_gpio_auxdata;
-/*
- * Create alias for USB host PHY clock.
- * Remove this when clock phandle can be provided via DT
- */
-static void __init __used legacy_init_ehci_clk(char *clkname)
-{
- int ret;
-
- ret = clk_add_alias("main_clk", NULL, clkname, NULL);
- if (ret)
- pr_err("%s:Failed to add main_clk alias to %s :%d\n",
- __func__, clkname, ret);
-}
-
#if IS_ENABLED(CONFIG_WL12XX)
static struct wl12xx_platform_data wl12xx __initdata;
@@ -182,7 +168,6 @@ static void __init omap4_sdp_legacy_init(void)
static void __init omap4_panda_legacy_init(void)
{
omap4_panda_display_init_of();
- legacy_init_ehci_clk("auxclk3_ck");
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
}
#endif
@@ -190,7 +175,6 @@ static void __init omap4_panda_legacy_init(void)
#ifdef CONFIG_SOC_OMAP5
static void __init omap5_uevm_legacy_init(void)
{
- legacy_init_ehci_clk("auxclk1_ck");
}
#endif
--
1.8.3.2
^ permalink raw reply related
* [PATCH v8 13/14] ARM: dts: OMAP2+: Get rid of incompatible ids for USB host nodes
From: Roger Quadros @ 2014-02-20 11:40 UTC (permalink / raw)
To: tony-4v6yS6AI5VpBDgjK7y7TUQ, bcousson-rdvid1DuHRBWk0Htik3J/w,
lee.jones-QSEj5FYQhm4dnm+yROfE0A
Cc: balbi-l0cyMroinI0, nm-l0cyMroinI0, khilman-QSEj5FYQhm4dnm+yROfE0A,
linux-omap-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-usb-u79uwXL29TY76Z2rM5mHXA, Roger Quadros, Alan Stern
In-Reply-To: <1392896409-5101-1-git-send-email-rogerq-l0cyMroinI0@public.gmane.org>
The OMAP EHCI and OHCI controllers are not compatible with drivers
other than "ti,ehci-omap" and "ti,ohci-omap3" respectively, so get
rid of the incompatible ids.
CC: Alan Stern <stern-nwvwT67g6+6dFdvTe/nMLpVzexx5G7lz@public.gmane.org>
Signed-off-by: Roger Quadros <rogerq-l0cyMroinI0@public.gmane.org>
---
arch/arm/boot/dts/omap3.dtsi | 4 ++--
arch/arm/boot/dts/omap4.dtsi | 4 ++--
arch/arm/boot/dts/omap5.dtsi | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index a5fc83b..8e7de9e 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -634,14 +634,14 @@
ranges;
usbhsohci: ohci@48064400 {
- compatible = "ti,ohci-omap3", "usb-ohci";
+ compatible = "ti,ohci-omap3";
reg = <0x48064400 0x400>;
interrupt-parent = <&intc>;
interrupts = <76>;
};
usbhsehci: ehci@48064800 {
- compatible = "ti,ehci-omap", "usb-ehci";
+ compatible = "ti,ehci-omap";
reg = <0x48064800 0x400>;
interrupt-parent = <&intc>;
interrupts = <77>;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 39a05ce..ff1b057 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -705,14 +705,14 @@
"refclk_60m_ext_p2";
usbhsohci: ohci@4a064800 {
- compatible = "ti,ohci-omap3", "usb-ohci";
+ compatible = "ti,ohci-omap3";
reg = <0x4a064800 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
};
usbhsehci: ehci@4a064c00 {
- compatible = "ti,ehci-omap", "usb-ehci";
+ compatible = "ti,ehci-omap";
reg = <0x4a064c00 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index d4dae48..f65aa65 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -783,14 +783,14 @@
"refclk_60m_ext_p2";
usbhsohci: ohci@4a064800 {
- compatible = "ti,ohci-omap3", "usb-ohci";
+ compatible = "ti,ohci-omap3";
reg = <0x4a064800 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
};
usbhsehci: ehci@4a064c00 {
- compatible = "ti,ehci-omap", "usb-ehci";
+ compatible = "ti,ehci-omap";
reg = <0x4a064c00 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
--
1.8.3.2
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^ permalink raw reply related
* [PATCH v8 14/14] usb: omap: dts: Update DT binding example usage
From: Roger Quadros @ 2014-02-20 11:40 UTC (permalink / raw)
To: tony, bcousson, lee.jones
Cc: balbi, nm, khilman, linux-omap, linux-arm-kernel, linux-kernel,
devicetree, linux-usb, Roger Quadros, Alan Stern
In-Reply-To: <1392896409-5101-1-git-send-email-rogerq@ti.com>
Remove non-compatible id from examples.
CC: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
Documentation/devicetree/bindings/usb/ehci-omap.txt | 2 +-
Documentation/devicetree/bindings/usb/ohci-omap3.txt | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/ehci-omap.txt b/Documentation/devicetree/bindings/usb/ehci-omap.txt
index 485a9a1..3dc231c 100644
--- a/Documentation/devicetree/bindings/usb/ehci-omap.txt
+++ b/Documentation/devicetree/bindings/usb/ehci-omap.txt
@@ -21,7 +21,7 @@ Documentation/devicetree/bindings/mfd/omap-usb-host.txt
Example for OMAP4:
usbhsehci: ehci@4a064c00 {
- compatible = "ti,ehci-omap", "usb-ehci";
+ compatible = "ti,ehci-omap";
reg = <0x4a064c00 0x400>;
interrupts = <0 77 0x4>;
};
diff --git a/Documentation/devicetree/bindings/usb/ohci-omap3.txt b/Documentation/devicetree/bindings/usb/ohci-omap3.txt
index 14ab428..ce8c47cff 100644
--- a/Documentation/devicetree/bindings/usb/ohci-omap3.txt
+++ b/Documentation/devicetree/bindings/usb/ohci-omap3.txt
@@ -9,7 +9,7 @@ Required properties:
Example for OMAP4:
usbhsohci: ohci@4a064800 {
- compatible = "ti,ohci-omap3", "usb-ohci";
+ compatible = "ti,ohci-omap3";
reg = <0x4a064800 0x400>;
interrupts = <0 76 0x4>;
};
--
1.8.3.2
^ permalink raw reply related
* Re: [PATCH v5 1/4] ASoC: tlv320aic32x4: Support for master clock
From: Mark Brown @ 2014-02-20 11:47 UTC (permalink / raw)
To: Markus Pargmann
Cc: Liam Girdwood, Lars-Peter Clausen,
alsa-devel-K7yf7f+aM1XWsZ/bQMPhNw, kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20140220113749.GB16727-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 520 bytes --]
On Thu, Feb 20, 2014 at 12:37:49PM +0100, Markus Pargmann wrote:
> It seems none of these modes are supported yet. aic32x4_hw_params setups
> the clock tree relying on a master clock to be used for the PLL.
> Otherwise hw_params fails. So currently mclk is not optional for the
> driver. But it is still optional for the real hardware.
> What do you think about declaring the mclk as optional property in the
> DT bindings documentation but to handle it as a required clock in the
> driver?
That's fine, makes sense.
[-- Attachment #2: Digital signature --]
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^ permalink raw reply
* Re: [PATCH v4 0/4] Bugfix for of_match_node ordering
From: Grant Likely @ 2014-02-20 11:53 UTC (permalink / raw)
To: Kevin Hao, Sachin Kamat
Cc: devicetree@vger.kernel.org, LKML, Rob Herring,
Sebastian Hesselbarth, linux-samsung-soc
In-Reply-To: <20140220101240.GA3745@pek-khao-d1.corp.ad.wrs.com>
On Thu, 20 Feb 2014 18:12:40 +0800, Kevin Hao <haokexin@gmail.com> wrote:
> On Thu, Feb 20, 2014 at 02:09:08PM +0530, Sachin Kamat wrote:
> > Hi Grant,
> >
> > I observe the following boot failure with today's (next-20140220) linux-next
> > tree on Exynos based boards with the default exynos_defconfig.
>
> Does this help?
I've merged this in. I could get my unicore test platform to fail to
boot by turning on lock debugging. I'll leave that option on from now
one.
I've pushed this out to the following branch. Please test and report. It
will also be picked up by linux-next tomorrow.
git://git.secretlab.ca/git/linux devicetree/merge
>
> diff --git a/drivers/of/base.c b/drivers/of/base.c
> index 8a27fc907ab6..9cc893530b9a 100644
> --- a/drivers/of/base.c
> +++ b/drivers/of/base.c
> @@ -381,12 +381,16 @@ static int __of_device_is_compatible(const struct device_node *device,
>
> /* Compatible match has highest priority */
> if (compat && compat[0]) {
> - of_property_for_each_string(device, "compatible", prop, cp) {
> + prop = __of_find_property(device, "compatible", NULL);
> + if (!prop)
> + return 0;
The above 2 lines are unnecessary. of_prop_next_string() will return
NULL if prop is NULL.
g.
> +
> + for (cp = of_prop_next_string(prop, NULL); cp;
> + cp = of_prop_next_string(prop, cp), index++) {
> if (of_compat_cmp(cp, compat, strlen(compat)) == 0) {
> score = INT_MAX/2 - (index << 2);
> break;
> }
> - index++;
> }
> if (!score)
> return 0;
>
>
> Thanks,
> Kevin
^ permalink raw reply
* Re: [PATCH v3 2/6] drivers: of: add initialization code for reserved memory
From: Grant Likely @ 2014-02-20 12:00 UTC (permalink / raw)
To: Marek Szyprowski, linux-kernel, linux-arm-kernel, linaro-mm-sig,
devicetree, linux-doc
Cc: Kyungmin Park, Benjamin Herrenschmidt, Arnd Bergmann,
Michal Nazarewicz, Tomasz Figa, Sascha Hauer, Laura Abbott,
Rob Herring, Olof Johansson, Pawel Moll, Mark Rutland,
Stephen Warren, Ian Campbell, Tomasz Figa, Kumar Gala,
Nishanth Peethambaran, Marc, Josh Cartwright
In-Reply-To: <53046935.3090900@samsung.com>
On Wed, 19 Feb 2014 09:20:05 +0100, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
> Hello,
>
> On 2014-02-18 17:56, Grant Likely wrote:
> > On Tue, 18 Feb 2014 14:37:57 +0100, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
> > > This patch adds device tree support for contiguous and reserved memory
> > > regions defined in device tree.
> > >
> > > Large memory blocks can be reliably reserved only during early boot.
> > > This must happen before the whole memory management subsystem is
> > > initialized, because we need to ensure that the given contiguous blocks
> > > are not yet allocated by kernel. Also it must happen before kernel
> > > mappings for the whole low memory are created, to ensure that there will
> > > be no mappings (for reserved blocks) or mapping with special properties
> > > can be created (for CMA blocks). This all happens before device tree
> > > structures are unflattened, so we need to get reserved memory layout
> > > directly from fdt.
> > >
> > > Later, those reserved memory regions are assigned to devices on each
> > > device structure initialization.
> > >
> > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > > [joshc: rework to implement new DT binding, provide mechanism for
> > > plugging in new reserved-memory node handlers via
> > > RESERVEDMEM_OF_DECLARE]
> > > Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
> > > [mszyprow: added generic memory reservation code]
> > > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > > ---
> > > drivers/of/Kconfig | 5 +
> > > drivers/of/Makefile | 1 +
> > > drivers/of/fdt.c | 2 +
> > > drivers/of/of_reserved_mem.c | 390 +++++++++++++++++++++++++++++++++++++
> > > drivers/of/platform.c | 7 +
> > > include/asm-generic/vmlinux.lds.h | 11 ++
> > > include/linux/of_reserved_mem.h | 65 +++++++
> > > 7 files changed, 481 insertions(+)
> > > create mode 100644 drivers/of/of_reserved_mem.c
> > > create mode 100644 include/linux/of_reserved_mem.h
> > >
> > > diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
> > > index c6973f101a3e..f25931dfc6db 100644
> > > --- a/drivers/of/Kconfig
> > > +++ b/drivers/of/Kconfig
> > > @@ -75,4 +75,9 @@ config OF_MTD
> > > depends on MTD
> > > def_bool y
> > >
> > > +config OF_RESERVED_MEM
> > > + bool
> > > + help
> > > + Helpers to allow for reservation of memory regions
> > > +
> > > endmenu # OF
> > > diff --git a/drivers/of/Makefile b/drivers/of/Makefile
> > > index efd05102c405..ed9660adad77 100644
> > > --- a/drivers/of/Makefile
> > > +++ b/drivers/of/Makefile
> > > @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_MDIO) += of_mdio.o
> > > obj-$(CONFIG_OF_PCI) += of_pci.o
> > > obj-$(CONFIG_OF_PCI_IRQ) += of_pci_irq.o
> > > obj-$(CONFIG_OF_MTD) += of_mtd.o
> > > +obj-$(CONFIG_OF_RESERVED_MEM) += of_reserved_mem.o
> >
> > As mentioned previously, parts of this are absolutely non-optional and
> > cannot be compiled out. If a region is marked as reserved with this
> > binding, then the kernel must respect it. That part of the code must be
> > always configured in.
>
> How can I make it non-optional if all this code must be called from arch
> specific early-boot init code to properly reserve memory. Do you want me
> to add those calls to every architecture which supports OF?
As discussed on IRC, since the static and dynamic regions need to be
parsed in separate passes anyway, it would be fine to do the static pass
during early_init_dt_scan() and defer the dynamic allocation to later.
That said, it requires Laura's series to get rid of meminfo to be merged
first. I'm fine with the calling point to still be done arch specific
and I won't ask you to enable every platform in this patch. That can be
a fixup after Laura's series goes in and I'll help you with the other
architectures.
g.
^ permalink raw reply
* Re: [PATCH 3/4] tty: serial: bcm63xx_uart: add support for DT probing
From: Arnd Bergmann @ 2014-02-20 12:16 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, linux-serial, devicetree@vger.kernel.org,
Maxime Bizon, Greg Kroah-Hartman
In-Reply-To: <CAOiHx=mDYsGjtEXEK+8YUo4WZRQeXYvDJdfk2OQtqheeaD7icw@mail.gmail.com>
On Thursday 20 February 2014 11:59:04 Jonas Gorski wrote:
> On Thu, Feb 20, 2014 at 2:29 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
> > 2014-02-19 16:00 GMT-08:00 Jonas Gorski <jogo@openwrt.org>:
> >> On Thu, Feb 20, 2014 at 12:22 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
> >>> @@ -857,6 +861,12 @@ static int bcm_uart_remove(struct platform_device *pdev)
> >>> return 0;
> >>> }
> >>>
> >>> +static const struct of_device_id bcm63xx_of_match[] = {
> >>> + { .compatible = "brcm,bcm63xx-uart" },
> >>
> >> From my understanding, this should be "brcm,bcm6345-uart", because
> >> this kind of uart appeared first on bcm6345 (well, maybe bcm6335, no
> >> idea which one of these two was first, but the latter was never
> >> supported in mainline anyway).
> >
> > That's right, in fact, I think it might be desirable to handle both
> > compatible string, just as a hint that it is compatible with the
> > entire bcm63xx family. Would that work for you?
>
> I think using a "generic" compatible string is rather frowned upon
> (what do you do if there is eventually a bcm63xx chip with an
> incompatible uart?), but I'm no device tree expert.
It's ok to have a generic name, it's wildcards like the xx above
that we try to avoid, since that breaks down when you get another
device in the same SoC family that is not compatible. This is different
from the Linux way of naming things.
brcm,bcm6345-uart sounds good, if that is the closest we can get
to a generic name, working under the assumption that it's the oldest
implementation of this UART. Ideally we'd find someone with access
to the design documents of the SoC to tell us what the UART is really
called by whoever designed it (which may not even be Broadcom).
If we think there may be some level of variation between the UARTS
in the various bcm63xx SoCs, it would be good to list both the
specific model of the SoC as well as the generic name in "compatible",
so the driver can later detect those differences without requiring
an updated DT.
A BCM63138 for instance could list this as
compatible = "brcm,bcm62138-uart", "brcm-bcm6345-uart";
Arnd
^ permalink raw reply
* Re: [PATCH 3/4] tty: serial: bcm63xx_uart: add support for DT probing
From: Mark Rutland @ 2014-02-20 12:21 UTC (permalink / raw)
To: Jonas Gorski
Cc: Florian Fainelli, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, Maxime Bizon, Greg Kroah-Hartman
In-Reply-To: <CAOiHx=mDYsGjtEXEK+8YUo4WZRQeXYvDJdfk2OQtqheeaD7icw@mail.gmail.com>
On Thu, Feb 20, 2014 at 10:59:04AM +0000, Jonas Gorski wrote:
> On Thu, Feb 20, 2014 at 2:29 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
> > 2014-02-19 16:00 GMT-08:00 Jonas Gorski <jogo@openwrt.org>:
> >> On Thu, Feb 20, 2014 at 12:22 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
> >>> @@ -857,6 +861,12 @@ static int bcm_uart_remove(struct platform_device *pdev)
> >>> return 0;
> >>> }
> >>>
> >>> +static const struct of_device_id bcm63xx_of_match[] = {
> >>> + { .compatible = "brcm,bcm63xx-uart" },
> >>
> >> From my understanding, this should be "brcm,bcm6345-uart", because
> >> this kind of uart appeared first on bcm6345 (well, maybe bcm6335, no
> >> idea which one of these two was first, but the latter was never
> >> supported in mainline anyway).
> >
> > That's right, in fact, I think it might be desirable to handle both
> > compatible string, just as a hint that it is compatible with the
> > entire bcm63xx family. Would that work for you?
>
> I think using a "generic" compatible string is rather frowned upon
> (what do you do if there is eventually a bcm63xx chip with an
> incompatible uart?), but I'm no device tree expert.
As long as each compatible string entry describes something that has a
compatible programming model, there's no problem. The new UART wouldn't
be described with a string it's not compatible with.
I think "brcm,bcm6345-uart," is a nicer name to use for the moment than
"brcm,bcm63xx-uart" as it clearly describes a specific UART and is less
likely to be problematic in future if an incompatible UART appears.
Additionally, each compatible UART can have a more specific compatible
string entry that allows them to be more uniquely identified in case
they need to be handled specially in future. e.g:
compatible = "brcm,bcm634x-uart", "brcm,bcm6345-uart";
Then if a bcm634y comes out with a UART that's not compatible with the
bcm6345 UART, it just needs:
compatible = "brcm,bcm634y-uart";
Thanks,
Mark.
^ permalink raw reply
* [PATCH v4 1/7 fixup] drivers: of: add initialization code for reserved memory (fixup)
From: Marek Szyprowski @ 2014-02-20 12:40 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linaro-mm-sig-cunTk1MwBs8s++Sfvej+rw,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-doc-u79uwXL29TY76Z2rM5mHXA
Cc: Marek Szyprowski, Benjamin Herrenschmidt, Arnd Bergmann,
Michal Nazarewicz, Grant Likely, Tomasz Figa, Sascha Hauer,
Laura Abbott, Rob Herring, Olof Johansson, Pawel Moll,
Mark Rutland, Stephen Warren, Ian Campbell, Tomasz Figa,
Kumar Gala, Nishanth Peethambaran, Marc, Josh Cartwright,
Catalin Marinas, Will Deacon, Paul Mackerras
In-Reply-To: <1392893567-31623-2-git-send-email-m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Rename 'align' property to 'alignment' to match documentation.
Signed-off-by: Marek Szyprowski <m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
drivers/of/of_reserved_mem.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c
index cacf04810b87..49cf430a9e2a 100644
--- a/drivers/of/of_reserved_mem.c
+++ b/drivers/of/of_reserved_mem.c
@@ -112,10 +112,10 @@ __reserved_mem_alloc_size(unsigned long node, const char *uname,
nomap = of_get_flat_dt_prop(node, "no-map", NULL) != NULL;
- prop = of_get_flat_dt_prop(node, "align", &len);
+ prop = of_get_flat_dt_prop(node, "alignment", &len);
if (prop) {
if (len != dt_root_addr_cells * sizeof(__be32)) {
- pr_err("Reserved memory: invalid align property in '%s' node.\n",
+ pr_err("Reserved memory: invalid alignment property in '%s' node.\n",
uname);
return -EINVAL;
}
--
1.7.9.5
--
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^ permalink raw reply related
* Re: [PATCH v5 2/2] memory: ti-aemif: add bindings for AEMIF driver
From: Ivan Khoronzhuk @ 2014-02-20 12:44 UTC (permalink / raw)
To: Mark Rutland
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
santosh.shilimkar-l0cyMroinI0@public.gmane.org,
galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org,
rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org,
linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Pawel Moll,
rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org,
swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
grygorii.strashko-l0cyMroinI0@public.gmane.org,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
nsekhar-l0cyMroinI0@public.gmane.org
In-Reply-To: <20140219181152.GG25079-NuALmloUBlrZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
On 02/19/2014 08:11 PM, Mark Rutland wrote:
> On Wed, Feb 19, 2014 at 01:40:10PM +0000, Ivan Khoronzhuk wrote:
>> Add bindings for TI Async External Memory Interface (AEMIF) controller.
>>
>> The Async External Memory Interface (EMIF16/AEMIF) controller is intended to
>> provide a glue-less interface to a variety of asynchronous memory devices like
>> ASRA M, NOR and NAND memory. A total of 256M bytes of any of these memories
>> can be accessed via 4 chip selects with 64M byte access per chip select.
>>
>> We are not encoding CS number in reg property, it's memory partition number.
>> The CS number is encoded for Davinci NAND node using standalone property
>> "ti,davinci-chipselect" and we need to provide two memory ranges to it,
>> as result we can't encode CS number in "reg" for AEMIF child devices
>> (NAND/NOR/etc), as it will break bindings compatibility.
>>
>> In this patch, NAND node is used just as an example of child node.
>>
>> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk-l0cyMroinI0@public.gmane.org>
>> ---
>> .../bindings/memory-controllers/ti-aemif.txt | 210 +++++++++++++++++++++
>> 1 file changed, 210 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/memory-controllers/ti-aemif.txt
> [...]
>
>> +- ranges: Contains memory regions. There are two types of
>> + ranges/partitions:
>> + - CS-specific partition/range. If continuous, must be
>> + set up to reflect the memory layout for 4 chipselects,
>> + if not then additional range/partition can be added and
>> + child device can select the proper one.
>> + - control partition which is common for all CS
>> + interfaces.
> This really doesn't sound anything like the typical meaning of ranges on
> a bus.
>
> Why isn't this information encoded in reg properties on the child nodes?
>
> [...]
Note that we do not introduce NAND device bindings here.
The Davinci NAND bindings was introduced and accepted more then one year ago.
And the CS number is encoded for Davinci NAND node using standalone property
"ti,davinci-chipselect" and we need to provide two memory ranges to it,
as result we can't encode CS number in "reg" for AEMIF child devices (NAND/NOR/etc),
as it will break bindings compatibility.
In this document, NAND node is used just as an example of child node.
>> +- ti,cs-ss: enable/disable select strobe mode
>> + In select strobe mode chip select behaves as
>> + the strobe and is active only during the strobe
>> + period. If present then enable.
>> +
>> +- ti,cs-ew: enable/disable extended wait mode
>> + if set, the controller monitors the EMIFWAIT pin
>> + mapped to that chip select to determine if the
>> + device wants to extend the strobe period. If
>> + present then enable.
> When would you have these two in the DT and when wouldn't you? Why can't
> the driver decide?
These are properties of cs node, not the driver itself.
The driver cannot know what child device you are going to attach to cs node
, as result it cannot decide what settings you are using for particular
cs node.
> These names are also opaque. We can clearly do better.
I propose the following names?:
ti,cs-ss --> ti,cs-select-strobe-mode
ti,cs-ew --> ti,cs-extended-waite-mode
Are you OK with it?
>> +
>> +- ti,cs-ta: minimum turn around time, ns
>> + Time between the end of one asynchronous memory
>> + access and the start of another asynchronous
>> + memory access. This delay is not incurred
>> + between a read followed by read or a write
>> + followed by a write to same chip select.
> The name is opaque. How about ti,min-turnaround-time-ns ?
I like without -ns suffix and with cs- prefix:
ti,cs-ta --> ti,cs-min-turnaround-time
Is it OK?
>> +
>> +- ti,cs-rsetup: read setup width, ns
>> + Time between the beginning of a memory cycle
>> + and the activation of read strobe.
>> + Minimum value is 1 (0 treated as 1).
>> +
>> +- ti,cs-rstobe: read strobe width, ns
>> + Time between the activation and deactivation of
>> + the read strobe.
>> + Minimum value is 1 (0 treated as 1).
>> +
>> +- ti,cs-rhold: read hold width, ns
>> + Time between the deactivation of the read
>> + strobe and the end of the cycle (which may be
>> + either an address change or the deactivation of
>> + the chip select signal.
>> + Minimum value is 1 (0 treated as 1).
>> +
>> +- ti,cs-wsetup: write setup width, ns
>> + Time between the beginning of a memory cycle
>> + and the activation of write strobe.
>> + Minimum value is 1 (0 treated as 1).
>> +
>> +- ti,cs-wstrobe: write strobe width, ns
>> + Time between the activation and deactivation of
>> + the write strobe.
>> + Minimum value is 1 (0 treated as 1).
>> +
>> +- ti,cs-whold: write hold width, ns
>> + Time between the deactivation of the write
>> + strobe and the end of the cycle (which may be
>> + either an address change or the deactivation of
>> + the chip select signal.
>> + Minimum value is 1 (0 treated as 1).
> Likewise I think these can be given more descriptive names.
Ok. How about:
ti,cs-rsetup --> ti,cs-read-setup-time
ti,cs-rstobe --> ti,cs-read-strobe-time
ti,cs-rhold --> ti,cs-read-hold-time
ti,cs-wsetup --> ti,cs-write-setup-time
ti,cs-wstrobe --> ti,cs-write-strobe-time
ti,cs-whold --> ti,cs-write-hold-time
Thanks
--
Regards,
Ivan Khoronzhuk
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^ permalink raw reply
* Re: [PATCH V2 2/2] ARM: dts: omap3-ldp: fix mmc configuration
From: Balaji T K @ 2014-02-20 13:21 UTC (permalink / raw)
To: Nishanth Menon
Cc: devicetree, linux-doc, Tony Lindgren, linux-mmc, Chris Ball,
Felipe Balbi, linux-kernel, linux-omap, linux-arm-kernel
In-Reply-To: <1392356749-32091-3-git-send-email-nm@ti.com>
On Friday 14 February 2014 11:15 AM, Nishanth Menon wrote:
> MMC1 is the only MMC interface available on the platform. Further,
> since the platform is based on older revision of SoC which is not
> capable of doing multi-block reads, mark it with compatibility for the
> same and add pinmux to ensure that all relevant pins are configured
> for non-MMC boot mode.
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
looks good to me
Acked-by: Balaji T K <balajitk@ti.com>
^ permalink raw reply
* Re: [PATCH v5 2/2] memory: ti-aemif: add bindings for AEMIF driver
From: Rob Herring @ 2014-02-20 13:44 UTC (permalink / raw)
To: Ivan Khoronzhuk
Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
grygorii.strashko-l0cyMroinI0@public.gmane.org,
linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org, Pawel Moll,
swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
nsekhar-l0cyMroinI0@public.gmane.org,
galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org,
rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
santosh.shilimkar-l0cyMroinI0@public.gmane.org,
rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
In-Reply-To: <5305F898.6020401-l0cyMroinI0@public.gmane.org>
On Thu, Feb 20, 2014 at 6:44 AM, Ivan Khoronzhuk <ivan.khoronzhuk-l0cyMroinI0@public.gmane.org> wrote:
>
> On 02/19/2014 08:11 PM, Mark Rutland wrote:
>>
>> On Wed, Feb 19, 2014 at 01:40:10PM +0000, Ivan Khoronzhuk wrote:
>>>
>>> Add bindings for TI Async External Memory Interface (AEMIF) controller.
>>>
>>> The Async External Memory Interface (EMIF16/AEMIF) controller is intended
>>> to
>>> provide a glue-less interface to a variety of asynchronous memory devices
>>> like
>>> ASRA M, NOR and NAND memory. A total of 256M bytes of any of these
>>> memories
>>> can be accessed via 4 chip selects with 64M byte access per chip select.
>>>
>>> We are not encoding CS number in reg property, it's memory partition
>>> number.
>>> The CS number is encoded for Davinci NAND node using standalone property
>>> "ti,davinci-chipselect" and we need to provide two memory ranges to it,
>>> as result we can't encode CS number in "reg" for AEMIF child devices
>>> (NAND/NOR/etc), as it will break bindings compatibility.
>>>
>>> In this patch, NAND node is used just as an example of child node.
>>>
>>> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk-l0cyMroinI0@public.gmane.org>
>>> ---
>>> .../bindings/memory-controllers/ti-aemif.txt | 210
>>> +++++++++++++++++++++
>>> 1 file changed, 210 insertions(+)
>>> create mode 100644
>>> Documentation/devicetree/bindings/memory-controllers/ti-aemif.txt
>>
>> [...]
>>
>>> +- ranges: Contains memory regions. There are two types of
>>> + ranges/partitions:
>>> + - CS-specific partition/range. If continuous,
>>> must be
>>> + set up to reflect the memory layout for 4
>>> chipselects,
>>> + if not then additional range/partition can be
>>> added and
>>> + child device can select the proper one.
>>> + - control partition which is common for all CS
>>> + interfaces.
>>
>> This really doesn't sound anything like the typical meaning of ranges on
>> a bus.
>>
>> Why isn't this information encoded in reg properties on the child nodes?
>>
>> [...]
>
>
> Note that we do not introduce NAND device bindings here.
> The Davinci NAND bindings was introduced and accepted more then one year
> ago.
> And the CS number is encoded for Davinci NAND node using standalone property
>
> "ti,davinci-chipselect" and we need to provide two memory ranges to it,
> as result we can't encode CS number in "reg" for AEMIF child devices
> (NAND/NOR/etc),
> as it will break bindings compatibility.
>
> In this document, NAND node is used just as an example of child node.
>
>
>>> +- ti,cs-ss: enable/disable select strobe mode
>>> + In select strobe mode chip select behaves
>>> as
>>> + the strobe and is active only during the
>>> strobe
>>> + period. If present then enable.
>>> +
>>> +- ti,cs-ew: enable/disable extended wait mode
>>> + if set, the controller monitors the
>>> EMIFWAIT pin
>>> + mapped to that chip select to determine
>>> if the
>>> + device wants to extend the strobe period.
>>> If
>>> + present then enable.
>>
>> When would you have these two in the DT and when wouldn't you? Why can't
>> the driver decide?
>
>
> These are properties of cs node, not the driver itself.
> The driver cannot know what child device you are going to attach to cs node
> , as result it cannot decide what settings you are using for particular cs
> node.
>
>
>> These names are also opaque. We can clearly do better.
>
>
> I propose the following names?:
>
> ti,cs-ss --> ti,cs-select-strobe-mode
> ti,cs-ew --> ti,cs-extended-waite-mode
>
> Are you OK with it?
>
>
>>> +
>>> +- ti,cs-ta: minimum turn around time, ns
>>> + Time between the end of one asynchronous
>>> memory
>>> + access and the start of another
>>> asynchronous
>>> + memory access. This delay is not incurred
>>> + between a read followed by read or a
>>> write
>>> + followed by a write to same chip select.
>>
>> The name is opaque. How about ti,min-turnaround-time-ns ?
>
>
> I like without -ns suffix and with cs- prefix:
> ti,cs-ta --> ti,cs-min-turnaround-time
>
> Is it OK?
>
>
>>> +
>>> +- ti,cs-rsetup: read setup width, ns
>>> + Time between the beginning of a memory
>>> cycle
>>> + and the activation of read strobe.
>>> + Minimum value is 1 (0 treated as 1).
>>> +
>>> +- ti,cs-rstobe: read strobe width, ns
>>> + Time between the activation and
>>> deactivation of
>>> + the read strobe.
>>> + Minimum value is 1 (0 treated as 1).
>>> +
>>> +- ti,cs-rhold: read hold width, ns
>>> + Time between the deactivation of the read
>>> + strobe and the end of the cycle (which
>>> may be
>>> + either an address change or the
>>> deactivation of
>>> + the chip select signal.
>>> + Minimum value is 1 (0 treated as 1).
>>> +
>>> +- ti,cs-wsetup: write setup width, ns
>>> + Time between the beginning of a memory
>>> cycle
>>> + and the activation of write strobe.
>>> + Minimum value is 1 (0 treated as 1).
>>> +
>>> +- ti,cs-wstrobe: write strobe width, ns
>>> + Time between the activation and
>>> deactivation of
>>> + the write strobe.
>>> + Minimum value is 1 (0 treated as 1).
>>> +
>>> +- ti,cs-whold: write hold width, ns
>>> + Time between the deactivation of the
>>> write
>>> + strobe and the end of the cycle (which
>>> may be
>>> + either an address change or the
>>> deactivation of
>>> + the chip select signal.
>>> + Minimum value is 1 (0 treated as 1).
>>
>> Likewise I think these can be given more descriptive names.
>
>
> Ok. How about:
>
> ti,cs-rsetup --> ti,cs-read-setup-time
> ti,cs-rstobe --> ti,cs-read-strobe-time
> ti,cs-rhold --> ti,cs-read-hold-time
> ti,cs-wsetup --> ti,cs-write-setup-time
> ti,cs-wstrobe --> ti,cs-write-strobe-time
> ti,cs-whold --> ti,cs-write-hold-time
Properties that have a unit of measure should have that unit in the
name. So replace "time" with "ns".
Rob
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^ permalink raw reply
* Re: [PATCH v4 1/7] drivers: of: add initialization code for reserved memory
From: Grant Likely @ 2014-02-20 14:01 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel, linaro-mm-sig, devicetree,
linux-doc
Cc: Marek Szyprowski, Benjamin Herrenschmidt, Arnd Bergmann,
Michal Nazarewicz, Tomasz Figa, Sascha Hauer, Laura Abbott,
Rob Herring, Olof Johansson, Pawel Moll, Mark Rutland,
Stephen Warren, Ian Campbell, Tomasz Figa, Kumar Gala,
Nishanth Peethambaran, Marc, Josh Cartwright, Catalin Marinas,
Will Deacon, Paul Mackerras
In-Reply-To: <1392893567-31623-2-git-send-email-m.szyprowski@samsung.com>
On Thu, 20 Feb 2014 11:52:41 +0100, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
> This patch adds device tree support for contiguous and reserved memory
> regions defined in device tree.
>
> Large memory blocks can be reliably reserved only during early boot.
> This must happen before the whole memory management subsystem is
> initialized, because we need to ensure that the given contiguous blocks
> are not yet allocated by kernel. Also it must happen before kernel
> mappings for the whole low memory are created, to ensure that there will
> be no mappings (for reserved blocks) or mapping with special properties
> can be created (for CMA blocks). This all happens before device tree
> structures are unflattened, so we need to get reserved memory layout
> directly from fdt.
>
> Later, those reserved memory regions are assigned to devices on each
> device structure initialization.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> [joshc: rework to implement new DT binding, provide mechanism for
> plugging in new reserved-memory node handlers via
> RESERVEDMEM_OF_DECLARE]
> Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
> [mszyprow: added generic memory reservation code, refactored code to
> put it directly into fdt.c]
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
> drivers/of/Kconfig | 6 +
> drivers/of/Makefile | 1 +
> drivers/of/fdt.c | 145 ++++++++++++++++++
> drivers/of/of_reserved_mem.c | 296 +++++++++++++++++++++++++++++++++++++
> drivers/of/platform.c | 7 +
> include/asm-generic/vmlinux.lds.h | 11 ++
> include/linux/of_reserved_mem.h | 65 ++++++++
> 7 files changed, 531 insertions(+)
> create mode 100644 drivers/of/of_reserved_mem.c
> create mode 100644 include/linux/of_reserved_mem.h
Hi Marek,
There's a lot of moving parts in this patch. Can you split the patch up a bit please. There are parts that I'm not entierly comfortable with yet and it will help reviewing them if they are added separately. For instance, the attaching regions to devices is something that I want to have some discussion about, but the core reserving static ranges I think is pretty much ready to be merged. I can merge the later while still debating the former if they are split.
I would recommend splitting into four:
1) reservation of static regions without the support code for referencing them later
2) code to also do dynamic allocations of reserved regions - again without any driver references
3) add hooks to reference specific regions.
4) hooks into drivers/of/platform.c for wiring into the driver model.
Can you also make the binding doc the first patch?
>
> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
> index c6973f101a3e..30a7d87a8077 100644
> --- a/drivers/of/Kconfig
> +++ b/drivers/of/Kconfig
> @@ -75,4 +75,10 @@ config OF_MTD
> depends on MTD
> def_bool y
>
> +config OF_RESERVED_MEM
> + depends on OF_EARLY_FLATTREE
> + bool
> + help
> + Helpers to allow for reservation of memory regions
> +
> endmenu # OF
> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
> index efd05102c405..ed9660adad77 100644
> --- a/drivers/of/Makefile
> +++ b/drivers/of/Makefile
> @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_MDIO) += of_mdio.o
> obj-$(CONFIG_OF_PCI) += of_pci.o
> obj-$(CONFIG_OF_PCI_IRQ) += of_pci_irq.o
> obj-$(CONFIG_OF_MTD) += of_mtd.o
> +obj-$(CONFIG_OF_RESERVED_MEM) += of_reserved_mem.o
> diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c
> index 758b4f8b30b7..04efe2ba736f 100644
> --- a/drivers/of/fdt.c
> +++ b/drivers/of/fdt.c
> @@ -15,6 +15,7 @@
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/of_fdt.h>
> +#include <linux/of_reserved_mem.h>
> #include <linux/string.h>
> #include <linux/errno.h>
> #include <linux/slab.h>
> @@ -438,6 +439,150 @@ int __initdata dt_root_size_cells;
> struct boot_param_header *initial_boot_params;
>
> #ifdef CONFIG_OF_EARLY_FLATTREE
> +#if defined(CONFIG_HAVE_MEMBLOCK)
> +int __init __weak
> +early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size,
> + bool nomap)
> +{
> + if (memblock_is_region_reserved(base, size))
> + return -EBUSY;
> + if (nomap)
> + return memblock_remove(base, size);
> + return memblock_reserve(base, size);
> +}
> +#else
> +int __init __weak
> +early_init_dt_reserve_memory_arch(phys_addr_t base, phys_addr_t size,
> + bool nomap)
> +{
> + pr_error("Reserved memory not supported, ignoring range 0x%llx - 0x%llx%s\n",
> + base, size, nomap ? " (nomap)" : "");
> + return -ENOSYS;
> +}
> +#endif
Group the above with the early_init_dt_add_memory_arch() and
early_init_dt_alloc_memory_arch() hooks.
> +
> +/**
> + * res_mem_reserve_reg() - reserve all memory described in 'reg' property
> + */
> +static int __init
> +__reserved_mem_reserve_reg(unsigned long node, const char *uname,
> + phys_addr_t *res_base, phys_addr_t *res_size)
Nit: put the funciton name on the same line as "static int __init". It's
more grep friendly that way and is the style used by fdt.c
> +{
> + int t_len = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32);
> + phys_addr_t base, size;
> + unsigned long len;
> + __be32 *prop;
> + int nomap;
> +
> + prop = of_get_flat_dt_prop(node, "reg", &len);
> + if (!prop)
> + return -ENOENT;
> +
> + if (len && len % t_len != 0) {
> + pr_err("Reserved memory: invalid reg property in '%s', skipping node.\n",
> + uname);
> + return -EINVAL;
> + }
> +
> + nomap = of_get_flat_dt_prop(node, "no-map", NULL) != NULL;
> +
> + /* store base and size values from the first reg tuple */
> + *res_base = 0;
> + while (len > 0) {
> + base = dt_mem_next_cell(dt_root_addr_cells, &prop);
> + size = dt_mem_next_cell(dt_root_size_cells, &prop);
> +
> + if (base && size &&
> + early_init_dt_reserve_memory_arch(base, size, nomap) == 0)
> + pr_debug("Reserved memory: reserved region for node '%s': base %pa, size %ld MiB\n",
> + uname, &base, (unsigned long)size / SZ_1M);
> + else
> + pr_info("Reserved memory: failed to reserve memory for node '%s': base %pa, size %ld MiB\n",
> + uname, &base, (unsigned long)size / SZ_1M);
> +
> + len -= t_len;
> +
> + if (!(*res_base)) {
> + *res_base = base;
> + *res_size = size;
> + }
> + }
> + return 0;
> +}
> +
> +static int __reserved_mem_check_root(unsigned long node)
> +{
> + __be32 *prop;
> +
> + prop = of_get_flat_dt_prop(node, "#size-cells", NULL);
> + if (prop && be32_to_cpup(prop) != dt_root_size_cells)
> + return -EINVAL;
> +
> + prop = of_get_flat_dt_prop(node, "#address-cells", NULL);
> + if (prop && be32_to_cpup(prop) != dt_root_addr_cells)
> + return -EINVAL;
> +
> + prop = of_get_flat_dt_prop(node, "ranges", NULL);
> + if (!prop)
> + return -EINVAL;
> + return 0;
> +}
> +
> +/**
> + * fdt_scan_reserved_mem() - scan a single FDT node for reserved memory
> + */
> +static int __init
> +__fdt_scan_reserved_mem(unsigned long node, const char *uname, int depth,
> + void *data)
> +{
> + phys_addr_t base = 0, size = 0;
> + static int found;
> + const char *status;
> + int err;
> +
> + if (!found && depth == 1 && strcmp(uname, "reserved-memory") == 0) {
> + if (__reserved_mem_check_root(node) != 0) {
> + pr_err("Reserved memory: unsupported node format, ignoring\n");
> + /* break scan */
> + return 1;
> + }
> + found = 1;
> + /* scan next node */
> + return 0;
> + } else if (!found) {
> + /* scan next node */
> + return 0;
> + } else if (found && depth < 2) {
> + /* scanning of /reserved-memory has been finished */
> + return 1;
> + }
> +
> + status = of_get_flat_dt_prop(node, "status", NULL);
> + if (status && strcmp(status, "okay") != 0 && strcmp(status, "ok") != 0)
> + return 0;
> +
> + err = __reserved_mem_reserve_reg(node, uname, &base, &size);
> + if (err == -ENOENT && of_get_flat_dt_prop(node, "size", NULL) == NULL)
> + goto end;
> +
> + fdt_reserved_mem_save_node(node, uname, base, size);
There is only one path here and the fdt_reserved_mem_save_node() call is
the only user of base,size. Why not move the hook directly into
__reserved_mem_reserve_reg() and drop the &base/&size arguments? I'm
finding the logic a little convoluted.
For that matter, why split it into a separate function at all?
Otherwise, all of the above code loks good to me. I like the way you've
done the early parsing. It will eventually hook neatly into
early_init_dt_scan().
(I am ignoring the question of whether child nodes should be processed.
that is a separate debate and the code can be extended later).
> +end:
> + /* scan next node */
> + return 0;
> +}
> +
> +/**
> + * early_init_fdt_scan_reserved_mem() - create reserved memory regions
> + *
> + * This function grabs memory from early allocator for device exclusive use
> + * defined in device tree structures. It should be called by arch specific code
> + * once the early allocator (i.e. memblock) has been fully activated.
> + */
> +void __init early_init_fdt_scan_reserved_mem(void)
> +{
> + of_scan_flat_dt(__fdt_scan_reserved_mem, NULL);
> + fdt_init_reserved_mem();
> +}
>
> /**
> * of_scan_flat_dt - scan flattened tree blob and call callback on each.
> diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c
> new file mode 100644
> index 000000000000..cacf04810b87
> --- /dev/null
> +++ b/drivers/of/of_reserved_mem.c
> @@ -0,0 +1,296 @@
> +/*
> + * Device tree based initialization code for reserved memory.
> + *
> + * Copyright (c) 2013, The Linux Foundation. All Rights Reserved.
> + * Copyright (c) 2013,2014 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + * Author: Marek Szyprowski <m.szyprowski@samsung.com>
> + * Author: Josh Cartwright <joshc@codeaurora.org>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License or (at your optional) any later version of the license.
> + */
> +
> +#include <linux/err.h>
> +#include <linux/of.h>
> +#include <linux/of_fdt.h>
> +#include <linux/of_platform.h>
> +#include <linux/mm.h>
> +#include <linux/sizes.h>
> +#include <linux/of_reserved_mem.h>
> +
> +#define MAX_RESERVED_REGIONS 16
> +static struct reserved_mem reserved_mem[MAX_RESERVED_REGIONS];
> +static int reserved_mem_count;
> +
> +#if defined(CONFIG_HAVE_MEMBLOCK)
> +#include <linux/memblock.h>
> +int __init __weak
> +early_init_dt_alloc_reserved_memory_arch(phys_addr_t size, phys_addr_t align,
> + phys_addr_t start, phys_addr_t end,
> + bool nomap, phys_addr_t *res_base)
> +{
> + /*
> + * We use __memblock_alloc_base() since memblock_alloc_base() panic()s.
> + */
Why does it panic?
> + phys_addr_t base = __memblock_alloc_base(size, align, end);
> + if (!base)
> + return -ENOMEM;
> +
> + if (base < start) {
The above test could use an explanitory comment.
> + memblock_free(base, size);
> + return -ENOMEM;
> + }
> +
> + *res_base = base;
> + if (nomap)
> + return memblock_remove(base, size);
> + return 0;
> +}
> +#else
> +int __init __weak
> +early_init_dt_alloc_reserved_memory_arch(phys_addr_t size, phys_addr_t align,
> + phys_addr_t start, phys_addr_t end,
> + bool nomap, phys_addr_t *res_base)
> +{
> + pr_error("Reserved memory not supported, ignoring region 0x%llx%s\n",
> + size, nomap ? " (nomap)" : "");
> + return -ENOSYS;
> +}
> +#endif
> +
> +/**
> + * res_mem_save_node() - save fdt node for second pass initialization
> + */
> +int __init fdt_reserved_mem_save_node(unsigned long node, const char *uname,
> + phys_addr_t base, phys_addr_t size)
The return code is never used. Return void instead.
> +{
> + struct reserved_mem *rmem = &reserved_mem[reserved_mem_count];
> +
> + if (reserved_mem_count == ARRAY_SIZE(reserved_mem)) {
> + pr_err("Reserved memory: not enough space all defined regions.\n");
> + return -ENOSPC;
> + }
> +
> + rmem->fdt_node = node;
> + rmem->name = uname;
> + rmem->base = base;
> + rmem->size = size;
> +
> + reserved_mem_count++;
> + return 0;
> +}
> +
> +/**
> + * res_mem_alloc_size() - allocate reserved memory described by 'size', 'align'
> + * and 'alloc-ranges' properties
> + */
> +static int __init
> +__reserved_mem_alloc_size(unsigned long node, const char *uname,
> + phys_addr_t *res_base, phys_addr_t *res_size)
> +{
> + int t_len = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32);
> + phys_addr_t start = 0, end = 0;
> + phys_addr_t base = 0, align = 0, size;
> + unsigned long len;
> + __be32 *prop;
> + int nomap;
> + int ret;
> +
> + prop = of_get_flat_dt_prop(node, "size", &len);
> + if (!prop)
> + return -EINVAL;
> +
> + if (len != dt_root_size_cells * sizeof(__be32)) {
> + pr_err("Reserved memory: invalid size property in '%s' node.\n",
> + uname);
> + return -EINVAL;
> + }
> + size = dt_mem_next_cell(dt_root_size_cells, &prop);
> +
> + nomap = of_get_flat_dt_prop(node, "no-map", NULL) != NULL;
> +
> + prop = of_get_flat_dt_prop(node, "align", &len);
> + if (prop) {
> + if (len != dt_root_addr_cells * sizeof(__be32)) {
> + pr_err("Reserved memory: invalid align property in '%s' node.\n",
> + uname);
> + return -EINVAL;
> + }
> + align = dt_mem_next_cell(dt_root_addr_cells, &prop);
> + }
> +
> + prop = of_get_flat_dt_prop(node, "alloc-ranges", &len);
> + if (prop) {
> +
> + if (len % t_len != 0) {
> + pr_err("Reserved memory: invalid alloc-ranges property in '%s', skipping node.\n",
> + uname);
> + return -EINVAL;
> + }
> +
> + base = 0;
> +
> + while (len > 0) {
> + start = dt_mem_next_cell(dt_root_addr_cells, &prop);
> + end = start + dt_mem_next_cell(dt_root_size_cells,
> + &prop);
> +
> + ret = early_init_dt_alloc_reserved_memory_arch(size,
> + align, start, end, nomap, &base);
> + if (ret == 0) {
> + pr_debug("Reserved memory: allocated memory for '%s' node: base %pa, size %ld MiB\n",
> + uname, &base,
> + (unsigned long)size / SZ_1M);
> + break;
> + }
> + len -= t_len;
> + }
> +
> + } else {
> + ret = early_init_dt_alloc_reserved_memory_arch(size, align,
> + 0, 0, nomap, &base);
> + if (ret == 0)
> + pr_debug("Reserved memory: allocated memory for '%s' node: base %pa, size %ld MiB\n",
> + uname, &base, (unsigned long)size / SZ_1M);
> + }
> +
> + if (base == 0) {
> + pr_info("Reserved memory: failed to allocate memory for node '%s'\n",
> + uname);
> + return -ENOMEM;
> + }
<off topic> Wow, the flattree parsing code has to be really verbose. We really need better
flat tree parsing functions and helpers.
> +
> + *res_base = base;
> + *res_size = size;
> +
> + return 0;
> +}
> +
> +static const struct of_device_id __rmem_of_table_sentinel
> + __used __section(__reservedmem_of_table_end);
> +
> +/**
> + * res_mem_init_node() - call region specific reserved memory init code
> + */
> +static int __init __reserved_mem_init_node(struct reserved_mem *rmem)
> +{
> + extern const struct of_device_id __reservedmem_of_table[];
> + const struct of_device_id *i;
> +
> + for (i = __reservedmem_of_table; i < &__rmem_of_table_sentinel; i++) {
> + reservedmem_of_init_fn initfn = i->data;
> + const char *compat = i->compatible;
> +
> + if (!of_flat_dt_is_compatible(rmem->fdt_node, compat))
> + continue;
What if two entries both match the compatible list? Ideally score would
be taken into account. (I won't block on this issue, it can be a future
enhancement)
> +
> + if (initfn(rmem, rmem->fdt_node, rmem->name) == 0) {
> + pr_info("Reserved memory: initialized node %s, compatible id %s\n",
> + rmem->name, compat);
> + return 0;
> + }
> + }
> + return -ENOENT;
> +}
> +
> +/**
> + * fdt_init_reserved_mem - allocate and init all saved reserved memory regions
> + */
> +void __init fdt_init_reserved_mem(void)
> +{
> + int i;
> + for (i = 0; i < reserved_mem_count; i++) {
> + struct reserved_mem *rmem = &reserved_mem[i];
> + unsigned long node = rmem->fdt_node;
> + unsigned long len;
> + __be32 *prop;
> + int err = 0;
> +
> + prop = of_get_flat_dt_prop(node, "phandle", &len);
> + if (!prop)
> + prop = of_get_flat_dt_prop(node, "linux,phandle", &len);
> + if (prop)
> + rmem->phandle = of_read_number(prop, len/4);
> +
> + if (rmem->size == 0)
> + err = __reserved_mem_alloc_size(node, rmem->name,
> + &rmem->base, &rmem->size);
> + if (err == 0)
> + __reserved_mem_init_node(rmem);
> + }
> +}
> +
> +static inline struct reserved_mem *__find_rmem(struct device_node *node)
> +{
> + unsigned int len, phandle_val;
> + const __be32 *prop;
> + unsigned int i;
> +
> + prop = of_get_property(node, "phandle", &len);
> + if (!prop)
> + prop = of_get_property(node, "linux,phandle", &len);
> + if (!prop || len < sizeof(__be32))
> + return NULL;
> +
> + phandle_val = be32_to_cpup(prop);
The above gymnastics aren't needed. phandle is already stored in
node->phandle. You still need to check for a 0 phandle though.
> + for (i = 0; i < reserved_mem_count; i++)
> + if (reserved_mem[i].phandle == phandle_val)
> + return &reserved_mem[i];
> + return NULL;
> +}
> +
> +/**
> + * of_reserved_mem_device_init() - assign reserved memory region to given device
> + *
> + * This function assign memory region pointed by "memory-region" device tree
> + * property to the given device.
> + */
> +void of_reserved_mem_device_init(struct device *dev)
> +{
> + struct device_node *np = dev->of_node;
> + struct reserved_mem *rmem;
> + struct of_phandle_args s;
> + unsigned int i;
> +
> + for (i = 0; of_parse_phandle_with_args(np, "memory-region",
> + "#memory-region-cells", i, &s) == 0; i++) {
> +
> + rmem = __find_rmem(s.np);
> + if (!rmem || !rmem->ops || !rmem->ops->device_init) {
> + of_node_put(s.np);
> + continue;
> + }
> +
> + rmem->ops->device_init(rmem, dev, &s);
> + dev_info(dev, "assigned reserved memory node %s\n", rmem->name);
> + of_node_put(s.np);
> + break;
> + }
> +}
> +
> +/**
> + * of_reserved_mem_device_release() - release reserved memory device structures
> + *
> + * This function releases structures allocated for memory region handling for
> + * the given device.
> + */
> +void of_reserved_mem_device_release(struct device *dev)
> +{
> + struct device_node *np = dev->of_node;
> + struct reserved_mem *rmem;
> + struct of_phandle_args s;
> + unsigned int i;
> +
> + for (i = 0; of_parse_phandle_with_args(np, "memory-region",
> + "#memory-region-cells", i, &s) == 0; i++) {
> +
> + rmem = __find_rmem(s.np);
> + if (rmem && rmem->ops && rmem->ops->device_release)
> + rmem->ops->device_release(rmem, dev);
> +
> + of_node_put(s.np);
> + }
> +}
> diff --git a/drivers/of/platform.c b/drivers/of/platform.c
> index 404d1daebefa..3df0b1826e8b 100644
> --- a/drivers/of/platform.c
> +++ b/drivers/of/platform.c
> @@ -21,6 +21,7 @@
> #include <linux/of_device.h>
> #include <linux/of_irq.h>
> #include <linux/of_platform.h>
> +#include <linux/of_reserved_mem.h>
> #include <linux/platform_device.h>
>
> const struct of_device_id of_default_bus_match_table[] = {
> @@ -220,6 +221,8 @@ static struct platform_device *of_platform_device_create_pdata(
> dev->dev.bus = &platform_bus_type;
> dev->dev.platform_data = platform_data;
>
> + of_reserved_mem_device_init(&dev->dev);
> +
> /* We do not fill the DMA ops for platform devices by default.
> * This is currently the responsibility of the platform code
> * to do such, possibly using a device notifier
> @@ -227,6 +230,7 @@ static struct platform_device *of_platform_device_create_pdata(
>
> if (of_device_add(dev) != 0) {
> platform_device_put(dev);
> + of_reserved_mem_device_release(&dev->dev);
> return NULL;
> }
>
> @@ -282,6 +286,8 @@ static struct amba_device *of_amba_device_create(struct device_node *node,
> else
> of_device_make_bus_id(&dev->dev);
>
> + of_reserved_mem_device_init(&dev->dev);
> +
> /* Allow the HW Peripheral ID to be overridden */
> prop = of_get_property(node, "arm,primecell-periphid", NULL);
> if (prop)
> @@ -308,6 +314,7 @@ static struct amba_device *of_amba_device_create(struct device_node *node,
> return dev;
>
> err_free:
> + of_reserved_mem_device_release(&dev->dev);
> amba_device_put(dev);
> return NULL;
> }
> diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
> index bc2121fa9132..f10f64fcc815 100644
> --- a/include/asm-generic/vmlinux.lds.h
> +++ b/include/asm-generic/vmlinux.lds.h
> @@ -167,6 +167,16 @@
> #define CLK_OF_TABLES()
> #endif
>
> +#ifdef CONFIG_OF_RESERVED_MEM
> +#define RESERVEDMEM_OF_TABLES() \
> + . = ALIGN(8); \
> + VMLINUX_SYMBOL(__reservedmem_of_table) = .; \
> + *(__reservedmem_of_table) \
> + *(__reservedmem_of_table_end)
> +#else
> +#define RESERVEDMEM_OF_TABLES()
> +#endif
> +
> #define KERNEL_DTB() \
> STRUCT_ALIGN(); \
> VMLINUX_SYMBOL(__dtb_start) = .; \
> @@ -490,6 +500,7 @@
> TRACE_SYSCALLS() \
> MEM_DISCARD(init.rodata) \
> CLK_OF_TABLES() \
> + RESERVEDMEM_OF_TABLES() \
> CLKSRC_OF_TABLES() \
> KERNEL_DTB() \
> IRQCHIP_OF_MATCH_TABLE()
> diff --git a/include/linux/of_reserved_mem.h b/include/linux/of_reserved_mem.h
> new file mode 100644
> index 000000000000..0bbec4bf23ce
> --- /dev/null
> +++ b/include/linux/of_reserved_mem.h
> @@ -0,0 +1,65 @@
> +#ifndef __OF_RESERVED_MEM_H
> +#define __OF_RESERVED_MEM_H
> +
> +struct cma;
> +struct device;
> +struct of_phandle_args;
> +struct reserved_mem_ops;
> +
> +struct reserved_mem {
> + const char *name;
> + unsigned long fdt_node;
> + unsigned long phandle;
> + const struct reserved_mem_ops *ops;
> + phys_addr_t base;
> + phys_addr_t size;
> + void *priv;
> +};
> +
> +struct reserved_mem_ops {
> + void (*device_init)(struct reserved_mem *rmem,
> + struct device *dev,
> + struct of_phandle_args *args);
> + void (*device_release)(struct reserved_mem *rmem,
> + struct device *dev);
> +};
> +
> +typedef int (*reservedmem_of_init_fn)(struct reserved_mem *rmem,
> + unsigned long node, const char *uname);
> +
> +#ifdef CONFIG_OF_RESERVED_MEM
> +void of_reserved_mem_device_init(struct device *dev);
> +void of_reserved_mem_device_release(struct device *dev);
> +
> +void fdt_init_reserved_mem(void);
> +void early_init_fdt_scan_reserved_mem(void);
The early_init_fdt_scan_reserved_mem() stub should be in of_fdt.h
> +int fdt_reserved_mem_save_node(unsigned long node, const char *uname,
> + phys_addr_t base, phys_addr_t size);
> +
> +#define RESERVEDMEM_OF_DECLARE(name, compat, init) \
> + static const struct of_device_id __reservedmem_of_table_##name \
> + __used __section(__reservedmem_of_table) \
> + = { .compatible = compat, \
> + .data = (init == (reservedmem_of_init_fn)NULL) ? \
> + init : init }
> +
> +#else
> +static inline void of_reserved_mem_device_init(struct device *dev) { }
> +static inline void of_reserved_mem_device_release(struct device *pdev) { }
> +
> +static inline void fdt_init_reserved_mem(void) { }
> +static inline void early_init_fdt_scan_reserved_mem(void) { }
early_init_fdt_scan_reserved_mem() should not have an empty stub.
> +static inline int
> +fdt_reserved_mem_save_node(unsigned long node, const char *uname,
> + phys_addr_t base, phys_addr_t size) { }
> +
> +#define RESERVEDMEM_OF_DECLARE(name, compat, init) \
> + static const struct of_device_id __reservedmem_of_table_##name \
> + __attribute__((unused)) \
> + = { .compatible = compat, \
> + .data = (init == (reservedmem_of_init_fn)NULL) ? \
> + init : init }
> +
> +#endif
> +
> +#endif /* __OF_RESERVED_MEM_H */
> --
> 1.7.9.5
>
^ permalink raw reply
* Re: [PATCH RFC v1 3/3] clk: Add handling of clk parent and rate assigned from DT
From: Grant Likely @ 2014-02-20 14:09 UTC (permalink / raw)
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
Cc: mturquette-QSEj5FYQhm4dnm+yROfE0A, linux-lFZ/pmaqli7XmaaqVzeoHQ,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
galak-sgV2jX0FEOL9JmXXK+q4OQ,
kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ,
sw0312.kim-Sze3O3UU22JBDgjK7y7TUQ,
m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ,
t.figa-Sze3O3UU22JBDgjK7y7TUQ, Sylwester Nawrocki
In-Reply-To: <1392829124-25705-4-git-send-email-s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
On Wed, 19 Feb 2014 17:58:44 +0100, Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> wrote:
> This function adds a notifier callback run before a driver is bound to
> its driver. It will configure parent clock and clock frequencies based
> on [clk-name]-clk-parent and [clk-name]-clk-rate' DT properties.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> Acked-by: Kyungmin Park <kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
> .../devicetree/bindings/clock/clock-bindings.txt | 24 +++++
> drivers/clk/clk.c | 92 ++++++++++++++++++++
> 2 files changed, 116 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt
> index 7c52c29..d618498 100644
> --- a/Documentation/devicetree/bindings/clock/clock-bindings.txt
> +++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt
> @@ -115,3 +115,27 @@ clock signal, and a UART.
> ("pll" and "pll-switched").
> * The UART has its baud clock connected the external oscillator and its
> register clock connected to the PLL clock (the "pll-switched" signal)
> +
> +==Static initial configuration of clock parent and clock frequency==
> +
> +Some platforms require static configuration of (parts of) the clock controller
> +often determined by the board design. Such a configuration can be specified in
> +a clock consumer node through [clk-name]-clk-parent and [clk-name]-clk-rate DT
> +properties. The former should contain phandle and clock specifier of the parent
> +clock, the latter the required clock's frequency value (one cell). "clk-name"
> +should be listed in the clock-names property and a phandle and a clock specifier
> +pair corresponding to it should be present in the clocks property.
> +
> + uart@a000 {
> + compatible = "fsl,imx-uart";
> + reg = <0xa000 0x1000>;
> + ...
> + clocks = <&clkcon 0>, <&clkcon 3>;
> + clock-names = "baud", "mux";
> +
> + mux-clk-parent = <&pll 1>;
> + baud-clk-rate = <460800>;
This mixes patterns for references to clocks. Plus it requires composing
property names which is a little painful. I'd rather see a list of
tuples to match the existing pattern already in use
clocks = <&clkcon 0>, <&clkcon 3>;
clock-names = "baud", "mux";
clock-parents = <0> <&pll 1>;
clock-rates = <0> <460800>;
g.
> + };
> +
> +In this example the pll is set as parent of "mux" clock and frequency of "baud"
> +clock is specified as 460800 Hz.
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 19f6f3f..9238e08 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -19,6 +19,7 @@
> #include <linux/of.h>
> #include <linux/device.h>
> #include <linux/init.h>
> +#include <linux/platform_device.h>
> #include <linux/sched.h>
>
> #include "clk.h"
> @@ -2527,6 +2528,97 @@ const char *of_clk_get_parent_name(struct device_node *np, int index)
> }
> EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
>
> +static void __of_clk_assigned_config_set(struct clk *clk, struct clk *pclk,
> + u32 rate)
> +{
> + int rc;
> +
> + if (rate) {
> + rc = clk_set_rate(clk, rate);
> + if (rc < 0)
> + pr_err("clk: couldn't set rate of clock %s (%d)\n",
> + __clk_get_name(clk), rc);
> + else
> + pr_debug("clk: set rate of clock %s to %u\n",
> + __clk_get_name(clk), rate);
> + }
> +
> + if (!IS_ERR(pclk)) {
> + rc = clk_set_parent(clk, pclk);
> + if (rc < 0)
> + pr_err("clk: couldn't set %s as parent of %s (%d)\n",
> + __clk_get_name(pclk), __clk_get_name(clk), rc);
> + else
> + pr_debug("clk: set %s as parent of %s\n",
> + __clk_get_name(pclk), __clk_get_name(clk));
> + }
> +}
> +
> +static void of_clk_assigned_config_parse(struct device_node *node)
> +{
> + char prop_name[OF_PROP_NAME_MAXLEN];
> + struct property *prop;
> + const char *clk_name;
> + int rc, index = 0;
> +
> + of_property_for_each_string(node, "clock-names", prop, clk_name) {
> + struct clk *clk, *pclk;
> + u32 rate = 0;
> +
> + snprintf(prop_name, OF_PROP_NAME_MAXLEN,
> + "%s-clk-parent", clk_name);
> + pclk = of_clk_get_list_entry(node, prop_name, 0);
> +
> + snprintf(prop_name, OF_PROP_NAME_MAXLEN,
> + "%s-clk-rate", clk_name);
> + rc = of_property_read_u32(node, prop_name, &rate);
> +
> + if (!rc || !IS_ERR(pclk)) {
> + /*
> + * Assuming here of_property_for_each_string() returns
> + * consecutive values of a DT property in ascending
> + * index order.
> + */
> + clk = of_clk_get(node, index);
> +
> + if (!IS_ERR(clk))
> + __of_clk_assigned_config_set(clk, pclk, rate);
> + else
> + pr_err("clk: couldn't get clk %s\n", clk_name);
> + }
> + index++;
> + }
> +}
> +
> +
> +static int of_clk_setup_notifier_call(struct notifier_block *nb,
> + unsigned long event, void *data)
> +{
> + struct device *dev = data;
> +
> + if (!dev->of_node)
> + return NOTIFY_DONE;
> +
> + switch (event) {
> + case BUS_NOTIFY_BIND_DRIVER:
> + /* Parse and configure DT assigned clock parents and rates */
> + of_clk_assigned_config_parse(dev->of_node);
> + break;
> + }
> +
> + return NOTIFY_DONE;
> +}
> +
> +static struct notifier_block of_clk_setup_nb = {
> + .notifier_call = of_clk_setup_notifier_call,
> +};
> +
> +int __init of_clk_setup_notifier_init(void)
> +{
> + return bus_register_notifier(&platform_bus_type, &of_clk_setup_nb);
> +}
> +subsys_initcall(of_clk_setup_notifier_init);
> +
> /**
> * of_clk_init() - Scan and init clock providers from the DT
> * @matches: array of compatible values and init functions for providers.
> --
> 1.7.9.5
>
--
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^ permalink raw reply
* Re: devicetree repository separation/migration
From: Rob Herring @ 2014-02-20 14:34 UTC (permalink / raw)
To: Olof Johansson
Cc: Tim Bird, Jason Cooper, Sascha Hauer, Grant Likely, Ian Campbell,
Pawel Moll, Mark Rutland, Kumar Gala, Rob Landley,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-spec-u79uwXL29TY76Z2rM5mHXA,
devicetree-compiler-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <CAOesGMiHOwSYTCUaptacN=_pbXnObU5gqpxQHQ+kRTaW-ow3rA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On Wed, Feb 19, 2014 at 3:20 PM, Olof Johansson <olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org> wrote:
> On Wed, Feb 19, 2014 at 1:12 PM, Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>> One way to minimize the inconvenience is keep versioning and dev
>> cycles in sync with the kernel. We could also start doing things to
>> align the kernel workflow with how things will work when we do have a
>> separate repository.
>
> I don't think aligning development cycles is what we want most here it
> might be useful for us in Linux but it'll make things difficult for
> other projects since they're not aware of our release cycles. The
> device tree bindings and DT contents in that repo should be "always
> stable", i.e. no merge window / rc concept. As soon as something goes
> in it's live, and from then out only fixes to the DTS files (or
> appending the binding).
I agree we wouldn't really want or need to follow rc's and master
always being stable should be the target, but people will want
"releases." There is no reason you can't support both. Take dtc as an
example, the release process is someone requests Jon to make a release
because they want some feature not in a tagged release, so he tags
master and we have a "release." So we can either make something up for
versions and cadence, follow the kernel, or do both. I would view
syncing with kernel versions to be only for a transition period to
ease the concerns of those who are keeping their dtb version aligned
to kernel version.
Rob
--
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^ permalink raw reply
* Re: [PATCH] arm64: Add architecture support for PCI
From: Liviu Dudau @ 2014-02-20 14:38 UTC (permalink / raw)
To: Yijing Wang
Cc: Liviu Dudau, linux-pci, Bjorn Helgaas, Catalin Marinas,
Will Deacon, LKML, devicetree@vger.kernel.org, LAKML,
linaro-kernel, Arnd Bergmann
In-Reply-To: <5302FED1.80903@huawei.com>
On Tue, Feb 18, 2014 at 02:33:53PM +0800, Yijing Wang wrote:
> > +#include <linux/init.h>
> > +#include <linux/io.h>
> > +#include <linux/kernel.h>
> > +#include <linux/mm.h>
> > +#include <linux/of_pci.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/slab.h>
> > +
> > +#include <asm/pci-bridge.h>
> > +
> > +
> > +/*
> > + * Return the domain number for this bus
> > + */
> > +int pci_domain_nr(struct pci_bus *bus)
> > +{
> > + struct pci_host_bridge *bridge = to_pci_host_bridge(bus->bridge);
Hi Yijing,
>
> Here bus is specific to root bus ? or, what about use find_pci_host_bridge() to get the pci_host_bridge
> instead.
Yes, the call should be to find_pci_host_bridge(). I sort of implied that the
bus is always the root bus, which is obviously not correct. Thanks for pointing it out.
>
> > +
> > + if (bridge)
> > + return bridge->domain_nr;
> > +
> > + return 0;
> > +}
> > +
> > +int pci_proc_domain(struct pci_bus *bus)
> > +{
> > + return pci_domain_nr(bus);
> > +}
> > +
> > +/*
> > + * Called after each bus is probed, but before its children are examined
> > + */
> > +void pcibios_fixup_bus(struct pci_bus *bus)
> > +{
> > + struct pci_dev *dev;
> > + struct resource *res;
> > + int i;
> > +
> > + if (bus->self != NULL) {
>
> What about use !pci_is_root_bus() ?
Again, good call, will change.
>
> > + pci_read_bridge_bases(bus);
> > +
> > + pci_bus_for_each_resource(bus, res, i) {
> > + if (!res || !res->flags || res->parent)
> > + continue;
> > +
> > + /*
> > + * If we are going to reassign everything, we can
> > + * shrink the P2P resource to have zero size to
> > + * save space
> > + */
> > + if (pci_has_flag(PCI_REASSIGN_ALL_RSRC)) {
> > + res->flags |= IORESOURCE_UNSET;
> > + res->start = 0;
> > + res->end = -1;
> > + continue;
> > + }
> > + }
> > + }
> > +
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH 01/10] spi: sh-msiof: Fix SPI bus population from DT
From: Geert Uytterhoeven @ 2014-02-20 14:43 UTC (permalink / raw)
To: Mark Brown
Cc: Takashi Yoshii, Magnus Damm, linux-spi, linux-sh, linux-kernel,
Geert Uytterhoeven, devicetree
In-Reply-To: <1392907389-21798-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
DT doesn't instantiate SPI children if spi_master.dev.of_node is not set up
properly.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
drivers/spi/spi-sh-msiof.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index 33474061b742..e6f79b2f2616 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -710,6 +710,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
master->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE;
master->flags = 0;
master->bus_num = pdev->id;
+ master->dev.of_node = pdev->dev.of_node;
master->num_chipselect = p->info->num_chipselect;
master->setup = spi_bitbang_setup;
master->cleanup = spi_bitbang_cleanup;
--
1.7.9.5
^ permalink raw reply related
* [PATCH 06/10] spi: sh-msiof: Improve binding documentation
From: Geert Uytterhoeven @ 2014-02-20 14:43 UTC (permalink / raw)
To: Mark Brown
Cc: Takashi Yoshii, Magnus Damm, linux-spi, linux-sh, linux-kernel,
Geert Uytterhoeven, devicetree
In-Reply-To: <1392907389-21798-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
- Add missing "interrupt-parent", "#address-cells", "#size-cells", and
"clocks" properties,
- Add missing default values for "renesas,tx-fifo-size" and
"renesas,rx-fifo-size",
- Add a reference to the pinctrl documentation.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
Documentation/devicetree/bindings/spi/sh-msiof.txt | 24 ++++++++++++++------
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/sh-msiof.txt b/Documentation/devicetree/bindings/spi/sh-msiof.txt
index e6222106ca36..52cf5c78705b 100644
--- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
+++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
@@ -1,12 +1,22 @@
Renesas MSIOF spi controller
Required properties:
-- compatible : "renesas,sh-msiof" for SuperH or
- "renesas,sh-mobile-msiof" for SH Mobile series
-- reg : Offset and length of the register set for the device
-- interrupts : interrupt line used by MSIOF
+- compatible : "renesas,sh-msiof" for SuperH, or
+ "renesas,sh-mobile-msiof" for SH Mobile series.
+- reg : Offset and length of the register set for the device
+- interrupt-parent : The phandle for the interrupt controller that
+ services interrupts for this device
+- interrupts : Interrupt specifier
+- #address-cells : Must be <1>
+- #size-cells : Must be <0>
Optional properties:
-- num-cs : total number of chip-selects
-- renesas,tx-fifo-size : Overrides the default tx fifo size given in words
-- renesas,rx-fifo-size : Overrides the default rx fifo size given in words
+- clocks : Must contain a reference to the functional clock.
+- num-cs : Total number of chip-selects
+- renesas,tx-fifo-size : Overrides the default tx fifo size given in words
+ (default is 64)
+- renesas,rx-fifo-size : Overrides the default rx fifo size given in words
+ (default is 64)
+
+Pinctrl properties might be needed, too. See
+Documentation/devicetree/bindings/pinctrl/renesas,*.
--
1.7.9.5
^ permalink raw reply related
* [PATCH 07/10] spi: sh-msiof: Add support for R-Car H2 and M2
From: Geert Uytterhoeven @ 2014-02-20 14:43 UTC (permalink / raw)
To: Mark Brown
Cc: Takashi Yoshii, Magnus Damm, linux-spi, linux-sh, linux-kernel,
Geert Uytterhoeven, devicetree
In-Reply-To: <1392907389-21798-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add support for the MSIOF variant in the R-Car H2 (r8a7790) and M2
(r8a7791) SoCs.
Binding documentation:
- Add future-proof "renesas,msiof-<soctype>" compatible values,
- Add example bindings.
Implementation:
- MSIOF on R-Car H2 and M2 requires the transmission of dummy data if
data is being received only (cfr. "Set SICTR.TSCKE to 1" and "Write
dummy transmission data to SITFDR" in paragraph "Transmit and Receive
Procedures" of the Hardware User's Manual).
- As RX depends on TX, MSIOF on R-Car H2 and M2 also lacks the RSCR
register (Receive Clock Select Register), and some bits in the RMDR1
(Receive Mode Register 1) and TMDR2 (Transmit Mode Register 2)
registers.
- Use the recently introduced SPI_MASTER_MUST_TX flag to enable support
for dummy transmission in the SPI core, and to differentiate from other
MSIOF implementations in code paths that need this.
- New DT compatible values ("renesas,msiof-r8a7790" and
"renesas,msiof-r8a7791") are added, as well as new platform device
names ("spi_r8a7790_msiof" and "spi_r8a7791_msiof").
- Hardware features are indicated using a new struct sh_msiof_chipdata,
which is used for both DT and legacy binding. For now this contains the
SPI master flags only.
This is loosely based on a set of patches from Takashi Yoshii
<takasi-y@ops.dti.ne.jp>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Cc: devicetree@vger.kernel.org
---
Documentation/devicetree/bindings/spi/sh-msiof.txt | 21 +++++++-
drivers/spi/spi-sh-msiof.c | 57 ++++++++++++++++----
2 files changed, 66 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/sh-msiof.txt b/Documentation/devicetree/bindings/spi/sh-msiof.txt
index 52cf5c78705b..1528d30a6f6d 100644
--- a/Documentation/devicetree/bindings/spi/sh-msiof.txt
+++ b/Documentation/devicetree/bindings/spi/sh-msiof.txt
@@ -1,8 +1,13 @@
Renesas MSIOF spi controller
Required properties:
-- compatible : "renesas,sh-msiof" for SuperH, or
+- compatible : "renesas,msiof-<soctype>" for SoCs,
+ "renesas,sh-msiof" for SuperH, or
"renesas,sh-mobile-msiof" for SH Mobile series.
+ Examples with soctypes are:
+ "renesas,msiof-sh7724" (SH)
+ "renesas,msiof-r8a7790" (R-Car H2)
+ "renesas,msiof-r8a7791" (R-Car M2)
- reg : Offset and length of the register set for the device
- interrupt-parent : The phandle for the interrupt controller that
services interrupts for this device
@@ -20,3 +25,17 @@ Optional properties:
Pinctrl properties might be needed, too. See
Documentation/devicetree/bindings/pinctrl/renesas,*.
+
+Example:
+
+ spi1: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index 92515c1ececa..31624fb4997d 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -20,6 +20,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
@@ -29,11 +30,17 @@
#include <asm/unaligned.h>
+
+struct sh_msiof_chipdata {
+ u16 master_flags;
+};
+
struct sh_msiof_spi_priv {
struct spi_bitbang bitbang; /* must be first for spi_bitbang.c */
void __iomem *mapbase;
struct clk *clk;
struct platform_device *pdev;
+ const struct sh_msiof_chipdata *chipdata;
struct sh_msiof_spi_info *info;
struct completion done;
unsigned long flags;
@@ -210,7 +217,8 @@ static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p,
k = min_t(int, k, ARRAY_SIZE(sh_msiof_spi_clk_table) - 1);
sh_msiof_write(p, TSCR, sh_msiof_spi_clk_table[k].scr);
- sh_msiof_write(p, RSCR, sh_msiof_spi_clk_table[k].scr);
+ if (!(p->chipdata->master_flags & SPI_MASTER_MUST_TX))
+ sh_msiof_write(p, RSCR, sh_msiof_spi_clk_table[k].scr);
}
static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
@@ -233,6 +241,10 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
tmp |= !cs_high << MDR1_SYNCAC_SHIFT;
tmp |= lsb_first << MDR1_BITLSB_SHIFT;
sh_msiof_write(p, TMDR1, tmp | MDR1_TRMD | TMDR1_PCON);
+ if (p->chipdata->master_flags & SPI_MASTER_MUST_TX) {
+ /* These bits are reserved if RX needs TX */
+ tmp &= ~0x0000ffff;
+ }
sh_msiof_write(p, RMDR1, tmp);
tmp = 0;
@@ -253,7 +265,7 @@ static void sh_msiof_spi_set_mode_regs(struct sh_msiof_spi_priv *p,
{
u32 dr2 = MDR2_BITLEN1(bits) | MDR2_WDLEN1(words);
- if (tx_buf)
+ if (tx_buf || (p->chipdata->master_flags & SPI_MASTER_MUST_TX))
sh_msiof_write(p, TMDR2, dr2);
else
sh_msiof_write(p, TMDR2, dr2 | MDR2_GRPMASK1);
@@ -659,6 +671,23 @@ static u32 sh_msiof_spi_txrx_word(struct spi_device *spi, unsigned nsecs,
}
#ifdef CONFIG_OF
+static const struct sh_msiof_chipdata sh_data = {
+ .master_flags = 0,
+};
+
+static const struct sh_msiof_chipdata r8a779x_data = {
+ .master_flags = SPI_MASTER_MUST_TX,
+};
+
+static const struct of_device_id sh_msiof_match[] = {
+ { .compatible = "renesas,sh-msiof", .data = &sh_data },
+ { .compatible = "renesas,sh-mobile-msiof", .data = &sh_data },
+ { .compatible = "renesas,msiof-r8a7790", .data = &r8a779x_data },
+ { .compatible = "renesas,msiof-r8a7791", .data = &r8a779x_data },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sh_msiof_match);
+
static struct sh_msiof_spi_info *sh_msiof_spi_parse_dt(struct device *dev)
{
struct sh_msiof_spi_info *info;
@@ -693,6 +722,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
{
struct resource *r;
struct spi_master *master;
+ const struct of_device_id *of_id;
struct sh_msiof_spi_priv *p;
int i;
int ret;
@@ -706,10 +736,15 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
p = spi_master_get_devdata(master);
platform_set_drvdata(pdev, p);
- if (pdev->dev.of_node)
+
+ of_id = of_match_device(sh_msiof_match, &pdev->dev);
+ if (of_id) {
+ p->chipdata = of_id->data;
p->info = sh_msiof_spi_parse_dt(&pdev->dev);
- else
+ } else {
+ p->chipdata = (const void *)pdev->id_entry->driver_data;
p->info = dev_get_platdata(&pdev->dev);
+ }
if (!p->info) {
dev_err(&pdev->dev, "failed to obtain device info\n");
@@ -769,7 +804,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
/* init master and bitbang code */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
master->mode_bits |= SPI_LSB_FIRST | SPI_3WIRE;
- master->flags = 0;
+ master->flags = p->chipdata->master_flags;
master->bus_num = pdev->id;
master->dev.of_node = pdev->dev.of_node;
master->num_chipselect = p->info->num_chipselect;
@@ -810,18 +845,18 @@ static int sh_msiof_spi_remove(struct platform_device *pdev)
return ret;
}
-#ifdef CONFIG_OF
-static const struct of_device_id sh_msiof_match[] = {
- { .compatible = "renesas,sh-msiof", },
- { .compatible = "renesas,sh-mobile-msiof", },
+static struct platform_device_id spi_driver_ids[] = {
+ { "spi_sh_msiof", (kernel_ulong_t)&sh_data },
+ { "spi_r8a7790_msiof", (kernel_ulong_t)&r8a779x_data },
+ { "spi_r8a7791_msiof", (kernel_ulong_t)&r8a779x_data },
{},
};
-MODULE_DEVICE_TABLE(of, sh_msiof_match);
-#endif
+MODULE_DEVICE_TABLE(platform, spi_driver_ids);
static struct platform_driver sh_msiof_spi_drv = {
.probe = sh_msiof_spi_probe,
.remove = sh_msiof_spi_remove,
+ .id_table = spi_driver_ids,
.driver = {
.name = "spi_sh_msiof",
.owner = THIS_MODULE,
--
1.7.9.5
^ permalink raw reply related
* [PATCH 06/11] ARM: shmobile: r8a7790/lager dts: Rename label spi to qspi, add spi0 alias
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven,
devicetree
In-Reply-To: <1392907779-22053-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi4.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 4 ++--
arch/arm/boot/dts/r8a7790.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 26a90106e96c..5d53def10c42 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -144,7 +144,7 @@
renesas,function = "mmc1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -164,7 +164,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1e7c396afea..bc652a2848e7 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -23,6 +23,7 @@
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
+ spi0 = &qspi;
};
cpus {
@@ -753,7 +754,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7790", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related
* [PATCH 07/11] ARM: shmobile: r8a7791/koelsch dts: Rename label spi to qspi, add spi0 alias
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven,
devicetree
In-Reply-To: <1392907779-22053-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Prepare for the advent of MSIOF SPI, which will be spi1 to spi3.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++--
arch/arm/boot/dts/r8a7791.dtsi | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
index bf6ba0c7faa0..cc6e63914f7c 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -146,7 +146,7 @@
renesas,function = "scif1";
};
- qspi_pins: spi {
+ qspi_pins: spi0 {
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
@@ -156,7 +156,7 @@
status = "okay";
};
-&spi {
+&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 224f4a7ee52a..da5ce503d214 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
+ spi0 = &qspi;
};
cpus {
@@ -750,7 +751,7 @@
};
};
- spi: spi@e6b10000 {
+ qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
--
1.7.9.5
^ permalink raw reply related
* [PATCH 08/11] ARM: shmobile: r8a7790 dtsi: Add MSIOF nodes and aliases
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven,
devicetree
In-Reply-To: <1392907779-22053-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index bc652a2848e7..aab5f4cf6ce2 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -24,6 +24,10 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
+ spi4 = &msiof3;
};
cpus {
@@ -764,4 +768,52 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi@e6c90000 {
+ compatible = "renesas,msiof-r8a7790";
+ reg = <0 0xe6c90000 0 0x0064>;
+ interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH 09/11] ARM: shmobile: r8a7791 dtsi: Add MSIOF nodes and aliases
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven,
devicetree
In-Reply-To: <1392907779-22053-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7791.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index da5ce503d214..c336ddecf75b 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -27,6 +27,9 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
spi0 = &qspi;
+ spi1 = &msiof0;
+ spi2 = &msiof1;
+ spi3 = &msiof2;
};
cpus {
@@ -761,4 +764,40 @@
#size-cells = <0>;
status = "disabled";
};
+
+ msiof0: spi@e6e20000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e20000 0 0x0064>;
+ interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi@e6e10000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e10000 0 0x0064>;
+ interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi@e6e00000 {
+ compatible = "renesas,msiof-r8a7791";
+ reg = <0 0xe6e00000 0 0x0064>;
+ interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
+ num-cs = <1>;
+ renesas,rx-fifo-size = <256>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH 10/11] ARM: shmobile: lager dts: Add MSIOF nodes
From: Geert Uytterhoeven @ 2014-02-20 14:49 UTC (permalink / raw)
To: Simon Horman, Magnus Damm
Cc: linux-sh, linux-arm-kernel, linux-kernel, Geert Uytterhoeven,
devicetree
In-Reply-To: <1392907779-22053-1-git-send-email-geert@linux-m68k.org>
From: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Add pinctrl and SPI device for MSIOF on Lager.
On this board, only MSIOF1 is in use. Its bus contains a single device
(a Renesas R2A11302FT PMIC), for which no bindings are defined yet.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Cc: devicetree@vger.kernel.org
---
arch/arm/boot/dts/r8a7790-lager.dts | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 5d53def10c42..0658c881687e 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -148,6 +148,12 @@
renesas,groups = "qspi_ctrl", "qspi_data4";
renesas,function = "qspi";
};
+
+ msiof1_pins: spi2 {
+ renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+ "msiof1_tx";
+ renesas,function = "msiof1";
+ };
};
&mmcif1 {
@@ -195,6 +201,22 @@
};
};
+&msiof1 {
+ pinctrl-0 = <&msiof1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ pmic: pmic@0 {
+ compatible = "renesas,r2a11302ft";
+ reg = <0>;
+ spi-max-frequency = <6000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+
+};
+
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
--
1.7.9.5
^ permalink raw reply related
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