* Re: [PATCH 1/2] devicetree: power: add bindings for GPIO-driven power switches
From: Rob Herring @ 2016-12-13 19:27 UTC (permalink / raw)
To: Bartosz Golaszewski
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Mark Rutland, linux-iio, devicetree,
linux-kernel, Kevin Hilman, Patrick Titiano, Neil Armstrong,
Linus Walleij, Alexandre Courbot, linux-gpio, Sebastian Reichel,
linux-pm, Mark Brown, Liam Girdwood
In-Reply-To: <1481494905-18037-2-git-send-email-bgolaszewski@baylibre.com>
On Sun, Dec 11, 2016 at 11:21:44PM +0100, Bartosz Golaszewski wrote:
> Some boards are equipped with simple, GPIO-driven power load switches.
> An example of such ICs is the TI tps229* series.
How is this different than a GPIO regulator? The input and output
voltages just happen to be the same. I could be convinced this is
different enough to have a different compatible, but it somewhat seems
you want to use this for IIO, so you are creating a different binding
for that usecase.
Rob
^ permalink raw reply
* Re: [PATCH] ARM: dts: Add missing CPU frequencies for Exynos5422/5800
From: Javier Martinez Canillas @ 2016-12-13 19:18 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz, Krzysztof Kozlowski
Cc: Mark Rutland, devicetree, linux-samsung-soc, linux-pm, Ben Gamari,
linux-kernel, Russell King, Rob Herring, Doug Anderson,
Kukjin Kim, Thomas Abraham, Andreas Faerber, linux-arm-kernel
In-Reply-To: <5220084.l31t5oJbsy@amdc3058>
Hello Bartlomiej,
On 12/13/2016 01:52 PM, Bartlomiej Zolnierkiewicz wrote:
> Add missing 2000MHz & 1900MHz OPPs (for A15 cores) and 1400MHz OPP
> (for A7 cores). Also update common Odroid-XU3 Lite/XU3/XU4 thermal
> cooling maps to account for new OPPs.
>
> Since new OPPs are not available on all Exynos5422/5800 boards modify
> dts files for Odroid-XU3 Lite (limited to 1.8 GHz / 1.3 GHz) & Peach
> Pi (limited to 2.0 GHz / 1.3 GHz) accordingly.
>
> Tested on Odroid-XU3 and XU3 Lite.
>
> Cc: Doug Anderson <dianders@chromium.org>
> Cc: Javier Martinez Canillas <javier@osg.samsung.com>
> Cc: Andreas Faerber <afaerber@suse.de>
> Cc: Thomas Abraham <thomas.ab@samsung.com>
> Cc: Ben Gamari <ben@smart-cactus.org>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 14 +++++++-------
> arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts | 17 +++++++++++++++++
> arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 ++++
> arch/arm/boot/dts/exynos5800.dtsi | 15 +++++++++++++++
> 4 files changed, 43 insertions(+), 7 deletions(-)
>
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-13 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 2016-12-13 15:59:33.775763261 +0100
> @@ -118,7 +118,7 @@
> /*
> * When reaching cpu_alert3, reduce CPU
> * by 2 steps. On Exynos5422/5800 that would
> - * be: 1600 MHz and 1100 MHz.
> + * (usually) be: 1800 MHz and 1200 MHz.
> */
> map3 {
> trip = <&cpu_alert3>;
> @@ -131,16 +131,16 @@
>
> /*
> * When reaching cpu_alert4, reduce CPU
> - * further, down to 600 MHz (11 steps for big,
> - * 7 steps for LITTLE).
> + * further, down to 600 MHz (13 steps for big,
> + * 8 steps for LITTLE).
> */
> - map5 {
> + cooling_map5: map5 {
> trip = <&cpu_alert4>;
> - cooling-device = <&cpu0 3 7>;
> + cooling-device = <&cpu0 3 8>;
> };
> - map6 {
> + cooling_map6: map6 {
> trip = <&cpu_alert4>;
> - cooling-device = <&cpu4 3 11>;
> + cooling-device = <&cpu4 3 13>;
> };
> };
> };
> Index: b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 2016-12-13 15:59:33.775763261 +0100
> @@ -21,6 +21,23 @@
> compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
> };
>
> +&cluster_a15_opp_table {
> + /delete-node/opp@2000000000;
> + /delete-node/opp@1900000000;
> +};
> +
> +&cluster_a7_opp_table {
> + /delete-node/opp@1400000000;
> +};
> +
I think that a comment in the DTS why these operating points aren't available
in this board will make more clear why the nodes are being deleted.
> +&cooling_map5 {
> + cooling-device = <&cpu0 3 7>;
> +};
> +
> +&cooling_map6 {
> + cooling-device = <&cpu4 3 11>;
> +};
> +
> &pwm {
> /*
> * PWM 0 -- fan
> Index: b/arch/arm/boot/dts/exynos5800-peach-pi.dts
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts 2016-12-13 15:59:33.779763261 +0100
> @@ -146,6 +146,10 @@
> vdd-supply = <&ldo9_reg>;
> };
>
> +&cluster_a7_opp_table {
> + /delete-property/opp@1400000000;
> +};
> +
> &cpu0 {
> cpu-supply = <&buck2_reg>;
> };
> Index: b/arch/arm/boot/dts/exynos5800.dtsi
> ===================================================================
> --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 +0100
> +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-13 15:59:33.779763261 +0100
> @@ -24,6 +24,16 @@
> };
>
> &cluster_a15_opp_table {
> + opp@2000000000 {
> + opp-hz = /bits/ 64 <2000000000>;
> + opp-microvolt = <1250000>;
> + clock-latency-ns = <140000>;
> + };
> + opp@1900000000 {
> + opp-hz = /bits/ 64 <1900000000>;
> + opp-microvolt = <1250000>;
> + clock-latency-ns = <140000>;
> + };
> opp@1700000000 {
> opp-microvolt = <1250000>;
> };
> @@ -85,6 +95,11 @@
> };
>
AFAIK Thomas restricted the maximum OPP, because for A15 freqs > 1.8GHz the
INT rail would need to be scaled up as well since there's a maximum voltage
difference between the ARM and INT rails before the system becomes unstable:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/276766.html
https://lkml.org/lkml/2014/5/2/419
The ChromiumOS vendor tree uses a virtual regulator driver that makes sure
the maximum voltage skew is between a limit. But that never made to mainline:
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.8/arch/arm/boot/dts/exynos5420-peach-pit.dtsi#90
https://lkml.org/lkml/2014/4/29/28
Did that change and there's infrastructure in mainline now to cope with that?
If that's the case, I think it would be good to mention in the commit message.
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
^ permalink raw reply
* Re: [PATCH 6/6] ARM: dts: sun8i: raise the max voltage of DCDC2 in sun8i reference tablets
From: Maxime Ripard @ 2016-12-13 19:14 UTC (permalink / raw)
To: Icenowy Zheng
Cc: devicetree, Quentin Schulz, Michael Turquette, Stephen Boyd,
Russell King, linux-kernel, Hans de Goede, Chen-Yu Tsai,
linux-clk, linux-arm-kernel, Jorik Jonker
In-Reply-To: <20161213152252.53749-7-icenowy@aosc.xyz>
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On Tue, Dec 13, 2016 at 11:22:52PM +0800, Icenowy Zheng wrote:
> The "extremity_freq" frequency described in the original FEX files uses
> a voltage of 1.46v, which is beyond the current maximum voltage value of
> DCDC2 (Cortex-A7 supply) in the sun8i reference tablet DTSI file.
>
> Raise the maximum value to 1.46v.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
> index 7ac8bb4bc95a..325ca5bd67a5 100644
> --- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
> +++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi
> @@ -180,7 +180,7 @@
> ®_dcdc2 {
> regulator-always-on;
> regulator-min-microvolt = <900000>;
> - regulator-max-microvolt = <1400000>;
> + regulator-max-microvolt = <1460000>;
This is outside of the voltage range tolerated by the CPU. NAK.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH] Input: imx6ul_tsc - generalize the averaging property
From: Dmitry Torokhov @ 2016-12-13 19:14 UTC (permalink / raw)
To: Rob Herring, Guy Shapiro
Cc: fabio.estevam, mark.rutland, devicetree, haibo.chen, linux-input,
linux-arm-kernel
In-Reply-To: <20161213191050.3yrmxaubpgjh65bz@rob-hp-laptop>
On December 13, 2016 11:10:50 AM PST, Rob Herring <robh@kernel.org> wrote:
>On Sun, Dec 11, 2016 at 09:06:43AM +0200, Guy Shapiro wrote:
>> Make the avarage-samples property a general touchscreen property
>> rather than imx6ul device specific.
>>
>> Signed-off-by: Guy Shapiro <guy.shapiro@mobi-wize.com>
>> ---
>> .../bindings/input/touchscreen/imx6ul_tsc.txt | 11 ++----
>> .../bindings/input/touchscreen/touchscreen.txt | 3 ++
>> drivers/input/touchscreen/imx6ul_tsc.c | 46
>++++++++++++++++------
>> 3 files changed, 41 insertions(+), 19 deletions(-)
>
>You can't just switch existing bindings as that breaks compatibility
>with old dtbs. The kernel driver would need to support both. Just
>introduce the new common property and use it for your device.
>
The old binding is only in my tree at the moment, so I do not think there is compatibility concerns.
Are you OK with the new binding itself?
Thanks.
--
Dmitry
^ permalink raw reply
* Re: [PATCH 5/6] ARM: dts: sun8i: set cpu-supply in reference tablet DTSI
From: Maxime Ripard @ 2016-12-13 19:13 UTC (permalink / raw)
To: Icenowy Zheng
Cc: devicetree, Quentin Schulz, Michael Turquette, Stephen Boyd,
Russell King, linux-kernel, Hans de Goede, Chen-Yu Tsai,
linux-clk, linux-arm-kernel, Jorik Jonker
In-Reply-To: <20161213152252.53749-6-icenowy@aosc.xyz>
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On Tue, Dec 13, 2016 at 11:22:51PM +0800, Icenowy Zheng wrote:
> All reference design A33 tablets uses DCDC2 of AXP223 as the power
> supply of the Cortex-A7 cores.
>
> Set the cpu-supply in the DTSI of sun8i reference tablets.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Applied, thanks
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH 4/6] ARM: dts: sun8i: add opp-v2 table for A33
From: Maxime Ripard @ 2016-12-13 19:12 UTC (permalink / raw)
To: Icenowy Zheng
Cc: devicetree, Quentin Schulz, Michael Turquette, Stephen Boyd,
Russell King, linux-kernel, Hans de Goede, Chen-Yu Tsai,
linux-clk, linux-arm-kernel, Jorik Jonker
In-Reply-To: <20161213152252.53749-5-icenowy@aosc.xyz>
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On Tue, Dec 13, 2016 at 11:22:50PM +0800, Icenowy Zheng wrote:
> An operating point table is needed for the cpu frequency adjusting to
> work.
>
> The operating point table is converted from the common value in
> extracted script.fex from many A33 board/tablets.
>
> 1.344GHz is set as a turbo-mode operating point, as it's described as
> "extremity_freq" in the FEX file. (the "max_freq" is 1.2GHz)
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> arch/arm/boot/dts/sun8i-a33.dtsi | 38 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
> index 504996cbee29..035c058324b8 100644
> --- a/arch/arm/boot/dts/sun8i-a33.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a33.dtsi
> @@ -46,7 +46,45 @@
> #include <dt-bindings/dma/sun4i-a10.h>
>
> / {
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp@648000000 {
> + opp-hz = /bits/ 64 <648000000>;
> + opp-microvolt = <1040000>;
> + clock-latency-ns = <244144>; /* 8 32k periods */
> + };
Please add new lines between the nodes.
> + opp@816000000 {
> + opp-hz = /bits/ 64 <816000000>;
> + opp-microvolt = <1100000>;
> + clock-latency-ns = <244144>; /* 8 32k periods */
> + };
> + opp@1008000000 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <1200000>;
> + clock-latency-ns = <244144>; /* 8 32k periods */
> + };
> + opp@1200000000 {
> + opp-hz = /bits/ 64 <1200000000>;
> + opp-microvolt = <1320000>;
> + clock-latency-ns = <244144>; /* 8 32k periods */
> + };
> + opp@1344000000 {
> + opp-hz = /bits/ 64 <1344000000>;
> + opp-microvolt = <1460000>;
> + clock-latency-ns = <244144>; /* 8 32k periods */
> + turbo-mode;
> + };
As far as I know, this OPP is not used by Allwinner, is not usable in
any A33 board so far (both the A33-olinuxino and the SinA33 do not
allow such a voltage on their CPU regulator), and overvolting and
overclocking is something that is very risky, and might lead to
stability issues.
Please remove this OPP.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH] Input: imx6ul_tsc - generalize the averaging property
From: Rob Herring @ 2016-12-13 19:10 UTC (permalink / raw)
To: Guy Shapiro
Cc: dmitry.torokhov, fabio.estevam, mark.rutland, devicetree,
haibo.chen, linux-input, linux-arm-kernel
In-Reply-To: <1481440003-27168-1-git-send-email-guy.shapiro@mobi-wize.com>
On Sun, Dec 11, 2016 at 09:06:43AM +0200, Guy Shapiro wrote:
> Make the avarage-samples property a general touchscreen property
> rather than imx6ul device specific.
>
> Signed-off-by: Guy Shapiro <guy.shapiro@mobi-wize.com>
> ---
> .../bindings/input/touchscreen/imx6ul_tsc.txt | 11 ++----
> .../bindings/input/touchscreen/touchscreen.txt | 3 ++
> drivers/input/touchscreen/imx6ul_tsc.c | 46 ++++++++++++++++------
> 3 files changed, 41 insertions(+), 19 deletions(-)
You can't just switch existing bindings as that breaks compatibility
with old dtbs. The kernel driver would need to support both. Just
introduce the new common property and use it for your device.
Rob
^ permalink raw reply
* Re: [PATCH v6 2/2] Add support for OV5647 sensor.
From: Pavel Machek @ 2016-12-13 19:09 UTC (permalink / raw)
To: Ramiro Oliveira
Cc: mchehab-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-media-u79uwXL29TY76Z2rM5mHXA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA,
davem-fT/PcQaiUtIeIZ0/mPfg9Q,
gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r,
geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ,
akpm-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b,
linux-0h96xk9xTtrk1uMJSBkQmQ, hverkuil-qWit8jRvyhVmR6Xm/wNWPw,
dheitmueller-eb9eJ82Ua7k9XoPSrs7Ehg,
slongerbeam-Re5JQEeQqe8AvxtiuMwx3w, lars-Qo5EllUWu/uELgA04lAiVw,
robert.jarzmik-GANU6spQydw, pali.rohar-Re5JQEeQqe8AvxtiuMwx3w,
sakari.ailus-VuQAYsv1563Yd54FQh9/CA, mark.rutland-5wv7dgnIgG8,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w
In-Reply-To: <d8ac513cd1d84063f73452e0b3ab12ab5f5728a0.1481639091.git.roliveir-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
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On Tue 2016-12-13 14:32:37, Ramiro Oliveira wrote:
> Modes supported:
> - 640x480 RAW 8
>
> Signed-off-by: Ramiro Oliveira <roliveir-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
Acked-by: Pavel Machek <pavel-+ZI9xUNit7I@public.gmane.org>
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply
* Re: [PATCH v6 1/2] Add OV5647 device tree documentation
From: Pavel Machek @ 2016-12-13 19:05 UTC (permalink / raw)
To: Ramiro Oliveira
Cc: mchehab, linux-kernel, linux-media, robh+dt, devicetree, davem,
gregkh, geert+renesas, akpm, linux, hverkuil, dheitmueller,
slongerbeam, lars, robert.jarzmik, pali.rohar, sakari.ailus,
mark.rutland, CARLOS.PALMINHA
In-Reply-To: <c47834c1c9c2a8e23f41a12c8717601f4a901506.1481639091.git.roliveir@synopsys.com>
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On Tue 2016-12-13 14:32:36, Ramiro Oliveira wrote:
> Create device tree bindings documentation.
>
> Signed-off-by: Ramiro Oliveira <roliveir@synopsys.com>
> ---
> .../devicetree/bindings/media/i2c/ov5647.txt | 35 ++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/i2c/ov5647.txt
>
> diff --git a/Documentation/devicetree/bindings/media/i2c/ov5647.txt b/Documentation/devicetree/bindings/media/i2c/ov5647.txt
> new file mode 100644
> index 0000000..46e5e30
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/i2c/ov5647.txt
> @@ -0,0 +1,35 @@
> +Omnivision OV5647 raw image sensor
> +---------------------------------
> +
> +OV5647 is a raw image sensor with MIPI CSI-2 and CCP2 image data interfaces
> +and CCI (I2C compatible) control bus.
> +
> +Required properties:
> +
> +- compatible : "ovti,ov5647";
> +- reg : I2C slave address of the sensor;
> +- clocks : Reference to the xclk clock.
> +- clock-names : Should be "xclk".
> +- clock-frequency: Frequency of the xclk clock
Nit pick: you end the lines here with ';', '.' and nothing. Pick one
:-).
Otherwise it looks good.
Acked-by: Pavel Machek <pavel@ucw.cz>
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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^ permalink raw reply
* Re: [PATCH v3 2/2] Documentation: dt: iio: add st_lsm6dsx sensor device binding
From: Rob Herring @ 2016-12-13 19:03 UTC (permalink / raw)
To: Lorenzo Bianconi
Cc: jic23-DgEjT+Ai2ygdnm+yROfE0A, linux-iio-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, lorenzo.bianconi-qxv4g6HH51o
In-Reply-To: <20161210090218.4609-3-lorenzo.bianconi-qxv4g6HH51o@public.gmane.org>
On Sat, Dec 10, 2016 at 10:02:18AM +0100, Lorenzo Bianconi wrote:
> Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi-qxv4g6HH51o@public.gmane.org>
> ---
> .../devicetree/bindings/iio/imu/st_lsm6dsx.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
^ permalink raw reply
* Re: [PATCH 1/2] devicetree: add Garmin vendor prefix
From: Rob Herring @ 2016-12-13 19:02 UTC (permalink / raw)
To: Matt Ranostay; +Cc: devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1481351734-23452-1-git-send-email-matt-sk+viVC6FLCDq+mSdOJa79kegs52MxvZ@public.gmane.org>
On Fri, Dec 09, 2016 at 10:35:34PM -0800, Matt Ranostay wrote:
> Cc: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Signed-off-by: Matt Ranostay <matt-sk+viVC6FLCDq+mSdOJa79kegs52MxvZ@public.gmane.org>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index 64fdc8c1503b..aedd9979d1e9 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -106,6 +106,7 @@ firefly Firefly
> focaltech FocalTech Systems Co.,Ltd
> friendlyarm Guangzhou FriendlyARM Computer Tech Co., Ltd
> fsl Freescale Semiconductor
> +garmin Garmin Limited
Stock tickers are preferred and Garmin's is grmn.
> ge General Electric Company
> geekbuying GeekBuying
> gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
> --
> 2.7.4
>
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^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: usb: add DT binding for s3c2410 USB device controller
From: Rob Herring @ 2016-12-13 18:59 UTC (permalink / raw)
To: Sergio Prado
Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r, mark.rutland-5wv7dgnIgG8,
balbi-DgEjT+Ai2ygdnm+yROfE0A, linux-usb-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1481310400-28676-2-git-send-email-sergio.prado-1e4yhPs3/ABSwrhanM7KvQ@public.gmane.org>
On Fri, Dec 09, 2016 at 05:06:39PM -0200, Sergio Prado wrote:
> Adds the device tree bindings description for Samsung S3C2410 and
> compatible USB device controller.
>
> Signed-off-by: Sergio Prado <sergio.prado-1e4yhPs3/ABSwrhanM7KvQ@public.gmane.org>
> ---
> .../devicetree/bindings/usb/s3c2410-usb.txt | 28 ++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/s3c2410-usb.txt b/Documentation/devicetree/bindings/usb/s3c2410-usb.txt
> index e45b38ce2986..4d3f9894c2d4 100644
> --- a/Documentation/devicetree/bindings/usb/s3c2410-usb.txt
> +++ b/Documentation/devicetree/bindings/usb/s3c2410-usb.txt
> @@ -20,3 +20,31 @@ usb0: ohci@49000000 {
> clocks = <&clocks UCLK>, <&clocks HCLK_USBH>;
> clock-names = "usb-bus-host", "usb-host";
> };
> +
> +Samsung S3C2410 and compatible USB device controller
> +
> +Required properties:
> + - compatible: Should be one of the following
> + "samsung,s3c2410-udc"
> + "samsung,s3c2440-udc"
> + - reg: address and length of the controller memory mapped region
> + - interrupts: interrupt number for the USB device controller
> + - clocks: Should reference the bus and host clocks
> + - clock-names: Should contain two strings
> + "usb-bus-gadget" for the USB bus clock
Pretty sure the h/w clock name in the datasheet does not use the Linux
term gadget.
> + "usb-device" for the USB device clock
> +
> +Optional properties:
> + - samsung,vbus-gpio: If present, specifies a gpio that needs to be
> + activated for the bus to be powered.
Isn't it the host side that controls Vbus?
> + - samsung,pullup-gpio: If present, specifies a gpio to control the
Both GPIOs need to specify the active state.
> + USB D+ pullup.
> +
> +usb1: udc@52000000 {
> + compatible = "samsung,s3c2440-udc";
> + reg = <0x52000000 0x100000>;
> + interrupts = <0 0 25 3>;
> + clocks = <&clocks UCLK>, <&clocks HCLK_USBD>;
> + clock-names = "usb-bus-gadget", "usb-device";
> + samsung,pullup-gpio = <&gpc 5 GPIO_ACTIVE_HIGH>;
> +};
> --
> 1.9.1
>
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^ permalink raw reply
* Re: [PATCH] MIPS: NI 169445 board support
From: Nathan Sullivan @ 2016-12-13 18:56 UTC (permalink / raw)
To: Paul Burton
Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA, ralf-6z/3iImG2C8G8FEW9MqTrA,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <3462760.PnFL9sJqBx@np-p-burton>
On Tue, Dec 13, 2016 at 06:40:31PM +0000, Paul Burton wrote:
> Hi Nathan,
>
> On Friday, 2 December 2016 09:42:09 GMT Nathan Sullivan wrote:
> > Support the National Instruments 169445 board.
> >
> > Signed-off-by: Nathan Sullivan <nathan.sullivan-acOepvfBmUk@public.gmane.org>
> > ---
> > "gpio: mmio: add support for NI 169445 NAND GPIO" and
> > "devicetree: add vendor prefix for National Instruments" are required for
> > the NAND on this board to work.
> >
> > Documentation/devicetree/bindings/mips/ni.txt | 7 ++
> > arch/mips/Kbuild.platforms | 1 +
> > arch/mips/Kconfig | 26 ++++++
> > arch/mips/boot/dts/Makefile | 1 +
> > arch/mips/boot/dts/ni/169445.dts | 99 +++++++++++++++++++++
> > arch/mips/boot/dts/ni/Makefile | 9 ++
> > arch/mips/configs/ni169445_defconfig | 120 ++++++++++++++++++++++++++
> > arch/mips/ni169445/169445-console.c | 38 ++++++++
> > arch/mips/ni169445/169445-init.c | 39 +++++++++
> > arch/mips/ni169445/169445-int.c | 34 ++++++++
> > arch/mips/ni169445/169445-setup.c | 58 +++++++++++++
> > arch/mips/ni169445/169445-time.c | 35 ++++++++
> > arch/mips/ni169445/Makefile | 9 ++
> > arch/mips/ni169445/Platform | 6 ++
> > 14 files changed, 482 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
> > create mode 100644 arch/mips/boot/dts/ni/169445.dts
> > create mode 100644 arch/mips/boot/dts/ni/Makefile
> > create mode 100644 arch/mips/configs/ni169445_defconfig
> > create mode 100644 arch/mips/ni169445/169445-console.c
> > create mode 100644 arch/mips/ni169445/169445-init.c
> > create mode 100644 arch/mips/ni169445/169445-int.c
> > create mode 100644 arch/mips/ni169445/169445-setup.c
> > create mode 100644 arch/mips/ni169445/169445-time.c
> > create mode 100644 arch/mips/ni169445/Makefile
> > create mode 100644 arch/mips/ni169445/Platform
> >
> > diff --git a/Documentation/devicetree/bindings/mips/ni.txt
> > b/Documentation/devicetree/bindings/mips/ni.txt new file mode 100644
> > index 0000000..722bf2d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mips/ni.txt
> > @@ -0,0 +1,7 @@
> > +National Instruments MIPS platforms
> > +
> > +required root node properties:
> > + - compatible: must be "ni,169445"
> > +
> > +CPU Nodes
> > + - compatible: must be "mti,mips14KEc"
>
> This doesn't describe anything else you rely on, like the
> mips-hpt-frequency property which you panic without.
>
> > diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
> > index f5f1bdb..f2d7b5c 100644
> > --- a/arch/mips/Kbuild.platforms
> > +++ b/arch/mips/Kbuild.platforms
> > @@ -20,6 +20,7 @@ platforms += loongson32
> > platforms += loongson64
> > platforms += mti-malta
> > platforms += netlogic
> > +platforms += ni169445
> > platforms += paravirt
> > platforms += pic32
> > platforms += pistachio
> > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> > index b3c5bde..d24d11f 100644
> > --- a/arch/mips/Kconfig
> > +++ b/arch/mips/Kconfig
> > @@ -574,6 +574,32 @@ config NXP_STB225
> > help
> > Support for NXP Semiconductors STB225 Development Board.
> >
> > +config NI_169445
> > + bool "NI 169445 board"
> > + select ARCH_WANT_OPTIONAL_GPIOLIB
> > + select BOOT_ELF32
> > + select BOOT_RAW
> > + select BUILTIN_DTB
> > + select CEVT_R4K
> > + select CSRC_R4K
> > + select CPU_MIPSR2_IRQ_VI
> > + select CPU_MIPSR2_IRQ_EI
> > + select DMA_NONCOHERENT
> > + select IRQ_MIPS_CPU
> > + select LIBFDT
> > + select MIPS_MSC
> > + select SYS_HAS_CPU_MIPS32_R1
> > + select SYS_HAS_CPU_MIPS32_R2
> > + select SYS_HAS_EARLY_PRINTK
> > + select SYS_SUPPORTS_32BIT_KERNEL
> > + select SYS_SUPPORTS_LITTLE_ENDIAN
> > + select USE_OF
> > + select COMMON_CLK
> > + help
> > + This enables support for the National Instruments 169445A
> > + board.
> > +
> > +
> > config PMC_MSP
> > bool "PMC-Sierra MSP chipsets"
> > select CEVT_R4K
> > diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
> > index fc7a0a9..65a0ad8 100644
> > --- a/arch/mips/boot/dts/Makefile
> > +++ b/arch/mips/boot/dts/Makefile
> > @@ -3,6 +3,7 @@ dts-dirs += cavium-octeon
> > dts-dirs += ingenic
> > dts-dirs += lantiq
> > dts-dirs += mti
> > +dts-dirs += ni
> > dts-dirs += netlogic
> > dts-dirs += pic32
> > dts-dirs += qca
> > diff --git a/arch/mips/boot/dts/ni/169445.dts
> > b/arch/mips/boot/dts/ni/169445.dts new file mode 100644
> > index 0000000..a2b49f9
> > --- /dev/null
> > +++ b/arch/mips/boot/dts/ni/169445.dts
> > @@ -0,0 +1,99 @@
> > +/dts-v1/;
> > +
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "ni,169445";
> > +
> > + cpus {
> > + mips-hpt-frequency = <25000000>;
> > +
> > + cpu@0 {
> > + compatible = "mti,mips14KEc";
> > + };
> > + };
> > +
> > + memory {
> > + device_type = "memory";
> > + reg = <0x0 0x08000000>;
> > + };
> > +
> > + clocks {
> > + baseclk: baseclock {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <50000000>;
> > + };
> > + };
> > +
> > + cpu_intc: cpu_intc {
> > + #address-cells = <0>;
> > + compatible = "mti,cpu-interrupt-controller";
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + };
> > +
> > + ahb@0 {
> > + compatible = "simple-bus";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + gpio1: nand-gpio-out@1f300010 {
> > + compatible = "ni,169445-nand-gpio";
> > + reg = <0x1f300010 0x4>;
> > + reg-names = "dat";
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + ngpios = <5>;
> > + };
> > +
> > + gpio2: nand-gpio-in@1f300014 {
> > + compatible = "ni,169445-nand-gpio";
> > + reg = <0x1f300014 0x4>;
> > + reg-names = "dat";
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + ngpios = <1>;
> > + };
> > +
> > + nand@1f300000 {
> > + compatible = "gpio-control-nand";
> > + nand-on-flash-bbt;
> > + nand-ecc-mode = "soft_bch";
> > + nand-ecc-step-size = <512>;
> > + nand-ecc-strength = <4>;
> > + reg = <0x1f300000 4>;
> > + gpios = <&gpio2 0 0>, /* rdy */
> > + <&gpio1 1 0>, /* nce */
> > + <&gpio1 2 0>, /* ale */
> > + <&gpio1 3 0>, /* cle */
> > + <&gpio1 4 0>; /* nwp */
> > + };
> > +
> > + serial@1f380000 {
> > + compatible = "ns16550a";
> > + reg = <0x1f380000 0x1000>;
> > + interrupt-parent = <&cpu_intc>;
> > + interrupts = <6>;
> > + clocks = <&baseclk>;
> > + reg-shift = <0>;
> > + };
> > +
> > + ethernet@1f340000 {
> > + compatible = "snps,dwc-qos-ethernet-4.10";
> > + interrupt-parent = <&cpu_intc>;
> > + interrupts = <5>;
> > + reg = <0x1f340000 0x2000>;
> > + clock-names = "apb_pclk", "phy_ref_clk";
> > + clocks = <&baseclk>, <&baseclk>;
> > +
> > + phy-mode = "rgmii";
> > +
> > + fixed-link {
> > + speed = <1000>;
> > + full-duplex;
> > + };
> > + };
> > + };
> > +};
> > diff --git a/arch/mips/boot/dts/ni/Makefile b/arch/mips/boot/dts/ni/Makefile
> > new file mode 100644
> > index 0000000..5291c18
> > --- /dev/null
> > +++ b/arch/mips/boot/dts/ni/Makefile
> > @@ -0,0 +1,9 @@
> > +dtb-$(CONFIG_NI_169445) += 169445.dtb
> > +
> > +obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
> > +
> > +# Force kbuild to make empty built-in.o if necessary
> > +obj- += dummy.o
> > +
> > +always := $(dtb-y)
> > +clean-files := *.dtb *.dtb.S
> > diff --git a/arch/mips/configs/ni169445_defconfig
> > b/arch/mips/configs/ni169445_defconfig new file mode 100644
> > index 0000000..e5a34df
> > --- /dev/null
> > +++ b/arch/mips/configs/ni169445_defconfig
> > @@ -0,0 +1,120 @@
> > +CONFIG_NI_169445=y
> > +CONFIG_CPU_MIPS32_R2=y
> > +CONFIG_HZ_100=y
> > +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
> > +# CONFIG_SWAP is not set
> > +CONFIG_SYSVIPC=y
> > +CONFIG_HZ_PERIODIC=y
> > +CONFIG_NO_HZ=y
> > +CONFIG_HIGH_RES_TIMERS=y
> > +CONFIG_IKCONFIG=y
> > +CONFIG_IKCONFIG_PROC=y
> > +CONFIG_LOG_BUF_SHIFT=15
> > +CONFIG_BLK_DEV_INITRD=y
> > +# CONFIG_RD_GZIP is not set
> > +# CONFIG_RD_LZMA is not set
> > +# CONFIG_RD_XZ is not set
> > +# CONFIG_RD_LZO is not set
> > +# CONFIG_RD_LZ4 is not set
> > +# CONFIG_SHMEM is not set
> > +CONFIG_EMBEDDED=y
> > +CONFIG_SLAB=y
> > +CONFIG_PROFILING=y
> > +# CONFIG_LBDAF is not set
> > +# CONFIG_BLK_DEV_BSG is not set
> > +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
> > +# CONFIG_SUSPEND is not set
> > +CONFIG_NET=y
> > +CONFIG_PACKET=y
> > +CONFIG_UNIX=y
> > +CONFIG_INET=y
> > +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
> > +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
> > +# CONFIG_INET_XFRM_MODE_BEET is not set
> > +# CONFIG_INET_DIAG is not set
> > +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
> > +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
> > +CONFIG_NETFILTER=y
> > +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
> > +CONFIG_IP_NF_IPTABLES=y
> > +CONFIG_IP_NF_FILTER=y
> > +CONFIG_IP6_NF_IPTABLES=y
> > +CONFIG_IP6_NF_FILTER=y
> > +# CONFIG_WIRELESS is not set
> > +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
> > +CONFIG_DEVTMPFS=y
> > +CONFIG_DEVTMPFS_MOUNT=y
> > +CONFIG_MTD=y
> > +CONFIG_MTD_CMDLINE_PARTS=y
> > +CONFIG_MTD_BLOCK_RO=y
> > +CONFIG_MTD_NAND=y
> > +CONFIG_MTD_NAND_ECC_BCH=y
> > +CONFIG_MTD_NAND_GPIO=y
> > +CONFIG_MTD_UBI=y
> > +CONFIG_MTD_UBI_BLOCK=y
> > +CONFIG_NETDEVICES=y
> > +# CONFIG_NET_VENDOR_AMAZON is not set
> > +# CONFIG_NET_VENDOR_ARC is not set
> > +# CONFIG_NET_CADENCE is not set
> > +# CONFIG_NET_VENDOR_BROADCOM is not set
> > +# CONFIG_NET_VENDOR_EZCHIP is not set
> > +# CONFIG_NET_VENDOR_INTEL is not set
> > +# CONFIG_NET_VENDOR_MARVELL is not set
> > +# CONFIG_NET_VENDOR_MICREL is not set
> > +# CONFIG_NET_VENDOR_NATSEMI is not set
> > +# CONFIG_NET_VENDOR_NETRONOME is not set
> > +# CONFIG_NET_VENDOR_QUALCOMM is not set
> > +# CONFIG_NET_VENDOR_RENESAS is not set
> > +# CONFIG_NET_VENDOR_ROCKER is not set
> > +# CONFIG_NET_VENDOR_SAMSUNG is not set
> > +# CONFIG_NET_VENDOR_SEEQ is not set
> > +# CONFIG_NET_VENDOR_SMSC is not set
> > +# CONFIG_NET_VENDOR_STMICRO is not set
> > +CONFIG_SYNOPSYS_DWC_ETH_QOS=y
> > +# CONFIG_NET_VENDOR_VIA is not set
> > +# CONFIG_NET_VENDOR_WIZNET is not set
> > +# CONFIG_NET_VENDOR_XILINX is not set
> > +# CONFIG_WLAN is not set
> > +# CONFIG_INPUT_MOUSEDEV is not set
> > +# CONFIG_INPUT_KEYBOARD is not set
> > +# CONFIG_INPUT_MOUSE is not set
> > +# CONFIG_SERIO is not set
> > +# CONFIG_CONSOLE_TRANSLATIONS is not set
> > +CONFIG_VT_HW_CONSOLE_BINDING=y
> > +CONFIG_LEGACY_PTY_COUNT=32
> > +CONFIG_SERIAL_8250=y
> > +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
> > +CONFIG_SERIAL_8250_CONSOLE=y
> > +CONFIG_SERIAL_8250_NR_UARTS=2
> > +CONFIG_SERIAL_8250_RUNTIME_UARTS=2
> > +CONFIG_SERIAL_OF_PLATFORM=y
> > +# CONFIG_HW_RANDOM is not set
> > +CONFIG_GPIOLIB=y
> > +CONFIG_GPIO_SYSFS=y
> > +CONFIG_GPIO_GENERIC_PLATFORM=y
> > +# CONFIG_HWMON is not set
> > +# CONFIG_VGA_CONSOLE is not set
> > +# CONFIG_HID is not set
> > +# CONFIG_USB_SUPPORT is not set
> > +# CONFIG_MIPS_PLATFORM_DEVICES is not set
> > +# CONFIG_IOMMU_SUPPORT is not set
> > +CONFIG_UBIFS_FS=y
> > +CONFIG_UBIFS_FS_ADVANCED_COMPR=y
> > +# CONFIG_UBIFS_FS_ZLIB is not set
> > +CONFIG_SQUASHFS=y
> > +# CONFIG_SQUASHFS_ZLIB is not set
> > +CONFIG_SQUASHFS_LZO=y
> > +CONFIG_SQUASHFS_XZ=y
> > +# CONFIG_NETWORK_FILESYSTEMS is not set
> > +# CONFIG_FTRACE is not set
> > +CONFIG_CRYPTO_CBC=y
> > +CONFIG_CRYPTO_ECB=y
> > +CONFIG_CRYPTO_CRC32C=y
> > +CONFIG_CRYPTO_ARC4=y
> > +# CONFIG_CRYPTO_HW is not set
> > +# CONFIG_XZ_DEC_X86 is not set
> > +# CONFIG_XZ_DEC_POWERPC is not set
> > +# CONFIG_XZ_DEC_IA64 is not set
> > +# CONFIG_XZ_DEC_ARM is not set
> > +# CONFIG_XZ_DEC_ARMTHUMB is not set
> > +# CONFIG_XZ_DEC_SPARC is not set
> > diff --git a/arch/mips/ni169445/169445-console.c
> > b/arch/mips/ni169445/169445-console.c new file mode 100644
> > index 0000000..f07e48b
> > --- /dev/null
> > +++ b/arch/mips/ni169445/169445-console.c
> > @@ -0,0 +1,38 @@
> > +/* Copyright 2016 National Instruments Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > Free + * Software Foundation; either version 2 of the License, or (at your
> > option) + * any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > WITHOUT + * ANY WARRANTY; without even the implied warranty of
> > MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > General Public License for + * more details.
> > + */
> > +#include <linux/init.h>
> > +#include <linux/console.h>
> > +#include <linux/serial_reg.h>
> > +#include <linux/io.h>
> > +
> > +#define NI_UART0_REGS_BASE ((unsigned char __iomem *)0xbf380000)
> > +
> > +static inline unsigned char serial_in(int offset)
> > +{
> > + return __raw_readb(NI_UART0_REGS_BASE + offset);
> > +}
> > +
> > +static inline void serial_out(int offset, char value)
> > +{
> > + __raw_writeb(value, NI_UART0_REGS_BASE + offset);
> > +}
> > +
> > +int prom_putchar(char c)
> > +{
> > + while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
> > + ;
> > +
> > + serial_out(UART_TX, c);
> > +
> > + return 1;
> > +}
>
> Could you use the generic 16550 earlycon support? (see CONFIG_SERIAL_8250_CONSOLE)
>
> > diff --git a/arch/mips/ni169445/169445-init.c
> > b/arch/mips/ni169445/169445-init.c new file mode 100644
> > index 0000000..5c7ff5e
> > --- /dev/null
> > +++ b/arch/mips/ni169445/169445-init.c
> > @@ -0,0 +1,39 @@
> > +/* Copyright 2016 National Instruments Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > Free + * Software Foundation; either version 2 of the License, or (at your
> > option) + * any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > WITHOUT + * ANY WARRANTY; without even the implied warranty of
> > MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > General Public License for + * more details.
> > + */
> > +#include <linux/init.h>
> > +#include <linux/initrd.h>
> > +#include <linux/io.h>
> > +
> > +#include <asm/bootinfo.h>
> > +#include <asm/cacheflush.h>
> > +#include <asm/traps.h>
> > +#include <asm/mips-boards/generic.h>
> > +#include <asm/fw/fw.h>
> > +
> > +void __init prom_init(void)
> > +{
> > + fw_init_cmdline();
> > +
> > +#ifdef CONFIG_BLK_DEV_INITRD
> > + /* Read the initrd address from the firmware environment */
> > + initrd_start = fw_getenvl("initrd_start");
> > + if (initrd_start) {
> > + initrd_start = KSEG0ADDR(initrd_start);
> > + initrd_end = initrd_start + fw_getenvl("initrd_size");
> > + }
> > +#endif
> > +}
> > +
> > +void __init prom_free_prom_memory(void)
> > +{
> > +}
> > diff --git a/arch/mips/ni169445/169445-int.c
> > b/arch/mips/ni169445/169445-int.c new file mode 100644
> > index 0000000..83caf79
> > --- /dev/null
> > +++ b/arch/mips/ni169445/169445-int.c
> > @@ -0,0 +1,34 @@
> > +/* Copyright 2016 National Instruments Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > Free + * Software Foundation; either version 2 of the License, or (at your
> > option) + * any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > WITHOUT + * ANY WARRANTY; without even the implied warranty of
> > MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > General Public License for + * more details.
> > + */
> > +#include <linux/init.h>
> > +#include <linux/irq.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/irqchip/mips-gic.h>
> > +#include <linux/io.h>
> > +
> > +#include <asm/irq_cpu.h>
> > +#include <asm/setup.h>
> > +
> > +static const struct of_device_id of_irq_ids[] __initconst = {
> > + {
> > + .compatible = "mti,cpu-interrupt-controller",
> > + .data = mips_cpu_irq_of_init
> > + },
> > + {},
> > +};
> > +
> > +void __init arch_init_irq(void)
> > +{
> > + of_irq_init(of_irq_ids);
> > +}
>
> The CPU interrupt controller driver already does an IRQCHIP_DECLARE to
> provide its compatible string, so can you just use irqchip_init()?
>
> > +
> > diff --git a/arch/mips/ni169445/169445-setup.c
> > b/arch/mips/ni169445/169445-setup.c new file mode 100644
> > index 0000000..80a5c91
> > --- /dev/null
> > +++ b/arch/mips/ni169445/169445-setup.c
> > @@ -0,0 +1,58 @@
> > +/* Copyright 2016 National Instruments Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > Free + * Software Foundation; either version 2 of the License, or (at your
> > option) + * any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > WITHOUT + * ANY WARRANTY; without even the implied warranty of
> > MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > General Public License for + * more details.
> > + */
> > +#include <linux/init.h>
> > +#include <linux/clk-provider.h>
> > +#include <linux/libfdt.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/of_fdt.h>
> > +
> > +#include <asm/prom.h>
> > +#include <asm/fw/fw.h>
> > +
> > +#include <asm/mips-boards/generic.h>
> > +
> > +const char *get_system_type(void)
> > +{
> > + return "NI 169445 FPGA";
> > +}
> > +
> > +void __init plat_mem_setup(void)
> > +{
> > + /*
> > + * Load the builtin devicetree. This causes the chosen node to be
> > + * parsed resulting in our memory appearing
> > + */
> > + __dt_setup_arch(__dtb_start);
> > +}
> > +
> > +void __init device_tree_init(void)
> > +{
> > + if (!initial_boot_params)
> > + return;
> > +
> > + unflatten_and_copy_device_tree();
> > +}
> > +
> > +static int __init customize_machine(void)
> > +{
> > + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> > + return 0;
> > +}
> > +arch_initcall(customize_machine);
> > +
> > +static int __init plat_dev_init(void)
> > +{
> > + of_clk_init(NULL);
> > + return 0;
> > +}
> > +device_initcall(plat_dev_init);
> > diff --git a/arch/mips/ni169445/169445-time.c
> > b/arch/mips/ni169445/169445-time.c new file mode 100644
> > index 0000000..3d2499e
> > --- /dev/null
> > +++ b/arch/mips/ni169445/169445-time.c
> > @@ -0,0 +1,35 @@
> > +/* Copyright 2016 National Instruments Corporation
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License as published by the
> > Free + * Software Foundation; either version 2 of the License, or (at your
> > option) + * any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful, but
> > WITHOUT + * ANY WARRANTY; without even the implied warranty of
> > MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > General Public License for + * more details.
> > + */
> > +
> > +#include <linux/init.h>
> > +#include <linux/of.h>
> > +
> > +#include <asm/time.h>
> > +
> > +void __init plat_time_init(void)
> > +{
> > + struct device_node *np;
> > + u32 freq;
> > +
> > + np = of_find_node_by_name(NULL, "cpus");
> > + if (!np)
> > + panic("missing 'cpus' DT node");
> > + if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0)
> > + panic("missing 'mips-hpt-frequency' property");
>
> I think "clock-frequency" would be more standard, and the kernel would
> then just halve it to find the frequency at which the cop0 count register
> increments.
>
> > + of_node_put(np);
> > +
> > + mips_hpt_frequency = freq;
> > +
> > + /* IRQs will not work until the timer has been set at least once */
> > + write_c0_count(0);
>
> Really? Do you have any details of this, it sounds weird. Do you mean
> only the cop0 compare interrupt won't work until count is set? If so (and
> that sounds strange in itself) perhaps r4k_clockevent_init() ought to do
> this rather than some platform/board code.
>
Yes, the cop0 interrupt doesn't fire until you write count once. U-boot does
this in its MIPS timer code, and our hardware team confirmed this is the case.
I added this line before we started booting with U-boot, so it is probably fine
without it now.
> > +}
> > diff --git a/arch/mips/ni169445/Makefile b/arch/mips/ni169445/Makefile
> > new file mode 100644
> > index 0000000..f3a0c8c
> > --- /dev/null
> > +++ b/arch/mips/ni169445/Makefile
> > @@ -0,0 +1,9 @@
> > +#
> > +#
> > +obj-y := 169445-init.o \
> > + 169445-int.o 169445-setup.o \
> > + 169445-time.o
> > +
> > +obj-$(CONFIG_EARLY_PRINTK) += 169445-console.o
> > +
> > +CFLAGS_169445-setup.o = -I$(src)/../../../scripts/dtc/libfdt
> > diff --git a/arch/mips/ni169445/Platform b/arch/mips/ni169445/Platform
> > new file mode 100644
> > index 0000000..9380312
> > --- /dev/null
> > +++ b/arch/mips/ni169445/Platform
> > @@ -0,0 +1,6 @@
> > +#
> > +# National Instruments 169445 FPGA board
> > +#
> > +platform-$(CONFIG_NI_169445) += ni169445/
> > +load-$(CONFIG_NI_169445) += 0xffffffff80002000
> > +all-$(CONFIG_NI_169445) := $(COMPRESSION_FNAME).srec
>
> Could all this platform/board code be scrapped in favour of adding your
> system to the generic platform? There's some documentation over here
> which I hope to get in-tree soon:
>
> https://paulburton.eu/kernel-docs/mips/generic-platform.html
>
> You can also see some further examples of systems converted to the
> generic platform which I hope to get into mainline over the next few
> cycles over here:
>
> https://git.linux-mips.org/cgit/linux-mti.git/log/
>
> But the core of the generic platform is already there & ought to be
> usable for a system like this.
>
> Thanks,
> Paul
I think so, we aren't very different from the simpler MTI boards. I was under
the mistaken impression that MIPS didn't have a generic platform like ARM, but
I'll give this a try along with the other changes you suggested now that I
know about it.
Thanks,
Nathan
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^ permalink raw reply
* Re: [PATCH v2 1/7] ARM: dts: imx6qdl: Add VDOA compatible and clocks properties
From: Rob Herring @ 2016-12-13 18:52 UTC (permalink / raw)
To: Michael Tretter
Cc: linux-media, Philipp Zabel, devicetree, Hans Verkuil,
Mauro Carvalho Chehab, Philipp Zabel
In-Reply-To: <20161209165903.1293-2-m.tretter@pengutronix.de>
On Fri, Dec 09, 2016 at 05:58:57PM +0100, Michael Tretter wrote:
> From: Philipp Zabel <philipp.zabel@gmail.com>
>
> This adds a compatible property and the correct clock for the
> i.MX6Q Video Data Order Adapter.
This comment matches the dts change, but not the binding change.
> Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
> Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
> ---
> .../devicetree/bindings/media/fsl-vdoa.txt | 21 +++++++++++++++++++++
> arch/arm/boot/dts/imx6qdl.dtsi | 2 ++
> 2 files changed, 23 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/fsl-vdoa.txt
>
> diff --git a/Documentation/devicetree/bindings/media/fsl-vdoa.txt b/Documentation/devicetree/bindings/media/fsl-vdoa.txt
> new file mode 100644
> index 0000000..5e45f9b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/fsl-vdoa.txt
> @@ -0,0 +1,21 @@
> +Freescale Video Data Order Adapter
> +==================================
> +
> +The Video Data Order Adapter (VDOA) is present on the i.MX6q. Its sole purpose
> +it to to reorder video data from the macroblock tiled order produced by the
s/it to/is/
> +CODA 960 VPU to the conventional raster-scan order for scanout.
> +
> +Required properties:
> +- compatible: must be "fsl,imx6q-vdoa"
> +- reg: the register base and size for the device registers
> +- interrupts: the VDOA interrupt
> +- clocks: the vdoa clock
> +
> +Example:
> +
> +vdoa@021e4000 {
Drop the leading 0.
> + compatible = "fsl,imx6q-vdoa";
> + reg = <0x021e4000 0x4000>;
> + interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6QDL_CLK_VDOA>;
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index b13b0b2..69e3668 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -1153,8 +1153,10 @@
> };
>
> vdoa@021e4000 {
> + compatible = "fsl,imx6q-vdoa";
> reg = <0x021e4000 0x4000>;
> interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6QDL_CLK_VDOA>;
> };
>
> uart2: serial@021e8000 {
> --
> 2.10.2
>
> --
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> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* Re: [PATCH] MIPS: NI 169445 board support
From: Paul Burton @ 2016-12-13 18:40 UTC (permalink / raw)
To: Nathan Sullivan
Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA, ralf-6z/3iImG2C8G8FEW9MqTrA,
mark.rutland-5wv7dgnIgG8, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1480693329-22265-1-git-send-email-nathan.sullivan-acOepvfBmUk@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 20385 bytes --]
Hi Nathan,
On Friday, 2 December 2016 09:42:09 GMT Nathan Sullivan wrote:
> Support the National Instruments 169445 board.
>
> Signed-off-by: Nathan Sullivan <nathan.sullivan-acOepvfBmUk@public.gmane.org>
> ---
> "gpio: mmio: add support for NI 169445 NAND GPIO" and
> "devicetree: add vendor prefix for National Instruments" are required for
> the NAND on this board to work.
>
> Documentation/devicetree/bindings/mips/ni.txt | 7 ++
> arch/mips/Kbuild.platforms | 1 +
> arch/mips/Kconfig | 26 ++++++
> arch/mips/boot/dts/Makefile | 1 +
> arch/mips/boot/dts/ni/169445.dts | 99 +++++++++++++++++++++
> arch/mips/boot/dts/ni/Makefile | 9 ++
> arch/mips/configs/ni169445_defconfig | 120 ++++++++++++++++++++++++++
> arch/mips/ni169445/169445-console.c | 38 ++++++++
> arch/mips/ni169445/169445-init.c | 39 +++++++++
> arch/mips/ni169445/169445-int.c | 34 ++++++++
> arch/mips/ni169445/169445-setup.c | 58 +++++++++++++
> arch/mips/ni169445/169445-time.c | 35 ++++++++
> arch/mips/ni169445/Makefile | 9 ++
> arch/mips/ni169445/Platform | 6 ++
> 14 files changed, 482 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mips/ni.txt
> create mode 100644 arch/mips/boot/dts/ni/169445.dts
> create mode 100644 arch/mips/boot/dts/ni/Makefile
> create mode 100644 arch/mips/configs/ni169445_defconfig
> create mode 100644 arch/mips/ni169445/169445-console.c
> create mode 100644 arch/mips/ni169445/169445-init.c
> create mode 100644 arch/mips/ni169445/169445-int.c
> create mode 100644 arch/mips/ni169445/169445-setup.c
> create mode 100644 arch/mips/ni169445/169445-time.c
> create mode 100644 arch/mips/ni169445/Makefile
> create mode 100644 arch/mips/ni169445/Platform
>
> diff --git a/Documentation/devicetree/bindings/mips/ni.txt
> b/Documentation/devicetree/bindings/mips/ni.txt new file mode 100644
> index 0000000..722bf2d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/ni.txt
> @@ -0,0 +1,7 @@
> +National Instruments MIPS platforms
> +
> +required root node properties:
> + - compatible: must be "ni,169445"
> +
> +CPU Nodes
> + - compatible: must be "mti,mips14KEc"
This doesn't describe anything else you rely on, like the
mips-hpt-frequency property which you panic without.
> diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
> index f5f1bdb..f2d7b5c 100644
> --- a/arch/mips/Kbuild.platforms
> +++ b/arch/mips/Kbuild.platforms
> @@ -20,6 +20,7 @@ platforms += loongson32
> platforms += loongson64
> platforms += mti-malta
> platforms += netlogic
> +platforms += ni169445
> platforms += paravirt
> platforms += pic32
> platforms += pistachio
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index b3c5bde..d24d11f 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -574,6 +574,32 @@ config NXP_STB225
> help
> Support for NXP Semiconductors STB225 Development Board.
>
> +config NI_169445
> + bool "NI 169445 board"
> + select ARCH_WANT_OPTIONAL_GPIOLIB
> + select BOOT_ELF32
> + select BOOT_RAW
> + select BUILTIN_DTB
> + select CEVT_R4K
> + select CSRC_R4K
> + select CPU_MIPSR2_IRQ_VI
> + select CPU_MIPSR2_IRQ_EI
> + select DMA_NONCOHERENT
> + select IRQ_MIPS_CPU
> + select LIBFDT
> + select MIPS_MSC
> + select SYS_HAS_CPU_MIPS32_R1
> + select SYS_HAS_CPU_MIPS32_R2
> + select SYS_HAS_EARLY_PRINTK
> + select SYS_SUPPORTS_32BIT_KERNEL
> + select SYS_SUPPORTS_LITTLE_ENDIAN
> + select USE_OF
> + select COMMON_CLK
> + help
> + This enables support for the National Instruments 169445A
> + board.
> +
> +
> config PMC_MSP
> bool "PMC-Sierra MSP chipsets"
> select CEVT_R4K
> diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
> index fc7a0a9..65a0ad8 100644
> --- a/arch/mips/boot/dts/Makefile
> +++ b/arch/mips/boot/dts/Makefile
> @@ -3,6 +3,7 @@ dts-dirs += cavium-octeon
> dts-dirs += ingenic
> dts-dirs += lantiq
> dts-dirs += mti
> +dts-dirs += ni
> dts-dirs += netlogic
> dts-dirs += pic32
> dts-dirs += qca
> diff --git a/arch/mips/boot/dts/ni/169445.dts
> b/arch/mips/boot/dts/ni/169445.dts new file mode 100644
> index 0000000..a2b49f9
> --- /dev/null
> +++ b/arch/mips/boot/dts/ni/169445.dts
> @@ -0,0 +1,99 @@
> +/dts-v1/;
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "ni,169445";
> +
> + cpus {
> + mips-hpt-frequency = <25000000>;
> +
> + cpu@0 {
> + compatible = "mti,mips14KEc";
> + };
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x0 0x08000000>;
> + };
> +
> + clocks {
> + baseclk: baseclock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + };
> + };
> +
> + cpu_intc: cpu_intc {
> + #address-cells = <0>;
> + compatible = "mti,cpu-interrupt-controller";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> +
> + ahb@0 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + gpio1: nand-gpio-out@1f300010 {
> + compatible = "ni,169445-nand-gpio";
> + reg = <0x1f300010 0x4>;
> + reg-names = "dat";
> + gpio-controller;
> + #gpio-cells = <2>;
> + ngpios = <5>;
> + };
> +
> + gpio2: nand-gpio-in@1f300014 {
> + compatible = "ni,169445-nand-gpio";
> + reg = <0x1f300014 0x4>;
> + reg-names = "dat";
> + gpio-controller;
> + #gpio-cells = <2>;
> + ngpios = <1>;
> + };
> +
> + nand@1f300000 {
> + compatible = "gpio-control-nand";
> + nand-on-flash-bbt;
> + nand-ecc-mode = "soft_bch";
> + nand-ecc-step-size = <512>;
> + nand-ecc-strength = <4>;
> + reg = <0x1f300000 4>;
> + gpios = <&gpio2 0 0>, /* rdy */
> + <&gpio1 1 0>, /* nce */
> + <&gpio1 2 0>, /* ale */
> + <&gpio1 3 0>, /* cle */
> + <&gpio1 4 0>; /* nwp */
> + };
> +
> + serial@1f380000 {
> + compatible = "ns16550a";
> + reg = <0x1f380000 0x1000>;
> + interrupt-parent = <&cpu_intc>;
> + interrupts = <6>;
> + clocks = <&baseclk>;
> + reg-shift = <0>;
> + };
> +
> + ethernet@1f340000 {
> + compatible = "snps,dwc-qos-ethernet-4.10";
> + interrupt-parent = <&cpu_intc>;
> + interrupts = <5>;
> + reg = <0x1f340000 0x2000>;
> + clock-names = "apb_pclk", "phy_ref_clk";
> + clocks = <&baseclk>, <&baseclk>;
> +
> + phy-mode = "rgmii";
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> + };
> + };
> +};
> diff --git a/arch/mips/boot/dts/ni/Makefile b/arch/mips/boot/dts/ni/Makefile
> new file mode 100644
> index 0000000..5291c18
> --- /dev/null
> +++ b/arch/mips/boot/dts/ni/Makefile
> @@ -0,0 +1,9 @@
> +dtb-$(CONFIG_NI_169445) += 169445.dtb
> +
> +obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
> +
> +# Force kbuild to make empty built-in.o if necessary
> +obj- += dummy.o
> +
> +always := $(dtb-y)
> +clean-files := *.dtb *.dtb.S
> diff --git a/arch/mips/configs/ni169445_defconfig
> b/arch/mips/configs/ni169445_defconfig new file mode 100644
> index 0000000..e5a34df
> --- /dev/null
> +++ b/arch/mips/configs/ni169445_defconfig
> @@ -0,0 +1,120 @@
> +CONFIG_NI_169445=y
> +CONFIG_CPU_MIPS32_R2=y
> +CONFIG_HZ_100=y
> +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
> +# CONFIG_SWAP is not set
> +CONFIG_SYSVIPC=y
> +CONFIG_HZ_PERIODIC=y
> +CONFIG_NO_HZ=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_IKCONFIG=y
> +CONFIG_IKCONFIG_PROC=y
> +CONFIG_LOG_BUF_SHIFT=15
> +CONFIG_BLK_DEV_INITRD=y
> +# CONFIG_RD_GZIP is not set
> +# CONFIG_RD_LZMA is not set
> +# CONFIG_RD_XZ is not set
> +# CONFIG_RD_LZO is not set
> +# CONFIG_RD_LZ4 is not set
> +# CONFIG_SHMEM is not set
> +CONFIG_EMBEDDED=y
> +CONFIG_SLAB=y
> +CONFIG_PROFILING=y
> +# CONFIG_LBDAF is not set
> +# CONFIG_BLK_DEV_BSG is not set
> +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
> +# CONFIG_SUSPEND is not set
> +CONFIG_NET=y
> +CONFIG_PACKET=y
> +CONFIG_UNIX=y
> +CONFIG_INET=y
> +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
> +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
> +# CONFIG_INET_XFRM_MODE_BEET is not set
> +# CONFIG_INET_DIAG is not set
> +# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set
> +# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
> +CONFIG_NETFILTER=y
> +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
> +CONFIG_IP_NF_IPTABLES=y
> +CONFIG_IP_NF_FILTER=y
> +CONFIG_IP6_NF_IPTABLES=y
> +CONFIG_IP6_NF_FILTER=y
> +# CONFIG_WIRELESS is not set
> +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
> +CONFIG_DEVTMPFS=y
> +CONFIG_DEVTMPFS_MOUNT=y
> +CONFIG_MTD=y
> +CONFIG_MTD_CMDLINE_PARTS=y
> +CONFIG_MTD_BLOCK_RO=y
> +CONFIG_MTD_NAND=y
> +CONFIG_MTD_NAND_ECC_BCH=y
> +CONFIG_MTD_NAND_GPIO=y
> +CONFIG_MTD_UBI=y
> +CONFIG_MTD_UBI_BLOCK=y
> +CONFIG_NETDEVICES=y
> +# CONFIG_NET_VENDOR_AMAZON is not set
> +# CONFIG_NET_VENDOR_ARC is not set
> +# CONFIG_NET_CADENCE is not set
> +# CONFIG_NET_VENDOR_BROADCOM is not set
> +# CONFIG_NET_VENDOR_EZCHIP is not set
> +# CONFIG_NET_VENDOR_INTEL is not set
> +# CONFIG_NET_VENDOR_MARVELL is not set
> +# CONFIG_NET_VENDOR_MICREL is not set
> +# CONFIG_NET_VENDOR_NATSEMI is not set
> +# CONFIG_NET_VENDOR_NETRONOME is not set
> +# CONFIG_NET_VENDOR_QUALCOMM is not set
> +# CONFIG_NET_VENDOR_RENESAS is not set
> +# CONFIG_NET_VENDOR_ROCKER is not set
> +# CONFIG_NET_VENDOR_SAMSUNG is not set
> +# CONFIG_NET_VENDOR_SEEQ is not set
> +# CONFIG_NET_VENDOR_SMSC is not set
> +# CONFIG_NET_VENDOR_STMICRO is not set
> +CONFIG_SYNOPSYS_DWC_ETH_QOS=y
> +# CONFIG_NET_VENDOR_VIA is not set
> +# CONFIG_NET_VENDOR_WIZNET is not set
> +# CONFIG_NET_VENDOR_XILINX is not set
> +# CONFIG_WLAN is not set
> +# CONFIG_INPUT_MOUSEDEV is not set
> +# CONFIG_INPUT_KEYBOARD is not set
> +# CONFIG_INPUT_MOUSE is not set
> +# CONFIG_SERIO is not set
> +# CONFIG_CONSOLE_TRANSLATIONS is not set
> +CONFIG_VT_HW_CONSOLE_BINDING=y
> +CONFIG_LEGACY_PTY_COUNT=32
> +CONFIG_SERIAL_8250=y
> +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
> +CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_8250_NR_UARTS=2
> +CONFIG_SERIAL_8250_RUNTIME_UARTS=2
> +CONFIG_SERIAL_OF_PLATFORM=y
> +# CONFIG_HW_RANDOM is not set
> +CONFIG_GPIOLIB=y
> +CONFIG_GPIO_SYSFS=y
> +CONFIG_GPIO_GENERIC_PLATFORM=y
> +# CONFIG_HWMON is not set
> +# CONFIG_VGA_CONSOLE is not set
> +# CONFIG_HID is not set
> +# CONFIG_USB_SUPPORT is not set
> +# CONFIG_MIPS_PLATFORM_DEVICES is not set
> +# CONFIG_IOMMU_SUPPORT is not set
> +CONFIG_UBIFS_FS=y
> +CONFIG_UBIFS_FS_ADVANCED_COMPR=y
> +# CONFIG_UBIFS_FS_ZLIB is not set
> +CONFIG_SQUASHFS=y
> +# CONFIG_SQUASHFS_ZLIB is not set
> +CONFIG_SQUASHFS_LZO=y
> +CONFIG_SQUASHFS_XZ=y
> +# CONFIG_NETWORK_FILESYSTEMS is not set
> +# CONFIG_FTRACE is not set
> +CONFIG_CRYPTO_CBC=y
> +CONFIG_CRYPTO_ECB=y
> +CONFIG_CRYPTO_CRC32C=y
> +CONFIG_CRYPTO_ARC4=y
> +# CONFIG_CRYPTO_HW is not set
> +# CONFIG_XZ_DEC_X86 is not set
> +# CONFIG_XZ_DEC_POWERPC is not set
> +# CONFIG_XZ_DEC_IA64 is not set
> +# CONFIG_XZ_DEC_ARM is not set
> +# CONFIG_XZ_DEC_ARMTHUMB is not set
> +# CONFIG_XZ_DEC_SPARC is not set
> diff --git a/arch/mips/ni169445/169445-console.c
> b/arch/mips/ni169445/169445-console.c new file mode 100644
> index 0000000..f07e48b
> --- /dev/null
> +++ b/arch/mips/ni169445/169445-console.c
> @@ -0,0 +1,38 @@
> +/* Copyright 2016 National Instruments Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> Free + * Software Foundation; either version 2 of the License, or (at your
> option) + * any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but
> WITHOUT + * ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> General Public License for + * more details.
> + */
> +#include <linux/init.h>
> +#include <linux/console.h>
> +#include <linux/serial_reg.h>
> +#include <linux/io.h>
> +
> +#define NI_UART0_REGS_BASE ((unsigned char __iomem *)0xbf380000)
> +
> +static inline unsigned char serial_in(int offset)
> +{
> + return __raw_readb(NI_UART0_REGS_BASE + offset);
> +}
> +
> +static inline void serial_out(int offset, char value)
> +{
> + __raw_writeb(value, NI_UART0_REGS_BASE + offset);
> +}
> +
> +int prom_putchar(char c)
> +{
> + while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
> + ;
> +
> + serial_out(UART_TX, c);
> +
> + return 1;
> +}
Could you use the generic 16550 earlycon support? (see CONFIG_SERIAL_8250_CONSOLE)
> diff --git a/arch/mips/ni169445/169445-init.c
> b/arch/mips/ni169445/169445-init.c new file mode 100644
> index 0000000..5c7ff5e
> --- /dev/null
> +++ b/arch/mips/ni169445/169445-init.c
> @@ -0,0 +1,39 @@
> +/* Copyright 2016 National Instruments Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> Free + * Software Foundation; either version 2 of the License, or (at your
> option) + * any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but
> WITHOUT + * ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> General Public License for + * more details.
> + */
> +#include <linux/init.h>
> +#include <linux/initrd.h>
> +#include <linux/io.h>
> +
> +#include <asm/bootinfo.h>
> +#include <asm/cacheflush.h>
> +#include <asm/traps.h>
> +#include <asm/mips-boards/generic.h>
> +#include <asm/fw/fw.h>
> +
> +void __init prom_init(void)
> +{
> + fw_init_cmdline();
> +
> +#ifdef CONFIG_BLK_DEV_INITRD
> + /* Read the initrd address from the firmware environment */
> + initrd_start = fw_getenvl("initrd_start");
> + if (initrd_start) {
> + initrd_start = KSEG0ADDR(initrd_start);
> + initrd_end = initrd_start + fw_getenvl("initrd_size");
> + }
> +#endif
> +}
> +
> +void __init prom_free_prom_memory(void)
> +{
> +}
> diff --git a/arch/mips/ni169445/169445-int.c
> b/arch/mips/ni169445/169445-int.c new file mode 100644
> index 0000000..83caf79
> --- /dev/null
> +++ b/arch/mips/ni169445/169445-int.c
> @@ -0,0 +1,34 @@
> +/* Copyright 2016 National Instruments Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> Free + * Software Foundation; either version 2 of the License, or (at your
> option) + * any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but
> WITHOUT + * ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> General Public License for + * more details.
> + */
> +#include <linux/init.h>
> +#include <linux/irq.h>
> +#include <linux/of_irq.h>
> +#include <linux/irqchip/mips-gic.h>
> +#include <linux/io.h>
> +
> +#include <asm/irq_cpu.h>
> +#include <asm/setup.h>
> +
> +static const struct of_device_id of_irq_ids[] __initconst = {
> + {
> + .compatible = "mti,cpu-interrupt-controller",
> + .data = mips_cpu_irq_of_init
> + },
> + {},
> +};
> +
> +void __init arch_init_irq(void)
> +{
> + of_irq_init(of_irq_ids);
> +}
The CPU interrupt controller driver already does an IRQCHIP_DECLARE to
provide its compatible string, so can you just use irqchip_init()?
> +
> diff --git a/arch/mips/ni169445/169445-setup.c
> b/arch/mips/ni169445/169445-setup.c new file mode 100644
> index 0000000..80a5c91
> --- /dev/null
> +++ b/arch/mips/ni169445/169445-setup.c
> @@ -0,0 +1,58 @@
> +/* Copyright 2016 National Instruments Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> Free + * Software Foundation; either version 2 of the License, or (at your
> option) + * any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but
> WITHOUT + * ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> General Public License for + * more details.
> + */
> +#include <linux/init.h>
> +#include <linux/clk-provider.h>
> +#include <linux/libfdt.h>
> +#include <linux/of_platform.h>
> +#include <linux/of_fdt.h>
> +
> +#include <asm/prom.h>
> +#include <asm/fw/fw.h>
> +
> +#include <asm/mips-boards/generic.h>
> +
> +const char *get_system_type(void)
> +{
> + return "NI 169445 FPGA";
> +}
> +
> +void __init plat_mem_setup(void)
> +{
> + /*
> + * Load the builtin devicetree. This causes the chosen node to be
> + * parsed resulting in our memory appearing
> + */
> + __dt_setup_arch(__dtb_start);
> +}
> +
> +void __init device_tree_init(void)
> +{
> + if (!initial_boot_params)
> + return;
> +
> + unflatten_and_copy_device_tree();
> +}
> +
> +static int __init customize_machine(void)
> +{
> + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> + return 0;
> +}
> +arch_initcall(customize_machine);
> +
> +static int __init plat_dev_init(void)
> +{
> + of_clk_init(NULL);
> + return 0;
> +}
> +device_initcall(plat_dev_init);
> diff --git a/arch/mips/ni169445/169445-time.c
> b/arch/mips/ni169445/169445-time.c new file mode 100644
> index 0000000..3d2499e
> --- /dev/null
> +++ b/arch/mips/ni169445/169445-time.c
> @@ -0,0 +1,35 @@
> +/* Copyright 2016 National Instruments Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> Free + * Software Foundation; either version 2 of the License, or (at your
> option) + * any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but
> WITHOUT + * ANY WARRANTY; without even the implied warranty of
> MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> General Public License for + * more details.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/of.h>
> +
> +#include <asm/time.h>
> +
> +void __init plat_time_init(void)
> +{
> + struct device_node *np;
> + u32 freq;
> +
> + np = of_find_node_by_name(NULL, "cpus");
> + if (!np)
> + panic("missing 'cpus' DT node");
> + if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0)
> + panic("missing 'mips-hpt-frequency' property");
I think "clock-frequency" would be more standard, and the kernel would
then just halve it to find the frequency at which the cop0 count register
increments.
> + of_node_put(np);
> +
> + mips_hpt_frequency = freq;
> +
> + /* IRQs will not work until the timer has been set at least once */
> + write_c0_count(0);
Really? Do you have any details of this, it sounds weird. Do you mean
only the cop0 compare interrupt won't work until count is set? If so (and
that sounds strange in itself) perhaps r4k_clockevent_init() ought to do
this rather than some platform/board code.
> +}
> diff --git a/arch/mips/ni169445/Makefile b/arch/mips/ni169445/Makefile
> new file mode 100644
> index 0000000..f3a0c8c
> --- /dev/null
> +++ b/arch/mips/ni169445/Makefile
> @@ -0,0 +1,9 @@
> +#
> +#
> +obj-y := 169445-init.o \
> + 169445-int.o 169445-setup.o \
> + 169445-time.o
> +
> +obj-$(CONFIG_EARLY_PRINTK) += 169445-console.o
> +
> +CFLAGS_169445-setup.o = -I$(src)/../../../scripts/dtc/libfdt
> diff --git a/arch/mips/ni169445/Platform b/arch/mips/ni169445/Platform
> new file mode 100644
> index 0000000..9380312
> --- /dev/null
> +++ b/arch/mips/ni169445/Platform
> @@ -0,0 +1,6 @@
> +#
> +# National Instruments 169445 FPGA board
> +#
> +platform-$(CONFIG_NI_169445) += ni169445/
> +load-$(CONFIG_NI_169445) += 0xffffffff80002000
> +all-$(CONFIG_NI_169445) := $(COMPRESSION_FNAME).srec
Could all this platform/board code be scrapped in favour of adding your
system to the generic platform? There's some documentation over here
which I hope to get in-tree soon:
https://paulburton.eu/kernel-docs/mips/generic-platform.html
You can also see some further examples of systems converted to the
generic platform which I hope to get into mainline over the next few
cycles over here:
https://git.linux-mips.org/cgit/linux-mti.git/log/
But the core of the generic platform is already there & ought to be
usable for a system like this.
Thanks,
Paul
[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH] i2c: designware: Cleaning and comment style fixes.
From: Joe Perches @ 2016-12-13 18:34 UTC (permalink / raw)
To: Luis Oliveira, wsa-z923LK4zBo2bacvFa/9K2g,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
jarkko.nikula-VuQAYsv1563Yd54FQh9/CA,
andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA,
mika.westerberg-VuQAYsv1563Yd54FQh9/CA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Ramiro.Oliveira-HKixBCOQz3hWk0Htik3J/w,
Joao.Pinto-HKixBCOQz3hWk0Htik3J/w,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w
In-Reply-To: <32604e59cde19a8981681ad2f0ee447af847bf60.1481646098.git.lolivei-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
On Tue, 2016-12-13 at 16:34 +0000, Luis Oliveira wrote:
> - Misspelling of some words
> - Comment format fix
Most all adding periods to comments.
I think this is generally a value free change as these are
frequently sentence fragments, but, hey, it's not my code.
> /*
> - * Registers offset
> + * Registers offset.
> */
Like this.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply
* [PATCH 7/7] ARM: dts: NSP: Add SD/MMC support
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-arm-kernel,
linux-kernel
In-Reply-To: <1481652831-2744-1-git-send-email-jon.mason@broadcom.com>
Add SD/MMC support to the Broadcom NSP SVK and XMC.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 9 +++
arch/arm/boot/dts/bcm958525xmc.dts | 6 +-
arch/arm/boot/dts/bcm958625k.dts | 118 ++++++++++++++++++++++++-------------
3 files changed, 90 insertions(+), 43 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index ecffc16..6c58c78 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -209,6 +209,15 @@
#dma-cells = <1>;
};
+ sdio: sdhci@21000 {
+ compatible = "brcm,sdhci-iproc-cygnus";
+ reg = <0x21000 0x100>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ sdhci,auto-cmd12;
+ clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>;
+ status = "disabled";
+ };
+
amac0: ethernet@22000 {
compatible = "brcm,nsp-amac";
reg = <0x022000 0x1000>,
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 3912269..41e7fd3 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -59,7 +59,7 @@
};
};
-/* XHCI and SD/MMC support needed to be complete */
+/* XHCI support needed to be complete */
&amac0 {
status = "okay";
@@ -184,6 +184,10 @@
status = "okay";
};
+&sdio {
+ status = "ok";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 6e994f2..f8d47e5 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -117,58 +117,34 @@
&pinctrl {
pinctrl-names = "default";
- pinctrl-0 = <&nand_sel>;
+ pinctrl-0 = <&nand_sel>, <&gpiobs>, <&pwmc>;
+
nand_sel: nand_sel {
function = "nand";
groups = "nand_grp";
};
-};
-
-&srab {
- compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
- status = "okay";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- label = "port0";
- reg = <0>;
- };
-
- port@1 {
- label = "port1";
- reg = <1>;
- };
-
- port@2 {
- label = "port2";
- reg = <2>;
- };
- port@3 {
- label = "port3";
- reg = <3>;
- };
+ gpiobs: gpiobs {
+ function = "gpio_b";
+ groups = "gpio_b_0_grp", "gpio_b_1_grp", "gpio_b_2_grp",
+ "gpio_b_3_grp";
+ };
- port@4 {
- label = "port4";
- reg = <4>;
- };
+ pwmc: pwmc {
+ function = "pwm";
+ groups = "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp";
+ };
- port@5 {
- ethernet = <&amac0>;
- label = "cpu";
- reg = <5>;
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
+ emmc_sel: emmc_sel {
+ function = "emmc";
+ groups = "emmc_grp";
};
};
+&pwm {
+ status = "okay";
+};
+
&qspi {
bspi-sel = <0>;
flash: m25p80@0 {
@@ -215,6 +191,64 @@
status = "okay";
};
+/*
+ * By default the sd slot is functional. For emmc to work add "<&emmc_sel>"
+ * and delete "<&nand_sel>" in "pinctrl-0" property of pinctrl node. Remove the
+ * bus-width property here and disable the nand node with status = "disabled";.
+ *
+ * Ex: pinctrl-0 = <&emmc_sel>, <&gpiobs>, <&pwmc>;
+ */
+&sdio {
+ bus-width = <4>;
+ no-1-8-v;
+ status = "ok";
+};
+
+&srab {
+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ label = "port0";
+ reg = <0>;
+ };
+
+ port@1 {
+ label = "port1";
+ reg = <1>;
+ };
+
+ port@2 {
+ label = "port2";
+ reg = <2>;
+ };
+
+ port@3 {
+ label = "port3";
+ reg = <3>;
+ };
+
+ port@4 {
+ label = "port4";
+ reg = <4>;
+ };
+
+ port@5 {
+ ethernet = <&amac0>;
+ label = "cpu";
+ reg = <5>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
+
&uart0 {
status = "okay";
};
--
2.7.4
^ permalink raw reply related
* [PATCH 6/7] ARM: dts: NSP: Add Ethernet to NSP XMC
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-arm-kernel,
linux-kernel
In-Reply-To: <1481652831-2744-1-git-send-email-jon.mason@broadcom.com>
Enable the ethernet in the NSP XMC (bcm958525xmc) device tree
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
arch/arm/boot/dts/bcm958525xmc.dts | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 89d9abc..3912269 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -59,7 +59,11 @@
};
};
-/* XHCI, MMC, and Ethernet support needed to be complete */
+/* XHCI and SD/MMC support needed to be complete */
+
+&amac0 {
+ status = "okay";
+};
&i2c0 {
temperature-sensor@4c {
--
2.7.4
^ permalink raw reply related
* [PATCH 5/7] ARM: dts: NSP: Add and enable amac2
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-arm-kernel,
linux-kernel
In-Reply-To: <1481652831-2744-1-git-send-email-jon.mason@broadcom.com>
Add and enable the third AMAC ethernet interface in the device trees for
the platforms where it is present. Also, enable amac1 on some of the
platforms where that was missing.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 9 +++++++++
arch/arm/boot/dts/bcm958622hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958623hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958625hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958625k.dts | 4 ++++
arch/arm/boot/dts/bcm988312hr.dts | 8 ++++++++
6 files changed, 45 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 9cd77ab..ecffc16 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -227,6 +227,15 @@
status = "disabled";
};
+ amac2: ethernet@24000 {
+ compatible = "brcm,nsp-amac";
+ reg = <0x024000 0x1000>,
+ <0x112000 0x1000>;
+ reg-names = "amac_base", "idm_base";
+ interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
nand: nand@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x026000 0x600>,
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
index 18b8ffb..477c486 100644
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -65,6 +65,14 @@
status = "okay";
};
+&amac1 {
+ status = "okay";
+};
+
+&amac2 {
+ status = "okay";
+};
+
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 61499ae..c0a499d 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -65,6 +65,14 @@
status = "okay";
};
+&amac1 {
+ status = "okay";
+};
+
+&amac2 {
+ status = "okay";
+};
+
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 94cce23..f7eb585 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -63,6 +63,14 @@
status = "okay";
};
+&amac1 {
+ status = "okay";
+};
+
+&amac2 {
+ status = "okay";
+};
+
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 7aa86c7..6e994f2 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -61,6 +61,10 @@
status = "okay";
};
+&amac2 {
+ status = "okay";
+};
+
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts
index c324c9f..16666324 100644
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -65,6 +65,14 @@
status = "okay";
};
+&amac1 {
+ status = "okay";
+};
+
+&amac2 {
+ status = "okay";
+};
+
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
--
2.7.4
^ permalink raw reply related
* [PATCH 4/7] ARM: dts: NSP: Add BCM958625K switch ports
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1481652831-2744-1-git-send-email-jon.mason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
Add the layout of the switch ports found on the BCM958625K reference
board. The CPU port is hooked up to the AMAC0 Ethernet controller
adapter.
Signed-off-by: Jon Mason <jon.mason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
arch/arm/boot/dts/bcm958625k.dts | 45 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index dc24056..7aa86c7 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -120,6 +120,51 @@
};
};
+&srab {
+ compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ label = "port0";
+ reg = <0>;
+ };
+
+ port@1 {
+ label = "port1";
+ reg = <1>;
+ };
+
+ port@2 {
+ label = "port2";
+ reg = <2>;
+ };
+
+ port@3 {
+ label = "port3";
+ reg = <3>;
+ };
+
+ port@4 {
+ label = "port4";
+ reg = <4>;
+ };
+
+ port@5 {
+ ethernet = <&amac0>;
+ label = "cpu";
+ reg = <5>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
+
&qspi {
bspi-sel = <0>;
flash: m25p80@0 {
--
2.7.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related
* [PATCH 3/7] ARM: dts: NSP: Add QSPI support to missing boards
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-arm-kernel,
linux-kernel
In-Reply-To: <1481652831-2744-1-git-send-email-jon.mason@broadcom.com>
QSPI device tree entries are present in bcm958625k, but missing from
bcm958522er, bcm958525er, bcm958525xmc, bcm958622hr, bcm958623hr,
bcm958625hr, and bcm988312hr. Duplicate the entry in bcm958625k for
all of those that are missing it (as they are identical).
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
arch/arm/boot/dts/bcm958522er.dts | 34 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm958525er.dts | 34 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm958525xmc.dts | 34 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm958622hr.dts | 34 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm958623hr.dts | 34 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm958625hr.dts | 34 ++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm988312hr.dts | 34 ++++++++++++++++++++++++++++++++++
7 files changed, 238 insertions(+)
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index 7afd845..3f04a40 100644
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -124,6 +124,40 @@
};
};
+&qspi {
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <12500000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x000a0000>;
+ };
+
+ partition@a0000 {
+ label = "env";
+ reg = <0x000a0000 0x00060000>;
+ };
+
+ partition@100000 {
+ label = "system";
+ reg = <0x00100000 0x00600000>;
+ };
+
+ partition@700000 {
+ label = "rootfs";
+ reg = <0x00700000 0x01900000>;
+ };
+ };
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index 9da18cd..9fd5422 100644
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -124,6 +124,40 @@
};
};
+&qspi {
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <12500000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x000a0000>;
+ };
+
+ partition@a0000 {
+ label = "env";
+ reg = <0x000a0000 0x00060000>;
+ };
+
+ partition@100000 {
+ label = "system";
+ reg = <0x00100000 0x00600000>;
+ };
+
+ partition@700000 {
+ label = "rootfs";
+ reg = <0x00700000 0x01900000>;
+ };
+ };
+};
+
&sata_phy0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 4492f55..89d9abc 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -134,6 +134,40 @@
};
};
+&qspi {
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <12500000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x000a0000>;
+ };
+
+ partition@a0000 {
+ label = "env";
+ reg = <0x000a0000 0x00060000>;
+ };
+
+ partition@100000 {
+ label = "system";
+ reg = <0x00100000 0x00600000>;
+ };
+
+ partition@700000 {
+ label = "rootfs";
+ reg = <0x00700000 0x01900000>;
+ };
+ };
+};
+
&sata_phy0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
index ad2aa87..18b8ffb 100644
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -120,6 +120,40 @@
};
};
+&qspi {
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <12500000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x000a0000>;
+ };
+
+ partition@a0000 {
+ label = "env";
+ reg = <0x000a0000 0x00060000>;
+ };
+
+ partition@100000 {
+ label = "system";
+ reg = <0x00100000 0x00600000>;
+ };
+
+ partition@700000 {
+ label = "rootfs";
+ reg = <0x00700000 0x01900000>;
+ };
+ };
+};
+
&srab {
compatible = "brcm,bcm58622-srab", "brcm,nsp-srab";
status = "okay";
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 32ea59a..61499ae 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -128,6 +128,40 @@
status = "okay";
};
+&qspi {
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <12500000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x000a0000>;
+ };
+
+ partition@a0000 {
+ label = "env";
+ reg = <0x000a0000 0x00060000>;
+ };
+
+ partition@100000 {
+ label = "system";
+ reg = <0x00100000 0x00600000>;
+ };
+
+ partition@700000 {
+ label = "rootfs";
+ reg = <0x00700000 0x01900000>;
+ };
+ };
+};
+
&srab {
compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";
status = "okay";
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index e7a4cb1..94cce23 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -118,6 +118,40 @@
};
};
+&qspi {
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <12500000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x000a0000>;
+ };
+
+ partition@a0000 {
+ label = "env";
+ reg = <0x000a0000 0x00060000>;
+ };
+
+ partition@100000 {
+ label = "system";
+ reg = <0x00100000 0x00600000>;
+ };
+
+ partition@700000 {
+ label = "rootfs";
+ reg = <0x00700000 0x01900000>;
+ };
+ };
+};
+
&sata_phy0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts
index 104afe9..c324c9f 100644
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -120,6 +120,40 @@
};
};
+&qspi {
+ bspi-sel = <0>;
+ flash: m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "m25p80";
+ reg = <0x0>;
+ spi-max-frequency = <12500000>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x000a0000>;
+ };
+
+ partition@a0000 {
+ label = "env";
+ reg = <0x000a0000 0x00060000>;
+ };
+
+ partition@100000 {
+ label = "system";
+ reg = <0x00100000 0x00600000>;
+ };
+
+ partition@700000 {
+ label = "rootfs";
+ reg = <0x00700000 0x01900000>;
+ };
+ };
+};
+
&sata_phy0 {
status = "okay";
};
--
2.7.4
^ permalink raw reply related
* [PATCH 2/7] ARM: dts: NSP: Correct NAND partition unit address
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-arm-kernel,
linux-kernel
In-Reply-To: <1481652831-2744-1-git-send-email-jon.mason@broadcom.com>
The NAND partition unit address does not match the other NSP device tree
files. This change makes them uniform.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
arch/arm/boot/dts/bcm958625k.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 98337d6..dc24056 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -80,19 +80,19 @@
reg = <0x00000000 0x00200000>;
read-only;
};
- partition@1 {
+ partition@200000 {
label = "nenv";
reg = <0x00200000 0x00400000>;
};
- partition@2 {
+ partition@600000 {
label = "nsystem";
reg = <0x00600000 0x00a00000>;
};
- partition@3 {
+ partition@1000000 {
label = "nrootfs";
reg = <0x01000000 0x03000000>;
};
- partition@4 {
+ partition@4000000 {
label = "ncustfs";
reg = <0x04000000 0x3c000000>;
};
--
2.7.4
^ permalink raw reply related
* [PATCH 1/7] ARM: dts: NSP: DT Clean-ups
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree, bcm-kernel-feedback-list, linux-arm-kernel,
linux-kernel
In-Reply-To: <1481652831-2744-1-git-send-email-jon.mason@broadcom.com>
The QSPI entry was added out of the sequental order that the rest of the
DTSI file is in. Move it to make it fit in properly. Also, some other
entries have been added in a non-alphabetical order in the DTS files,
making them different from the other NSP DTS files. Move the relevant
peices to make it match. Finally, remove errant new lines.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 46 +++++++++++++--------------
arch/arm/boot/dts/bcm958522er.dts | 1 -
arch/arm/boot/dts/bcm958525er.dts | 1 -
arch/arm/boot/dts/bcm958525xmc.dts | 26 ++++++++--------
arch/arm/boot/dts/bcm958623hr.dts | 16 +++++-----
arch/arm/boot/dts/bcm958625hr.dts | 30 +++++++++---------
arch/arm/boot/dts/bcm958625k.dts | 64 +++++++++++++++++++-------------------
7 files changed, 91 insertions(+), 93 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index b6142bd..9cd77ab 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -241,29 +241,6 @@
brcm,nand-has-wp;
};
- gpiob: gpio@30000 {
- compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
- reg = <0x30000 0x50>;
- #gpio-cells = <2>;
- gpio-controller;
- ngpios = <4>;
- interrupt-controller;
- interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- pwm: pwm@31000 {
- compatible = "brcm,iproc-pwm";
- reg = <0x31000 0x28>;
- clocks = <&osc>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- rng: rng@33000 {
- compatible = "brcm,bcm-nsp-rng";
- reg = <0x33000 0x14>;
- };
-
qspi: qspi@27200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
reg = <0x027200 0x184>,
@@ -293,6 +270,29 @@
#size-cells = <0>;
};
+ gpiob: gpio@30000 {
+ compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
+ reg = <0x30000 0x50>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ ngpios = <4>;
+ interrupt-controller;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pwm: pwm@31000 {
+ compatible = "brcm,iproc-pwm";
+ reg = <0x31000 0x28>;
+ clocks = <&osc>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ rng: rng@33000 {
+ compatible = "brcm,bcm-nsp-rng";
+ reg = <0x33000 0x14>;
+ };
+
ccbtimer0: timer@34000 {
compatible = "arm,sp804";
reg = <0x34000 0x1000>;
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index a21b0fd..7afd845 100644
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -65,7 +65,6 @@
status = "okay";
};
-
&amac1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index be7f2f8..9da18cd 100644
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -65,7 +65,6 @@
status = "okay";
};
-
&amac1 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 959cde9..4492f55 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -59,6 +59,8 @@
};
};
+/* XHCI, MMC, and Ethernet support needed to be complete */
+
&i2c0 {
temperature-sensor@4c {
compatible = "adi,adt7461a";
@@ -115,12 +117,6 @@
};
};
-/* XHCI, MMC, and Ethernet support needed to be complete */
-
-&uart0 {
- status = "okay";
-};
-
&pcie0 {
status = "okay";
};
@@ -129,6 +125,15 @@
status = "okay";
};
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_sel>;
+ nand_sel: nand_sel {
+ function = "nand";
+ groups = "nand_grp";
+ };
+};
+
&sata_phy0 {
status = "okay";
};
@@ -141,11 +146,6 @@
status = "okay";
};
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&nand_sel>;
- nand_sel: nand_sel {
- function = "nand";
- groups = "nand_grp";
- };
+&uart0 {
+ status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 4ceb8fe..32ea59a 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -120,6 +120,14 @@
};
};
+&sata_phy0 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
&srab {
compatible = "brcm,bcm58623-srab", "brcm,nsp-srab";
status = "okay";
@@ -165,14 +173,6 @@
};
};
-&sata_phy0 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
-};
-
&uart0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 4420025..e7a4cb1 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -1,7 +1,7 @@
/*
* BSD LICENSE
*
- * Copyright (c) 2016 Broadcom. All rights reserved.
+ * Copyright(c) 2016 Broadcom. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -59,6 +59,10 @@
};
};
+&amac0 {
+ status = "okay";
+};
+
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@@ -97,10 +101,6 @@
};
};
-&uart0 {
- status = "okay";
-};
-
&pcie0 {
status = "okay";
};
@@ -118,7 +118,15 @@
};
};
-&amac0 {
+&sata_phy0 {
+ status = "okay";
+};
+
+&sata_phy1 {
+ status = "okay";
+};
+
+&sata {
status = "okay";
};
@@ -167,14 +175,6 @@
};
};
-&sata_phy0 {
- status = "okay";
-};
-
-&sata_phy1 {
- status = "okay";
-};
-
-&sata {
+&uart0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index 59d96fb..98337d6 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -53,14 +53,6 @@
};
};
-&uart0 {
- status = "okay";
-};
-
-&uart1 {
- status = "okay";
-};
-
&amac0 {
status = "okay";
};
@@ -69,30 +61,6 @@
status = "okay";
};
-&pcie0 {
- status = "okay";
-};
-
-&pcie1 {
- status = "okay";
-};
-
-&pcie2 {
- status = "okay";
-};
-
-&sata_phy0 {
- status = "okay";
-};
-
-&sata_phy1 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
-};
-
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@@ -131,6 +99,18 @@
};
};
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2 {
+ status = "okay";
+};
+
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&nand_sel>;
@@ -173,3 +153,23 @@
};
};
};
+
+&sata_phy0 {
+ status = "okay";
+};
+
+&sata_phy1 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
--
2.7.4
^ permalink raw reply related
* [PATCH 0/7] ARM: dts: NSP: DT Clean-ups and more
From: Jon Mason @ 2016-12-13 18:13 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Florian Fainelli
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
The Northstar Plus device tree files have gotten messy and out of sync.
The first 5 patches correct this, the next 2 add support for new things.
Jon Mason (7):
ARM: dts: NSP: DT Clean-ups
ARM: dts: NSP: Correct NAND partition unit address
ARM: dts: NSP: Add QSPI support to missing boards
ARM: dts: NSP: Add BCM958625K switch ports
ARM: dts: NSP: Add and enable amac2
ARM: dts: NSP: Add Ethernet to NSP XMC
ARM: dts: NSP: Add SD/MMC support
arch/arm/boot/dts/bcm-nsp.dtsi | 64 ++++++++++------
arch/arm/boot/dts/bcm958522er.dts | 35 ++++++++-
arch/arm/boot/dts/bcm958525er.dts | 35 ++++++++-
arch/arm/boot/dts/bcm958525xmc.dts | 68 +++++++++++++----
arch/arm/boot/dts/bcm958622hr.dts | 42 +++++++++++
arch/arm/boot/dts/bcm958623hr.dts | 58 ++++++++++++--
arch/arm/boot/dts/bcm958625hr.dts | 72 ++++++++++++++----
arch/arm/boot/dts/bcm958625k.dts | 151 ++++++++++++++++++++++++++++---------
arch/arm/boot/dts/bcm988312hr.dts | 42 +++++++++++
9 files changed, 472 insertions(+), 95 deletions(-)
--
2.7.4
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^ permalink raw reply
* Re: Re: [PATCH] i2c: designware: Cleaning and comment style fixes.
From: Luis Oliveira @ 2016-12-13 18:05 UTC (permalink / raw)
To: Andy Shevchenko, wsa-z923LK4zBo2bacvFa/9K2g,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
jarkko.nikula-VuQAYsv1563Yd54FQh9/CA,
mika.westerberg-VuQAYsv1563Yd54FQh9/CA,
linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
Cc: Ramiro.Oliveira-HKixBCOQz3hWk0Htik3J/w,
Joao.Pinto-HKixBCOQz3hWk0Htik3J/w,
CARLOS.PALMINHA-HKixBCOQz3hWk0Htik3J/w
In-Reply-To: <1481648428.8991.4.camel-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
On 13-Dec-16 17:00, Andy Shevchenko wrote:
> On Tue, 2016-12-13 at 16:34 +0000, Luis Oliveira wrote:
>> - Misspelling of some words
>
> So, do you use codespell tool for that? I would suggest to use that tool
> and propose any fix there first. At least that tool has a good history
> of changes back in forward until some native speaker(s) settle some
> cases.
>
I just fixed the words "acknowledgment" and "endianness" because checkpatch.pl
says it should be fixed.
>> - Comment format fix
>
> No need to use dot at the end of one-liner comments
>
> /* One line */
>
> /*
> * Multi-line comments. Might include several lines or
> * even paragraphs.
> */
>
> Also I would leave
> /*
> * One line
> */
>
> Without dots here. AFAIU they are used to better distinguish group of
> definitions inside headers (that's why 3 lines).
>
Ok thank you, I will go redo that.
>> - Minor fix in coding style
>>
>
> I'm almost fine with the change itself, but people may be concerned in:
>
> 1) what is the value of the change (would be nice to put this in commit
> message);
>
The value of this, besides the Linux kernel rules of coding style, is because I
will use this code after and it will make my future patch a lot bigger and
complicated to review if I have to do it all together.
> 2) how much additional work this change may bring for backported fixes
> if any;
>
I don't think there is any.
> 3) native speakers are the best who can re-read this and Ack.
>
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^ permalink raw reply
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