* [PATCH 08/20] ARM: dts: imx6-sabreauto: add pinctrl for gpt input capture
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: devel, devicetree, Steve Longerbeam, linux-kernel, linux-gpio,
linux-arm-kernel, linux-media
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
Add pinctrl groups for both GPT input capture channels.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 516bac6..83ac2ff 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -457,6 +457,18 @@
>;
};
+ pinctrl_gpt_input_capture0: gptinputcapture0grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 0x80000000
+ >;
+ };
+
+ pinctrl_gpt_input_capture1: gptinputcapture1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2 0x80000000
+ >;
+ };
+
pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
--
2.7.4
^ permalink raw reply related
* [PATCH 07/20] ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_b
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: devel, devicetree, Steve Longerbeam, linux-kernel, linux-gpio,
linux-arm-kernel, linux-media
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
The reset pin to the port expander chip (MAX7310) is controlled by a gpio,
so define a reset-gpios property to control it. There are three MAX7310's
on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for
their reset. Since all can't acquire the same pin, assign it to max7310_b,
that chip is needed by more functions (usb and adv7180).
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 4a6d038..516bac6 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -136,6 +136,9 @@
reg = <0x32>;
gpio-controller;
#gpio-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_max7310>;
+ reset-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
max7310_c: gpio@34 {
@@ -442,6 +445,12 @@
>;
};
+ pinctrl_max7310: max7310grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x80000000
+ >;
+ };
+
pinctrl_pwm3: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
--
2.7.4
^ permalink raw reply related
* [PATCH 06/20] ARM: dts: imx6-sabreauto: create i2cmux for i2c3
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-gpio,
linux-media, devel, Steve Longerbeam
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
The sabreauto uses a steering pin to select between the SDA signal on
i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control
this steering pin. Idle state of the i2cmux selects SPI NOR. This is not
a classic way to use i2cmux, since one side of the mux selects something
other than an i2c bus, but it works and is probably the cleanest
solution. Note that if one thread is attempting to access SPI NOR while
another thread is accessing i2c3, the SPI NOR access will fail since the
i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't
be avoided in any case, the board is not designed to allow concurrent
i2c3 and SPI NOR functions (and the default device-tree does not enable
SPI NOR anyway).
Devices hanging off i2c3 should now be defined under i2cmux, so
that the steering pin can be properly controlled to access those
devices. The port expanders (MAX7310) are thus moved into i2cmux.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 65 +++++++++++++++++++++-----------
1 file changed, 44 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 52390ba..4a6d038 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -108,6 +108,44 @@
default-brightness-level = <7>;
status = "okay";
};
+
+ i2cmux {
+ compatible = "i2c-mux-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3mux>;
+ mux-gpios = <&gpio5 4 0>;
+ i2c-parent = <&i2c3>;
+ idle-state = <0>;
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ max7310_a: gpio@30 {
+ compatible = "maxim,max7310";
+ reg = <0x30>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ max7310_b: gpio@32 {
+ compatible = "maxim,max7310";
+ reg = <0x32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ max7310_c: gpio@34 {
+ compatible = "maxim,max7310";
+ reg = <0x34>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+ };
};
&clks {
@@ -291,27 +329,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
-
- max7310_a: gpio@30 {
- compatible = "maxim,max7310";
- reg = <0x30>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- max7310_b: gpio@32 {
- compatible = "maxim,max7310";
- reg = <0x32>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- max7310_c: gpio@34 {
- compatible = "maxim,max7310";
- reg = <0x34>;
- gpio-controller;
- #gpio-cells = <2>;
- };
};
&iomuxc {
@@ -419,6 +436,12 @@
>;
};
+ pinctrl_i2c3mux: i2c3muxgrp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x80000000
+ >;
+ };
+
pinctrl_pwm3: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
--
2.7.4
^ permalink raw reply related
* [PATCH 05/20] ARM: dts: imx6-sabresd: add OV5642 and OV5640 camera sensors
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: devel, devicetree, Steve Longerbeam, linux-kernel, linux-gpio,
linux-arm-kernel, linux-media
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
Enables the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.
The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.
The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi. It is set to transmit over MIPI virtual channel 1.
Until the OV5652 sensor module compatible with the SabreSD becomes
available for testing, the ov5642 node is currently disabled.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6dl-sabresd.dts | 5 ++
arch/arm/boot/dts/imx6q-sabresd.dts | 5 ++
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 114 ++++++++++++++++++++++++++++++++-
3 files changed, 123 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6dl-sabresd.dts b/arch/arm/boot/dts/imx6dl-sabresd.dts
index 1e45f2f..6cf7a50 100644
--- a/arch/arm/boot/dts/imx6dl-sabresd.dts
+++ b/arch/arm/boot/dts/imx6dl-sabresd.dts
@@ -15,3 +15,8 @@
model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
};
+
+&ipu1_csi1_from_ipu1_csi1_mux {
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+};
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index 9cbdfe7..8c1d7ad 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -23,3 +23,8 @@
&sata {
status = "okay";
};
+
+&ipu1_csi1_from_mipi_vc1 {
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+};
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 55ef535..39b4228 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -10,6 +10,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
+#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -146,6 +147,33 @@
};
};
+&ipu1_csi0_from_ipu1_csi0_mux {
+ bus-width = <8>;
+ data-shift = <12>; /* Lines 19:12 used */
+ hsync-active = <1>;
+ vsync-active = <1>;
+};
+
+&ipu1_csi0_mux_from_parallel_sensor {
+ remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
+};
+
+&ipu1_csi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_csi0>;
+};
+
+&mipi_csi {
+ status = "okay";
+};
+
+/* Incoming port from sensor */
+&mipi_csi_from_mipi_sensor {
+ remote-endpoint = <&ov5640_to_mipi_csi>;
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+};
+
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
@@ -214,7 +242,33 @@
0x8014 /* 4:FN_DMICCDAT */
0x0000 /* 5:Default */
>;
- };
+ };
+
+ camera: ov5642@3c {
+ compatible = "ovti,ov5642";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ov5642>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ clock-names = "xclk";
+ reg = <0x3c>;
+ xclk = <24000000>;
+ DOVDD-supply = <&vgen4_reg>; /* 1.8v */
+ AVDD-supply = <&vgen5_reg>; /* 2.8v, rev C board is VGEN3
+ rev B board is VGEN5 */
+ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
+ pwdn-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; /* SD1_DAT0 */
+ reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; /* SD1_DAT1 */
+ status = "disabled";
+
+ port {
+ ov5642_to_ipu1_csi0_mux: endpoint {
+ remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
+ bus-width = <8>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
+ };
};
&i2c2 {
@@ -322,6 +376,34 @@
};
};
};
+
+ mipi_camera: ov5640@3c {
+ compatible = "ovti,ov5640_mipi";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ov5640>;
+ reg = <0x3c>;
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ clock-names = "xclk";
+ xclk = <24000000>;
+ DOVDD-supply = <&vgen4_reg>; /* 1.8v */
+ AVDD-supply = <&vgen5_reg>; /* 2.8v, rev C board is VGEN3
+ rev B board is VGEN5 */
+ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
+ pwdn-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; /* SD1_DAT2 */
+ reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; /* SD1_CLK */
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ov5640_to_mipi_csi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_csi_from_mipi_sensor>;
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+ };
+ };
+ };
};
&i2c3 {
@@ -426,6 +508,36 @@
>;
};
+ pinctrl_ov5640: ov5640grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x80000000
+ MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x80000000
+ >;
+ };
+
+ pinctrl_ov5642: ov5642grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000
+ MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x80000000
+ >;
+ };
+
+ pinctrl_ipu1_csi0: ipu1grp-csi0 {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000
+ MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000
+ MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000
+ MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000
+ MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000
+ MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000
+ MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000
+ MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000
+ MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000
+ MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000
+ MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000
+ >;
+ };
+
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
--
2.7.4
^ permalink raw reply related
* [PATCH 04/20] ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensors
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: devel, devicetree, Steve Longerbeam, linux-kernel, linux-gpio,
linux-arm-kernel, linux-media
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
Enables the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.
Both hang off the same i2c2 bus, so they require different (and non-
default) i2c slave addresses.
The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.
The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi. It is set to transmit over MIPI virtual channel 1.
Note there is a pin conflict with GPIO6. This pin functions as a power
input pin to the OV5642, but ENET uses it as the h/w workaround for
erratum ERR006687, to wake-up the ARM cores on normal RX and TX packet
done events (see 6261c4c8). So workaround 6261c4c8 is reverted here to
support the OV5642, and the "fsl,err006687-workaround-present" boolean
also must be removed. The result is that the CPUidle driver will no longer
allow entering the deep idle states on the sabrelite.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6dl-sabrelite.dts | 5 ++
arch/arm/boot/dts/imx6q-sabrelite.dts | 6 ++
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 122 ++++++++++++++++++++++++++++++-
3 files changed, 129 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-sabrelite.dts b/arch/arm/boot/dts/imx6dl-sabrelite.dts
index 0f06ca5..fec2524 100644
--- a/arch/arm/boot/dts/imx6dl-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6dl-sabrelite.dts
@@ -48,3 +48,8 @@
model = "Freescale i.MX6 DualLite SABRE Lite Board";
compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl";
};
+
+&ipu1_csi1_from_ipu1_csi1_mux {
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+};
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 66d10d8..9e2d26d 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -52,3 +52,9 @@
&sata {
status = "okay";
};
+
+&ipu1_csi1_from_mipi_vc1 {
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+};
+
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 1f9076e..4a50bb1 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -39,6 +39,8 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
+
+#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -96,6 +98,15 @@
};
};
+ mipi_xclk: mipi_xclk {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <22000000>;
+ clock-output-names = "mipi_pwm3";
+ pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */
+ status = "okay";
+ };
+
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
@@ -220,6 +231,22 @@
};
};
+&ipu1_csi0_from_ipu1_csi0_mux {
+ bus-width = <8>;
+ data-shift = <12>; /* Lines 19:12 used */
+ hsync-active = <1>;
+ vync-active = <1>;
+};
+
+&ipu1_csi0_mux_from_parallel_sensor {
+ remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
+};
+
+&ipu1_csi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_csi0>;
+};
+
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
@@ -271,9 +298,6 @@
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
- interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
- <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
- fsl,err006687-workaround-present;
status = "okay";
};
@@ -302,6 +326,52 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
+
+ camera: ov5642@42 {
+ compatible = "ovti,ov5642";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ov5642>;
+ clocks = <&clks IMX6QDL_CLK_CKO2>;
+ clock-names = "xclk";
+ reg = <0x42>;
+ xclk = <24000000>;
+ reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ pwdn-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
+
+ port {
+ ov5642_to_ipu1_csi0_mux: endpoint {
+ remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
+ bus-width = <8>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ };
+ };
+ };
+
+ mipi_camera: ov5640@40 {
+ compatible = "ovti,ov5640_mipi";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ov5640>;
+ clocks = <&mipi_xclk>;
+ clock-names = "xclk";
+ reg = <0x40>;
+ xclk = <22000000>;
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */
+ pwdn-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ov5640_to_mipi_csi: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&mipi_csi_from_mipi_sensor>;
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+ };
+ };
+ };
};
&i2c3 {
@@ -374,7 +444,6 @@
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
/* Phy reset */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
- MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>;
};
@@ -449,6 +518,39 @@
>;
};
+ pinctrl_ov5642: ov5642grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000
+ MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x80000000
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000
+ MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x80000000
+ >;
+ };
+
+ pinctrl_ipu1_csi0: ipu1grp-csi0 {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000
+ MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000
+ MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000
+ MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000
+ MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000
+ MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000
+ MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000
+ MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000
+ MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000
+ MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000
+ MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000
+ MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000
+ >;
+ };
+
+ pinctrl_ov5640: ov5640grp {
+ fsl,pins = <
+ MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0
+ MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
+ >;
+ };
+
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
@@ -605,3 +707,15 @@
vmmc-supply = <®_3p3v>;
status = "okay";
};
+
+&mipi_csi {
+ status = "okay";
+};
+
+/* Incoming port from sensor */
+&mipi_csi_from_mipi_sensor {
+ remote-endpoint = <&ov5640_to_mipi_csi>;
+ data-lanes = <0 1>;
+ clock-lanes = <2>;
+};
+
--
2.7.4
^ permalink raw reply related
* [PATCH 03/20] ARM: dts: imx6qdl: add media device
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: devel, devicetree, Steve Longerbeam, linux-kernel, linux-gpio,
linux-arm-kernel, linux-media
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6q.dtsi | 4 ++++
arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 56a314f..2fbe0b3 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -454,3 +454,7 @@
&vpu {
compatible = "fsl,imx6q-vpu", "cnm,coda960";
};
+
+&media0 {
+ ports = <&ipu1_csi0>, <&ipu1_csi1>, <&ipu2_csi0>, <&ipu2_csi1>;
+};
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 89218a4..12ae045 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1296,5 +1296,13 @@
};
};
};
+
+ media0: media@0 {
+ compatible = "fsl,imx-media";
+ ports = <&ipu1_csi0>, <&ipu1_csi1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ };
};
};
--
2.7.4
^ permalink raw reply related
* [PATCH 02/20] ARM: dts: imx6qdl: Add mipi_ipu1/2 multiplexers, mipi_csi, and their connections
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: devel, devicetree, Steve Longerbeam, linux-kernel, linux-gpio,
linux-arm-kernel, linux-media
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
From: Philipp Zabel <p.zabel@pengutronix.de>
This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6. The MIPI_IPU
multiplexers are added as children of the iomuxc-gpr syscon device node.
On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2
CSI1 allow to select between CSI0/1 parallel input pads and the MIPI
CSI-2 virtual channels 0/3.
On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1
CSI1 allow to select between CSI0/1 parallel input pads and any of the
four MIPI CSI-2 virtual channels.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
- Removed some dangling/unused endpoints (ipu2_csi0_from_csi2ipu)
- Renamed the mipi virtual channel endpoint labels, from "mipi_csiX_..."
to "mipi_vcX...".
- Added input endpoints to the video muxes for the connections from parallel
sensors.
- Added input endpoints to the mipi_csi for the connections from mipi csi-2
sensors.
- The video multiplexer node has compatible string "imx-video-mux" instead
of "video-multiplexer".
- The video multiplexer node indicates GPR register via reg propert only,
(register offset and bitmask), instead of specifying with "bit-mask" and
"bit-shift" properties.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6dl.dtsi | 183 +++++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/imx6q.dtsi | 119 +++++++++++++++++++++++++++
arch/arm/boot/dts/imx6qdl.dtsi | 10 ++-
3 files changed, 311 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 1ade195..0a1718c 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -181,6 +181,189 @@
"di0", "di1";
};
+&gpr {
+ ipu1_csi0_mux: ipu1_csi0_mux@34 {
+ compatible = "imx-video-mux";
+ reg = <0x34 0x07>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ port@0 {
+ reg = <0>;
+
+ ipu1_csi0_mux_from_mipi_vc0: endpoint {
+ remote-endpoint = <&mipi_vc0_to_ipu1_csi0_mux>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ipu1_csi0_mux_from_mipi_vc1: endpoint {
+ remote-endpoint = <&mipi_vc1_to_ipu1_csi0_mux>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ipu1_csi0_mux_from_mipi_vc2: endpoint {
+ remote-endpoint = <&mipi_vc2_to_ipu1_csi0_mux>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ ipu1_csi0_mux_from_mipi_vc3: endpoint {
+ remote-endpoint = <&mipi_vc3_to_ipu1_csi0_mux>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+
+ ipu1_csi0_mux_from_parallel_sensor: endpoint {
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+
+ ipu1_csi0_mux_to_ipu1_csi0: endpoint {
+ remote-endpoint = <&ipu1_csi0_from_ipu1_csi0_mux>;
+ };
+ };
+ };
+
+ ipu1_csi1_mux: ipu1_csi1_mux@34 {
+ compatible = "imx-video-mux";
+ reg = <0x34 0x38>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ port@0 {
+ reg = <0>;
+
+ ipu1_csi1_mux_from_mipi_vc0: endpoint {
+ remote-endpoint = <&mipi_vc0_to_ipu1_csi1_mux>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ipu1_csi1_mux_from_mipi_vc1: endpoint {
+ remote-endpoint = <&mipi_vc1_to_ipu1_csi1_mux>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ipu1_csi1_mux_from_mipi_vc2: endpoint {
+ remote-endpoint = <&mipi_vc2_to_ipu1_csi1_mux>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ ipu1_csi1_mux_from_mipi_vc3: endpoint {
+ remote-endpoint = <&mipi_vc3_to_ipu1_csi1_mux>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+
+ ipu1_csi1_mux_from_parallel_sensor: endpoint {
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+
+ ipu1_csi1_mux_to_ipu1_csi1: endpoint {
+ remote-endpoint = <&ipu1_csi1_from_ipu1_csi1_mux>;
+ };
+ };
+ };
+};
+
+&ipu1_csi1 {
+ ipu1_csi1_from_ipu1_csi1_mux: endpoint {
+ remote-endpoint = <&ipu1_csi1_mux_to_ipu1_csi1>;
+ };
+};
+
+&mipi_csi {
+ port@0 {
+ reg = <0>;
+
+ mipi_csi_from_mipi_sensor: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_vc0_to_ipu1_csi0_mux: endpoint@0 {
+ remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;
+ };
+
+ mipi_vc0_to_ipu1_csi1_mux: endpoint@1 {
+ remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_vc1_to_ipu1_csi0_mux: endpoint@0 {
+ remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>;
+ };
+
+ mipi_vc1_to_ipu1_csi1_mux: endpoint@1 {
+ remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_vc2_to_ipu1_csi0_mux: endpoint@0 {
+ remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>;
+ };
+
+ mipi_vc2_to_ipu1_csi1_mux: endpoint@1 {
+ remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mipi_vc3_to_ipu1_csi0_mux: endpoint@0 {
+ remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>;
+ };
+
+ mipi_vc3_to_ipu1_csi1_mux: endpoint@1 {
+ remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>;
+ };
+ };
+};
+
&vpu {
compatible = "fsl,imx6dl-vpu", "cnm,coda960";
};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index e9a5d0b..56a314f 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -143,10 +143,18 @@
ipu2_csi0: port@0 {
reg = <0>;
+
+ ipu2_csi0_from_mipi_vc2: endpoint {
+ remote-endpoint = <&mipi_vc2_to_ipu2_csi0>;
+ };
};
ipu2_csi1: port@1 {
reg = <1>;
+
+ ipu2_csi1_from_ipu2_csi1_mux: endpoint {
+ remote-endpoint = <&ipu2_csi1_mux_to_ipu2_csi1>;
+ };
};
ipu2_di0: port@2 {
@@ -266,6 +274,76 @@
};
};
+&gpr {
+ ipu1_csi0_mux: ipu1_csi0_mux@4 {
+ compatible = "imx-video-mux";
+ reg = <0x04 0x80000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ port@0 {
+ reg = <0>;
+
+ ipu1_csi0_mux_from_mipi_vc0: endpoint {
+ remote-endpoint = <&mipi_vc0_to_ipu1_csi0_mux>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ipu1_csi0_mux_from_parallel_sensor: endpoint {
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ipu1_csi0_mux_to_ipu1_csi0: endpoint {
+ remote-endpoint = <&ipu1_csi0_from_ipu1_csi0_mux>;
+ };
+ };
+ };
+
+ ipu2_csi1_mux: ipu2_csi1_mux@4 {
+ compatible = "imx-video-mux";
+ reg = <0x04 0x100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ port@0 {
+ reg = <0>;
+
+ ipu2_csi1_mux_from_mipi_vc3: endpoint {
+ remote-endpoint = <&mipi_vc3_to_ipu2_csi1_mux>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ipu2_csi1_mux_from_parallel_sensor: endpoint {
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ ipu2_csi1_mux_to_ipu2_csi1: endpoint {
+ remote-endpoint = <&ipu2_csi1_from_ipu2_csi1_mux>;
+ };
+ };
+ };
+};
+
+&ipu1_csi1 {
+ ipu1_csi1_from_mipi_vc1: endpoint {
+ remote-endpoint = <&mipi_vc1_to_ipu1_csi1>;
+ };
+};
+
&ldb {
clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
@@ -312,6 +390,47 @@
};
};
+&mipi_csi {
+ port@0 {
+ reg = <0>;
+
+ mipi_csi_from_mipi_sensor: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_vc0_to_ipu1_csi0_mux: endpoint {
+ remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ mipi_vc1_to_ipu1_csi1: endpoint {
+ remote-endpoint = <&ipu1_csi1_from_mipi_vc1>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ mipi_vc2_to_ipu2_csi0: endpoint {
+ remote-endpoint = <&ipu2_csi0_from_mipi_vc2>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+
+ mipi_vc3_to_ipu2_csi1_mux: endpoint {
+ remote-endpoint = <&ipu2_csi1_mux_from_mipi_vc3>;
+ };
+ };
+};
+
&mipi_dsi {
ports {
port@2 {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 7b546e3..89218a4 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -799,8 +799,10 @@
};
gpr: iomuxc-gpr@020e0000 {
- compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
+ compatible = "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
reg = <0x020e0000 0x38>;
+ #address-cells = <1>;
+ #size-cells = <0>;
};
iomuxc: iomuxc@020e0000 {
@@ -1127,6 +1129,8 @@
mipi_csi: mipi@021dc000 {
compatible = "fsl,imx-mipi-csi2";
reg = <0x021dc000 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
interrupts = <0 100 0x04>, <0 101 0x04>;
clocks = <&clks IMX6QDL_CLK_HSI_TX>,
<&clks IMX6QDL_CLK_VIDEO_27M>,
@@ -1232,6 +1236,10 @@
ipu1_csi0: port@0 {
reg = <0>;
+
+ ipu1_csi0_from_ipu1_csi0_mux: endpoint {
+ remote-endpoint = <&ipu1_csi0_mux_to_ipu1_csi0>;
+ };
};
ipu1_csi1: port@1 {
--
2.7.4
^ permalink raw reply related
* [PATCH 01/20] ARM: dts: imx6qdl: Add compatible, clocks, irqs to MIPI CSI-2 node
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: devel, devicetree, Steve Longerbeam, linux-kernel, linux-gpio,
linux-arm-kernel, linux-media
In-Reply-To: <1483050455-10683-1-git-send-email-steve_longerbeam@mentor.com>
Add to the MIPI CSI2 receiver node: compatible string, interrupt sources,
clocks.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
---
arch/arm/boot/dts/imx6qdl.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 53e6e63..7b546e3 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1125,7 +1125,14 @@
};
mipi_csi: mipi@021dc000 {
+ compatible = "fsl,imx-mipi-csi2";
reg = <0x021dc000 0x4000>;
+ interrupts = <0 100 0x04>, <0 101 0x04>;
+ clocks = <&clks IMX6QDL_CLK_HSI_TX>,
+ <&clks IMX6QDL_CLK_VIDEO_27M>,
+ <&clks IMX6QDL_CLK_EIM_SEL>;
+ clock-names = "dphy_clk", "cfg_clk", "pix_clk";
+ status = "disabled";
};
mipi_dsi: mipi@021e0000 {
--
2.7.4
^ permalink raw reply related
* [PATCH 00/20] i.MX Media Driver
From: Steve Longerbeam @ 2016-12-29 22:27 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
linus.walleij, gnurou, mchehab, gregkh, p.zabel
Cc: linux-arm-kernel, devicetree, linux-kernel, linux-gpio,
linux-media, devel, Steve Longerbeam
This is a media driver for video capture on i.MX.
Refer to Documentation/media/v4l-drivers/imx.rst for example capture
pipelines on SabreSD, SabreAuto, and SabreLite reference platforms.
This patchset includes the OF graph layout as proposed by Philipp Zabel,
with only minor changes which are enumerated in the patch header.
Philipp Zabel (2):
ARM: dts: imx6qdl: Add mipi_ipu1/2 multiplexers, mipi_csi, and their
connections
media: imx: Add video switch subdev driver
Steve Longerbeam (18):
ARM: dts: imx6qdl: Add compatible, clocks, irqs to MIPI CSI-2 node
ARM: dts: imx6qdl: add media device
ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensors
ARM: dts: imx6-sabresd: add OV5642 and OV5640 camera sensors
ARM: dts: imx6-sabreauto: create i2cmux for i2c3
ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_b
ARM: dts: imx6-sabreauto: add pinctrl for gpt input capture
ARM: dts: imx6-sabreauto: add the ADV7180 video decoder
gpio: pca953x: Add optional reset gpio control
media: Add i.MX media core driver
media: imx: Add CSI subdev driver
media: imx: Add SMFC subdev driver
media: imx: Add IC subdev drivers
media: imx: Add Camera Interface subdev driver
media: imx: Add MIPI CSI-2 Receiver subdev driver
media: imx: Add MIPI CSI-2 OV5640 sensor subdev driver
media: imx: Add Parallel OV5642 sensor subdev driver
ARM: imx_v6_v7_defconfig: Enable staging video4linux drivers
.../devicetree/bindings/gpio/gpio-pca953x.txt | 4 +
Documentation/devicetree/bindings/media/imx.txt | 205 +
Documentation/media/v4l-drivers/imx.rst | 429 ++
arch/arm/boot/dts/imx6dl-sabrelite.dts | 5 +
arch/arm/boot/dts/imx6dl-sabresd.dts | 5 +
arch/arm/boot/dts/imx6dl.dtsi | 183 +
arch/arm/boot/dts/imx6q-sabrelite.dts | 6 +
arch/arm/boot/dts/imx6q-sabresd.dts | 5 +
arch/arm/boot/dts/imx6q.dtsi | 123 +
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 142 +-
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 122 +-
arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 114 +-
arch/arm/boot/dts/imx6qdl.dtsi | 25 +-
arch/arm/configs/imx_v6_v7_defconfig | 10 +-
drivers/gpio/gpio-pca953x.c | 17 +
drivers/staging/media/Kconfig | 2 +
drivers/staging/media/Makefile | 1 +
drivers/staging/media/imx/Kconfig | 36 +
drivers/staging/media/imx/Makefile | 16 +
drivers/staging/media/imx/TODO | 18 +
drivers/staging/media/imx/imx-camif.c | 1011 +++++
drivers/staging/media/imx/imx-csi.c | 638 +++
drivers/staging/media/imx/imx-ic-common.c | 113 +
drivers/staging/media/imx/imx-ic-pp.c | 636 +++
drivers/staging/media/imx/imx-ic-prpenc.c | 1037 +++++
drivers/staging/media/imx/imx-ic-prpvf.c | 1181 ++++++
drivers/staging/media/imx/imx-ic.h | 36 +
drivers/staging/media/imx/imx-media-common.c | 981 +++++
drivers/staging/media/imx/imx-media-dev.c | 479 +++
drivers/staging/media/imx/imx-media-fim.c | 508 +++
drivers/staging/media/imx/imx-media-internal-sd.c | 456 ++
drivers/staging/media/imx/imx-media-of.c | 291 ++
drivers/staging/media/imx/imx-media-of.h | 25 +
drivers/staging/media/imx/imx-media.h | 290 ++
drivers/staging/media/imx/imx-mipi-csi2.c | 509 +++
drivers/staging/media/imx/imx-smfc.c | 739 ++++
drivers/staging/media/imx/imx-video-switch.c | 349 ++
drivers/staging/media/imx/ov5640-mipi.c | 2349 +++++++++++
drivers/staging/media/imx/ov5642.c | 4364 ++++++++++++++++++++
include/media/imx.h | 15 +
include/uapi/Kbuild | 1 +
include/uapi/linux/v4l2-controls.h | 4 +
include/uapi/media/Kbuild | 2 +
include/uapi/media/imx.h | 30 +
44 files changed, 17484 insertions(+), 28 deletions(-)
create mode 100644 Documentation/devicetree/bindings/media/imx.txt
create mode 100644 Documentation/media/v4l-drivers/imx.rst
create mode 100644 drivers/staging/media/imx/Kconfig
create mode 100644 drivers/staging/media/imx/Makefile
create mode 100644 drivers/staging/media/imx/TODO
create mode 100644 drivers/staging/media/imx/imx-camif.c
create mode 100644 drivers/staging/media/imx/imx-csi.c
create mode 100644 drivers/staging/media/imx/imx-ic-common.c
create mode 100644 drivers/staging/media/imx/imx-ic-pp.c
create mode 100644 drivers/staging/media/imx/imx-ic-prpenc.c
create mode 100644 drivers/staging/media/imx/imx-ic-prpvf.c
create mode 100644 drivers/staging/media/imx/imx-ic.h
create mode 100644 drivers/staging/media/imx/imx-media-common.c
create mode 100644 drivers/staging/media/imx/imx-media-dev.c
create mode 100644 drivers/staging/media/imx/imx-media-fim.c
create mode 100644 drivers/staging/media/imx/imx-media-internal-sd.c
create mode 100644 drivers/staging/media/imx/imx-media-of.c
create mode 100644 drivers/staging/media/imx/imx-media-of.h
create mode 100644 drivers/staging/media/imx/imx-media.h
create mode 100644 drivers/staging/media/imx/imx-mipi-csi2.c
create mode 100644 drivers/staging/media/imx/imx-smfc.c
create mode 100644 drivers/staging/media/imx/imx-video-switch.c
create mode 100644 drivers/staging/media/imx/ov5640-mipi.c
create mode 100644 drivers/staging/media/imx/ov5642.c
create mode 100644 include/media/imx.h
create mode 100644 include/uapi/media/Kbuild
create mode 100644 include/uapi/media/imx.h
--
2.7.4
^ permalink raw reply
* Re: [RFC PATCH v2 3/4] hwmon: adc128d818: Trivial code style fixup
From: Alexander Koch @ 2016-12-29 20:30 UTC (permalink / raw)
To: Guenter Roeck
Cc: linux-kernel, linux-hwmon, devicetree, robh+dt, mark.rutland,
jdelvare, trivial
In-Reply-To: <20161229194646.GA1575@roeck-us.net>
On 12/29/2016 08:46 PM, Guenter Roeck wrote:
> On Thu, Dec 29, 2016 at 07:22:12PM +0100, Alexander Koch wrote:
>> On 12/26/2016 11:47 AM, Guenter Roeck wrote:
>>> On 12/23/2016 02:12 PM, Alexander Koch wrote:
>>>> Replace sysfs symbolic file permissions, e.g. 'S_IRUGO', by octal
>>>> permissions. This fixes checkpatch.pl warnings.
>>>>
>>>> Signed-off-by: Alexander Koch <mail@alexanderkoch.net>
>>> Please do not bother with those warnings and ignore checkpatch.
>>> We are in the process of doing an automated conversion.
>> Okay, so I shall create v3 of the patchset, without these changes. I've
>> found a typo in the 4th patch so I thought about going v3 anyways.
>>
>> I've tested operation modes 1-3 on real hardware today and found no
>> issues so far, so I hope v3 will have good chances of getting accepted.
>>
> Pretty much. One request, though: If there is no configuration data
> from DT, I would like the driver to read the mode from the chip - if for
> nothing else, this will let me test all modes, but it also supports the
> case where the chip is configured by BIOS/ROMMON.
Aye, will add this as new fourth patch then. I assume the chip reset in
adc128_init_client() clears the chip mode as well, so I will read it in
the operation mode block in adc128_probe().
Just out of interest: how does this help you test the modes? Do you
configure the chip externally and test it on a platform without
devicetree support?
Cheers,
Alex
^ permalink raw reply
* Re: [RFC PATCH v2 3/4] hwmon: adc128d818: Trivial code style fixup
From: Guenter Roeck @ 2016-12-29 19:46 UTC (permalink / raw)
To: Alexander Koch
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-hwmon-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, jdelvare-IBi9RG/b67k,
trivial-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <3b34c8aa-9d9a-cf88-0d84-8e0d47f9bf44-y2PnNNZjvYd4VEKF+Mn3m16hYfS7NtTn@public.gmane.org>
On Thu, Dec 29, 2016 at 07:22:12PM +0100, Alexander Koch wrote:
> On 12/26/2016 11:47 AM, Guenter Roeck wrote:
> > On 12/23/2016 02:12 PM, Alexander Koch wrote:
> >> Replace sysfs symbolic file permissions, e.g. 'S_IRUGO', by octal
> >> permissions. This fixes checkpatch.pl warnings.
> >>
> >> Signed-off-by: Alexander Koch <mail-y2PnNNZjvYd4VEKF+Mn3m16hYfS7NtTn@public.gmane.org>
> >
> > Please do not bother with those warnings and ignore checkpatch.
> > We are in the process of doing an automated conversion.
>
> Okay, so I shall create v3 of the patchset, without these changes. I've
> found a typo in the 4th patch so I thought about going v3 anyways.
>
> I've tested operation modes 1-3 on real hardware today and found no
> issues so far, so I hope v3 will have good chances of getting accepted.
>
Pretty much. One request, though: If there is no configuration data
from DT, I would like the driver to read the mode from the chip - if for
nothing else, this will let me test all modes, but it also supports the
case where the chip is configured by BIOS/ROMMON.
Thanks,
Guenter
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^ permalink raw reply
* Re: [RFC PATCH v2 3/4] hwmon: adc128d818: Trivial code style fixup
From: Alexander Koch @ 2016-12-29 18:22 UTC (permalink / raw)
To: Guenter Roeck
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-hwmon-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, jdelvare-IBi9RG/b67k,
trivial-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <650d2371-57da-2494-7628-5a8bc5b756bf-0h96xk9xTtrk1uMJSBkQmQ@public.gmane.org>
On 12/26/2016 11:47 AM, Guenter Roeck wrote:
> On 12/23/2016 02:12 PM, Alexander Koch wrote:
>> Replace sysfs symbolic file permissions, e.g. 'S_IRUGO', by octal
>> permissions. This fixes checkpatch.pl warnings.
>>
>> Signed-off-by: Alexander Koch <mail-y2PnNNZjvYd4VEKF+Mn3m16hYfS7NtTn@public.gmane.org>
>
> Please do not bother with those warnings and ignore checkpatch.
> We are in the process of doing an automated conversion.
Okay, so I shall create v3 of the patchset, without these changes. I've
found a typo in the 4th patch so I thought about going v3 anyways.
I've tested operation modes 1-3 on real hardware today and found no
issues so far, so I hope v3 will have good chances of getting accepted.
Cheers,
Alex
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^ permalink raw reply
* Re: [PATCH 2/2] iio: misc: add support for GPIO power switches
From: Sebastian Reichel @ 2016-12-29 16:29 UTC (permalink / raw)
To: Linus Walleij
Cc: Bartosz Golaszewski, Jonathan Cameron, Hartmut Knaack,
Lars-Peter Clausen, Peter Meerwald-Stadler, Rob Herring,
Mark Rutland, linux-iio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Kevin Hilman, Patrick Titiano, Neil Armstrong, Alexandre Courbot,
linux-gpio@vger.kernel.org, linux-pm@vger.kernel.org, Mark Brown,
Lia
In-Reply-To: <CACRpkdZ7JrNfCKPuuCmkZd_7+NV0QLUN8ZMukFA0TcqS9SYXcQ@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1139 bytes --]
Hi Linux,
On Wed, Dec 28, 2016 at 01:50:17PM +0100, Linus Walleij wrote:
> On Sun, Dec 11, 2016 at 11:21 PM, Bartosz Golaszewski
> <bgolaszewski@baylibre.com> wrote:
>
> > Some power-measuring ADCs work together with power load switches which
> > allow to power-cycle measured devices.
> >
> > An example use case would be measuring the power consumption of a
> > development board during boot using a power monitor such as TI INA226
> > and power-cycling the board remotely using a TPS229* power switch.
> >
> > Add an iio driver for simple GPIO power switches and expose a sysfs
> > attribute allowing to toggle their state.
> >
> > Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> I don't get this, isn't this doing the same as
> drivers/power/reset/gpio-poweroff.c
> ?
>
> With the only difference that the latter uses the standard syscall
> from pm_power_off to reboot the system instead of some random
> sysfs file.
As far as I understand it, the TPS229 is used by Barzosz to poweroff
a remote system. The gpio-poweroff driver is used to poweroff the
local system.
-- Sebastian
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH v2 1/5] clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
From: Sylwester Nawrocki @ 2016-12-29 15:16 UTC (permalink / raw)
To: Chanwoo Choi
Cc: krzk, javier, kgene, tomasz.figa, myungjoo.ham, kyungmin.park,
devicetree, linux-samsung-soc, Michael Turquette, Stephen Boyd
In-Reply-To: <662a6608-e6c7-fc1b-6bea-47548640913d@samsung.com>
On 12/20/2016 11:47 AM, Sylwester Nawrocki wrote:
> On 12/15/2016 05:33 AM, Chanwoo Choi wrote:
>> Could you please review this patch?
>
> Chanwoo, the patch looks good to me, I'm going to queue it after
> v4.10-rc1 is released.
Applied, thanks.
^ permalink raw reply
* Re: [PATCH v2] ARM: dts: Add missing CPU frequencies for Exynos5422/5800
From: Krzysztof Kozlowski @ 2016-12-29 14:17 UTC (permalink / raw)
To: Doug Anderson
Cc: Bartlomiej Zolnierkiewicz, Krzysztof Kozlowski, Kukjin Kim,
Javier Martinez Canillas, Rob Herring, Mark Rutland, Russell King,
Andreas Faerber, Thomas Abraham, Ben Gamari, Arjun K V,
linux-samsung-soc, linux-arm-kernel@lists.infradead.org,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <CAD=FV=Wo273T20fe8D2v5Pn1HYR==7PHtr7WZGwzFPRspAYPzg@mail.gmail.com>
On Thu, Dec 15, 2016 at 04:54:30PM -0800, Doug Anderson wrote:
> > Index: b/arch/arm/boot/dts/exynos5800.dtsi
> > ===================================================================
> > --- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100
> > +++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100
> > @@ -24,6 +24,16 @@
> > };
> >
> > &cluster_a15_opp_table {
> > + opp@2000000000 {
> > + opp-hz = /bits/ 64 <2000000000>;
> > + opp-microvolt = <1250000>;
> > + clock-latency-ns = <140000>;
> > + };
> > + opp@1900000000 {
> > + opp-hz = /bits/ 64 <1900000000>;
> > + opp-microvolt = <1250000>;
> > + clock-latency-ns = <140000>;
> > + };
>
> I don't think the voltages you listed are high enough for all peach pi
> boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research
> I did. See my response to v1.
I wanted to apply this but saw this remaining issue. Javier tested it
on Peach Pi so is this concern still valid?
Bartlomiej,
When sending dts patches please stick to the common subsystem prefix
(git log --oneline arch/arm/boot/dts/exynos*).
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 4/4] ARM64: dts: exynos5433: remove unused code
From: Andi Shyti @ 2016-12-29 13:41 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Mark Rutland, devicetree, linux-samsung-soc, Andi Shyti,
Javier Martinez Canillas, Catalin Marinas, Will Deacon,
Tomasz Figa, Andi Shyti, linux-kernel, Chanwoo Choi, Rob Herring,
Kukjin Kim, Sylwester Nawrocki, linux-arm-kernel
In-Reply-To: <20161229115421.pq52ab57e53xntoz@kozik-lap>
> > #include <dt-bindings/pinctrl/samsung.h>
> >
> > -#define PIN_PULL_NONE 0
> > -#define PIN_PULL_DOWN 1
> > -#define PIN_PULL_UP 3
> > -
> > -#define PIN_DRV_LV1 0
> > -#define PIN_DRV_LV2 2
> > -#define PIN_DRV_LV3 1
> > -#define PIN_DRV_LV4 3
> > -
> > -#define PIN_IN 0
> > -#define PIN_OUT 1
> > -#define PIN_FUNC1 2
> > -
>
> This should be squashed with 3/4 because logically it is strictly
> related to it and splitting it does not bring any benefits. Actually
> while looking at 3/4 I was surprised to see them not removed.
Yes, right :)
Thanks,
Andi
^ permalink raw reply
* Re: [PATCH 1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Andi Shyti @ 2016-12-29 13:41 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andi Shyti, Tomasz Figa, Chanwoo Choi, Sylwester Nawrocki,
Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
Kukjin Kim, Javier Martinez Canillas, devicetree,
linux-arm-kernel, linux-samsung-soc, linux-kernel, Andi Shyti
In-Reply-To: <20161229115059.ncvtakz32vhcfsij@kozik-lap>
Hi Krzysztof,
> > #define EXYNOS5420_PIN_DRV_LV3 2
> > #define EXYNOS5420_PIN_DRV_LV4 3
> >
> > +/* Drive strengths for Exynos5433 */
> > +#define EXYNOS5433_PIN_DRV_LV1 0
> > +#define EXYNOS5433_PIN_DRV_LV2 1
> > +#define EXYNOS5433_PIN_DRV_LV3 2
> > +#define EXYNOS5433_PIN_DRV_LV4 3
>
> Same values as existing. No need to re-define these.
Yes, I was in doubt when I prepared this patch as on one hand it
didn't look right to use EXYNOS5420_* for exynos5433, on the other
hand it didn't look right to duplicate the macros.
In anycase this values need to be fixed as Chanwoo wrote in the
other mail.
Thanks,
Andi
^ permalink raw reply
* [EXAMPLE 3/2] ARM: BCM53573: Specify ports for USB LED for Tenda AC9
From: Rafał Miłecki @ 2016-12-29 13:03 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-usb, linux-leds, Richard Purdie, Jacek Anaszewski,
Pavel Machek, devicetree, Rob Herring, Mark Rutland,
Rafał Miłecki
In-Reply-To: <20161229130306.30400-1-zajec5@gmail.com>
From: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
This patch was tested & works as expected. It's marked as EXAMPLE just
because it should go through ARM tree.
---
arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
index 4403ae8..00bbe48 100644
--- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
@@ -24,6 +24,7 @@
compatible = "gpio-leds";
usb {
+ usb-ports = <&ohci_port1>, <&ehci_port1>;
label = "bcm53xx:blue:usb";
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
--
2.10.1
^ permalink raw reply related
* [PATCH 2/2] usb: core: read USB ports from DT in the usbport LED trigger driver
From: Rafał Miłecki @ 2016-12-29 13:03 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-leds-u79uwXL29TY76Z2rM5mHXA, Richard Purdie,
Jacek Anaszewski, Pavel Machek, devicetree-u79uwXL29TY76Z2rM5mHXA,
Rob Herring, Mark Rutland, Rafał Miłecki
In-Reply-To: <20161229130306.30400-1-zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
This adds support for using description of relation between LEDs and USB
ports from device tree. If device has a properly described LEDs, trigger
will know when to turn them on.
Signed-off-by: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
---
drivers/usb/core/ledtrig-usbport.c | 54 ++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/drivers/usb/core/ledtrig-usbport.c b/drivers/usb/core/ledtrig-usbport.c
index 1713248..70ad558 100644
--- a/drivers/usb/core/ledtrig-usbport.c
+++ b/drivers/usb/core/ledtrig-usbport.c
@@ -11,8 +11,10 @@
#include <linux/device.h>
#include <linux/leds.h>
#include <linux/module.h>
+#include <linux/of.h>
#include <linux/slab.h>
#include <linux/usb.h>
+#include <linux/usb/of.h>
struct usbport_trig_data {
struct led_classdev *led_cdev;
@@ -123,6 +125,55 @@ static const struct attribute_group ports_group = {
* Adding & removing ports
***************************************/
+/**
+ * usbport_trig_port_observed - Check if port should be observed
+ */
+static bool usbport_trig_port_observed(struct usbport_trig_data *usbport_data,
+ struct usb_device *usb_dev, int port1)
+{
+ struct device *dev = usbport_data->led_cdev->dev;
+ struct device_node *led_np = dev->of_node;
+ struct of_phandle_args args;
+ struct device_node *port_np;
+ int count, i;
+
+ if (!led_np)
+ return false;
+
+ /* Get node of port being added */
+ port_np = usb_of_get_child_node(usb_dev->dev.of_node, port1);
+ if (!port_np)
+ return false;
+
+ /* Amount of ports this LED references */
+ count = of_count_phandle_with_args(led_np, "usb-ports", NULL);
+ if (count < 0) {
+ dev_warn(dev, "Failed to get USB ports for %s\n",
+ led_np->full_name);
+ return false;
+ }
+
+ /* Check if port is on this LED's list */
+ for (i = 0; i < count; i++) {
+ int err;
+
+ err = of_parse_phandle_with_args(led_np, "usb-ports", NULL, i,
+ &args);
+ if (err) {
+ dev_err(dev, "Failed to get USB port phandle at index %d: %d\n",
+ i, err);
+ continue;
+ }
+
+ of_node_put(args.np);
+
+ if (args.np == port_np)
+ return true;
+ }
+
+ return false;
+}
+
static int usbport_trig_add_port(struct usbport_trig_data *usbport_data,
struct usb_device *usb_dev,
const char *hub_name, int portnum)
@@ -141,6 +192,8 @@ static int usbport_trig_add_port(struct usbport_trig_data *usbport_data,
port->data = usbport_data;
port->hub = usb_dev;
port->portnum = portnum;
+ port->observed = usbport_trig_port_observed(usbport_data, usb_dev,
+ portnum);
len = strlen(hub_name) + 8;
port->port_name = kzalloc(len, GFP_KERNEL);
@@ -255,6 +308,7 @@ static void usbport_trig_activate(struct led_classdev *led_cdev)
if (err)
goto err_free;
usb_for_each_dev(usbport_data, usbport_trig_add_usb_dev_ports);
+ usbport_trig_update_count(usbport_data);
/* Notifications */
usbport_data->nb.notifier_call = usbport_trig_notify,
--
2.10.1
--
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^ permalink raw reply related
* [PATCH 1/2] dt-bindings: leds: document new usb-ports property
From: Rafał Miłecki @ 2016-12-29 13:03 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: linux-usb-u79uwXL29TY76Z2rM5mHXA,
linux-leds-u79uwXL29TY76Z2rM5mHXA, Richard Purdie,
Jacek Anaszewski, Pavel Machek, devicetree-u79uwXL29TY76Z2rM5mHXA,
Rob Herring, Mark Rutland, Rafał Miłecki
From: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
Some LEDs can be related to particular USB ports (common case for home
routers). This property allows describing such a relation.
Signed-off-by: Rafał Miłecki <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>
---
This patch is based on top of commit 52e847dc431 ("DT: leds: Improve examples
by adding some context") sitting in the linux-leds.git (for-4.11).
---
Documentation/devicetree/bindings/leds/common.txt | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/leds/common.txt b/Documentation/devicetree/bindings/leds/common.txt
index 24b6560..fcfe661 100644
--- a/Documentation/devicetree/bindings/leds/common.txt
+++ b/Documentation/devicetree/bindings/leds/common.txt
@@ -49,6 +49,14 @@ Optional properties for child nodes:
- panic-indicator : This property specifies that the LED should be used,
if at all possible, as a panic indicator.
+- usb-ports : List of USB ports related to this LED. Some devices have LEDs that
+ should be used to indicate USB device activity. This can be
+ described with this property.
+ There can be more than one LED like this, e.g. some vendors use
+ one controller per USB version. It's then common to use different
+ color LEDs depending on device USB standard (like USB 2.0 vs.
+ USB 3.0).
+
Required properties for flash LED child nodes:
- flash-max-microamp : Maximum flash LED supply current in microamperes.
- flash-max-timeout-us : Maximum timeout in microseconds after which the flash
@@ -69,6 +77,11 @@ gpio-leds {
linux,default-trigger = "heartbeat";
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
};
+
+ usb {
+ gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+ usb-ports = <&ohci_port1>, <&ehci_port1>;
+ };
};
max77693-led {
--
2.10.1
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^ permalink raw reply related
* [PATCH v2] ARM: dts: qcom: apq8064: Add missing scm clock
From: Bjorn Andersson @ 2016-12-29 12:06 UTC (permalink / raw)
To: Andy Gross, David Brown
Cc: linux-arm-msm, linux-soc, devicetree, linux-arm-kernel,
linux-kernel
As per the device tree binding the apq8064 scm node requires the core
clock to be specified, so add this.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
Changes since v1:
- Changed clock to Daytona Fabric
arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 1dbe697b2e90..a27cc96ac069 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -4,6 +4,7 @@
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/reset/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -303,6 +304,9 @@
firmware {
scm {
compatible = "qcom,scm-apq8064";
+
+ clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>;
+ clock-names = "core";
};
};
--
2.11.0
^ permalink raw reply related
* Re: [PATCH 4/4] ARM64: dts: exynos5433: remove unused code
From: Krzysztof Kozlowski @ 2016-12-29 11:54 UTC (permalink / raw)
To: Andi Shyti
Cc: Tomasz Figa, Chanwoo Choi, Krzysztof Kozlowski,
Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Javier Martinez Canillas, devicetree,
linux-arm-kernel, linux-samsung-soc, linux-kernel, Andi Shyti
In-Reply-To: <20161229084211.20442-5-andi.shyti@samsung.com>
On Thu, Dec 29, 2016 at 05:42:11PM +0900, Andi Shyti wrote:
> Because the pinctrl DTS is using the samsung.h macros, the
> previously pin defines are anused. Remove them.
>
> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi | 13 -------------
> 1 file changed, 13 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> index 9afed9fcf7e1..3c821e5c241e 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
> @@ -14,19 +14,6 @@
>
> #include <dt-bindings/pinctrl/samsung.h>
>
> -#define PIN_PULL_NONE 0
> -#define PIN_PULL_DOWN 1
> -#define PIN_PULL_UP 3
> -
> -#define PIN_DRV_LV1 0
> -#define PIN_DRV_LV2 2
> -#define PIN_DRV_LV3 1
> -#define PIN_DRV_LV4 3
> -
> -#define PIN_IN 0
> -#define PIN_OUT 1
> -#define PIN_FUNC1 2
> -
This should be squashed with 3/4 because logically it is strictly
related to it and splitting it does not bring any benefits. Actually
while looking at 3/4 I was surprised to see them not removed.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Krzysztof Kozlowski @ 2016-12-29 11:50 UTC (permalink / raw)
To: Andi Shyti
Cc: Tomasz Figa, Chanwoo Choi, Krzysztof Kozlowski,
Sylwester Nawrocki, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon, Kukjin Kim, Javier Martinez Canillas,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Andi Shyti
In-Reply-To: <20161229084211.20442-2-andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
On Thu, Dec 29, 2016 at 05:42:08PM +0900, Andi Shyti wrote:
> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
>
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
>
> Signed-off-by: Andi Shyti <andi.shyti-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
> ---
> include/dt-bindings/pinctrl/samsung.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
> index 6276eb785e2b..58868313d64b 100644
> --- a/include/dt-bindings/pinctrl/samsung.h
> +++ b/include/dt-bindings/pinctrl/samsung.h
> @@ -45,6 +45,12 @@
> #define EXYNOS5420_PIN_DRV_LV3 2
> #define EXYNOS5420_PIN_DRV_LV4 3
>
> +/* Drive strengths for Exynos5433 */
> +#define EXYNOS5433_PIN_DRV_LV1 0
> +#define EXYNOS5433_PIN_DRV_LV2 1
> +#define EXYNOS5433_PIN_DRV_LV3 2
> +#define EXYNOS5433_PIN_DRV_LV4 3
Same values as existing. No need to re-define these.
Best regards,
Krzysztof
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^ permalink raw reply
* Re: [PATCH v2 2/2] mmc: host: s3cmci: allow probing from device tree
From: Ulf Hansson @ 2016-12-29 11:40 UTC (permalink / raw)
To: Sergio Prado
Cc: Mark Rutland, devicetree@vger.kernel.org,
linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
Rob Herring, Ben Dooks, linux-arm-kernel@lists.infradead.org
In-Reply-To: <1481289284-19919-3-git-send-email-sergio.prado@e-labworks.com>
On 9 December 2016 at 14:14, Sergio Prado <sergio.prado@e-labworks.com> wrote:
> Allows configuring Samsung S3C24XX MMC/SD/SDIO controller using a device
> tree.
>
> Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
> ---
> drivers/mmc/host/s3cmci.c | 155 +++++++++++++++++++++++++++++++++++++++-------
> 1 file changed, 131 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c
> index 932a4b1fed33..bfeb90e8ffee 100644
> --- a/drivers/mmc/host/s3cmci.c
> +++ b/drivers/mmc/host/s3cmci.c
> @@ -23,6 +23,9 @@
> #include <linux/gpio.h>
> #include <linux/irq.h>
> #include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_gpio.h>
>
> #include <plat/gpio-cfg.h>
> #include <mach/dma.h>
> @@ -127,6 +130,22 @@ enum dbg_channels {
> dbg_conf = (1 << 8),
> };
>
> +struct s3cmci_drv_data {
> + int is2440;
This doesn't say much.
Please use a more descriptive variable name and rename the struct to
perhaps "variant_data", because I guess that is what this is?
> +};
> +
> +static const struct s3cmci_drv_data s3c2410_s3cmci_drv_data = {
> + .is2440 = 0,
> +};
> +
> +static const struct s3cmci_drv_data s3c2412_s3cmci_drv_data = {
> + .is2440 = 1,
> +};
> +
> +static const struct s3cmci_drv_data s3c2440_s3cmci_drv_data = {
> + .is2440 = 1,
> +};
> +
> static const int dbgmap_err = dbg_fail;
> static const int dbgmap_info = dbg_info | dbg_conf;
> static const int dbgmap_debug = dbg_err | dbg_debug;
> @@ -1241,8 +1260,9 @@ static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> case MMC_POWER_ON:
> case MMC_POWER_UP:
> /* Configure GPE5...GPE10 pins in SD mode */
> - s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2),
> - S3C_GPIO_PULL_NONE);
> + if (!host->pdev->dev.of_node)
> + s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2),
> + S3C_GPIO_PULL_NONE);
>
> if (host->pdata->set_power)
> host->pdata->set_power(ios->power_mode, ios->vdd);
> @@ -1254,7 +1274,8 @@ static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
>
> case MMC_POWER_OFF:
> default:
> - gpio_direction_output(S3C2410_GPE(5), 0);
> + if (!host->pdev->dev.of_node)
> + gpio_direction_output(S3C2410_GPE(5), 0);
>
> if (host->is2440)
> mci_con |= S3C2440_SDICON_SDRESET;
> @@ -1544,21 +1565,12 @@ static inline void s3cmci_debugfs_remove(struct s3cmci_host *host) { }
>
> #endif /* CONFIG_DEBUG_FS */
>
> -static int s3cmci_probe(struct platform_device *pdev)
> +static int s3cmci_probe_pdata(struct s3cmci_host *host)
> {
> - struct s3cmci_host *host;
> - struct mmc_host *mmc;
> - int ret;
> - int is2440;
> - int i;
> + struct platform_device *pdev = host->pdev;
> + int i, ret;
>
> - is2440 = platform_get_device_id(pdev)->driver_data;
> -
> - mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
> - if (!mmc) {
> - ret = -ENOMEM;
> - goto probe_out;
> - }
> + host->is2440 = platform_get_device_id(pdev)->driver_data;
>
> for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++) {
> ret = gpio_request(i, dev_name(&pdev->dev));
> @@ -1568,14 +1580,90 @@ static int s3cmci_probe(struct platform_device *pdev)
> for (i--; i >= S3C2410_GPE(5); i--)
> gpio_free(i);
>
> - goto probe_free_host;
> + return ret;
> }
> }
>
> + return 0;
> +}
> +
> +static int s3cmci_probe_dt(struct s3cmci_host *host)
> +{
> + struct platform_device *pdev = host->pdev;
> + struct s3c24xx_mci_pdata *pdata;
> + const struct s3cmci_drv_data *drvdata;
> + struct mmc_host *mmc = host->mmc;
> + int gpio, ret;
> +
> + drvdata = of_device_get_match_data(&pdev->dev);
> + if (!drvdata)
> + return -ENODEV;
> +
> + host->is2440 = drvdata->is2440;
Instead of copying only the member, perhaps assign a host->variant
pointer to the drvdata instead, as that allows to extend the
information for the variant to cover more things than only "is2440",
while going forward.
In other words:
host->variant = of_device_get_match_data(&pdev->dev);
> +
> + ret = mmc_of_parse(mmc);
> + if (ret)
> + return ret;
> +
> + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
> + if (!pdata)
> + return -ENOMEM;
> +
> + pdata->ocr_avail = mmc->ocr_avail;
> +
> + if (mmc->caps2 & MMC_CAP2_NO_WRITE_PROTECT)
> + pdata->no_wprotect = 1;
> +
> + if (mmc->caps & MMC_CAP_NEEDS_POLL)
> + pdata->no_detect = 1;
> +
> + if (mmc->caps2 & MMC_CAP2_RO_ACTIVE_HIGH)
> + pdata->wprotect_invert = 1;
> +
> + if (mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH)
> + pdata->detect_invert = 1;
> +
> + gpio = of_get_named_gpio(pdev->dev.of_node, "cd-gpios", 0);
This should already be covered via mmc_of_parse().
> + if (gpio_is_valid(gpio)) {
> + pdata->gpio_detect = gpio;
> + gpio_free(gpio);
> + }
> +
> + gpio = of_get_named_gpio(pdev->dev.of_node, "wp-gpios", 0);
This should already be covered via mmc_of_parse().
> + if (gpio_is_valid(gpio)) {
> + pdata->gpio_wprotect = gpio;
> + gpio_free(gpio);
> + }
> +
> + pdev->dev.platform_data = pdata;
> +
> + return 0;
> +}
> +
> +static int s3cmci_probe(struct platform_device *pdev)
> +{
> + struct s3cmci_host *host;
> + struct mmc_host *mmc;
> + int ret;
> + int i;
> +
> + mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
> + if (!mmc) {
> + ret = -ENOMEM;
> + goto probe_out;
> + }
> +
> host = mmc_priv(mmc);
> host->mmc = mmc;
> host->pdev = pdev;
> - host->is2440 = is2440;
> +
> + if (pdev->dev.of_node)
> + ret = s3cmci_probe_dt(host);
> + else
> + ret = s3cmci_probe_pdata(host);
> +
> + if (ret)
> + goto probe_free_host;
>
> host->pdata = pdev->dev.platform_data;
> if (!host->pdata) {
> @@ -1586,7 +1674,7 @@ static int s3cmci_probe(struct platform_device *pdev)
> spin_lock_init(&host->complete_lock);
> tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
>
> - if (is2440) {
> + if (host->is2440) {
> host->sdiimsk = S3C2440_SDIIMSK;
> host->sdidata = S3C2440_SDIDATA;
> host->clk_div = 1;
> @@ -1789,8 +1877,9 @@ static int s3cmci_probe(struct platform_device *pdev)
> release_mem_region(host->mem->start, resource_size(host->mem));
>
> probe_free_gpio:
> - for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> - gpio_free(i);
> + if (!pdev->dev.of_node)
> + for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> + gpio_free(i);
>
> probe_free_host:
> mmc_free_host(mmc);
> @@ -1837,9 +1926,9 @@ static int s3cmci_remove(struct platform_device *pdev)
> if (!pd->no_detect)
> gpio_free(pd->gpio_detect);
>
> - for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> - gpio_free(i);
> -
> + if (!pdev->dev.of_node)
> + for (i = S3C2410_GPE(5); i <= S3C2410_GPE(10); i++)
> + gpio_free(i);
>
> iounmap(host->base);
> release_mem_region(host->mem->start, resource_size(host->mem));
> @@ -1848,6 +1937,23 @@ static int s3cmci_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct of_device_id s3cmci_dt_match[] = {
> + {
> + .compatible = "samsung,s3c2410-sdi",
> + .data = &s3c2410_s3cmci_drv_data,
> + },
> + {
> + .compatible = "samsung,s3c2412-sdi",
> + .data = &s3c2412_s3cmci_drv_data,
> + },
> + {
> + .compatible = "samsung,s3c2440-sdi",
> + .data = &s3c2440_s3cmci_drv_data,
> + },
> + { /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match);
> +
> static const struct platform_device_id s3cmci_driver_ids[] = {
> {
> .name = "s3c2410-sdi",
> @@ -1867,6 +1973,7 @@ static int s3cmci_remove(struct platform_device *pdev)
> static struct platform_driver s3cmci_driver = {
> .driver = {
> .name = "s3c-sdi",
> + .of_match_table = s3cmci_dt_match,
> },
> .id_table = s3cmci_driver_ids,
> .probe = s3cmci_probe,
> --
> 1.9.1
>
Kind regards
Uffe
^ permalink raw reply
* Re: [PATCH 1/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
From: Chanwoo Choi @ 2016-12-29 10:33 UTC (permalink / raw)
To: Andi Shyti, Tomasz Figa, Krzysztof Kozlowski, Sylwester Nawrocki,
Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
Kukjin Kim, Javier Martinez Canillas
Cc: devicetree, linux-arm-kernel, linux-samsung-soc, linux-kernel,
Andi Shyti
In-Reply-To: <37b86cdb-b5e9-a5fa-fbb1-46e8d8c90cd8@samsung.com>
Hi Andi,
On 2016년 12월 29일 18:17, Chanwoo Choi wrote:
> Hi Andi,
>
> On 2016년 12월 29일 17:42, Andi Shyti wrote:
>> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
>> values used for configuration") has added a header file for defining the
>> pinctrl values in order to avoid hardcoded settings in the Exynos
>> DTS related files.
>>
>> Extend samsung.h to the Exynos5433 for drive strength values
>> which are strictly related to the particular SoC and may defer
>> from others.
>>
>> Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
>> ---
>> include/dt-bindings/pinctrl/samsung.h | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
>> index 6276eb785e2b..58868313d64b 100644
>> --- a/include/dt-bindings/pinctrl/samsung.h
>> +++ b/include/dt-bindings/pinctrl/samsung.h
>> @@ -45,6 +45,12 @@
>> #define EXYNOS5420_PIN_DRV_LV3 2
>> #define EXYNOS5420_PIN_DRV_LV4 3
>>
>> +/* Drive strengths for Exynos5433 */
>> +#define EXYNOS5433_PIN_DRV_LV1 0
>> +#define EXYNOS5433_PIN_DRV_LV2 1
>> +#define EXYNOS5433_PIN_DRV_LV3 2
>> +#define EXYNOS5433_PIN_DRV_LV4 3
>
> Exynos5433 has the same value with EXYNOS5420. So, I'd like you to use the EXYNOS5420_PIN_DRV_LVx instead of separate the definitions.
I found the problem to handle the *_DRV register of Exynos5433. Because Exynos5433 has the different width length of *_DRV (PINCFG_TYPE_DRV) bitfields from Exynos542x as following. When I was sending the exynos5433 pinctrl patches, I was missing this issue.
Exynos5422/Exynos5410 have two different bitfields in the same register to set the DRV_LVx as following:
(n=0 to 7)
[2n+1:2n] : 2bits
0x0 = 1x,
0x1 = 2x,
0x2 = 3x,
0x3 = 4x,
[n+16:16]
0x0 = Fast Slew Rate,
0x1 = Slow Slew Rate,
But, Exynos5433 has the following value for PIN_DRV_LVx without additional bitfields to separate 'Fast Slew Rate' and 'Slow Slew Rate'. Just exynos5433 defines the 'Fast Slew Rate(0x0 ~ 0x5)' and 'Slow Slew Rate (0x8 ~ 0xF)'.
(n=0 to 7)
[4n+3:4n] : 4 bits
0x0 = Fast Slew Rate 1x
0x1 = Fast Slew Rate 2x
0x2 = Fast Slew Rate 3x
0x3 = Fast Slew Rate 4x
0x4 = Fast Slew Rate 5x
0x5 = Fast Slew Rate 6x
0x8 = Slow Slew Rate 1x
0x9 = Slow Slew Rate 2x
0xA = Slow Slew Rate 3x
0xB = Slow Slew Rate 4x
0xC = Slow Slew Rate 5x
0xF = Slow Slew Rate 6x
So, before this patch, we have to fix it to support the DRV reigster of Exynos5433.
I'll fix it.
>
>> +
>> #define EXYNOS_PIN_FUNC_INPUT 0
>> #define EXYNOS_PIN_FUNC_OUTPUT 1
>> #define EXYNOS_PIN_FUNC_2 2
>>
>
--
Regards,
Chanwoo Choi
^ permalink raw reply
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