* [PATCH 10/13] ARM: dts: imx6qdl-hummingboard: rename regulators to match schematic
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
Make the regulators match the schematic - name the regulators after
one of their schematic supply names, and arrange them into their
heirarchy.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 43 +++++++++++++++++++----------
1 file changed, 29 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index 1b33cd6752f4..66bda5a04582 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -51,12 +51,21 @@
pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
};
- reg_3p3v: 3p3v {
+ v_3v2: regulator-v-3v2 {
compatible = "regulator-fixed";
- regulator-name = "3P3V";
- regulator-min-microvolt = <3300000>;
+ regulator-always-on;
regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "v_3v2";
+ vin-supply = <&v_5v0>;
+ };
+
+ v_5v0: regulator-v-5v0 {
+ compatible = "regulator-fixed";
regulator-always-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "v_5v0";
};
v_sd: regulator-v-sd {
@@ -69,29 +78,31 @@
regulator-min-microvolt = <3300000>;
regulator-name = "v_sd";
startup-delay-us = <1000>;
- vin-supply = <®_3p3v>;
+ vin-supply = <&v_3v2>;
};
- reg_usbh1_vbus: usb-h1-vbus {
+ v_usb2: regulator-v-usb2 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
- regulator-name = "usb_h1_vbus";
- regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "v_usb2";
+ vin-supply = <&v_5v0>;
};
- reg_usbotg_vbus: usb-otg-vbus {
+ v_usb1: regulator-v-usb1 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
- regulator-name = "usb_otg_vbus";
- regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "v_usb1";
+ vin-supply = <&v_5v0>;
};
sound-sgtl5000 {
@@ -151,8 +162,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>;
reg = <0x0a>;
- VDDA-supply = <®_3p3v>;
- VDDIO-supply = <®_3p3v>;
+ VDDA-supply = <&v_3v2>;
+ VDDIO-supply = <&v_3v2>;
};
};
@@ -292,7 +303,7 @@
&usbh1 {
disable-over-current;
- vbus-supply = <®_usbh1_vbus>;
+ vbus-supply = <&v_usb2>;
status = "okay";
};
@@ -300,7 +311,7 @@
disable-over-current;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
- vbus-supply = <®_usbotg_vbus>;
+ vbus-supply = <&v_usb1>;
status = "okay";
};
@@ -314,3 +325,7 @@
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
status = "okay";
};
+
+&vcc_3v3 {
+ vin-supply = <&v_3v2>;
+};
--
2.7.4
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* [PATCH 09/13] ARM: dts: imx6qdl-hummingboard: add SD card regulator
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
Add the SD card regulator, which allows the SD card power to be switched
on/off.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index 84e6392fee1f..1b33cd6752f4 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -59,6 +59,19 @@
regulator-always-on;
};
+ v_sd: regulator-v-sd {
+ compatible = "regulator-fixed";
+ gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hummingboard_vmmc>;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "v_sd";
+ startup-delay-us = <1000>;
+ vin-supply = <®_3p3v>;
+ };
+
reg_usbh1_vbus: usb-h1-vbus {
compatible = "regulator-fixed";
enable-active-high;
@@ -241,6 +254,11 @@
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
>;
};
+ pinctrl_hummingboard_vmmc: hummingboard-vmmc {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
+ >;
+ };
};
};
@@ -292,7 +310,7 @@
&pinctrl_hummingboard_usdhc2_aux
&pinctrl_hummingboard_usdhc2
>;
- vmmc-supply = <®_3p3v>;
+ vmmc-supply = <&v_sd>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
status = "okay";
};
--
2.7.4
--
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* [PATCH 08/13] ARM: dts: ixm6qdl-microsom: add support for eMMC
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
Rev 1.5 microsoms include eMMC support on-board. Add a microsom include
file which can be used to add support for this.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6qdl-microsom-emmc.dtsi | 70 ++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6qdl-microsom-emmc.dtsi
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-emmc.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-emmc.dtsi
new file mode 100644
index 000000000000..5f3b8baab20f
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-microsom-emmc.dtsi
@@ -0,0 +1,70 @@
+/*
+ * Copyright (C) 2013,2014 Russell King
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+&iomuxc {
+ microsom {
+ pinctrl_microsom_usdhc3: microsom-usdhc3 {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+ MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
+ >;
+ };
+ };
+};
+
+/* USDHC3 - eMMC */
+&usdhc3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_usdhc3>;
+ bus-width = <8>;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ status = "okay";
+};
--
2.7.4
--
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* [PATCH 07/13] ARM: dts: imx6qdl-microsom: add support for TI Wi-Fi
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
Add support for the TI Wi-Fi WL1837 device on SolidRun's revision
1.5 microsoms.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6qdl-microsom-ti.dtsi | 170 +++++++++++++++++++++++++++++
1 file changed, 170 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6qdl-microsom-ti.dtsi
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ti.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ti.dtsi
new file mode 100644
index 000000000000..44a97ba93a95
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ti.dtsi
@@ -0,0 +1,170 @@
+/*
+ * Copyright (C) 2013,2014 Russell King
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ nvcc_sd1: regulator-nvcc-sd1 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-name = "nvcc_sd1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_3v3>;
+ };
+
+ clk_ti_wifi: ti-wifi-clock {
+ /* This is a hack around the kernel - using "fixed clock"
+ * results in the "pinctrl" properties being ignored, and
+ * the clock not being output. Instead, use a gated clock
+ * and the unrouted WL_XTAL_PU gpio.
+ */
+ compatible = "gpio-gate-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_ti_clk>;
+ enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ pwrseq_ti_wifi: ti-wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_ti_wifi_en>;
+ reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ clocks = <&clk_ti_wifi>;
+ clock-names = "ext_clock";
+ };
+};
+
+&iomuxc {
+ microsom {
+ pinctrl_microsom_ti_bt: microsom-ti-bt {
+ fsl,pins = <
+ /* BT_EN_SOC */
+ MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_ti_clk: microsom-ti-clk {
+ fsl,pins = <
+ /* EXT_32K */
+ MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
+ /* WL_XTAL_PU (unrouted) */
+ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-en {
+ fsl,pins = <
+ /* WLAN_EN_SOC */
+ MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irq {
+ fsl,pins = <
+ /* WLAN_IRQ */
+ MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_uart4: microsom-uart4 {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_microsom_usdhc1: microsom-usdhc1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
+ >;
+ };
+ };
+};
+
+/* UART4 - Connected to optional TI Wi-Fi/BT/FM */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_uart4>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "ti,wl1837-st";
+ clocks = <&clk_ti_wifi>;
+ clock-names = "ext_clock";
+ enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_ti_bt>;
+ };
+};
+
+/* USDHC1 - Connected to optional TI Wi-Fi/BT/FM */
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_usdhc1>;
+ bus-width = <4>;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&pwrseq_ti_wifi>;
+ non-removable;
+ vmmc-supply = <&vcc_3v3>;
+ /* vqmmc-supply = <&nvcc_sd1>; - MMC layer doesn't like it! */
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wlcore@2 {
+ compatible = "ti,wl1837";
+ reg = <2>;
+ interrupts-extended = <&gpio6 4 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_ti_wifi_irq>;
+ };
+};
--
2.7.4
--
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* [PATCH 06/13] ARM: dts: imx6qdl-microsom: add 3.3V vcc regulator
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
Add a 3.3V regulator for devices connected to the vcc_3v3 supply
signal on the microsom.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6qdl-microsom.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index 612f626a59c1..d1dba0d94960 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -40,6 +40,16 @@
*/
#include <dt-bindings/gpio/gpio.h>
+/ {
+ vcc_3v3: regulator-vcc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-name = "vcc_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
--
2.7.4
--
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^ permalink raw reply related
* [PATCH 05/13] ARM: dts: imx6qdl-microsom-brcm: rename sdio clock
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
The SDIO clock is really the Broadcom clock. Rename it as such.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi
index 809d7896775c..b55af61dfeca 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi
@@ -40,7 +40,7 @@
*/
#include <dt-bindings/gpio/gpio.h>
/ {
- clk_sdio: sdio-clock {
+ clk_brcm: brcm-clock {
compatible = "gpio-gate-clock";
#clock-cells = <0>;
pinctrl-names = "default";
@@ -64,7 +64,7 @@
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
<&gpio6 0 GPIO_ACTIVE_LOW>;
- clocks = <&clk_sdio>;
+ clocks = <&clk_brcm>;
clock-names = "ext_clock";
};
};
--
2.7.4
--
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* [PATCH 04/13] ARM: dts: imx6qdl-microsom: split out Broadcom Wi-Fi support
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
There are two variants of the imx6qdl microsom: one with Broadcom Wi-Fi
and another with Texas Instruments Wi-Fi. The two Wi-Fi devices require
different DT bindings, so it's necessary to split out the Broadcom
specifics.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6dl-cubox-i.dts | 1 +
arch/arm/boot/dts/imx6dl-hummingboard.dts | 1 +
arch/arm/boot/dts/imx6q-cubox-i.dts | 1 +
arch/arm/boot/dts/imx6q-h100.dts | 1 +
arch/arm/boot/dts/imx6q-hummingboard.dts | 1 +
arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi | 144 +++++++++++++++++++++++++++
arch/arm/boot/dts/imx6qdl-microsom.dtsi | 99 ------------------
7 files changed, 149 insertions(+), 99 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i.dts b/arch/arm/boot/dts/imx6dl-cubox-i.dts
index 222c269f687a..4d5bea875ded 100644
--- a/arch/arm/boot/dts/imx6dl-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6dl-cubox-i.dts
@@ -42,6 +42,7 @@
#include "imx6dl.dtsi"
#include "imx6qdl-microsom.dtsi"
+#include "imx6qdl-microsom-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index 1709810de77e..fb16e1dc1e92 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -43,6 +43,7 @@
#include "imx6dl.dtsi"
#include "imx6qdl-microsom.dtsi"
+#include "imx6qdl-microsom-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6q-cubox-i.dts b/arch/arm/boot/dts/imx6q-cubox-i.dts
index 8f39682c33a9..1c1542241e2b 100644
--- a/arch/arm/boot/dts/imx6q-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6q-cubox-i.dts
@@ -42,6 +42,7 @@
#include "imx6q.dtsi"
#include "imx6qdl-microsom.dtsi"
+#include "imx6qdl-microsom-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6q-h100.dts b/arch/arm/boot/dts/imx6q-h100.dts
index bf5dfc9c8127..77d64284b596 100644
--- a/arch/arm/boot/dts/imx6q-h100.dts
+++ b/arch/arm/boot/dts/imx6q-h100.dts
@@ -43,6 +43,7 @@
#include "imx6q.dtsi"
#include "imx6qdl-microsom.dtsi"
+#include "imx6qdl-microsom-brcm.dtsi"
/ {
model = "Auvidea H100";
diff --git a/arch/arm/boot/dts/imx6q-hummingboard.dts b/arch/arm/boot/dts/imx6q-hummingboard.dts
index 6fc692940e6b..131224394ced 100644
--- a/arch/arm/boot/dts/imx6q-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6q-hummingboard.dts
@@ -43,6 +43,7 @@
#include "imx6q.dtsi"
#include "imx6qdl-microsom.dtsi"
+#include "imx6qdl-microsom-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi
new file mode 100644
index 000000000000..809d7896775c
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi
@@ -0,0 +1,144 @@
+/*
+ * Copyright (C) 2013,2014 Russell King
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <dt-bindings/gpio/gpio.h>
+/ {
+ clk_sdio: sdio-clock {
+ compatible = "gpio-gate-clock";
+ #clock-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
+ enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_brcm: brcm-reg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 19 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
+ regulator-name = "brcm_reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <200000>;
+ };
+
+ usdhc1_pwrseq: usdhc1_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
+ <&gpio6 0 GPIO_ACTIVE_LOW>;
+ clocks = <&clk_sdio>;
+ clock-names = "ext_clock";
+ };
+};
+
+&iomuxc {
+ microsom {
+ pinctrl_microsom_brcm_bt: microsom-brcm-bt {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
+ MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
+ MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_brcm_osc: microsom-brcm-osc {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_brcm_reg: microsom-brcm-reg {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
+ MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
+ MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
+ MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
+ >;
+ };
+
+ pinctrl_microsom_uart4: microsom-uart4 {
+ fsl,pins = <
+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
+ >;
+ };
+
+ pinctrl_microsom_usdhc1: microsom-usdhc1 {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
+ >;
+ };
+ };
+};
+
+/* UART4 - Connected to optional BRCM Wifi/BT/FM */
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
+ bus-width = <4>;
+ mmc-pwrseq = <&usdhc1_pwrseq>;
+ keep-power-in-suspend;
+ no-1-8-v;
+ non-removable;
+ vmmc-supply = <®_brcm>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index c1541f2ecf3a..612f626a59c1 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -39,35 +39,6 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
-/ {
- clk_sdio: sdio-clock {
- compatible = "gpio-gate-clock";
- #clock-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
- enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
- };
-
- reg_brcm: brcm-reg {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 19 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
- regulator-name = "brcm_reg";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <200000>;
- };
-
- usdhc1_pwrseq: usdhc1_pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
- <&gpio6 0 GPIO_ACTIVE_LOW>;
- clocks = <&clk_sdio>;
- clock-names = "ext_clock";
- };
-};
&fec {
pinctrl-names = "default";
@@ -80,35 +51,6 @@
&iomuxc {
microsom {
- pinctrl_microsom_brcm_bt: microsom-brcm-bt {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
- MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
- MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
- >;
- };
-
- pinctrl_microsom_brcm_osc: microsom-brcm-osc {
- fsl,pins = <
- MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
- >;
- };
-
- pinctrl_microsom_brcm_reg: microsom-brcm-reg {
- fsl,pins = <
- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
- >;
- };
-
- pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
- fsl,pins = <
- MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
- MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
- MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
- MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
- >;
- };
-
pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
@@ -159,26 +101,6 @@
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
-
- pinctrl_microsom_uart4: microsom-uart4 {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
- MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
- >;
- };
-
- pinctrl_microsom_usdhc1: microsom-usdhc1 {
- fsl,pins = <
- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
- >;
- };
};
};
@@ -187,24 +109,3 @@
pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay";
};
-
-/* UART4 - Connected to optional BRCM Wifi/BT/FM */
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
- uart-has-rtscts;
- status = "okay";
-};
-
-/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
-&usdhc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
- bus-width = <4>;
- mmc-pwrseq = <&usdhc1_pwrseq>;
- keep-power-in-suspend;
- no-1-8-v;
- non-removable;
- vmmc-supply = <®_brcm>;
- status = "okay";
-};
--
2.7.4
--
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^ permalink raw reply related
* [PATCH 03/13] ARM: dts: imx6qdl: SolidRun: move microsom includes into .dts
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
Move the microsom includes into the .dts files so different options can
be accomodated at the lowest level.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6dl-cubox-i.dts | 1 +
arch/arm/boot/dts/imx6dl-hummingboard.dts | 1 +
arch/arm/boot/dts/imx6q-cubox-i.dts | 1 +
arch/arm/boot/dts/imx6q-hummingboard.dts | 1 +
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi | 1 -
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 1 -
6 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-cubox-i.dts b/arch/arm/boot/dts/imx6dl-cubox-i.dts
index f10a36b8647d..222c269f687a 100644
--- a/arch/arm/boot/dts/imx6dl-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6dl-cubox-i.dts
@@ -41,6 +41,7 @@
/dts-v1/;
#include "imx6dl.dtsi"
+#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index 39c2602fa87c..1709810de77e 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -42,6 +42,7 @@
/dts-v1/;
#include "imx6dl.dtsi"
+#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6q-cubox-i.dts b/arch/arm/boot/dts/imx6q-cubox-i.dts
index b68aa0e57f20..8f39682c33a9 100644
--- a/arch/arm/boot/dts/imx6q-cubox-i.dts
+++ b/arch/arm/boot/dts/imx6q-cubox-i.dts
@@ -41,6 +41,7 @@
/dts-v1/;
#include "imx6q.dtsi"
+#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6q-hummingboard.dts b/arch/arm/boot/dts/imx6q-hummingboard.dts
index 69a7a0a1cb21..6fc692940e6b 100644
--- a/arch/arm/boot/dts/imx6q-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6q-hummingboard.dts
@@ -42,6 +42,7 @@
/dts-v1/;
#include "imx6q.dtsi"
+#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index 57ce2dbb6ad9..98ec7ce1f2a3 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -38,7 +38,6 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
-#include "imx6qdl-microsom.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index afd981e9b5e3..84e6392fee1f 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -38,7 +38,6 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
-#include "imx6qdl-microsom.dtsi"
/ {
chosen {
--
2.7.4
--
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^ permalink raw reply related
* [PATCH 02/13] ARM: dts: imx6qdl: SolidRun: move AR8035 into microsom
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
As all SolidRun microsoms are fitted with an AR8035, it's pointless
having the ethernet support as a separate include file. Move the
AR8035 support into the main imx6qdl-microsom file.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6q-h100.dts | 1 -
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi | 1 -
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 1 -
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi | 99 --------------------------
arch/arm/boot/dts/imx6qdl-microsom.dtsi | 53 ++++++++++++++
5 files changed, 53 insertions(+), 102 deletions(-)
delete mode 100644 arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
diff --git a/arch/arm/boot/dts/imx6q-h100.dts b/arch/arm/boot/dts/imx6q-h100.dts
index a3269f57df2b..bf5dfc9c8127 100644
--- a/arch/arm/boot/dts/imx6q-h100.dts
+++ b/arch/arm/boot/dts/imx6q-h100.dts
@@ -43,7 +43,6 @@
#include "imx6q.dtsi"
#include "imx6qdl-microsom.dtsi"
-#include "imx6qdl-microsom-ar8035.dtsi"
/ {
model = "Auvidea H100";
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index b20508237046..57ce2dbb6ad9 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -39,7 +39,6 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx6qdl-microsom.dtsi"
-#include "imx6qdl-microsom-ar8035.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index 0a0a7e4b956b..afd981e9b5e3 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -39,7 +39,6 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx6qdl-microsom.dtsi"
-#include "imx6qdl-microsom-ar8035.dtsi"
/ {
chosen {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
deleted file mode 100644
index 900e8c781f91..000000000000
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (C) 2013,2014 Russell King
- *
- * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
- * MicroSOM.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
- phy-mode = "rgmii";
- phy-reset-duration = <2>;
- phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&iomuxc {
- enet {
- pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
- fsl,pins = <
- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
- /* AR8035 reset */
- MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
- /* AR8035 interrupt */
- MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
- /* GPIO16 -> AR8035 25MHz */
- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
- /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
- /* AR8035 pin strapping: IO voltage: pull up */
- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
- /* AR8035 pin strapping: PHYADDR#0: pull down */
- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
- /* AR8035 pin strapping: PHYADDR#1: pull down */
- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
- /* AR8035 pin strapping: MODE#1: pull up */
- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
- /* AR8035 pin strapping: MODE#3: pull up */
- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
- /* AR8035 pin strapping: MODE#0: pull down */
- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
-
- /*
- * As the RMII pins are also connected to RGMII
- * so that an AR8030 can be placed, set these
- * to high-z with the same pulls as above.
- * Use the GPIO settings to avoid changing the
- * input select registers.
- */
- MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x03000
- MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000
- MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
- >;
- };
- };
-};
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index f7266ae2534c..c1541f2ecf3a 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -69,6 +69,15 @@
};
};
+&fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
+ phy-mode = "rgmii";
+ phy-reset-duration = <2>;
+ phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
&iomuxc {
microsom {
pinctrl_microsom_brcm_bt: microsom-brcm-bt {
@@ -100,6 +109,50 @@
>;
};
+ pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
+ fsl,pins = <
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+ /* AR8035 reset */
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
+ /* AR8035 interrupt */
+ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
+ /* GPIO16 -> AR8035 25MHz */
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
+ /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
+ /* AR8035 pin strapping: IO voltage: pull up */
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
+ /* AR8035 pin strapping: PHYADDR#0: pull down */
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
+ /* AR8035 pin strapping: PHYADDR#1: pull down */
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
+ /* AR8035 pin strapping: MODE#1: pull up */
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
+ /* AR8035 pin strapping: MODE#3: pull up */
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
+ /* AR8035 pin strapping: MODE#0: pull down */
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
+
+ /*
+ * As the RMII pins are also connected to RGMII
+ * so that an AR8030 can be placed, set these
+ * to high-z with the same pulls as above.
+ * Use the GPIO settings to avoid changing the
+ * input select registers.
+ */
+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x03000
+ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
+ >;
+ };
+
pinctrl_microsom_uart1: microsom-uart1 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
--
2.7.4
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^ permalink raw reply related
* [PATCH 01/13] ARM: dts: imx6qdl: SolidRun: remove redundant regulators node
From: Russell King @ 2017-11-27 16:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Jon Nettleton, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127165134.GH31757-l+eeeJia6m9URfEZ8mYm6t73F7V6hmMc@public.gmane.org>
The regulators node is redundant, and serves no useful function.
Remove it from i.MX6 SolidRun platforms.
Signed-off-by: Russell King <rmk+kernel-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>
---
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi | 56 ++++++++++++++---------------
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 56 ++++++++++++++---------------
arch/arm/boot/dts/imx6qdl-microsom.dtsi | 24 ++++++-------
3 files changed, 62 insertions(+), 74 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index 14fff4ee6516..b20508237046 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -64,38 +64,34 @@
};
};
- regulators {
- compatible = "simple-bus";
-
- reg_3p3v: 3p3v {
- compatible = "regulator-fixed";
- regulator-name = "3P3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
- reg_usbh1_vbus: usb-h1-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 0 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>;
- regulator-name = "usb_h1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
+ reg_usbh1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 0 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>;
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
- reg_usbotg_vbus: usb-otg-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 22 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>;
- regulator-name = "usb_otg_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
+ reg_usbotg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 22 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>;
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
};
sound-spdif {
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index 37c07c0748aa..0a0a7e4b956b 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -53,38 +53,34 @@
pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
};
- regulators {
- compatible = "simple-bus";
-
- reg_3p3v: 3p3v {
- compatible = "regulator-fixed";
- regulator-name = "3P3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
+ reg_3p3v: 3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
- reg_usbh1_vbus: usb-h1-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
- regulator-name = "usb_h1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
+ reg_usbh1_vbus: usb-h1-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
+ regulator-name = "usb_h1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
- reg_usbotg_vbus: usb-otg-vbus {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
- regulator-name = "usb_otg_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
+ reg_usbotg_vbus: usb-otg-vbus {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
+ regulator-name = "usb_otg_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
};
sound-sgtl5000 {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index 6a410160c9ee..f7266ae2534c 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -48,20 +48,16 @@
enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
};
- regulators {
- compatible = "simple-bus";
-
- reg_brcm: brcm-reg {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpio3 19 0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
- regulator-name = "brcm_reg";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- startup-delay-us = <200000>;
- };
+ reg_brcm: brcm-reg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio3 19 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
+ regulator-name = "brcm_reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <200000>;
};
usdhc1_pwrseq: usdhc1_pwrseq {
--
2.7.4
--
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^ permalink raw reply related
* [PATCH 00/13] SolidRun Hummingboard DT updates
From: Russell King - ARM Linux @ 2017-11-27 16:51 UTC (permalink / raw)
To: Shawn Guo
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, Fabio Estevam, Jon Nettleton,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Mark Rutland,
Rob Herring, Sascha Hauer
Hi Shawn,
This series updates the SolidRun Hummingboard platforms to:
(a) make the DT more reflective of the schematics
(b) re-organise how we deal with the differences between various board
versions in preparation for the new 1.5 microsom.
The idea with (b) is that we add the support for the board + usom
combination by including the appropriate dtsi files.
For example, in mainline at the moment, we support two variants of the
Hummingboards - both with Broadcom Wi-Fi and without eMMC. Going
forward, when a 1.5 usom is fitted (which modern Hummingboards will all
have) the boards will have TI Wi-Fi and potentially eMMC on the usom.
So, this prepares the ground to support these combinations, and maybe
if I can get agreement from Jon, move forward with Hummingboard2
support.
arch/arm/boot/dts/imx6dl-cubox-i.dts | 2 +
arch/arm/boot/dts/imx6dl-hummingboard.dts | 2 +
arch/arm/boot/dts/imx6q-cubox-i.dts | 2 +
arch/arm/boot/dts/imx6q-h100.dts | 2 +-
arch/arm/boot/dts/imx6q-hummingboard.dts | 2 +
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi | 72 +++++------
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 103 +++++++++------
arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi | 99 --------------
arch/arm/boot/dts/imx6qdl-microsom-brcm.dtsi | 144 +++++++++++++++++++++
arch/arm/boot/dts/imx6qdl-microsom-emmc.dtsi | 70 ++++++++++
arch/arm/boot/dts/imx6qdl-microsom-ti.dtsi | 170 +++++++++++++++++++++++++
arch/arm/boot/dts/imx6qdl-microsom.dtsi | 148 ++++++++-------------
12 files changed, 548 insertions(+), 268 deletions(-)
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 8.8Mbps down 630kbps up
According to speedtest.net: 8.21Mbps down 510kbps up
--
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^ permalink raw reply
* Re: [PATCH v2 1/2] hwmon: (jc42) optionally try to disable the SMBUS timeout
From: Guenter Roeck @ 2017-11-27 16:48 UTC (permalink / raw)
To: Peter Rosin
Cc: linux-kernel, Rob Herring, Mark Rutland, Nicolas Ferre,
Alexandre Belloni, Russell King, Jean Delvare, Ludovic Desroches,
devicetree, linux-arm-kernel, linux-hwmon
In-Reply-To: <20171127163101.27859-2-peda@axentia.se>
On Mon, Nov 27, 2017 at 05:31:00PM +0100, Peter Rosin wrote:
> With a nxp,se97 chip on an atmel sama5d31 board, the I2C adapter driver
> is not always capable of avoiding the 25-35 ms timeout as specified by
> the SMBUS protocol. This may cause silent corruption of the last bit of
> any transfer, e.g. a one is read instead of a zero if the sensor chip
> times out. This also affects the eeprom half of the nxp-se97 chip, where
> this silent corruption was originally noticed. Other I2C adapters probably
> suffer similar issues, e.g. bit-banging comes to mind as risky...
>
> The SMBUS register in the nxp chip is not a standard Jedec register, but
> it is not special to the nxp chips either, at least the atmel chips
> have the same mechanism. Therefore, do not special case this on the
> manufacturer, it is opt-in via the device property anyway.
>
> Signed-off-by: Peter Rosin <peda@axentia.se>
Looks ok to me. I'll apply after Rob's approval.
Guenter
> ---
> Documentation/devicetree/bindings/hwmon/jc42.txt | 4 ++++
> drivers/hwmon/jc42.c | 21 +++++++++++++++++++++
> 2 files changed, 25 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/hwmon/jc42.txt b/Documentation/devicetree/bindings/hwmon/jc42.txt
> index 07a250498fbb..f569db58f64a 100644
> --- a/Documentation/devicetree/bindings/hwmon/jc42.txt
> +++ b/Documentation/devicetree/bindings/hwmon/jc42.txt
> @@ -34,6 +34,10 @@ Required properties:
>
> - reg: I2C address
>
> +Optional properties:
> +- smbus-timeout-disable: When set, the smbus timeout function will be disabled.
> + This is not supported on all chips.
> +
> Example:
>
> temp-sensor@1a {
> diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c
> index 5f11dc014ed6..e5234f953a6d 100644
> --- a/drivers/hwmon/jc42.c
> +++ b/drivers/hwmon/jc42.c
> @@ -22,6 +22,7 @@
> * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> */
>
> +#include <linux/bitops.h>
> #include <linux/module.h>
> #include <linux/init.h>
> #include <linux/slab.h>
> @@ -45,6 +46,7 @@ static const unsigned short normal_i2c[] = {
> #define JC42_REG_TEMP 0x05
> #define JC42_REG_MANID 0x06
> #define JC42_REG_DEVICEID 0x07
> +#define JC42_REG_SMBUS 0x22 /* NXP and Atmel, possibly others? */
>
> /* Status bits in temperature register */
> #define JC42_ALARM_CRIT_BIT 15
> @@ -75,6 +77,9 @@ static const unsigned short normal_i2c[] = {
> #define GT_MANID 0x1c68 /* Giantec */
> #define GT_MANID2 0x132d /* Giantec, 2nd mfg ID */
>
> +/* SMBUS register */
> +#define SMBUS_STMOUT BIT(7) /* SMBus time-out, active low */
> +
> /* Supported chips */
>
> /* Analog Devices */
> @@ -495,6 +500,22 @@ static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
>
> data->extended = !!(cap & JC42_CAP_RANGE);
>
> + if (device_property_read_bool(dev, "smbus-timeout-disable")) {
> + int smbus;
> +
> + /*
> + * Not all chips support this register, but from a
> + * quick read of various datasheets no chip appears
> + * incompatible with the below attempt to disable
> + * the timeout. And the whole thing is opt-in...
> + */
> + smbus = i2c_smbus_read_word_swapped(client, JC42_REG_SMBUS);
> + if (smbus < 0)
> + return smbus;
> + i2c_smbus_write_word_swapped(client, JC42_REG_SMBUS,
> + smbus | SMBUS_STMOUT);
> + }
> +
> config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
> if (config < 0)
> return config;
> --
> 2.11.0
>
^ permalink raw reply
* [PATCH v2 2/2] ARM: dts: at91: disable the nxp,se97b SMBUS timeout on the TSE-850
From: Peter Rosin @ 2017-11-27 16:31 UTC (permalink / raw)
To: linux-kernel
Cc: Peter Rosin, Rob Herring, Mark Rutland, Nicolas Ferre,
Alexandre Belloni, Russell King, Guenter Roeck, Jean Delvare,
Ludovic Desroches, devicetree, linux-arm-kernel, linux-hwmon
In-Reply-To: <20171127163101.27859-1-peda@axentia.se>
The I2C adapter driver is sometimes slow, causing the SCL line to
be stuck low for more than the stipulated SMBUS timeout of 25-35 ms.
This causes the client device to give up which in turn causes silent
corruption of data. So, disable the SMBUS timeout in the client device.
Signed-off-by: Peter Rosin <peda@axentia.se>
---
arch/arm/boot/dts/at91-tse850-3.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/at91-tse850-3.dts b/arch/arm/boot/dts/at91-tse850-3.dts
index 5f29010cdbd8..9b82cc8843e1 100644
--- a/arch/arm/boot/dts/at91-tse850-3.dts
+++ b/arch/arm/boot/dts/at91-tse850-3.dts
@@ -221,6 +221,7 @@
jc42@18 {
compatible = "nxp,se97b", "jedec,jc-42.4-temp";
reg = <0x18>;
+ smbus-timeout-disable;
};
dpot: mcp4651-104@28 {
--
2.11.0
^ permalink raw reply related
* [PATCH v2 1/2] hwmon: (jc42) optionally try to disable the SMBUS timeout
From: Peter Rosin @ 2017-11-27 16:31 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Peter Rosin, Rob Herring, Mark Rutland, Nicolas Ferre,
Alexandre Belloni, Russell King, Guenter Roeck, Jean Delvare,
Ludovic Desroches, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-hwmon-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171127163101.27859-1-peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
With a nxp,se97 chip on an atmel sama5d31 board, the I2C adapter driver
is not always capable of avoiding the 25-35 ms timeout as specified by
the SMBUS protocol. This may cause silent corruption of the last bit of
any transfer, e.g. a one is read instead of a zero if the sensor chip
times out. This also affects the eeprom half of the nxp-se97 chip, where
this silent corruption was originally noticed. Other I2C adapters probably
suffer similar issues, e.g. bit-banging comes to mind as risky...
The SMBUS register in the nxp chip is not a standard Jedec register, but
it is not special to the nxp chips either, at least the atmel chips
have the same mechanism. Therefore, do not special case this on the
manufacturer, it is opt-in via the device property anyway.
Signed-off-by: Peter Rosin <peda-koto5C5qi+TLoDKTGw+V6w@public.gmane.org>
---
Documentation/devicetree/bindings/hwmon/jc42.txt | 4 ++++
drivers/hwmon/jc42.c | 21 +++++++++++++++++++++
2 files changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/hwmon/jc42.txt b/Documentation/devicetree/bindings/hwmon/jc42.txt
index 07a250498fbb..f569db58f64a 100644
--- a/Documentation/devicetree/bindings/hwmon/jc42.txt
+++ b/Documentation/devicetree/bindings/hwmon/jc42.txt
@@ -34,6 +34,10 @@ Required properties:
- reg: I2C address
+Optional properties:
+- smbus-timeout-disable: When set, the smbus timeout function will be disabled.
+ This is not supported on all chips.
+
Example:
temp-sensor@1a {
diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c
index 5f11dc014ed6..e5234f953a6d 100644
--- a/drivers/hwmon/jc42.c
+++ b/drivers/hwmon/jc42.c
@@ -22,6 +22,7 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
+#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
@@ -45,6 +46,7 @@ static const unsigned short normal_i2c[] = {
#define JC42_REG_TEMP 0x05
#define JC42_REG_MANID 0x06
#define JC42_REG_DEVICEID 0x07
+#define JC42_REG_SMBUS 0x22 /* NXP and Atmel, possibly others? */
/* Status bits in temperature register */
#define JC42_ALARM_CRIT_BIT 15
@@ -75,6 +77,9 @@ static const unsigned short normal_i2c[] = {
#define GT_MANID 0x1c68 /* Giantec */
#define GT_MANID2 0x132d /* Giantec, 2nd mfg ID */
+/* SMBUS register */
+#define SMBUS_STMOUT BIT(7) /* SMBus time-out, active low */
+
/* Supported chips */
/* Analog Devices */
@@ -495,6 +500,22 @@ static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
data->extended = !!(cap & JC42_CAP_RANGE);
+ if (device_property_read_bool(dev, "smbus-timeout-disable")) {
+ int smbus;
+
+ /*
+ * Not all chips support this register, but from a
+ * quick read of various datasheets no chip appears
+ * incompatible with the below attempt to disable
+ * the timeout. And the whole thing is opt-in...
+ */
+ smbus = i2c_smbus_read_word_swapped(client, JC42_REG_SMBUS);
+ if (smbus < 0)
+ return smbus;
+ i2c_smbus_write_word_swapped(client, JC42_REG_SMBUS,
+ smbus | SMBUS_STMOUT);
+ }
+
config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
if (config < 0)
return config;
--
2.11.0
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^ permalink raw reply related
* [PATCH v2 0/2] Sluggish AT91 I2C driver causes SMBus timeouts
From: Peter Rosin @ 2017-11-27 16:30 UTC (permalink / raw)
To: linux-kernel
Cc: Peter Rosin, Rob Herring, Mark Rutland, Nicolas Ferre,
Alexandre Belloni, Russell King, Guenter Roeck, Jean Delvare,
Ludovic Desroches, devicetree, linux-arm-kernel, linux-hwmon
Hi!
[I was waiting for a comment from Rob for the initial submission,
but that never came and I nearly forgot. Instead of pinging again,
I'm resubmitting with the review comment from Guenter fixed, hoping
that Rob will react this time.]
This is a workaround for a problem in the AT91 I2C adapter driver
(or perhaps the hardware?) when it drives the TWI peripheral on an
Atmel sama5d3 chip as I2C.
Apparently, that driver can delay in excess of 100 ms just after
the transfer of the 7th bit of the last byte. When it does this
the I2C bus, when viewed from SMBUS client devices, appears
stuck with SCL low. Some SMBUS devices times out under these
conditions, in particular temperature sensors. The I2C adapter
driver does however not notice the timeout, and thinks the transfer
completed successfully when it finally desides to finish the
transaction. When this happens, the 8th bit of the last byte is
always set, and thus quite possibly corrupted.
The chip this was observed with (an nxp SE97) has a means to disable
the SMBUS timeout detector, which "fixes" things. Do that.
This should probably go to stable?
Previous discussion: https://lkml.org/lkml/2017/10/12/227
Changes since v1: https://lkml.org/lkml/2017/10/13/184
- Added #include of bitops.h
- Rebased to v4.15-rc1
Cheers,
Peter
Peter Rosin (2):
hwmon: (jc42) optionally try to disable the SMBUS timeout
ARM: dts: at91: disable the nxp,se97b SMBUS timeout on the TSE-850
Documentation/devicetree/bindings/hwmon/jc42.txt | 4 ++++
arch/arm/boot/dts/at91-tse850-3.dts | 1 +
drivers/hwmon/jc42.c | 21 +++++++++++++++++++++
3 files changed, 26 insertions(+)
--
2.11.0
^ permalink raw reply
* Re: [PATCH v3] ARM: dts: imx6qdl-nitrogen6x: Add SPI NOR partitions
From: Fabio Estevam @ 2017-11-27 16:17 UTC (permalink / raw)
To: Otavio Salvador
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel, Russell King, Gary Bisson, Rob Herring,
Sascha Hauer, Fabio Estevam, Shawn Guo
In-Reply-To: <20171127133127.16985-1-otavio-fKevB0iiKLMBZ+LybsDmbA@public.gmane.org>
On Mon, Nov 27, 2017 at 11:31 AM, Otavio Salvador
<otavio-fKevB0iiKLMBZ+LybsDmbA@public.gmane.org> wrote:
> This adds the partitions definition for the SPI NOR to provide
> backward compatibility with the documented[1] layout used with
> Boundary Devices BSP.
>
> 1. https://boundarydevices.com/boot-flash-access-linux/
>
> It exports to Linux:
>
> mtd0: bootloader
> mtd1: env
> mtd2: splash
>
> Signed-off-by: Otavio Salvador <otavio-fKevB0iiKLMBZ+LybsDmbA@public.gmane.org>
Has this been tested? I mean, have you tested the locking mechanism is
really working in this SPI NOR flash?
As far as I can see the SPI locking mechanism does not need device
tree properties.
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^ permalink raw reply
* Re: [PATCH v2 11/35] nds32: Device specific operations
From: Arnd Bergmann @ 2017-11-27 14:51 UTC (permalink / raw)
To: Greentime Hu
Cc: Greentime, Linux Kernel Mailing List, linux-arch, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Rob Herring, Networking, Vincent Chen,
DTML, Al Viro, David Howells, Will Deacon, Daniel Lezcano,
linux-serial, Vincent Chen
In-Reply-To: <ab110d0eaa525b07b1790d67bbb020046fb78792.1511785528.git.green.hu@gmail.com>
On Mon, Nov 27, 2017 at 1:27 PM, Greentime Hu <green.hu@gmail.com> wrote:
> From: Greentime Hu <greentime@andestech.com>
>
> This patch introduces ioremap implementations.
>
> Signed-off-by: Vincent Chen <vincentc@andestech.com>
> Signed-off-by: Greentime Hu <greentime@andestech.com>
> ---
> arch/nds32/include/asm/io.h | 25 +++++++++++++++
> arch/nds32/mm/ioremap.c | 75 +++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 100 insertions(+)
> create mode 100644 arch/nds32/include/asm/io.h
> create mode 100644 arch/nds32/mm/ioremap.c
>
> diff --git a/arch/nds32/include/asm/io.h b/arch/nds32/include/asm/io.h
> new file mode 100644
> index 0000000..b83dea1
> --- /dev/null
> +++ b/arch/nds32/include/asm/io.h
> @@ -0,0 +1,25 @@
> +#ifndef __ASM_NDS32_IO_H
> +#define __ASM_NDS32_IO_H
> +
> +#ifdef __KERNEL__
> +void iounmap(void __iomem * addr);
> +#include <asm-generic/io.h>
> +
> +#endif /* __KERNEL__ */
> +#endif /* __ASM_NDS32_IO_H */
Here, you should define a lot of the I/O accessor functions,
dereferencing a pointer
is generally not enough to guarantee an atomic MMIO operation. You need to
force the access to use the correct size to prevent the compiler from issuing
byte-sized operations when it thinks the pointer might be unaligned, and
there should be barriers that ensure a memory access is synchronized with
a DMA that might be triggered by a writel, or claimed to be completed after
a readl. Please see the risc-v header for this, it has many good explanations.
Arnd
^ permalink raw reply
* [PATCH 2/2] of: unittest: Remove bogus overlay mutex release from overlay_data_add()
From: Geert Uytterhoeven @ 2017-11-27 14:46 UTC (permalink / raw)
To: Pantelis Antoniou, Rob Herring, Frank Rowand
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
In-Reply-To: <1511793987-315-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
overlay_data_add() never takes the special overlay mutex, so it must not
be released in the error patch.
Presumably the call to of_overlay_mutex_unlock() is a relic from v1 of
the patch.
Fixes: f948d6d8b792bb90 ("of: overlay: avoid race condition between applying multiple overlays")
Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
drivers/of/unittest.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index e568b1e82501b832..0f8052f1355c0c09 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -2165,7 +2165,6 @@ static int __init overlay_data_add(int onum)
ret = of_overlay_apply(info->np_overlay, &info->overlay_id);
if (ret < 0) {
pr_err("of_overlay_apply() (ret=%d), %d\n", ret, onum);
- of_overlay_mutex_unlock();
goto out_free_np_overlay;
}
--
2.7.4
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^ permalink raw reply related
* [PATCH 1/2] of: overlay: Fix cleanup order in of_overlay_apply()
From: Geert Uytterhoeven @ 2017-11-27 14:46 UTC (permalink / raw)
To: Pantelis Antoniou, Rob Herring, Frank Rowand
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
In-Reply-To: <1511793987-315-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
The special overlay mutex is taken first, hence it should be released
last in the error path.
Fixes: f948d6d8b792bb90 ("of: overlay: avoid race condition between applying multiple overlays")
Signed-off-by: Geert Uytterhoeven <geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
---
drivers/of/overlay.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c
index c150abb9049d776d..3b7a3980ff50d6bf 100644
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
@@ -760,14 +760,14 @@ int of_overlay_apply(struct device_node *tree, int *ovcs_id)
goto out;
-err_overlay_unlock:
- of_overlay_mutex_unlock();
-
err_free_overlay_changeset:
free_overlay_changeset(ovcs);
mutex_unlock(&of_mutex);
+err_overlay_unlock:
+ of_overlay_mutex_unlock();
+
out:
pr_debug("%s() err=%d\n", __func__, ret);
--
2.7.4
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^ permalink raw reply related
* [PATCH 0/2] of: overlay locking fixes
From: Geert Uytterhoeven @ 2017-11-27 14:46 UTC (permalink / raw)
To: Pantelis Antoniou, Rob Herring, Frank Rowand
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, Geert Uytterhoeven
Hi Pantelis, Rob, Frank,
Here are two locking fixes for OF overlays, found by code inspection.
They were compile-tested only, as I'm still working on getting "real"
(configfs) overlays working again in v4.15-rc1...
Geert Uytterhoeven (2):
of: overlay: Fix cleanup order in of_overlay_apply()
of: unittest: Remove bogus overlay mutex release from
overlay_data_add()
drivers/of/overlay.c | 6 +++---
drivers/of/unittest.c | 1 -
2 files changed, 3 insertions(+), 4 deletions(-)
--
2.7.4
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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^ permalink raw reply
* Re: [PATCH v2 14/35] nds32: System calls handling
From: Arnd Bergmann @ 2017-11-27 14:46 UTC (permalink / raw)
To: Greentime Hu
Cc: Greentime, Linux Kernel Mailing List, linux-arch, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Rob Herring, Networking, Vincent Chen,
DTML, Al Viro, David Howells, Will Deacon, Daniel Lezcano,
linux-serial, Vincent Chen
In-Reply-To: <ee45d9c7b0388c87a93a26484e859001477eb3a2.1511785528.git.green.hu@gmail.com>
On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu <green.hu@gmail.com> wrote:
> diff --git a/arch/nds32/include/asm/syscalls.h b/arch/nds32/include/asm/syscalls.h
> new file mode 100644
> index 0000000..741ccdc
> --- /dev/null
> +++ b/arch/nds32/include/asm/syscalls.h
> @@ -0,0 +1,27 @@
> +/*
> + * Copyright (C) 2005-2017 Andes Technology Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef __ASM_NDS32_SYSCALLS_H
> +#define __ASM_NDS32_SYSCALLS_H
> +
> +int sys_cacheflush(unsigned long addr, unsigned long len, unsigned int op);
> +long sys_fadvise64_64_wrapper(int fd, int advice, loff_t offset, loff_t len);
> +asmlinkage int sys_syscall(void);
> +asmlinkage int sys_rt_sigreturn_wrapper(void);
You mentioned that sys_syscall() should be removed in this version.
By convention, all syscall declarations should start with 'asmlinkage long',
even though this has no effect in your architecture.
> diff --git a/arch/nds32/include/uapi/asm/unistd.h b/arch/nds32/include/uapi/asm/unistd.h
> new file mode 100644
> index 0000000..2bad1e7
> --- /dev/null
> +++ b/arch/nds32/include/uapi/asm/unistd.h
> +
> +#define __ARCH_WANT_RENAMEAT
> +#define __ARCH_WANT_SYSCALL_OFF_T
These two should not be here.
> +#define __ARCH_WANT_SYNC_FILE_RANGE2
This one is fine though
> +/* Use the standard ABI for syscalls */
> +#include <asm-generic/unistd.h>
> +
> +__SYSCALL(__NR_fadvise64_64, sys_fadvise64_64_wrapper)
> +__SYSCALL(__NR_rt_sigreturn, sys_rt_sigreturn_wrapper)
I think you are overriding the array assignment here, this may cause a
compiler warning when building with "make C=1 V=1" since you have
the same index assigned to two pointers. A better way to do this
is to override the name:
#define sys_rt_sigreturn sys_rt_sigreturn_wrapper
#define sys_fadvise64_64 sys_fadvise64_64_wrapper
#include <asm-generic/unistd.h>
Arnd
^ permalink raw reply
* Re: [PATCH v2 16/35] nds32: Signal handling support
From: Arnd Bergmann @ 2017-11-27 14:37 UTC (permalink / raw)
To: Greentime Hu
Cc: Greentime, Linux Kernel Mailing List, linux-arch, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Rob Herring, Networking, Vincent Chen,
DTML, Al Viro, David Howells, Will Deacon, Daniel Lezcano,
linux-serial-u79uwXL29TY76Z2rM5mHXA, Vincent Chen
In-Reply-To: <21cfd623872d4377ba5064cb7302bff49ebf917e.1511785528.git.green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu <green.hu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> +#ifndef _ASMNDS32_SIGNAL_H
> +#define _ASMNDS32_SIGNAL_H
> +
> +#define SA_RESTORER 0x04000000
> +
> +#include <asm-generic/signal.h>
> +#endif
As documented in asm-generic/signal.h, new architectures should not define
SA_RESTORER.
Arnd
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^ permalink raw reply
* Re: [PATCH v2 18/35] nds32: Debugging support
From: Arnd Bergmann @ 2017-11-27 14:34 UTC (permalink / raw)
To: Greentime Hu
Cc: Greentime, Linux Kernel Mailing List, linux-arch, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Rob Herring, Networking, Vincent Chen,
DTML, Al Viro, David Howells, Will Deacon, Daniel Lezcano,
linux-serial, Vincent Chen
In-Reply-To: <01fc485408504e6a43b768664f44b9fd42a89503.1511785528.git.green.hu@gmail.com>
On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu <green.hu@gmail.com> wrote:
> +struct user_pt_regs {
> + long uregs[26];
> + long fp;
> + long gp;
> + long lp;
> + long sp;
> + long ipc;
> +#if defined(CONFIG_HWZOL)
> + long lb;
> + long le;
> + long lc;
> +#else
> + long dummy[3];
> +#endif
> + long syscallno;
> +};
You cannot reference CONFIG_ symbols in a uapi header, since the
configuration headers
are not available.
Arnd
^ permalink raw reply
* Re: [PATCH v2 19/35] nds32: L2 cache support
From: Arnd Bergmann @ 2017-11-27 14:33 UTC (permalink / raw)
To: Greentime Hu
Cc: Greentime, Linux Kernel Mailing List, linux-arch, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Rob Herring, Networking, Vincent Chen,
DTML, Al Viro, David Howells, Will Deacon, Daniel Lezcano,
linux-serial, Vincent Chen
In-Reply-To: <380808fe9139e2c3800ae76dfa6aa5cbbbc4894f.1511785528.git.green.hu@gmail.com>
On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu <green.hu@gmail.com> wrote:
> +
> +#define L2C_R_REG(offset) __raw_readl(atl2c_base + offset)
> +#define L2C_W_REG(offset, value) __raw_writel(value, atl2c_base + offset)
__raw_readl() is generally not endian-safe, and might not have the barriers you
require here. Could you use readl/writel here, and only fall back to
readl_relaxed()/writel_relaxed() when you absolutely must avoid the barriers?
> diff --git a/arch/nds32/kernel/atl2c.c b/arch/nds32/kernel/atl2c.c
> new file mode 100644
> index 0000000..dd87fc9
> --- /dev/null
> +++ b/arch/nds32/kernel/atl2c.c
> +#include <linux/compiler.h>
> +#include <linux/of_address.h>
> +#include <linux/of_fdt.h>
> +#include <linux/of_platform.h>
> +#include <asm/l2_cache.h>
If this is the only file that includes asm/l2_cache.h, then I'd simply
move the entire
contents in here, rather than having a separate file in the global namespace.
Arnd
^ permalink raw reply
* Re: [PATCH v2 22/35] nds32: Device tree support
From: Arnd Bergmann @ 2017-11-27 14:30 UTC (permalink / raw)
To: Greentime Hu
Cc: Greentime, Linux Kernel Mailing List, linux-arch, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Rob Herring, Networking, Vincent Chen,
DTML, Al Viro, David Howells, Will Deacon, Daniel Lezcano,
linux-serial, Vincent Chen
In-Reply-To: <1055af0e8b98571b4461d6f899d043fe7f17408b.1511785528.git.green.hu@gmail.com>
On Mon, Nov 27, 2017 at 1:28 PM, Greentime Hu <green.hu@gmail.com> wrote:
> @@ -0,0 +1,55 @@
> +/dts-v1/;
> +/ {
> + compatible = "nds32 ae3xx";
The compatible string doesn't seem to match the binding, it should always have
vendor prefix.
> + #address-cells = <1>;
> + #size-cells = <1>;
> + interrupt-parent = <&intc>;
> +
> + chosen {
> + bootargs = "earlycon console=ttyS0,38400n8 debug loglevel=7";
> + stdout-path = &serial0;
> + };
I would drop the bootargs here, this is something that should be set by the
bootloader and is up to the user.
Arnd
^ permalink raw reply
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