* [PATCH 09/25] arm: nspire: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Florian Fainelli,
Ray Jui, Scott Branden, bcm-kernel-feedback-list, Jon Mason,
Sekhar Nori, Kevin Hilman, Kukjin Kim, Krzysztof Kozlowski,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Vladimir Zapolskiy, Sylvain Lemieux, Matthias Brugger, Barry Song,
Heiko Stuebner, Dinh Nguyen, Viresh Kumar, Shiraz Hashim,
Maxime Coquelin, Alexandre Torgue, Jun Nie, Baoyou Xie,
linux-omap, devicetree, linux-arm-kernel, linux-kernel,
linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/nspire-classic.dtsi | 2 +-
arch/arm/boot/dts/nspire-cx.dts | 2 +-
arch/arm/boot/dts/nspire.dtsi | 28 ++++++++++++++--------------
3 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/nspire-classic.dtsi b/arch/arm/boot/dts/nspire-classic.dtsi
index 4907c5085d4b..84db1986001c 100644
--- a/arch/arm/boot/dts/nspire-classic.dtsi
+++ b/arch/arm/boot/dts/nspire-classic.dtsi
@@ -66,7 +66,7 @@
#address-cells = <1>;
#size-cells = <1>;
- intc: interrupt-controller@DC000000 {
+ intc: interrupt-controller@dc000000 {
compatible = "lsi,zevio-intc";
interrupt-controller;
reg = <0xDC000000 0x1000>;
diff --git a/arch/arm/boot/dts/nspire-cx.dts b/arch/arm/boot/dts/nspire-cx.dts
index 08e0b81b3385..bf58fe095f19 100644
--- a/arch/arm/boot/dts/nspire-cx.dts
+++ b/arch/arm/boot/dts/nspire-cx.dts
@@ -92,7 +92,7 @@
#address-cells = <1>;
#size-cells = <1>;
- intc: interrupt-controller@DC000000 {
+ intc: interrupt-controller@dc000000 {
compatible = "arm,pl190-vic";
interrupt-controller;
reg = <0xDC000000 0x1000>;
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi
index 1a5ae4cd107f..88b9126fad9f 100644
--- a/arch/arm/boot/dts/nspire.dtsi
+++ b/arch/arm/boot/dts/nspire.dtsi
@@ -24,7 +24,7 @@
reg = <0x00000000 0x80000>;
};
- sram: sram@A4000000 {
+ sram: sram@a4000000 {
device = "memory";
reg = <0xA4000000 0x20000>;
};
@@ -75,11 +75,11 @@
#size-cells = <1>;
ranges;
- spi: spi@A9000000 {
+ spi: spi@a9000000 {
reg = <0xA9000000 0x1000>;
};
- usb0: usb@B0000000 {
+ usb0: usb@b0000000 {
compatible = "lsi,zevio-usb";
reg = <0xB0000000 0x1000>;
interrupts = <8>;
@@ -88,13 +88,13 @@
vbus-supply = <&vbus_reg>;
};
- usb1: usb@B4000000 {
+ usb1: usb@b4000000 {
reg = <0xB4000000 0x1000>;
interrupts = <9>;
status = "disabled";
};
- lcd: lcd@C0000000 {
+ lcd: lcd@c0000000 {
compatible = "arm,pl111", "arm,primecell";
reg = <0xC0000000 0x1000>;
interrupts = <21>;
@@ -103,16 +103,16 @@
clock-names = "apb_pclk";
};
- adc: adc@C4000000 {
+ adc: adc@c4000000 {
reg = <0xC4000000 0x1000>;
interrupts = <11>;
};
- tdes: crypto@C8010000 {
+ tdes: crypto@c8010000 {
reg = <0xC8010000 0x1000>;
};
- sha256: crypto@CC000000 {
+ sha256: crypto@cc000000 {
reg = <0xCC000000 0x1000>;
};
@@ -141,13 +141,13 @@
interrupts = <1>;
};
- timer0: timer@900C0000 {
+ timer0: timer@900c0000 {
reg = <0x900C0000 0x1000>;
clocks = <&timer_clk>;
};
- timer1: timer@900D0000 {
+ timer1: timer@900d0000 {
reg = <0x900D0000 0x1000>;
interrupts = <19>;
@@ -165,16 +165,16 @@
interrupts = <4>;
};
- misc: misc@900A0000 {
+ misc: misc@900a0000 {
reg = <0x900A0000 0x1000>;
};
- pwr: pwr@900B0000 {
+ pwr: pwr@900b0000 {
reg = <0x900B0000 0x1000>;
interrupts = <15>;
};
- keypad: input@900E0000 {
+ keypad: input@900e0000 {
compatible = "ti,nspire-keypad";
reg = <0x900E0000 0x1000>;
interrupts = <16>;
@@ -185,7 +185,7 @@
clocks = <&apb_pclk>;
};
- contrast: contrast@900F0000 {
+ contrast: contrast@900f0000 {
reg = <0x900F0000 0x1000>;
};
--
2.11.0
^ permalink raw reply related
* [PATCH 08/25] arm: lpc32: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Ray Jui,
Scott Branden, Jon Mason, bcm-kernel-feedback-list,
Florian Fainelli, Sekhar Nori, Kevin Hilman, Kukjin Kim,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, Fabio Estevam,
Santosh Shilimkar, Jason Cooper, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Vladimir Zapolskiy, Sylvain Lemieux,
Matthias Brugger, Barry Song, Heiko Stuebner, Dinh Nguyen,
Viresh Kumar, Shiraz Hashim, Maxime Coquelin, Alexandre Torgue,
Jun Nie, Baoyou Xie, linux-omap, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/lpc32xx.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index abff7ef7c9cd..4981741377f3 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -230,7 +230,7 @@
status = "disabled";
};
- i2s1: i2s@2009C000 {
+ i2s1: i2s@2009c000 {
compatible = "nxp,lpc3220-i2s";
reg = <0x2009C000 0x1000>;
};
@@ -273,7 +273,7 @@
status = "disabled";
};
- i2c1: i2c@400A0000 {
+ i2c1: i2c@400a0000 {
compatible = "nxp,pnx-i2c";
reg = <0x400A0000 0x100>;
interrupt-parent = <&sic1>;
@@ -284,7 +284,7 @@
clocks = <&clk LPC32XX_CLK_I2C1>;
};
- i2c2: i2c@400A8000 {
+ i2c2: i2c@400a8000 {
compatible = "nxp,pnx-i2c";
reg = <0x400A8000 0x100>;
interrupt-parent = <&sic1>;
@@ -295,7 +295,7 @@
clocks = <&clk LPC32XX_CLK_I2C2>;
};
- mpwm: mpwm@400E8000 {
+ mpwm: mpwm@400e8000 {
compatible = "nxp,lpc3220-motor-pwm";
reg = <0x400E8000 0x78>;
status = "disabled";
@@ -394,7 +394,7 @@
#gpio-cells = <3>; /* bank, pin, flags */
};
- timer4: timer@4002C000 {
+ timer4: timer@4002c000 {
compatible = "nxp,lpc3220-timer";
reg = <0x4002C000 0x1000>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
@@ -412,7 +412,7 @@
status = "disabled";
};
- watchdog: watchdog@4003C000 {
+ watchdog: watchdog@4003c000 {
compatible = "nxp,pnx4008-wdt";
reg = <0x4003C000 0x1000>;
clocks = <&clk LPC32XX_CLK_WDOG>;
@@ -451,7 +451,7 @@
status = "disabled";
};
- timer1: timer@4004C000 {
+ timer1: timer@4004c000 {
compatible = "nxp,lpc3220-timer";
reg = <0x4004C000 0x1000>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
@@ -475,7 +475,7 @@
status = "disabled";
};
- pwm1: pwm@4005C000 {
+ pwm1: pwm@4005c000 {
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C000 0x4>;
clocks = <&clk LPC32XX_CLK_PWM1>;
@@ -484,7 +484,7 @@
status = "disabled";
};
- pwm2: pwm@4005C004 {
+ pwm2: pwm@4005c004 {
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C004 0x4>;
clocks = <&clk LPC32XX_CLK_PWM2>;
--
2.11.0
^ permalink raw reply related
* [PATCH 07/25] arm: keystone: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Florian Fainelli,
Ray Jui, Scott Branden, bcm-kernel-feedback-list, Jon Mason,
Sekhar Nori, Kevin Hilman, Kukjin Kim, Krzysztof Kozlowski,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Vladimir Zapolskiy, Sylvain Lemieux, Matthias Brugger, Barry Song,
Heiko Stuebner, Dinh Nguyen, Viresh Kumar, Shiraz Hashim,
Maxime Coquelin, Alexandre Torgue, Jun Nie, Baoyou Xie,
linux-omap, devicetree, linux-arm-kernel, linux-kernel,
linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/keystone-k2e-netcp.dtsi | 2 +-
arch/arm/boot/dts/keystone-k2hk-netcp.dtsi | 2 +-
arch/arm/boot/dts/keystone-k2l-netcp.dtsi | 2 +-
arch/arm/boot/dts/keystone.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
index ba828cb59587..940b64935bde 100644
--- a/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e-netcp.dtsi
@@ -98,7 +98,7 @@ qmss: qmss@2a40000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
- pdsp0@0x2a10000 {
+ pdsp0@2a10000 {
reg = <0x2a10000 0x1000 /*iram */
0x2a0f000 0x100 /*reg*/
0x2a0c000 0x3c8 /*intd */
diff --git a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
index a5ac845464bf..ed7287a274a0 100644
--- a/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2hk-netcp.dtsi
@@ -115,7 +115,7 @@ qmss: qmss@2a40000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
- pdsp0@0x2a10000 {
+ pdsp0@2a10000 {
reg = <0x2a10000 0x1000 /*iram */
0x2a0f000 0x100 /*reg*/
0x2a0c000 0x3c8 /*intd */
diff --git a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
index 66f615a74118..b6af5f78e498 100644
--- a/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
+++ b/arch/arm/boot/dts/keystone-k2l-netcp.dtsi
@@ -97,7 +97,7 @@ qmss: qmss@2a40000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
- pdsp0@0x2a10000 {
+ pdsp0@2a10000 {
reg = <0x2a10000 0x1000 /*iram */
0x2a0f000 0x100 /*reg*/
0x2a0c000 0x3c8 /*intd */
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 06e10544f9b1..f8ecbe504182 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -271,7 +271,7 @@
ti,davinci-gpio-unbanked = <32>;
};
- aemif: aemif@21000A00 {
+ aemif: aemif@21000a00 {
compatible = "ti,keystone-aemif", "ti,davinci-aemif";
#address-cells = <2>;
#size-cells = <1>;
--
2.11.0
^ permalink raw reply related
* [PATCH 06/25] arm: integrator: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Florian Fainelli,
Ray Jui, Scott Branden, bcm-kernel-feedback-list, Jon Mason,
Sekhar Nori, Kevin Hilman, Kukjin Kim, Krzysztof Kozlowski,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Vladimir Zapolskiy, Sylvain Lemieux, Matthias Brugger, Barry Song,
Heiko Stuebner, Dinh Nguyen, Viresh Kumar, Shiraz Hashim,
Maxime Coquelin, Alexandre Torgue, Jun Nie, Baoyou Xie,
linux-omap, devicetree, linux-arm-kernel, linux-kernel,
linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/integratorap.dts | 14 +++++++-------
arch/arm/boot/dts/integratorcp.dts | 20 ++++++++++----------
2 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index 94d2ff9836d0..9efc753acb6d 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -56,7 +56,7 @@
};
/* 24 MHz chrystal on the Integrator/AP development board */
- xtal24mhz: xtal24mhz@24M {
+ xtal24mhz: xtal24mhz@24m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@@ -71,7 +71,7 @@
};
/* The UART clock is 14.74 MHz divided by an ICS525 */
- uartclk: uartclk@14.74M {
+ uartclk: uartclk@14.74m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <14745600>;
@@ -80,14 +80,14 @@
core-module@10000000 {
/* 24 MHz chrystal on the core module */
- cm24mhz: cm24mhz@24M {
+ cm24mhz: cm24mhz@24m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
/* Oscillator on the core module, clocks the CPU core */
- cmosc: cmosc@24M {
+ cmosc: cmosc@24m {
compatible = "arm,syscon-icst525-integratorap-cm";
#clock-cells = <0>;
lock-offset = <0x14>;
@@ -96,7 +96,7 @@
};
/* Auxilary oscillator on the core module, 32.369MHz at boot */
- auxosc: auxosc@24M {
+ auxosc: auxosc@24m {
compatible = "arm,syscon-icst525";
#clock-cells = <0>;
lock-offset = <0x14>;
@@ -116,7 +116,7 @@
* SYSCLK clocks PCIv3 bridge, system controller and the
* logic modules.
*/
- sysclk: apsys@24M {
+ sysclk: apsys@24m {
compatible = "arm,syscon-icst525-integratorap-sys";
#clock-cells = <0>;
lock-offset = <0x1c>;
@@ -125,7 +125,7 @@
};
/* One-bit control for the PCI bus clock (33 or 25 MHz) */
- pciclk: pciclk@24M {
+ pciclk: pciclk@24m {
compatible = "arm,syscon-icst525-integratorap-pci";
#clock-cells = <0>;
lock-offset = <0x1c>;
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index a185ab8759fa..76c41a04e8a0 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -47,14 +47,14 @@
*/
/* The codec chrystal operates at 24.576 MHz */
- xtal_codec: xtal24.576@24.576M {
+ xtal_codec: xtal24.576@24.576m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
};
/* The chrystal is divided by 2 by the codec for the AACI bit clock */
- aaci_bitclk: aaci_bitclk@12.288M {
+ aaci_bitclk: aaci_bitclk@12.288m {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <2>;
@@ -63,14 +63,14 @@
};
/* This is a 25MHz chrystal on the base board */
- xtal25mhz: xtal25mhz@25M {
+ xtal25mhz: xtal25mhz@25m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
};
/* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */
- uartclk: uartclk@14.74M {
+ uartclk: uartclk@14.74m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <14745600>;
@@ -85,14 +85,14 @@
core-module@10000000 {
/* 24 MHz chrystal on the core module */
- cm24mhz: cm24mhz@24M {
+ cm24mhz: cm24mhz@24m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
/* Oscillator on the core module, clocks the CPU core */
- cmcore: cmosc@24M {
+ cmcore: cmosc@24m {
compatible = "arm,syscon-icst525-integratorcp-cm-core";
#clock-cells = <0>;
lock-offset = <0x14>;
@@ -101,7 +101,7 @@
};
/* Oscillator on the core module, clocks the memory bus */
- cmmem: cmosc@24M {
+ cmmem: cmosc@24m {
compatible = "arm,syscon-icst525-integratorcp-cm-mem";
#clock-cells = <0>;
lock-offset = <0x14>;
@@ -110,7 +110,7 @@
};
/* Auxilary oscillator on the core module, clocks the CLCD */
- auxosc: auxosc@24M {
+ auxosc: auxosc@24m {
compatible = "arm,syscon-icst525";
#clock-cells = <0>;
lock-offset = <0x14>;
@@ -119,7 +119,7 @@
};
/* The KMI clock is the 24 MHz oscillator divided to 8MHz */
- kmiclk: kmiclk@1M {
+ kmiclk: kmiclk@1m {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <3>;
@@ -128,7 +128,7 @@
};
/* The timer clock is the 24 MHz oscillator divided to 1MHz */
- timclk: timclk@1M {
+ timclk: timclk@1m {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <24>;
--
2.11.0
^ permalink raw reply related
* [PATCH 05/25] arm: imx: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Ray Jui,
Scott Branden, Jon Mason, bcm-kernel-feedback-list,
Florian Fainelli, Sekhar Nori, Kevin Hilman, Kukjin Kim,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, Fabio Estevam,
Santosh Shilimkar, Jason Cooper, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Vladimir Zapolskiy, Sylvain Lemieux,
Matthias Brugger, Barry Song, Heiko Stuebner, Dinh Nguyen,
Viresh Kumar, Shiraz Hashim, Maxime Coquelin, Alexandre Torgue,
Jun Nie, Baoyou Xie, linux-omap, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/imx6q-display5.dtsi | 2 +-
arch/arm/boot/dts/imx7d.dtsi | 2 +-
arch/arm/boot/dts/imx7s.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-display5.dtsi b/arch/arm/boot/dts/imx6q-display5.dtsi
index 4084de43d4d9..09085fde3341 100644
--- a/arch/arm/boot/dts/imx6q-display5.dtsi
+++ b/arch/arm/boot/dts/imx6q-display5.dtsi
@@ -255,7 +255,7 @@
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
- codec: tfa9879@6C {
+ codec: tfa9879@6c {
#sound-dai-cells = <0>;
compatible = "nxp,tfa9879";
reg = <0x6C>;
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 4d308d17f040..369d5a166b3e 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -129,7 +129,7 @@
status = "disabled";
};
- pcie: pcie@0x33800000 {
+ pcie: pcie@33800000 {
compatible = "fsl,imx7d-pcie", "snps,dw-pcie";
reg = <0x33800000 0x4000>,
<0x4ff00000 0x80000>;
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 82ad26e766eb..a00ba897e58d 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -583,7 +583,7 @@
#address-cells = <1>;
#size-cells = <0>;
- pgc_pcie_phy: pgc-power-domain@IMX7_POWER_DOMAIN_PCIE_PHY {
+ pgc_pcie_phy: pgc-power-domain@imx7_power_domain_pcie_phy {
#power-domain-cells = <0>;
reg = <IMX7_POWER_DOMAIN_PCIE_PHY>;
power-supply = <®_1p0d>;
--
2.11.0
^ permalink raw reply related
* [PATCH 04/25] arm: exynos/s3c: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Ray Jui,
Scott Branden, Jon Mason, bcm-kernel-feedback-list,
Florian Fainelli, Sekhar Nori, Kevin Hilman, Kukjin Kim,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, Fabio Estevam,
Santosh Shilimkar, Jason Cooper, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Vladimir Zapolskiy, Sylvain Lemieux,
Matthias Brugger, Barry Song, Heiko Stuebner, Dinh Nguyen,
Viresh Kumar, Shiraz Hashim, Maxime Coquelin, Alexandre Torgue,
Jun Nie, Baoyou Xie, linux-omap, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/exynos3250.dtsi | 34 ++++++------
arch/arm/boot/dts/exynos4.dtsi | 56 +++++++++----------
arch/arm/boot/dts/exynos4210.dtsi | 8 +--
arch/arm/boot/dts/exynos4412-pinctrl.dtsi | 2 +-
arch/arm/boot/dts/exynos4412.dtsi | 22 ++++----
arch/arm/boot/dts/exynos5.dtsi | 22 ++++----
arch/arm/boot/dts/exynos5250.dtsi | 64 +++++++++++-----------
arch/arm/boot/dts/exynos5260.dtsi | 26 ++++-----
arch/arm/boot/dts/exynos5420.dtsi | 78 +++++++++++++--------------
arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +-
arch/arm/boot/dts/exynos5440.dtsi | 14 ++---
arch/arm/boot/dts/s3c2416.dtsi | 8 +--
12 files changed, 168 insertions(+), 168 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 2bd3872221a1..8d47571b3984 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -164,31 +164,31 @@
syscon = <&pmu_system_controller>;
};
- pd_cam: cam-power-domain@10023C00 {
+ pd_cam: cam-power-domain@10023c00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
};
- pd_mfc: mfc-power-domain@10023C40 {
+ pd_mfc: mfc-power-domain@10023c40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
};
- pd_g3d: g3d-power-domain@10023C60 {
+ pd_g3d: g3d-power-domain@10023c60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
};
- pd_lcd0: lcd0-power-domain@10023C80 {
+ pd_lcd0: lcd0-power-domain@10023c80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
};
- pd_isp: isp-power-domain@10023CA0 {
+ pd_isp: isp-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
@@ -204,7 +204,7 @@
<&cmu CLK_FIN_PLL>;
};
- cmu_dmc: clock-controller@105C0000 {
+ cmu_dmc: clock-controller@105c0000 {
compatible = "samsung,exynos3250-cmu-dmc";
reg = <0x105C0000 0x2000>;
#clock-cells = <1>;
@@ -219,7 +219,7 @@
status = "disabled";
};
- tmu: tmu@100C0000 {
+ tmu: tmu@100c0000 {
compatible = "samsung,exynos3250-tmu";
reg = <0x100C0000 0x100>;
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
@@ -287,7 +287,7 @@
status = "disabled";
};
- sysmmu_jpeg: sysmmu@11A60000 {
+ sysmmu_jpeg: sysmmu@11a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11a60000 0x1000>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
@@ -313,7 +313,7 @@
status = "disabled";
};
- dsi_0: dsi@11C80000 {
+ dsi_0: dsi@11c80000 {
compatible = "samsung,exynos3250-mipi-dsi";
reg = <0x11C80000 0x10000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -328,7 +328,7 @@
status = "disabled";
};
- sysmmu_fimd0: sysmmu@11E20000 {
+ sysmmu_fimd0: sysmmu@11e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11e20000 0x1000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
@@ -386,7 +386,7 @@
status = "disabled";
};
- exynos_usbphy: exynos-usbphy@125B0000 {
+ exynos_usbphy: exynos-usbphy@125b0000 {
compatible = "samsung,exynos3250-usb2-phy";
reg = <0x125B0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>;
@@ -425,7 +425,7 @@
};
};
- adc: adc@126C0000 {
+ adc: adc@126c0000 {
compatible = "samsung,exynos3250-adc",
"samsung,exynos-adc-v2";
reg = <0x126C0000 0x100>;
@@ -544,7 +544,7 @@
status = "disabled";
};
- i2c_4: i2c@138A0000 {
+ i2c_4: i2c@138a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -557,7 +557,7 @@
status = "disabled";
};
- i2c_5: i2c@138B0000 {
+ i2c_5: i2c@138b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -570,7 +570,7 @@
status = "disabled";
};
- i2c_6: i2c@138C0000 {
+ i2c_6: i2c@138c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -583,7 +583,7 @@
status = "disabled";
};
- i2c_7: i2c@138D0000 {
+ i2c_7: i2c@138d0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -641,7 +641,7 @@
status = "disabled";
};
- pwm: pwm@139D0000 {
+ pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 4768b086ed67..d40fcf7bd273 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -101,28 +101,28 @@
syscon = <&pmu_system_controller>;
};
- pd_mfc: mfc-power-domain@10023C40 {
+ pd_mfc: mfc-power-domain@10023c40 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C40 0x20>;
#power-domain-cells = <0>;
label = "MFC";
};
- pd_g3d: g3d-power-domain@10023C60 {
+ pd_g3d: g3d-power-domain@10023c60 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C60 0x20>;
#power-domain-cells = <0>;
label = "G3D";
};
- pd_lcd0: lcd0-power-domain@10023C80 {
+ pd_lcd0: lcd0-power-domain@10023c80 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C80 0x20>;
#power-domain-cells = <0>;
label = "LCD0";
};
- pd_tv: tv-power-domain@10023C20 {
+ pd_tv: tv-power-domain@10023c20 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C20 0x20>;
#power-domain-cells = <0>;
@@ -130,21 +130,21 @@
label = "TV";
};
- pd_cam: cam-power-domain@10023C00 {
+ pd_cam: cam-power-domain@10023c00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023C00 0x20>;
#power-domain-cells = <0>;
label = "CAM";
};
- pd_gps: gps-power-domain@10023CE0 {
+ pd_gps: gps-power-domain@10023ce0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CE0 0x20>;
#power-domain-cells = <0>;
label = "GPS";
};
- pd_gps_alive: gps-alive-power-domain@10023D00 {
+ pd_gps_alive: gps-alive-power-domain@10023d00 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023D00 0x20>;
#power-domain-cells = <0>;
@@ -184,7 +184,7 @@
interrupt-parent = <&gic>;
};
- dsi_0: dsi@11C80000 {
+ dsi_0: dsi@11c80000 {
compatible = "samsung,exynos4210-mipi-dsi";
reg = <0x11C80000 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
@@ -297,7 +297,7 @@
status = "disabled";
};
- keypad: keypad@100A0000 {
+ keypad: keypad@100a0000 {
compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
@@ -342,7 +342,7 @@
status = "disabled";
};
- exynos_usbphy: exynos-usbphy@125B0000 {
+ exynos_usbphy: exynos-usbphy@125b0000 {
compatible = "samsung,exynos4210-usb2-phy";
reg = <0x125B0000 0x100>;
samsung,pmureg-phandle = <&pmu_system_controller>;
@@ -538,7 +538,7 @@
status = "disabled";
};
- i2c_4: i2c@138A0000 {
+ i2c_4: i2c@138a0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -551,7 +551,7 @@
status = "disabled";
};
- i2c_5: i2c@138B0000 {
+ i2c_5: i2c@138b0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -564,7 +564,7 @@
status = "disabled";
};
- i2c_6: i2c@138C0000 {
+ i2c_6: i2c@138c0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -577,7 +577,7 @@
status = "disabled";
};
- i2c_7: i2c@138D0000 {
+ i2c_7: i2c@138d0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-i2c";
@@ -590,7 +590,7 @@
status = "disabled";
};
- i2c_8: i2c@138E0000 {
+ i2c_8: i2c@138e0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,s3c2440-hdmiphy-i2c";
@@ -651,7 +651,7 @@
status = "disabled";
};
- pwm: pwm@139D0000 {
+ pwm: pwm@139d0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
@@ -720,7 +720,7 @@
status = "disabled";
};
- tmu: tmu@100C0000 {
+ tmu: tmu@100c0000 {
#include "exynos4412-tmu-sensor-conf.dtsi"
};
@@ -743,7 +743,7 @@
iommus = <&sysmmu_rotator>;
};
- hdmi: hdmi@12D00000 {
+ hdmi: hdmi@12d00000 {
compatible = "samsung,exynos4210-hdmi";
reg = <0x12D00000 0x70000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
@@ -758,7 +758,7 @@
status = "disabled";
};
- hdmicec: cec@100B0000 {
+ hdmicec: cec@100b0000 {
compatible = "samsung,s5p-cec";
reg = <0x100B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
@@ -771,7 +771,7 @@
status = "disabled";
};
- mixer: mixer@12C10000 {
+ mixer: mixer@12c10000 {
compatible = "samsung,exynos4210-mixer";
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
@@ -910,7 +910,7 @@
#iommu-cells = <0>;
};
- sysmmu_tv: sysmmu@12E20000 {
+ sysmmu_tv: sysmmu@12e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12E20000 0x1000>;
interrupt-parent = <&combiner>;
@@ -921,7 +921,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc0: sysmmu@11A20000 {
+ sysmmu_fimc0: sysmmu@11a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A20000 0x1000>;
interrupt-parent = <&combiner>;
@@ -932,7 +932,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc1: sysmmu@11A30000 {
+ sysmmu_fimc1: sysmmu@11a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A30000 0x1000>;
interrupt-parent = <&combiner>;
@@ -943,7 +943,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc2: sysmmu@11A40000 {
+ sysmmu_fimc2: sysmmu@11a40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A40000 0x1000>;
interrupt-parent = <&combiner>;
@@ -954,7 +954,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc3: sysmmu@11A50000 {
+ sysmmu_fimc3: sysmmu@11a50000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A50000 0x1000>;
interrupt-parent = <&combiner>;
@@ -965,7 +965,7 @@
#iommu-cells = <0>;
};
- sysmmu_jpeg: sysmmu@11A60000 {
+ sysmmu_jpeg: sysmmu@11a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A60000 0x1000>;
interrupt-parent = <&combiner>;
@@ -976,7 +976,7 @@
#iommu-cells = <0>;
};
- sysmmu_rotator: sysmmu@12A30000 {
+ sysmmu_rotator: sysmmu@12a30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A30000 0x1000>;
interrupt-parent = <&combiner>;
@@ -986,7 +986,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimd0: sysmmu@11E20000 {
+ sysmmu_fimd0: sysmmu@11e20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11E20000 0x1000>;
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 03dd61f64809..ce161ad1215d 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -82,7 +82,7 @@
};
};
- pd_lcd1: lcd1-power-domain@10023CA0 {
+ pd_lcd1: lcd1-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
@@ -156,7 +156,7 @@
reg = <0x03860000 0x1000>;
};
- tmu: tmu@100C0000 {
+ tmu: tmu@100c0000 {
compatible = "samsung,exynos4210-tmu";
interrupt-parent = <&combiner>;
reg = <0x100C0000 0x100>;
@@ -229,7 +229,7 @@
};
};
- mixer: mixer@12C10000 {
+ mixer: mixer@12c10000 {
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
"sclk_mixer";
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
@@ -245,7 +245,7 @@
status = "disabled";
};
- sysmmu_g2d: sysmmu@12A20000 {
+ sysmmu_g2d: sysmmu@12a20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A20000 0x1000>;
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
index 4eebd4721a5f..ef7b89d3db9e 100644
--- a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi
@@ -925,7 +925,7 @@
};
};
- pinctrl_3: pinctrl@106E0000 {
+ pinctrl_3: pinctrl@106e0000 {
gpv0: gpv0 {
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index b255ac55b1c1..29990ad56e1f 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -38,7 +38,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu0: cpu@A00 {
+ cpu0: cpu@a00 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA00>;
@@ -50,21 +50,21 @@
#cooling-cells = <2>; /* min followed by max */
};
- cpu@A01 {
+ cpu@a01 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA01>;
operating-points-v2 = <&cpu0_opp_table>;
};
- cpu@A02 {
+ cpu@a02 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA02>;
operating-points-v2 = <&cpu0_opp_table>;
};
- cpu@A03 {
+ cpu@a03 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0xA03>;
@@ -168,7 +168,7 @@
};
};
- pd_isp: isp-power-domain@10023CA0 {
+ pd_isp: isp-power-domain@10023ca0 {
compatible = "samsung,exynos4210-pd";
reg = <0x10023CA0 0x20>;
#power-domain-cells = <0>;
@@ -224,7 +224,7 @@
samsung,syscon-phandle = <&pmu_system_controller>;
};
- adc: adc@126C0000 {
+ adc: adc@126c0000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x126C0000 0x100>;
interrupt-parent = <&combiner>;
@@ -263,7 +263,7 @@
status = "disabled";
};
- fimc_lite_1: fimc-lite@123A0000 {
+ fimc_lite_1: fimc-lite@123a0000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x123A0000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -370,7 +370,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_fd: sysmmu@122A0000 {
+ sysmmu_fimc_fd: sysmmu@122a0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122A0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -381,7 +381,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_mcuctl: sysmmu@122B0000 {
+ sysmmu_fimc_mcuctl: sysmmu@122b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122B0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -392,7 +392,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_lite0: sysmmu@123B0000 {
+ sysmmu_fimc_lite0: sysmmu@123b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123B0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -403,7 +403,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_lite1: sysmmu@123C0000 {
+ sysmmu_fimc_lite1: sysmmu@123c0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123C0000 0x1000>;
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 66d22521c976..7d7b3133cbcb 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -106,31 +106,31 @@
reg = <0x10050000 0x5000>;
};
- serial_0: serial@12C00000 {
+ serial_0: serial@12c00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
};
- serial_1: serial@12C10000 {
+ serial_1: serial@12c10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
};
- serial_2: serial@12C20000 {
+ serial_2: serial@12c20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
};
- serial_3: serial@12C30000 {
+ serial_3: serial@12c30000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
};
- i2c_0: i2c@12C60000 {
+ i2c_0: i2c@12c60000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C60000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
@@ -140,7 +140,7 @@
status = "disabled";
};
- i2c_1: i2c@12C70000 {
+ i2c_1: i2c@12c70000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C70000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -150,7 +150,7 @@
status = "disabled";
};
- i2c_2: i2c@12C80000 {
+ i2c_2: i2c@12c80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
@@ -160,7 +160,7 @@
status = "disabled";
};
- i2c_3: i2c@12C90000 {
+ i2c_3: i2c@12c90000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C90000 0x100>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
@@ -170,14 +170,14 @@
status = "disabled";
};
- pwm: pwm@12DD0000 {
+ pwm: pwm@12dd0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x12DD0000 0x100>;
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
#pwm-cells = <3>;
};
- rtc: rtc@101E0000 {
+ rtc: rtc@101e0000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
@@ -195,7 +195,7 @@
status = "disabled";
};
- dp: dp-controller@145B0000 {
+ dp: dp-controller@145b0000 {
compatible = "samsung,exynos5-dp";
reg = <0x145B0000 0x1000>;
interrupts = <10 3>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 5286084e1032..a596ce260e2a 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -125,7 +125,7 @@
label = "MFC";
};
- pd_disp1: disp1-power-domain@100440A0 {
+ pd_disp1: disp1-power-domain@100440a0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440A0 0x20>;
#power-domain-cells = <0>;
@@ -165,7 +165,7 @@
clock-frequency = <24000000>;
};
- mct@101C0000 {
+ mct@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101C0000 0x800>;
interrupt-controller;
@@ -236,7 +236,7 @@
interrupt-parent = <&gic>;
};
- watchdog@101D0000 {
+ watchdog@101d0000 {
compatible = "samsung,exynos5250-wdt";
reg = <0x101D0000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
@@ -265,7 +265,7 @@
iommu-names = "left", "right";
};
- rotator: rotator@11C00000 {
+ rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -283,7 +283,7 @@
#include "exynos4412-tmu-sensor-conf.dtsi"
};
- sata: sata@122F0000 {
+ sata: sata@122f0000 {
compatible = "snps,dwc-ahci";
samsung,sata-freq = <66>;
reg = <0x122F0000 0x1ff>;
@@ -306,7 +306,7 @@
};
/* i2c_0-3 are defined in exynos5.dtsi */
- i2c_4: i2c@12CA0000 {
+ i2c_4: i2c@12ca0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CA0000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
@@ -319,7 +319,7 @@
status = "disabled";
};
- i2c_5: i2c@12CB0000 {
+ i2c_5: i2c@12cb0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CB0000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
@@ -332,7 +332,7 @@
status = "disabled";
};
- i2c_6: i2c@12CC0000 {
+ i2c_6: i2c@12cc0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CC0000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
@@ -345,7 +345,7 @@
status = "disabled";
};
- i2c_7: i2c@12CD0000 {
+ i2c_7: i2c@12cd0000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12CD0000 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
@@ -358,7 +358,7 @@
status = "disabled";
};
- i2c_8: i2c@12CE0000 {
+ i2c_8: i2c@12ce0000 {
compatible = "samsung,s3c2440-hdmiphy-i2c";
reg = <0x12CE0000 0x1000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
@@ -374,7 +374,7 @@
};
};
- i2c_9: i2c@121D0000 {
+ i2c_9: i2c@121d0000 {
compatible = "samsung,exynos5-sata-phy-i2c";
reg = <0x121D0000 0x100>;
#address-cells = <1>;
@@ -497,7 +497,7 @@
pinctrl-0 = <&i2s0_bus>;
};
- i2s1: i2s@12D60000 {
+ i2s1: i2s@12d60000 {
compatible = "samsung,s3c6410-i2s";
status = "disabled";
reg = <0x12D60000 0x100>;
@@ -510,7 +510,7 @@
pinctrl-0 = <&i2s1_bus>;
};
- i2s2: i2s@12D70000 {
+ i2s2: i2s@12d70000 {
compatible = "samsung,s3c6410-i2s";
status = "disabled";
reg = <0x12D70000 0x100>;
@@ -596,7 +596,7 @@
interrupt-parent = <&gic>;
ranges;
- pdma0: pdma@121A0000 {
+ pdma0: pdma@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@@ -607,7 +607,7 @@
#dma-requests = <32>;
};
- pdma1: pdma@121B0000 {
+ pdma1: pdma@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -629,7 +629,7 @@
#dma-requests = <1>;
};
- mdma1: mdma@11C10000 {
+ mdma1: mdma@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
@@ -696,7 +696,7 @@
status = "disabled";
};
- hdmicec: cec@101B0000 {
+ hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec";
reg = <0x101B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
@@ -727,7 +727,7 @@
#phy-cells = <0>;
};
- adc: adc@12D10000 {
+ adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x12D10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -747,7 +747,7 @@
clock-names = "secss";
};
- sysmmu_g2d: sysmmu@10A60000 {
+ sysmmu_g2d: sysmmu@10a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x10A60000 0x1000>;
interrupt-parent = <&combiner>;
@@ -779,7 +779,7 @@
#iommu-cells = <0>;
};
- sysmmu_rotator: sysmmu@11D40000 {
+ sysmmu_rotator: sysmmu@11d40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11D40000 0x1000>;
interrupt-parent = <&combiner>;
@@ -789,7 +789,7 @@
#iommu-cells = <0>;
};
- sysmmu_jpeg: sysmmu@11F20000 {
+ sysmmu_jpeg: sysmmu@11f20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11F20000 0x1000>;
interrupt-parent = <&combiner>;
@@ -820,7 +820,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_fd: sysmmu@132A0000 {
+ sysmmu_fimc_fd: sysmmu@132a0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132A0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -850,7 +850,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_mcuctl: sysmmu@132B0000 {
+ sysmmu_fimc_mcuctl: sysmmu@132b0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132B0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -860,7 +860,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_odc: sysmmu@132C0000 {
+ sysmmu_fimc_odc: sysmmu@132c0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132C0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -870,7 +870,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_dis0: sysmmu@132D0000 {
+ sysmmu_fimc_dis0: sysmmu@132d0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132D0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -890,7 +890,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_3dnr: sysmmu@132F0000 {
+ sysmmu_fimc_3dnr: sysmmu@132f0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x132F0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -900,7 +900,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_lite0: sysmmu@13C40000 {
+ sysmmu_fimc_lite0: sysmmu@13c40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13C40000 0x1000>;
interrupt-parent = <&combiner>;
@@ -911,7 +911,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimc_lite1: sysmmu@13C50000 {
+ sysmmu_fimc_lite1: sysmmu@13c50000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13C50000 0x1000>;
interrupt-parent = <&combiner>;
@@ -922,7 +922,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc0: sysmmu@13E80000 {
+ sysmmu_gsc0: sysmmu@13e80000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13E80000 0x1000>;
interrupt-parent = <&combiner>;
@@ -933,7 +933,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc1: sysmmu@13E90000 {
+ sysmmu_gsc1: sysmmu@13e90000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13E90000 0x1000>;
interrupt-parent = <&combiner>;
@@ -944,7 +944,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc2: sysmmu@13EA0000 {
+ sysmmu_gsc2: sysmmu@13ea0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13EA0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -955,7 +955,7 @@
#iommu-cells = <0>;
};
- sysmmu_gsc3: sysmmu@13EB0000 {
+ sysmmu_gsc3: sysmmu@13eb0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13EB0000 0x1000>;
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 5e88c9645975..12c6b011576b 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -106,13 +106,13 @@
#clock-cells = <1>;
};
- clock_g2d: clock-controller@10A00000 {
+ clock_g2d: clock-controller@10a00000 {
compatible = "samsung,exynos5260-clock-g2d";
reg = <0x10A00000 0x10000>;
#clock-cells = <1>;
};
- clock_mif: clock-controller@10CE0000 {
+ clock_mif: clock-controller@10ce0000 {
compatible = "samsung,exynos5260-clock-mif";
reg = <0x10CE0000 0x10000>;
#clock-cells = <1>;
@@ -130,25 +130,25 @@
#clock-cells = <1>;
};
- clock_fsys: clock-controller@122E0000 {
+ clock_fsys: clock-controller@122e0000 {
compatible = "samsung,exynos5260-clock-fsys";
reg = <0x122E0000 0x10000>;
#clock-cells = <1>;
};
- clock_aud: clock-controller@128C0000 {
+ clock_aud: clock-controller@128c0000 {
compatible = "samsung,exynos5260-clock-aud";
reg = <0x128C0000 0x10000>;
#clock-cells = <1>;
};
- clock_isp: clock-controller@133C0000 {
+ clock_isp: clock-controller@133c0000 {
compatible = "samsung,exynos5260-clock-isp";
reg = <0x133C0000 0x10000>;
#clock-cells = <1>;
};
- clock_gscl: clock-controller@13F00000 {
+ clock_gscl: clock-controller@13f00000 {
compatible = "samsung,exynos5260-clock-gscl";
reg = <0x13F00000 0x10000>;
#clock-cells = <1>;
@@ -179,7 +179,7 @@
reg = <0x10000000 0x100>;
};
- mct: mct@100B0000 {
+ mct: mct@100b0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x100B0000 0x1000>;
clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;
@@ -198,7 +198,7 @@
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
};
- cci: cci@10F00000 {
+ cci: cci@10f00000 {
compatible = "arm,cci-400";
#address-cells = <1>;
#size-cells = <1>;
@@ -236,18 +236,18 @@
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
};
- pinctrl_2: pinctrl@128B0000 {
+ pinctrl_2: pinctrl@128b0000 {
compatible = "samsung,exynos5260-pinctrl";
reg = <0x128B0000 0x1000>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
};
- pmu_system_controller: system-controller@10D50000 {
+ pmu_system_controller: system-controller@10d50000 {
compatible = "samsung,exynos5260-pmu", "syscon";
reg = <0x10D50000 0x10000>;
};
- uart0: serial@12C00000 {
+ uart0: serial@12c00000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C00000 0x100>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
@@ -256,7 +256,7 @@
status = "disabled";
};
- uart1: serial@12C10000 {
+ uart1: serial@12c10000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C10000 0x100>;
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
@@ -265,7 +265,7 @@
status = "disabled";
};
- uart2: serial@12C20000 {
+ uart2: serial@12c20000 {
compatible = "samsung,exynos4210-uart";
reg = <0x12C20000 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 8aa2cc7aa125..fd3bdb7297ac 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -237,37 +237,37 @@
status = "disabled";
};
- nocp_mem0_0: nocp@10CA1000 {
+ nocp_mem0_0: nocp@10ca1000 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1000 0x200>;
status = "disabled";
};
- nocp_mem0_1: nocp@10CA1400 {
+ nocp_mem0_1: nocp@10ca1400 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1400 0x200>;
status = "disabled";
};
- nocp_mem1_0: nocp@10CA1800 {
+ nocp_mem1_0: nocp@10ca1800 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1800 0x200>;
status = "disabled";
};
- nocp_mem1_1: nocp@10CA1C00 {
+ nocp_mem1_1: nocp@10ca1c00 {
compatible = "samsung,exynos5420-nocp";
reg = <0x10CA1C00 0x200>;
status = "disabled";
};
- nocp_g3d_0: nocp@11A51000 {
+ nocp_g3d_0: nocp@11a51000 {
compatible = "samsung,exynos5420-nocp";
reg = <0x11A51000 0x200>;
status = "disabled";
};
- nocp_g3d_1: nocp@11A51400 {
+ nocp_g3d_1: nocp@11a51400 {
compatible = "samsung,exynos5420-nocp";
reg = <0x11A51400 0x200>;
status = "disabled";
@@ -309,7 +309,7 @@
label = "MSC";
};
- disp_pd: power-domain@100440C0 {
+ disp_pd: power-domain@100440c0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440C0 0x20>;
#power-domain-cells = <0>;
@@ -376,7 +376,7 @@
#dma-requests = <16>;
};
- pdma0: pdma@121A0000 {
+ pdma0: pdma@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@@ -387,7 +387,7 @@
#dma-requests = <32>;
};
- pdma1: pdma@121B0000 {
+ pdma1: pdma@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -409,7 +409,7 @@
#dma-requests = <1>;
};
- mdma1: mdma@11C10000 {
+ mdma1: mdma@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
@@ -449,7 +449,7 @@
status = "disabled";
};
- i2s1: i2s@12D60000 {
+ i2s1: i2s@12d60000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x12D60000 0x100>;
dmas = <&pdma1 12
@@ -465,7 +465,7 @@
status = "disabled";
};
- i2s2: i2s@12D70000 {
+ i2s2: i2s@12d70000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x12D70000 0x100>;
dmas = <&pdma0 12
@@ -554,7 +554,7 @@
status = "disabled";
};
- adc: adc@12D10000 {
+ adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v2";
reg = <0x12D10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -566,7 +566,7 @@
status = "disabled";
};
- hsi2c_8: i2c@12E00000 {
+ hsi2c_8: i2c@12e00000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E00000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
@@ -579,7 +579,7 @@
status = "disabled";
};
- hsi2c_9: i2c@12E10000 {
+ hsi2c_9: i2c@12e10000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E10000 0x1000>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
@@ -592,7 +592,7 @@
status = "disabled";
};
- hsi2c_10: i2c@12E20000 {
+ hsi2c_10: i2c@12e20000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12E20000 0x1000>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
@@ -620,11 +620,11 @@
power-domains = <&disp_pd>;
};
- hdmiphy: hdmiphy@145D0000 {
+ hdmiphy: hdmiphy@145d0000 {
reg = <0x145D0000 0x20>;
};
- hdmicec: cec@101B0000 {
+ hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec";
reg = <0x101B0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
@@ -649,7 +649,7 @@
status = "disabled";
};
- rotator: rotator@11C00000 {
+ rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -678,7 +678,7 @@
iommus = <&sysmmu_gscl1>;
};
- jpeg_0: jpeg@11F50000 {
+ jpeg_0: jpeg@11f50000 {
compatible = "samsung,exynos5420-jpeg";
reg = <0x11F50000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
@@ -687,7 +687,7 @@
iommus = <&sysmmu_jpeg0>;
};
- jpeg_1: jpeg@11F60000 {
+ jpeg_1: jpeg@11f60000 {
compatible = "samsung,exynos5420-jpeg";
reg = <0x11F60000 0x1000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
@@ -752,7 +752,7 @@
#include "exynos5420-tmu-sensor-conf.dtsi"
};
- sysmmu_g2dr: sysmmu@0x10A60000 {
+ sysmmu_g2dr: sysmmu@10a60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x10A60000 0x1000>;
interrupt-parent = <&combiner>;
@@ -762,7 +762,7 @@
#iommu-cells = <0>;
};
- sysmmu_g2dw: sysmmu@0x10A70000 {
+ sysmmu_g2dw: sysmmu@10a70000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x10A70000 0x1000>;
interrupt-parent = <&combiner>;
@@ -772,7 +772,7 @@
#iommu-cells = <0>;
};
- sysmmu_tv: sysmmu@0x14650000 {
+ sysmmu_tv: sysmmu@14650000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x14650000 0x1000>;
interrupt-parent = <&combiner>;
@@ -783,7 +783,7 @@
#iommu-cells = <0>;
};
- sysmmu_gscl0: sysmmu@0x13E80000 {
+ sysmmu_gscl0: sysmmu@13e80000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13E80000 0x1000>;
interrupt-parent = <&combiner>;
@@ -794,7 +794,7 @@
#iommu-cells = <0>;
};
- sysmmu_gscl1: sysmmu@0x13E90000 {
+ sysmmu_gscl1: sysmmu@13e90000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13E90000 0x1000>;
interrupt-parent = <&combiner>;
@@ -805,7 +805,7 @@
#iommu-cells = <0>;
};
- sysmmu_scaler0r: sysmmu@0x12880000 {
+ sysmmu_scaler0r: sysmmu@12880000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12880000 0x1000>;
interrupt-parent = <&combiner>;
@@ -815,7 +815,7 @@
#iommu-cells = <0>;
};
- sysmmu_scaler1r: sysmmu@0x12890000 {
+ sysmmu_scaler1r: sysmmu@12890000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12890000 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
@@ -824,7 +824,7 @@
#iommu-cells = <0>;
};
- sysmmu_scaler2r: sysmmu@0x128A0000 {
+ sysmmu_scaler2r: sysmmu@128a0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x128A0000 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
@@ -833,7 +833,7 @@
#iommu-cells = <0>;
};
- sysmmu_scaler0w: sysmmu@0x128C0000 {
+ sysmmu_scaler0w: sysmmu@128c0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x128C0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -843,7 +843,7 @@
#iommu-cells = <0>;
};
- sysmmu_scaler1w: sysmmu@0x128D0000 {
+ sysmmu_scaler1w: sysmmu@128d0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x128D0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -853,7 +853,7 @@
#iommu-cells = <0>;
};
- sysmmu_scaler2w: sysmmu@0x128E0000 {
+ sysmmu_scaler2w: sysmmu@128e0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x128E0000 0x1000>;
interrupt-parent = <&combiner>;
@@ -863,7 +863,7 @@
#iommu-cells = <0>;
};
- sysmmu_rotator: sysmmu@0x11D40000 {
+ sysmmu_rotator: sysmmu@11d40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11D40000 0x1000>;
interrupt-parent = <&combiner>;
@@ -873,7 +873,7 @@
#iommu-cells = <0>;
};
- sysmmu_jpeg0: sysmmu@0x11F10000 {
+ sysmmu_jpeg0: sysmmu@11f10000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11F10000 0x1000>;
interrupt-parent = <&combiner>;
@@ -883,7 +883,7 @@
#iommu-cells = <0>;
};
- sysmmu_jpeg1: sysmmu@0x11F20000 {
+ sysmmu_jpeg1: sysmmu@11f20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11F20000 0x1000>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
@@ -892,7 +892,7 @@
#iommu-cells = <0>;
};
- sysmmu_mfc_l: sysmmu@0x11200000 {
+ sysmmu_mfc_l: sysmmu@11200000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11200000 0x1000>;
interrupt-parent = <&combiner>;
@@ -903,7 +903,7 @@
#iommu-cells = <0>;
};
- sysmmu_mfc_r: sysmmu@0x11210000 {
+ sysmmu_mfc_r: sysmmu@11210000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11210000 0x1000>;
interrupt-parent = <&combiner>;
@@ -914,7 +914,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimd1_0: sysmmu@0x14640000 {
+ sysmmu_fimd1_0: sysmmu@14640000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x14640000 0x1000>;
interrupt-parent = <&combiner>;
@@ -925,7 +925,7 @@
#iommu-cells = <0>;
};
- sysmmu_fimd1_1: sysmmu@0x14680000 {
+ sysmmu_fimd1_1: sysmmu@14680000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x14680000 0x1000>;
interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index a5b8d0f0877e..353428fe10c4 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -26,7 +26,7 @@
stdout-path = "serial2:115200n8";
};
- firmware@02073000 {
+ firmware@2073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 9c3c75ae5e48..3acf3f2d643e 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -35,7 +35,7 @@
#clock-cells = <1>;
};
- gic: interrupt-controller@2E0000 {
+ gic: interrupt-controller@2e0000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
@@ -108,7 +108,7 @@
>;
};
- serial_0: serial@B0000 {
+ serial_0: serial@b0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
@@ -116,7 +116,7 @@
clock-names = "uart", "clk_uart_baud0";
};
- serial_1: serial@C0000 {
+ serial_1: serial@c0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xC0000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
@@ -124,7 +124,7 @@
clock-names = "uart", "clk_uart_baud0";
};
- spi_0: spi@D0000 {
+ spi_0: spi@d0000 {
compatible = "samsung,exynos5440-spi";
reg = <0xD0000 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
@@ -136,7 +136,7 @@
clock-names = "spi", "spi_busclk0";
};
- pin_ctrl: pinctrl@E0000 {
+ pin_ctrl: pinctrl@e0000 {
compatible = "samsung,exynos5440-pinctrl";
reg = <0xE0000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
@@ -168,7 +168,7 @@
};
};
- i2c@F0000 {
+ i2c@f0000 {
compatible = "samsung,exynos5440-i2c";
reg = <0xF0000 0x1000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
@@ -233,7 +233,7 @@
#include "exynos5440-tmu-sensor-conf.dtsi"
};
- tmuctrl_1: tmuctrl@16011C {
+ tmuctrl_1: tmuctrl@16011c {
compatible = "samsung,exynos5440-tmu";
reg = <0x16011C 0x230>, <0x160368 0x10>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/s3c2416.dtsi b/arch/arm/boot/dts/s3c2416.dtsi
index 80f007550324..568524325f1a 100644
--- a/arch/arm/boot/dts/s3c2416.dtsi
+++ b/arch/arm/boot/dts/s3c2416.dtsi
@@ -33,7 +33,7 @@
compatible = "samsung,s3c2416-irq";
};
- clocks: clock-controller@0x4c000000 {
+ clocks: clock-controller@4c000000 {
compatible = "samsung,s3c2416-clock";
reg = <0x4c000000 0x40>;
#clock-cells = <1>;
@@ -72,7 +72,7 @@
<&clocks SCLK_UART>;
};
- uart_3: serial@5000C000 {
+ uart_3: serial@5000c000 {
compatible = "samsung,s3c2440-uart";
reg = <0x5000C000 0x4000>;
interrupts = <1 18 24 4>, <1 18 25 4>;
@@ -83,7 +83,7 @@
status = "disabled";
};
- sdhci_1: sdhci@4AC00000 {
+ sdhci_1: sdhci@4ac00000 {
compatible = "samsung,s3c6410-sdhci";
reg = <0x4AC00000 0x100>;
interrupts = <0 0 21 3>;
@@ -94,7 +94,7 @@
status = "disabled";
};
- sdhci_0: sdhci@4A800000 {
+ sdhci_0: sdhci@4a800000 {
compatible = "samsung,s3c6410-sdhci";
reg = <0x4A800000 0x100>;
interrupts = <0 0 20 3>;
--
2.11.0
^ permalink raw reply related
* [PATCH 03/25] arm: bcm: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Ray Jui,
Scott Branden, Jon Mason, bcm-kernel-feedback-list,
Florian Fainelli, Sekhar Nori, Kevin Hilman, Kukjin Kim,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, Fabio Estevam,
Santosh Shilimkar, Jason Cooper, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Vladimir Zapolskiy, Sylvain Lemieux,
Matthias Brugger, Barry Song, Heiko Stuebner, Dinh Nguyen,
Viresh Kumar, Shiraz Hashim, Maxime Coquelin, Alexandre Torgue,
Jun Nie, Baoyou Xie, linux-omap, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/bcm11351.dtsi | 2 +-
arch/arm/boot/dts/bcm21664.dtsi | 2 +-
arch/arm/boot/dts/bcm283x.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index 18045c38bcf1..db7cded1b7ad 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -55,7 +55,7 @@
<0x3ff00100 0x100>;
};
- smc@0x3404c000 {
+ smc@3404c000 {
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
};
diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi
index 6dde95f21cef..266f2611dc22 100644
--- a/arch/arm/boot/dts/bcm21664.dtsi
+++ b/arch/arm/boot/dts/bcm21664.dtsi
@@ -55,7 +55,7 @@
<0x3ff00100 0x100>;
};
- smc@0x3404e000 {
+ smc@3404e000 {
compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
};
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index dcde93c85c2d..2ee4f04ea9d4 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -464,7 +464,7 @@
status = "disabled";
};
- aux: aux@0x7e215000 {
+ aux: aux@7e215000 {
compatible = "brcm,bcm2835-aux";
#clock-cells = <1>;
reg = <0x7e215000 0x8>;
--
2.11.0
^ permalink raw reply related
* [PATCH 02/25] arm: at91/sama: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Ray Jui,
Scott Branden, Jon Mason, bcm-kernel-feedback-list,
Florian Fainelli, Sekhar Nori, Kevin Hilman, Kukjin Kim,
Krzysztof Kozlowski, Shawn Guo, Sascha Hauer, Fabio Estevam,
Santosh Shilimkar, Jason Cooper, Andrew Lunn, Gregory Clement,
Sebastian Hesselbarth, Vladimir Zapolskiy, Sylvain Lemieux,
Matthias Brugger, Barry Song, Heiko Stuebner, Dinh Nguyen,
Viresh Kumar, Shiraz Hashim, Maxime Coquelin, Alexandre Torgue,
Jun Nie, Baoyou Xie, linux-omap, devicetree, linux-arm-kernel,
linux-kernel, linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171215111620.20379-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9261ek.dts | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263ek.dts | 2 +-
arch/arm/boot/dts/at91sam9g25ek.dts | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9m10g45ek.dts | 2 +-
arch/arm/boot/dts/sama5d3xmb.dtsi | 2 +-
arch/arm/boot/dts/sama5d3xmb_cmp.dtsi | 2 +-
9 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 66876019101d..eb186245fb4c 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -80,7 +80,7 @@
status = "disabled";
};
- fb0: fb@0x00600000 {
+ fb0: fb@600000 {
compatible = "atmel,at91sam9261-lcdc";
reg = <0x00600000 0x1000>;
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index 960d6940ebf6..9733db3f739b 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -36,7 +36,7 @@
status = "okay";
};
- fb0: fb@0x00600000 {
+ fb0: fb@600000 {
display = <&display0>;
atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
status = "okay";
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index e54f14d36b6f..a26f7ada429d 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -999,7 +999,7 @@
};
};
- fb0: fb@0x00700000 {
+ fb0: fb@700000 {
compatible = "atmel,at91sam9263-lcdc";
reg = <0x00700000 0x1000>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 5a2e1af793f5..f095b5d4d410 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -95,7 +95,7 @@
};
};
- fb0: fb@0x00700000 {
+ fb0: fb@700000 {
display = <&display0>;
status = "okay";
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index 91a71774472e..31fecc2cdaf9 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -25,7 +25,7 @@
};
i2c0: i2c@f8010000 {
- ov2640: camera@0x30 {
+ ov2640: camera@30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 2b127ca7aaa0..98348ebd6488 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -1302,7 +1302,7 @@
};
};
- fb0: fb@0x00500000 {
+ fb0: fb@500000 {
compatible = "atmel,at91sam9g45-lcdc";
reg = <0x00500000 0x1000>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index e922552a04cb..d793451ee04c 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -220,7 +220,7 @@
};
};
- fb0: fb@0x00500000 {
+ fb0: fb@500000 {
display = <&display0>;
status = "okay";
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 7f55050dd405..ef0f2d049e15 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -53,7 +53,7 @@
};
i2c1: i2c@f0018000 {
- ov2640: camera@0x30 {
+ ov2640: camera@30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
index 83e3d3e08fd4..97e171db5970 100644
--- a/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb_cmp.dtsi
@@ -88,7 +88,7 @@
};
i2c1: i2c@f0018000 {
- ov2640: camera@0x30 {
+ ov2640: camera@30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
--
2.11.0
^ permalink raw reply related
* [PATCH 01/25] arm: artpec: dts: Remove leading 0x and 0s from bindings notation
From: Mathieu Malaterre @ 2017-12-15 11:15 UTC (permalink / raw)
To: Rob Herring
Cc: Mathieu Malaterre, Benoît Cousson, Tony Lindgren,
Mark Rutland, Russell King, Jesper Nilsson, Lars Persson,
Niklas Cassel, Nicolas Ferre, Alexandre Belloni, Florian Fainelli,
Ray Jui, Scott Branden, bcm-kernel-feedback-list, Jon Mason,
Sekhar Nori, Kevin Hilman, Kukjin Kim, Krzysztof Kozlowski,
Shawn Guo, Sascha Hauer, Fabio Estevam, Santosh Shilimkar,
Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Vladimir Zapolskiy, Sylvain Lemieux, Matthias Brugger, Barry Song,
Heiko Stuebner, Dinh Nguyen, Viresh Kumar, Shiraz Hashim,
Maxime Coquelin, Alexandre Torgue, Jun Nie, Baoyou Xie,
linux-omap, devicetree, linux-arm-kernel, linux-kernel,
linux-arm-kernel, linux-samsung-soc, linux-mediatek,
linux-rockchip
In-Reply-To: <20171214165350.27850-1-malat@debian.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
---
arch/arm/boot/dts/artpec6.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi
index 2ed11773048d..71e0e75e986b 100644
--- a/arch/arm/boot/dts/artpec6.dtsi
+++ b/arch/arm/boot/dts/artpec6.dtsi
@@ -98,7 +98,7 @@
clock-frequency = <125000000>;
};
- clkctrl: clkctrl@0xf8000000 {
+ clkctrl: clkctrl@f8000000 {
#clock-cells = <1>;
compatible = "axis,artpec6-clkctrl";
reg = <0xf8000000 0x48>;
--
2.11.0
^ permalink raw reply related
* Re: [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.
From: Yong @ 2017-12-15 11:01 UTC (permalink / raw)
To: Maxime Ripard
Cc: Mauro Carvalho Chehab, Rob Herring, Mark Rutland, Chen-Yu Tsai,
Greg Kroah-Hartman, David S. Miller, Hans Verkuil, Arnd Bergmann,
Hugues Fruchet, Yannick Fertre, Philipp Zabel, Benoit Parrot,
Benjamin Gaignard, Jean-Christophe Trotin,
Ramesh Shanmugasundaram, Minghsiu Tsai, Krzysztof Kozlowski,
Robert Jarzmik, linux-media-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-sun
In-Reply-To: <20171215105047.ist7epuida2uao74-ZC1Zs529Oq4@public.gmane.org>
Hi Maxime,
On Fri, 15 Dec 2017 11:50:47 +0100
Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Yong,
>
> On Mon, Dec 04, 2017 at 05:45:11PM +0800, Yong wrote:
> > I just noticed that you are using the second iteration?
> > Have you received my third iteration?
>
> Sorry for the late reply, and for not coming back to you yet about
> that test. No, this is still in your v2. I've definitely received your
> v3, I just didn't have time to update to it yet.
>
> But don't worry, my mail was mostly to know if you had tested that
> setup on your side to try to nail down the issue on my end, not really
> a review or comment that would prevent your patch from going in.
I mean,
The v2 exactly has a bug which may cause the CSI writing frame to
a wrong memory address.
BTW, should I send a new version. I have made some improve sine v3.
>
> Maxime
>
> --
> Maxime Ripard, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com
Thanks,
Yong
^ permalink raw reply
* [PATCH v3 5/5] arm64: dts: rockchip: add reset property for dwc3 controllers on rk3399.
From: Enric Balletbo i Serra @ 2017-12-15 11:00 UTC (permalink / raw)
To: Rob Herring, Heiko Stuebner
Cc: dianders, groeck, briannorris, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
In-Reply-To: <20171215110005.7564-1-enric.balletbo@collabora.com>
After commit '06c47e6286d usb: dwc3: of-simple: Add support to get resets
for the device' you can add the reset property to the dwc3 node, the reset
is required for the controller to work properly, otherwise bind / unbind
stress testing of the USB controller on rk3399 we'd often end up with lots
of failures that looked like this:
phy phy-ff800000.phy.9: phy poweron failed --> -110
dwc3 fe900000.dwc3: failed to initialize core
dwc3: probe of fe900000.dwc3 failed with error -110
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v1:
- This patch did not exists in the series.
Changes since v2:
- Introduced this patch
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index c18ff88..83f0f71 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -402,6 +402,8 @@
clock-names = "ref_clk", "suspend_clk",
"bus_clk", "aclk_usb3_rksoc_axi_perf",
"aclk_usb3", "grf_clk";
+ resets = <&cru SRST_A_USB3_OTG0>;
+ reset-names = "usb3-otg";
status = "disabled";
usbdrd_dwc3_0: dwc3 {
@@ -433,6 +435,8 @@
clock-names = "ref_clk", "suspend_clk",
"bus_clk", "aclk_usb3_rksoc_axi_perf",
"aclk_usb3", "grf_clk";
+ resets = <&cru SRST_A_USB3_OTG1>;
+ reset-names = "usb3-otg";
status = "disabled";
usbdrd_dwc3_1: dwc3 {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 4/5] arm64: dts: rockchip: add pd_usb3 power-domain node for rk3399.
From: Enric Balletbo i Serra @ 2017-12-15 11:00 UTC (permalink / raw)
To: Rob Herring, Heiko Stuebner
Cc: dianders, groeck, briannorris, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
In-Reply-To: <20171215110005.7564-1-enric.balletbo@collabora.com>
Add the usb3 power-domain, its qos area and assign it to the usb device
node.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v1:
- Split the original patch in different commits
Changes since v2:
- None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index ea91f25..c18ff88 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -417,6 +417,7 @@
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
+ power-domains = <&power RK3399_PD_USB3>;
status = "disabled";
};
};
@@ -447,6 +448,7 @@
snps,dis_u2_susphy_quirk;
snps,dis-del-phy-power-chg-quirk;
snps,dis-tx-ipgap-linecheck-quirk;
+ power-domains = <&power RK3399_PD_USB3>;
status = "disabled";
};
};
@@ -995,6 +997,12 @@
clocks = <&cru HCLK_SDIO>;
pm_qos = <&qos_sdioaudio>;
};
+ pd_usb3@RK3399_PD_USB3 {
+ reg = <RK3399_PD_USB3>;
+ clocks = <&cru ACLK_USB3>;
+ pm_qos = <&qos_usb_otg0>,
+ <&qos_usb_otg1>;
+ };
pd_vio@RK3399_PD_VIO {
reg = <RK3399_PD_VIO>;
#address-cells = <1>;
--
2.9.3
^ permalink raw reply related
* [PATCH v3 3/5] arm64: dts: rockchip: add usb3-phy otg-port support for rk3399.
From: Enric Balletbo i Serra @ 2017-12-15 11:00 UTC (permalink / raw)
To: Rob Herring, Heiko Stuebner
Cc: dianders, groeck, briannorris, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
In-Reply-To: <20171215110005.7564-1-enric.balletbo@collabora.com>
Add the usb3 phyter for the USB3.0 OTG controller.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v1:
- Split the original patch in different commits
Changes since v2:
- None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index f32e9c4..ea91f25 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -409,8 +409,8 @@
reg = <0x0 0xfe800000 0x0 0x100000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
dr_mode = "otg";
- phys = <&u2phy0_otg>;
- phy-names = "usb2-phy";
+ phys = <&u2phy0_otg>, <&tcphy0_usb3>;
+ phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk;
@@ -439,8 +439,8 @@
reg = <0x0 0xfe900000 0x0 0x100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
dr_mode = "otg";
- phys = <&u2phy1_otg>;
- phy-names = "usb2-phy";
+ phys = <&u2phy1_otg>, <&tcphy1_usb3>;
+ phy-names = "usb2-phy", "usb3-phy";
phy_type = "utmi_wide";
snps,dis_enblslpm_quirk;
snps,dis-u2-freeclk-exists-quirk;
--
2.9.3
^ permalink raw reply related
* [PATCH v3 2/5] arm64: dts: rockchip: add the aclk_usb3 clocks for USB3.
From: Enric Balletbo i Serra @ 2017-12-15 11:00 UTC (permalink / raw)
To: Rob Herring, Heiko Stuebner
Cc: dianders, groeck, briannorris, devicetree, linux-arm-kernel,
linux-rockchip, linux-kernel
In-Reply-To: <20171215110005.7564-1-enric.balletbo@collabora.com>
The aclk_usb3 must be enabled to support USB3 for rk3399.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---
Changes since v1:
- Split the original patch in different commits
Changes since v2:
- None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 17e5e1a..f32e9c4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -397,9 +397,11 @@
#size-cells = <2>;
ranges;
clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
- <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
+ <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+ <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "grf_clk";
+ "bus_clk", "aclk_usb3_rksoc_axi_perf",
+ "aclk_usb3", "grf_clk";
status = "disabled";
usbdrd_dwc3_0: dwc3 {
@@ -425,9 +427,11 @@
#size-cells = <2>;
ranges;
clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
- <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
+ <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>,
+ <&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>;
clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "grf_clk";
+ "bus_clk", "aclk_usb3_rksoc_axi_perf",
+ "aclk_usb3", "grf_clk";
status = "disabled";
usbdrd_dwc3_1: dwc3 {
--
2.9.3
^ permalink raw reply related
* [PATCH v3 1/5] arm64: dts: rockchip: add extcon nodes and enable tcphy.
From: Enric Balletbo i Serra @ 2017-12-15 11:00 UTC (permalink / raw)
To: Rob Herring, Heiko Stuebner
Cc: dianders-hpIqsD4AKlfQT0dZR+AlfA, groeck-F7+t8E8rja9g9hUCZPvPmw,
briannorris-hpIqsD4AKlfQT0dZR+AlfA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Enable tcphy and create the cros-ec's extcon node for the USB Type-C port.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
Reviewed-by: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
Changes since v1:
- Add the Reviewed-by: Brian Norris
Changes since v2:
- None
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 470105d..03f1950 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -855,6 +855,20 @@ ap_i2c_audio: &i2c8 {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
};
+
+ usbc_extcon0: extcon@0 {
+ compatible = "google,extcon-usbc-cros-ec";
+ google,usb-port-id = <0>;
+
+ #extcon-cells = <0>;
+ };
+
+ usbc_extcon1: extcon@1 {
+ compatible = "google,extcon-usbc-cros-ec";
+ google,usb-port-id = <1>;
+
+ #extcon-cells = <0>;
+ };
};
};
@@ -865,6 +879,16 @@ ap_i2c_audio: &i2c8 {
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
};
+&tcphy0 {
+ status = "okay";
+ extcon = <&usbc_extcon0>;
+};
+
+&tcphy1 {
+ status = "okay";
+ extcon = <&usbc_extcon1>;
+};
+
&u2phy0 {
status = "okay";
};
@@ -911,6 +935,7 @@ ap_i2c_audio: &i2c8 {
&usbdrd3_0 {
status = "okay";
+ extcon = <&usbc_extcon0>;
};
&usbdrd_dwc3_0 {
@@ -920,6 +945,7 @@ ap_i2c_audio: &i2c8 {
&usbdrd3_1 {
status = "okay";
+ extcon = <&usbc_extcon1>;
};
&usbdrd_dwc3_1 {
--
2.9.3
--
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^ permalink raw reply related
* Re: [PATCH v3 03/11] thermal: armada: Simplify the check of the validity bit
From: Miquel RAYNAL @ 2017-12-15 10:56 UTC (permalink / raw)
To: Baruch Siach
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Mark Rutland,
Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth,
Catalin Marinas, Will Deacon, linux-pm, devicetree,
linux-arm-kernel, Thomas Petazzoni, Antoine Tenart, Nadav Haklai,
David Sniatkiwicz
In-Reply-To: <20171215083316.4xswddwbcijxhuxn@tarshish>
Hello Baruch,
On Fri, 15 Dec 2017 10:33:16 +0200
Baruch Siach <baruch@tkos.co.il> wrote:
> Hi Miquel,
>
> On Thu, Dec 14, 2017 at 11:30:03AM +0100, Miquel Raynal wrote:
> > All Armada SoCs use one bit to declare if the sensor values are
> > valid. This bit moves across the versions of the IP.
> >
> > The method until then was to do both a shift and compare with an
> > useless flag of "0x1". It is clearer and quicker to directly save
> > the value that must be ANDed instead of the bit position and do a
> > single bitwise AND operation.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> > ---
> > drivers/thermal/armada_thermal.c | 12 +++++-------
> > 1 file changed, 5 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/thermal/armada_thermal.c
> > b/drivers/thermal/armada_thermal.c index 6c4af2622d4f..26698f2d3ca7
> > 100644 --- a/drivers/thermal/armada_thermal.c
> > +++ b/drivers/thermal/armada_thermal.c
> > @@ -24,8 +24,6 @@
> > #include <linux/of_device.h>
> > #include <linux/thermal.h>
> >
> > -#define THERMAL_VALID_MASK 0x1
> > -
> > /* Thermal Manager Control and Status Register */
> > #define PMU_TDC0_SW_RST_MASK (0x1 << 1)
> > #define PMU_TM_DISABLE_OFFS 0
> > @@ -67,7 +65,7 @@ struct armada_thermal_data {
> > /* Register shift and mask to access the sensor
> > temperature */ unsigned int temp_shift;
> > unsigned int temp_mask;
> > - unsigned int is_valid_shift;
> > + unsigned int is_valid_bit;
>
> Type should be u32 now, I think.
Indeed, I'll change it in next version.
>
> > };
> >
> > static void armadaxp_init_sensor(struct platform_device *pdev,
> > @@ -151,7 +149,7 @@ static bool armada_is_valid(struct
> > armada_thermal_priv *priv) {
> > unsigned long reg = readl_relaxed(priv->sensor);
>
> u32 here also, I think. But that's unrelated to this patch.
I completely agree, actually this is done in the next patch, moving all
"unsigned long reg" to "u32 reg" while renaming the registers
pointers, hope this is fine?
>
> > - return (reg >> priv->data->is_valid_shift) &
> > THERMAL_VALID_MASK;
> > + return reg & priv->data->is_valid_bit;
> > }
> >
> > static int armada_get_temp(struct thermal_zone_device *thermal,
> > @@ -199,7 +197,7 @@ static const struct armada_thermal_data
> > armadaxp_data = { static const struct armada_thermal_data
> > armada370_data = { .is_valid = armada_is_valid,
> > .init_sensor = armada370_init_sensor,
> > - .is_valid_shift = 9,
> > + .is_valid_bit = BIT(9),
> > .temp_shift = 10,
> > .temp_mask = 0x1ff,
> > .coef_b = 3153000000UL,
> > @@ -210,7 +208,7 @@ static const struct armada_thermal_data
> > armada370_data = { static const struct armada_thermal_data
> > armada375_data = { .is_valid = armada_is_valid,
> > .init_sensor = armada375_init_sensor,
> > - .is_valid_shift = 10,
> > + .is_valid_bit = BIT(10),
> > .temp_shift = 0,
> > .temp_mask = 0x1ff,
> > .coef_b = 3171900000UL,
> > @@ -221,7 +219,7 @@ static const struct armada_thermal_data
> > armada375_data = { static const struct armada_thermal_data
> > armada380_data = { .is_valid = armada_is_valid,
> > .init_sensor = armada380_init_sensor,
> > - .is_valid_shift = 10,
> > + .is_valid_bit = BIT(10),
> > .temp_shift = 0,
> > .temp_mask = 0x3ff,
> > .coef_b = 1172499100UL,
>
> baruch
>
Best regards,
Miquèl
^ permalink raw reply
* Re: [PATCH v3 01/11] dt-bindings: thermal: Describe Armada AP806 and CP110
From: Miquel RAYNAL @ 2017-12-15 10:52 UTC (permalink / raw)
To: Gregory CLEMENT
Cc: Baruch Siach, Mark Rutland, Andrew Lunn, Jason Cooper,
Nadav Haklai, linux-pm-u79uwXL29TY76Z2rM5mHXA, Catalin Marinas,
Antoine Tenart, Will Deacon, David Sniatkiwicz, Eduardo Valentin,
devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring, Zhang Rui,
Thomas Petazzoni,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Sebastian Hesselbarth
In-Reply-To: <87po7gmlcs.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hello Baruch and Gregory,
On Fri, 15 Dec 2017 09:44:19 +0100
Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Miquel,
>
> On ven., déc. 15 2017, Miquel RAYNAL
> <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>
> > Hello Baruch,
> >
> > On Fri, 15 Dec 2017 10:27:59 +0200
> > Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org> wrote:
> >
> >> Hi Miquel
> >>
> >> On Thu, Dec 14, 2017 at 11:30:01AM +0100, Miquel Raynal wrote:
> >> > +- marvell,thermal-zone-name: The name to identify the thermal
> >> > zone
> >> > + within the sysfs, useful when
> >> > multiple
> >> > + thermal zones are registered (AP,
> >> > CPx...).
> >>
> >> I don't think that would be acceptable. DT is about describing the
> >> hardware. sysfs is a Linux implementation detail which is not tied
> >> to any specific hardware. If this is accepted, the property should
> >> be named 'linux,thermal-zone-name'.
> >
> > You are right the sysfs mention should not appear in the
> > description.
Actually, you are right for all of it, this property should not
exist, sorry for my too quick answer.
> >
> > Otherwise for the naming I'm not sure "linux," is a valid prefix in
> > that case.
Thank you both for your explanations, I was also wrong about the prefix.
>
> Actually the choice between linux or marvell make me realize that
> there is something wrong. Having a name associated to a device is
> something pretty usual with the device tree, however it is as the
> class device level, such as clock-names, line-name, or
> regulator-name. So in my opinion if we want to support naming from
> device tree it would be done for all the thermal device not just for
> the Marvell one.
>
> However I don't think we need it. For example for the clocks we
> created the name dynamically using of the base address of the
> register to keep them unique.
I was convinced that dev_name's would be the same but after trying it on
a 8040-DB, using dev_name(&pdev->dev) gives:
f06f808c.thermal
f2400078.thermal
f4400078.thermal
which I found meaningful enough.
I will drop the property and use dev_name instead. I still need your
help to solve one problem though: how to make the distinction between
using "armada_thermal" (the previous name) and dev_name() ? If I don't
it kind of breaks userspace, doesn't it ?
Thank you,
Miquèl
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^ permalink raw reply
* Re: [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.
From: Maxime Ripard @ 2017-12-15 10:50 UTC (permalink / raw)
To: Yong
Cc: Mauro Carvalho Chehab, Rob Herring, Mark Rutland, Chen-Yu Tsai,
Greg Kroah-Hartman, David S. Miller, Hans Verkuil, Arnd Bergmann,
Hugues Fruchet, Yannick Fertre, Philipp Zabel, Benoit Parrot,
Benjamin Gaignard, Jean-Christophe Trotin,
Ramesh Shanmugasundaram, Minghsiu Tsai, Krzysztof Kozlowski,
Robert Jarzmik, lin
In-Reply-To: <20171204174511.a5be3b521e9a7c7004d32d0d-+3dxTMOEIRNWk0Htik3J/w@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 681 bytes --]
Hi Yong,
On Mon, Dec 04, 2017 at 05:45:11PM +0800, Yong wrote:
> I just noticed that you are using the second iteration?
> Have you received my third iteration?
Sorry for the late reply, and for not coming back to you yet about
that test. No, this is still in your v2. I've definitely received your
v3, I just didn't have time to update to it yet.
But don't worry, my mail was mostly to know if you had tested that
setup on your side to try to nail down the issue on my end, not really
a review or comment that would prevent your patch from going in.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Re: [PATCH] dt-bindings: mfd: mc13xxx: Add the unit address to sysled
From: Lee Jones @ 2017-12-15 10:50 UTC (permalink / raw)
To: Fabio Estevam
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, devicetree-u79uwXL29TY76Z2rM5mHXA,
Fabio Estevam
In-Reply-To: <1512165086-25512-1-git-send-email-festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On Fri, 01 Dec 2017, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>
>
> As the 'reg' property is mandatory in the subnodes, improve the
> example by adding the unit address to the sysled node.
>
> This prevents the following build warning with W=1:
>
> Node /soc/aips@70000000/spba@70000000/ecspi@70010000/pmic@0/leds/sysled0 has a reg or ranges property, but no unit name
>
> Signed-off-by: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org>
> ---
> Documentation/devicetree/bindings/mfd/mc13xxx.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
--
Lee Jones
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply
* Re: [PATCH 12/12] ARM64: dts: marvell: use reworked NAND controller driver on Armada 8K
From: Gregory CLEMENT @ 2017-12-15 10:44 UTC (permalink / raw)
To: Miquel Raynal
Cc: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Cyrille Pitchen, Rob Herring, Mark Rutland,
Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Russell King,
Daniel Mack, Haojian Zhuang, Robert Jarzmik, Eric Miao,
Catalin Marinas, Will Deacon,
Ezequiel Garcia <ezequiel.garcia>
In-Reply-To: <87y3m4l1wi.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hi,
On ven., déc. 15 2017, Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Miquel,
>
> On jeu., déc. 07 2017, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>
>> Use the new bindings of the reworked Marvell NAND controller driver.
>> Also adapt the nand controller node organization to distinguish which
>> property is relevant for the controller, and which one is NAND chip
>> specific. Expose the partitions as a subnode of the NAND chip.
>>
>> Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
>> the driver activates the arbiter by default for all boards (either
>> needed or harmless).
>>
>> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>
> Applied on mvebu/dt64
As for the other paych, I have been said that actually thess changes are
not ready and that we should wait for the driver would me merged first
so I moved it on mvebu/dt64-nand
Gregory
>
> Thanks,
>
> Gregory
>
>> ---
>> arch/arm64/boot/dts/marvell/armada-8040-db.dts | 46 +++++++++++++---------
>> .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 10 ++---
>> 2 files changed, 32 insertions(+), 24 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
>> index b1f6cccc5081..c25ac3fa9aec 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
>> +++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
>> @@ -272,27 +272,35 @@
>> * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
>> * MDIO signal of CP1.
>> */
>> -&cps_nand {
>> - num-cs = <1>;
>> +&cps_nand_controller {
>> pinctrl-0 = <&nand_pins>, <&nand_rb>;
>> pinctrl-names = "default";
>> - nand-ecc-strength = <4>;
>> - nand-ecc-step-size = <512>;
>> - marvell,nand-enable-arbiter;
>> - marvell,system-controller = <&cps_syscon0>;
>> - nand-on-flash-bbt;
>> -
>> - partition@0 {
>> - label = "U-Boot";
>> - reg = <0 0x200000>;
>> - };
>> - partition@200000 {
>> - label = "Linux";
>> - reg = <0x200000 0xe00000>;
>> - };
>> - partition@1000000 {
>> - label = "Filesystem";
>> - reg = <0x1000000 0x3f000000>;
>> +
>> + nand@0 {
>> + reg = <0>;
>> + marvell,rb = <0>;
>> + nand-on-flash-bbt;
>> + nand-ecc-strength = <4>;
>> + nand-ecc-step-size = <512>;
>> +
>> + partitions {
>> + compatible = "fixed-partitions";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + partition@0 {
>> + label = "U-Boot";
>> + reg = <0 0x200000>;
>> + };
>> + partition@200000 {
>> + label = "Linux";
>> + reg = <0x200000 0xe00000>;
>> + };
>> + partition@1000000 {
>> + label = "Filesystem";
>> + reg = <0x1000000 0x3f000000>;
>> + };
>> + };
>> };
>> };
>>
>> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
>> index cb1fb49ccf81..8610163bb1a4 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
>> @@ -310,20 +310,20 @@
>> status = "disabled";
>> };
>>
>> - cps_nand: nand@720000 {
>> + cps_nand_controller: nand@720000 {
>> /*
>> * Due to the limiation of the pin available
>> * this controller is only usable on the CPM
>> * for A7K and on the CPS for A8K.
>> */
>> - compatible = "marvell,armada370-nand",
>> - "marvell,armada-8k-nand";
>> + compatible = "marvell,armada-8k-nand-controller",
>> + "marvell,armada370-nand-controller";
>> reg = <0x720000 0x54>;
>> #address-cells = <1>;
>> - #size-cells = <1>;
>> + #size-cells = <0>;
>> interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
>> clocks = <&cps_clk 1 2>;
>> - marvell,system-controller = <&cpm_syscon0>;
>> + marvell,system-controller = <&cps_syscon0>;
>> status = "disabled";
>> };
>>
>> --
>> 2.11.0
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> Gregory Clement, Free Electrons
> Kernel, drivers, real-time and embedded Linux
> development, consulting, training and support.
> http://free-electrons.com
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH 11/12] ARM64: dts: marvell: use reworked NAND controller driver on Armada 7K
From: Gregory CLEMENT @ 2017-12-15 10:44 UTC (permalink / raw)
To: Miquel Raynal
Cc: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Cyrille Pitchen, Rob Herring, Mark Rutland,
Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Russell King,
Daniel Mack, Haojian Zhuang, Robert Jarzmik, Eric Miao,
Catalin Marinas, Will Deacon,
Ezequiel Garcia <ezequiel.garcia>
In-Reply-To: <87374cmghe.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hi,
On ven., déc. 15 2017, Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Miquel,
>
> On jeu., déc. 07 2017, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>
>> Use the new bindings of the reworked Marvell NAND controller driver.
>> Also adapt the nand controller node organization to distinguish which
>> property is relevant for the controller, and which one is NAND chip
>> specific. Expose the partitions as a subnode of the NAND chip.
>>
>> Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
>> the driver activates the arbiter by default for all boards (either
>> needed or harmless).
>>
>> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>
> Applied on mvebu/dt64
Well I have been said that actually thess changes are not ready and that
we should wait for the driver would me merged first so I moved it on
mvebu/dt64-nand
>
> Thanks,
>
> Gregory
>
>> ---
>> arch/arm64/boot/dts/marvell/armada-7040-db.dts | 52 +++++++++++++---------
>> .../boot/dts/marvell/armada-cp110-master.dtsi | 8 ++--
>> 2 files changed, 36 insertions(+), 24 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
>> index 52b5341cb270..758452c10612 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
>> +++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
>> @@ -156,36 +156,48 @@
>> };
>> };
>>
>> -&cpm_nand {
>> +&cpm_nand_controller {
>> /*
>> * SPI on CPM and NAND have common pins on this board. We can
>> - * use only one at a time. To enable the NAND (whihch will
>> + * use only one at a time. To enable the NAND (which will
>> * disable the SPI), the "status = "okay";" line have to be
>> * added here.
>> */
>> - num-cs = <1>;
>> pinctrl-0 = <&nand_pins>, <&nand_rb>;
>> pinctrl-names = "default";
>> - nand-ecc-strength = <4>;
>> - nand-ecc-step-size = <512>;
>> - marvell,nand-enable-arbiter;
>> - nand-on-flash-bbt;
>> -
>> - partition@0 {
>> - label = "U-Boot";
>> - reg = <0 0x200000>;
>> - };
>> - partition@200000 {
>> - label = "Linux";
>> - reg = <0x200000 0xe00000>;
>> - };
>> - partition@1000000 {
>> - label = "Filesystem";
>> - reg = <0x1000000 0x3f000000>;
>> +
>> + nand@0 {
>> + reg = <0>;
>> + label = "pxa3xx_nand-0";
>> + marvell,rb = <0>;
>> + nand-on-flash-bbt;
>> + nand-ecc-strength = <4>;
>> + nand-ecc-step-size = <512>;
>> +
>> + partitions {
>> + compatible = "fixed-partitions";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + partition@0 {
>> + label = "U-Boot";
>> + reg = <0 0x200000>;
>> + };
>> +
>> + partition@200000 {
>> + label = "Linux";
>> + reg = <0x200000 0xe00000>;
>> + };
>> +
>> + partition@1000000 {
>> + label = "Filesystem";
>> + reg = <0x1000000 0x3f000000>;
>> + };
>> +
>> + };
>> };
>> };
>>
>> -
>> &cpm_spi1 {
>> status = "okay";
>>
>> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
>> index e3b64d03fbd8..8a3cff9a7343 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
>> @@ -309,17 +309,17 @@
>> status = "disabled";
>> };
>>
>> - cpm_nand: nand@720000 {
>> + cpm_nand_controller: nand@720000 {
>> /*
>> * Due to the limiation of the pin available
>> * this controller is only usable on the CPM
>> * for A7K and on the CPS for A8K.
>> */
>> - compatible = "marvell,armada-8k-nand",
>> - "marvell,armada370-nand";
>> + compatible = "marvell,armada-8k-nand-controller",
>> + "marvell,armada370-nand-controller";
>> reg = <0x720000 0x54>;
>> #address-cells = <1>;
>> - #size-cells = <1>;
>> + #size-cells = <0>;
>> interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
>> clocks = <&cpm_clk 1 2>;
>> marvell,system-controller = <&cpm_syscon0>;
>> --
>> 2.11.0
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> --
> Gregory Clement, Free Electrons
> Kernel, drivers, real-time and embedded Linux
> development, consulting, training and support.
> http://free-electrons.com
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH v6] mfd: syscon: Add hardware spinlock support
From: Lee Jones @ 2017-12-15 10:42 UTC (permalink / raw)
To: Baolin Wang
Cc: arnd-r2nGTMty4D4, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, broonie-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <87ec50c846bbc7afc09ba0855aba1cdea6473308.1512048582.git.baolin.wang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Arnd,
> Some system control registers need hardware spinlock to synchronize
> between the multiple subsystems, so we should add hardware spinlock
> support for syscon.
>
> Signed-off-by: Baolin Wang <baolin.wang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> ---
> Changes since v5:
> - Fix the case that hwspinlock is not enabled.
>
> Changes since v4:
> - Add one exapmle to show how to add hwlock.
> - Fix the coding style issue.
>
> Changes since v3:
> - Add error handling for of_hwspin_lock_get_id()
>
> Changes since v2:
> - Add acked tag from Rob.
>
> Changes since v1:
> - Remove timeout configuration.
> - Modify the binding file to add hwlocks.
> ---
> Documentation/devicetree/bindings/mfd/syscon.txt | 8 +++++++
> drivers/mfd/syscon.c | 25 ++++++++++++++++++++++
> 2 files changed, 33 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.txt b/Documentation/devicetree/bindings/mfd/syscon.txt
> index 8b92d45..25d9e9c 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.txt
> +++ b/Documentation/devicetree/bindings/mfd/syscon.txt
> @@ -16,9 +16,17 @@ Required properties:
> Optional property:
> - reg-io-width: the size (in bytes) of the IO accesses that should be
> performed on the device.
> +- hwlocks: reference to a phandle of a hardware spinlock provider node.
>
> Examples:
> gpr: iomuxc-gpr@20e0000 {
> compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
> reg = <0x020e0000 0x38>;
> + hwlocks = <&hwlock1 1>;
> +};
> +
> +hwlock1: hwspinlock@40500000 {
> + ...
> + reg = <0x40500000 0x1000>;
> + #hwlock-cells = <1>;
> };
> diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c
> index b93fe4c..a7ae391 100644
> --- a/drivers/mfd/syscon.c
> +++ b/drivers/mfd/syscon.c
> @@ -13,6 +13,7 @@
> */
>
> #include <linux/err.h>
> +#include <linux/hwspinlock.h>
> #include <linux/io.h>
> #include <linux/module.h>
> #include <linux/list.h>
> @@ -87,6 +88,30 @@ static struct syscon *of_syscon_register(struct device_node *np)
> if (ret)
> reg_io_width = 4;
>
> + ret = of_hwspin_lock_get_id(np, 0);
> + if (ret > 0) {
> + syscon_config.hwlock_id = ret;
> + syscon_config.hwlock_mode = HWLOCK_IRQSTATE;
> + } else {
> + switch (ret) {
> + case -ENOENT:
> + /* Ignore missing hwlock, it's optional. */
> + break;
> + case 0:
> + /* In case of the HWSPINLOCK is not enabled. */
> + if (!IS_ENABLED(CONFIG_HWSPINLOCK))
> + break;
> +
> + ret = -EINVAL;
> + /* fall-through */
> + default:
> + pr_err("Failed to retrieve valid hwlock: %d\n", ret);
> + /* fall-through */
> + case -EPROBE_DEFER:
> + goto err_regmap;
> + }
> + }
> +
> syscon_config.reg_stride = reg_io_width;
> syscon_config.val_bits = reg_io_width * 8;
> syscon_config.max_register = resource_size(&res) - reg_io_width;
--
Lee Jones
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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^ permalink raw reply
* Re: [PATCH v5] i2c: Add support for NXP PCA984x family.
From: Peter Rosin @ 2017-12-15 10:40 UTC (permalink / raw)
To: Adrian Fiergolski
Cc: linux-i2c-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA, robh+dt-DgEjT+Ai2ygdnm+yROfE0A
In-Reply-To: <20171214112003.13701-1-adrian.fiergolski-vJEk5272eHo@public.gmane.org>
[It occurred to me that the DT people might skip the v4 discussion now
that there is a v5. So, in order to spare someone the effort of digging
that up, I'm re-sending the comments]
On 2017-12-14 12:20, Adrian Fiergolski wrote:
> This patch extends the current i2c-mux-pca954x driver and adds support for
> a newer PCA984x family of the I2C switches and multiplexers from NXP.
>
> Signed-off-by: Adrian Fiergolski <adrian.fiergolski-vJEk5272eHo@public.gmane.org>
> ---
> I have applied recent Peter's comments.
> I am waiting for comments from device-tree folks regarding compatibles.
>
> .../devicetree/bindings/i2c/i2c-mux-pca954x.txt | 5 ++-
> drivers/i2c/muxes/Kconfig | 6 ++--
> drivers/i2c/muxes/i2c-mux-pca954x.c | 36 +++++++++++++++++++---
> 3 files changed, 39 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> index aa097045a10e..b428bc0d81b1 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> @@ -1,10 +1,13 @@
> * NXP PCA954x I2C bus switch
>
> +The driver supports NXP PCA954x and PCA984x I2C mux/switch devices.
> +
> Required Properties:
>
> - compatible: Must contain one of the following.
> "nxp,pca9540", "nxp,pca9542", "nxp,pca9543", "nxp,pca9544",
> - "nxp,pca9545", "nxp,pca9546", "nxp,pca9547", "nxp,pca9548"
> + "nxp,pca9545", "nxp,pca9546", "nxp,pca9547", "nxp,pca9548",
> + "nxp,pca9846", "nxp,pca9847", "nxp,pca9848", "nxp,pca9849"
I think that perhaps the new chips should have compatibles like:
compatible = "nxp,pca9846", "nxp,pca9546";
compatible = "nxp,pca9847", "nxp,pca9547";
compatible = "nxp,pca9848", "nxp,pca9548";
since they are extremely similar to the older chips (the only
difference is the device id support and other esoteric stuff that
you don't need to use). That way the device-tree will work even
with an older OS that only supports pca954x chips. And when you
add the device id check for the pca984x family, you are set up
to differentiate.
(pca9849 isn't really compatible with any of the pca954x chips since
it lacks interrupt handling)
So, what is best practice in this situation?
Come to think of it, this is closely related to
https://lkml.org/lkml/2017/8/3/226
which did not get a satisfactory answer IMHO.
> - reg: The I2C address of the device.
>
*snip*
Cheers,
Peter
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^ permalink raw reply
* Re: [PATCH 12/12] ARM64: dts: marvell: use reworked NAND controller driver on Armada 8K
From: Gregory CLEMENT @ 2017-12-15 10:29 UTC (permalink / raw)
To: Miquel Raynal
Cc: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Cyrille Pitchen, Rob Herring, Mark Rutland,
Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Russell King,
Daniel Mack, Haojian Zhuang, Robert Jarzmik, Eric Miao,
Catalin Marinas, Will Deacon,
Ezequiel Garcia <ezequiel.garcia>
In-Reply-To: <20171207201814.30411-13-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hi Miquel,
On jeu., déc. 07 2017, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Use the new bindings of the reworked Marvell NAND controller driver.
> Also adapt the nand controller node organization to distinguish which
> property is relevant for the controller, and which one is NAND chip
> specific. Expose the partitions as a subnode of the NAND chip.
>
> Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
> the driver activates the arbiter by default for all boards (either
> needed or harmless).
>
> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Applied on mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-8040-db.dts | 46 +++++++++++++---------
> .../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 10 ++---
> 2 files changed, 32 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
> index b1f6cccc5081..c25ac3fa9aec 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
> @@ -272,27 +272,35 @@
> * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
> * MDIO signal of CP1.
> */
> -&cps_nand {
> - num-cs = <1>;
> +&cps_nand_controller {
> pinctrl-0 = <&nand_pins>, <&nand_rb>;
> pinctrl-names = "default";
> - nand-ecc-strength = <4>;
> - nand-ecc-step-size = <512>;
> - marvell,nand-enable-arbiter;
> - marvell,system-controller = <&cps_syscon0>;
> - nand-on-flash-bbt;
> -
> - partition@0 {
> - label = "U-Boot";
> - reg = <0 0x200000>;
> - };
> - partition@200000 {
> - label = "Linux";
> - reg = <0x200000 0xe00000>;
> - };
> - partition@1000000 {
> - label = "Filesystem";
> - reg = <0x1000000 0x3f000000>;
> +
> + nand@0 {
> + reg = <0>;
> + marvell,rb = <0>;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition@0 {
> + label = "U-Boot";
> + reg = <0 0x200000>;
> + };
> + partition@200000 {
> + label = "Linux";
> + reg = <0x200000 0xe00000>;
> + };
> + partition@1000000 {
> + label = "Filesystem";
> + reg = <0x1000000 0x3f000000>;
> + };
> + };
> };
> };
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> index cb1fb49ccf81..8610163bb1a4 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
> @@ -310,20 +310,20 @@
> status = "disabled";
> };
>
> - cps_nand: nand@720000 {
> + cps_nand_controller: nand@720000 {
> /*
> * Due to the limiation of the pin available
> * this controller is only usable on the CPM
> * for A7K and on the CPS for A8K.
> */
> - compatible = "marvell,armada370-nand",
> - "marvell,armada-8k-nand";
> + compatible = "marvell,armada-8k-nand-controller",
> + "marvell,armada370-nand-controller";
> reg = <0x720000 0x54>;
> #address-cells = <1>;
> - #size-cells = <1>;
> + #size-cells = <0>;
> interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cps_clk 1 2>;
> - marvell,system-controller = <&cpm_syscon0>;
> + marvell,system-controller = <&cps_syscon0>;
> status = "disabled";
> };
>
> --
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
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Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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^ permalink raw reply
* Re: [PATCH 11/12] ARM64: dts: marvell: use reworked NAND controller driver on Armada 7K
From: Gregory CLEMENT @ 2017-12-15 10:29 UTC (permalink / raw)
To: Miquel Raynal
Cc: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, Cyrille Pitchen, Rob Herring, Mark Rutland,
Jason Cooper, Andrew Lunn, Sebastian Hesselbarth, Russell King,
Daniel Mack, Haojian Zhuang, Robert Jarzmik, Eric Miao,
Catalin Marinas, Will Deacon,
Ezequiel Garcia <ezequiel.garcia>
In-Reply-To: <20171207201814.30411-12-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Hi Miquel,
On jeu., déc. 07 2017, Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Use the new bindings of the reworked Marvell NAND controller driver.
> Also adapt the nand controller node organization to distinguish which
> property is relevant for the controller, and which one is NAND chip
> specific. Expose the partitions as a subnode of the NAND chip.
>
> Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
> the driver activates the arbiter by default for all boards (either
> needed or harmless).
>
> Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Applied on mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-7040-db.dts | 52 +++++++++++++---------
> .../boot/dts/marvell/armada-cp110-master.dtsi | 8 ++--
> 2 files changed, 36 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
> index 52b5341cb270..758452c10612 100644
> --- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
> @@ -156,36 +156,48 @@
> };
> };
>
> -&cpm_nand {
> +&cpm_nand_controller {
> /*
> * SPI on CPM and NAND have common pins on this board. We can
> - * use only one at a time. To enable the NAND (whihch will
> + * use only one at a time. To enable the NAND (which will
> * disable the SPI), the "status = "okay";" line have to be
> * added here.
> */
> - num-cs = <1>;
> pinctrl-0 = <&nand_pins>, <&nand_rb>;
> pinctrl-names = "default";
> - nand-ecc-strength = <4>;
> - nand-ecc-step-size = <512>;
> - marvell,nand-enable-arbiter;
> - nand-on-flash-bbt;
> -
> - partition@0 {
> - label = "U-Boot";
> - reg = <0 0x200000>;
> - };
> - partition@200000 {
> - label = "Linux";
> - reg = <0x200000 0xe00000>;
> - };
> - partition@1000000 {
> - label = "Filesystem";
> - reg = <0x1000000 0x3f000000>;
> +
> + nand@0 {
> + reg = <0>;
> + label = "pxa3xx_nand-0";
> + marvell,rb = <0>;
> + nand-on-flash-bbt;
> + nand-ecc-strength = <4>;
> + nand-ecc-step-size = <512>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition@0 {
> + label = "U-Boot";
> + reg = <0 0x200000>;
> + };
> +
> + partition@200000 {
> + label = "Linux";
> + reg = <0x200000 0xe00000>;
> + };
> +
> + partition@1000000 {
> + label = "Filesystem";
> + reg = <0x1000000 0x3f000000>;
> + };
> +
> + };
> };
> };
>
> -
> &cpm_spi1 {
> status = "okay";
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> index e3b64d03fbd8..8a3cff9a7343 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
> @@ -309,17 +309,17 @@
> status = "disabled";
> };
>
> - cpm_nand: nand@720000 {
> + cpm_nand_controller: nand@720000 {
> /*
> * Due to the limiation of the pin available
> * this controller is only usable on the CPM
> * for A7K and on the CPS for A8K.
> */
> - compatible = "marvell,armada-8k-nand",
> - "marvell,armada370-nand";
> + compatible = "marvell,armada-8k-nand-controller",
> + "marvell,armada370-nand-controller";
> reg = <0x720000 0x54>;
> #address-cells = <1>;
> - #size-cells = <1>;
> + #size-cells = <0>;
> interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&cpm_clk 1 2>;
> marvell,system-controller = <&cpm_syscon0>;
> --
> 2.11.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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