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* [RFC 1/5] [media] rc: update sunxi-ir driver to get base frequency from devicetree
From: Philipp Rossak @ 2017-12-16  2:49 UTC (permalink / raw)
  To: mchehab-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
	mark.rutland-5wv7dgnIgG8,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw, sean-hENCXIMQXOg,
	p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ, andi.shyti-Sze3O3UU22JBDgjK7y7TUQ
  Cc: linux-media-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20171216024914.7550-1-embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

This patch updates the sunxi-ir driver to set the ir base clock from
devicetree.

This is neccessary since there are different ir recievers on the
market, that operate with different frequencys. So this value needs to
be set depending on the attached receiver.

Signed-off-by: Philipp Rossak <embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 drivers/media/rc/sunxi-cir.c | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 97f367b446c4..55b53d6463e9 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -72,12 +72,6 @@
 /* CIR_REG register idle threshold */
 #define REG_CIR_ITHR(val)    (((val) << 8) & (GENMASK(15, 8)))
 
-/* Required frequency for IR0 or IR1 clock in CIR mode */
-#define SUNXI_IR_BASE_CLK     8000000
-/* Frequency after IR internal divider  */
-#define SUNXI_IR_CLK          (SUNXI_IR_BASE_CLK / 64)
-/* Sample period in ns */
-#define SUNXI_IR_SAMPLE       (1000000000ul / SUNXI_IR_CLK)
 /* Noise threshold in samples  */
 #define SUNXI_IR_RXNOISE      1
 /* Idle Threshold in samples */
@@ -122,7 +116,7 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
 			/* for each bit in fifo */
 			dt = readb(ir->base + SUNXI_IR_RXFIFO_REG);
 			rawir.pulse = (dt & 0x80) != 0;
-			rawir.duration = ((dt & 0x7f) + 1) * SUNXI_IR_SAMPLE;
+			rawir.duration = ((dt & 0x7f) + 1) * ir->rc->rx_resolution;
 			ir_raw_event_store_with_filter(ir->rc, &rawir);
 		}
 	}
@@ -148,6 +142,7 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 	struct device_node *dn = dev->of_node;
 	struct resource *res;
 	struct sunxi_ir *ir;
+	u32 b_clk_freq;
 
 	ir = devm_kzalloc(dev, sizeof(struct sunxi_ir), GFP_KERNEL);
 	if (!ir)
@@ -172,6 +167,12 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 		return PTR_ERR(ir->clk);
 	}
 
+	/* Required frequency for IR0 or IR1 clock in CIR mode */
+	if (of_property_read_u32(dn, "base-clk-frequency", &b_clk_freq)) {
+		dev_err(dev, "failed to get ir base clock frequency.\n");
+		return -ENODATA;
+	}
+
 	/* Reset (optional) */
 	ir->rst = devm_reset_control_get_optional_exclusive(dev, NULL);
 	if (IS_ERR(ir->rst))
@@ -180,7 +181,7 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
-	ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
+	ret = clk_set_rate(ir->clk, b_clk_freq);
 	if (ret) {
 		dev_err(dev, "set ir base clock failed!\n");
 		goto exit_reset_assert;
@@ -225,7 +226,8 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 	ir->rc->map_name = ir->map_name ?: RC_MAP_EMPTY;
 	ir->rc->dev.parent = dev;
 	ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
-	ir->rc->rx_resolution = SUNXI_IR_SAMPLE;
+	/* Frequency after IR internal divider with sample period in ns */
+	ir->rc->rx_resolution = (1000000000ul / (b_clk_freq / 64));
 	ir->rc->timeout = MS_TO_NS(SUNXI_IR_TIMEOUT);
 	ir->rc->driver_name = SUNXI_IR_DEV;
 
-- 
2.11.0

^ permalink raw reply related

* [RFC 0/5] IR support for A83T - sunxi-ir driver update
From: Philipp Rossak @ 2017-12-16  2:49 UTC (permalink / raw)
  To: mchehab-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
	mark.rutland-5wv7dgnIgG8,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw, sean-hENCXIMQXOg,
	p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ, andi.shyti-Sze3O3UU22JBDgjK7y7TUQ
  Cc: linux-media-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw

This patch series adds support for the sunxi A83T ir module and enhances the sunxi-ir driver.
Right now the base clock frequency for the ir driver is a hard coded define and is set to 8 MHz.
This works for the most common ir receivers. On the Sinovoip Bananapi M3 the ir receiver needs,
a 3 MHz base clock frequency to work without problems with this driver (like in the legacy kernel).

To fix this issue I reworked the driver that this value could be set over the devicetree.

About 37 devices would have a devicetree change if this patch series would be applied.
Therfore I would like to ask you to give me some feedback about the patch series, before I finialize it.


Thanks in advance!

Philipp


Philipp Rossak (5):
  [media] rc: update sunxi-ir driver to get base frequency from
    devicetree
  [media] dt: bindings: Update binding documentation for sunxi IR
    controller
  ARM: dts: sun8i: a83t: Add the ir pin for the A83T
  ARM: dts: sun8i: a83t: Add support for the ir interface
  ARM: dts: sun8i: a83t: bananapi-m3: Enable IR controller

 Documentation/devicetree/bindings/media/sunxi-ir.txt | 14 ++++++++------
 arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts         |  7 +++++++
 arch/arm/boot/dts/sun8i-a83t.dtsi                    | 15 +++++++++++++++
 drivers/media/rc/sunxi-cir.c                         | 20 +++++++++++---------
 4 files changed, 41 insertions(+), 15 deletions(-)

-- 
2.11.0

^ permalink raw reply

* Re: [PATCH 1/3] dt-bindings: chosen: Add clocksource and clockevent selection
From: Grygorii Strashko @ 2017-12-16  1:57 UTC (permalink / raw)
  To: Alexandre Belloni, Rob Herring, Daniel Lezcano
  Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, Thomas Gleixner,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	Boris Brezillon
In-Reply-To: <20171213185313.20017-2-alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>



On 12/13/2017 12:53 PM, Alexandre Belloni wrote:
> The clocksource and clockevent timer are probed early in the boot process.
> At that time it is difficult for linux to know whether a particular timer
> can be used as the clocksource or the clockevent or by another driver,
> especially when they are all identical or have similar features.
> 
> Until now, multiple strategies have been used to solve that:
>   - use Kconfig option as MXC_USE_EPIT or ATMEL_TCB_CLKSRC_BLOCK
>   - use a kernel parameter as the "clocksource" early_param in mach-omap2
>   - registering the first seen timer as a clockevent and the second one as
>   a clocksource as in rk_timer_init or dw_apb_timer_init
> 
> Add a linux,clocksource and a linux,clockevent node in chosen with a timer
> property pointing to the timer to use. Other properties, like the targeted
> precision may be added later.
> 
> Signed-off-by: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> ---
>   Documentation/devicetree/bindings/chosen.txt | 20 ++++++++++++++++++++
>   1 file changed, 20 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/chosen.txt b/Documentation/devicetree/bindings/chosen.txt
> index e3b13ea7d2ae..c7ee3ecb5276 100644
> --- a/Documentation/devicetree/bindings/chosen.txt
> +++ b/Documentation/devicetree/bindings/chosen.txt
> @@ -120,3 +120,23 @@ e.g.
>   While this property does not represent a real hardware, the address
>   and the size are expressed in #address-cells and #size-cells,
>   respectively, of the root node.
> +
> +linux,clocksource and linux,clockevent
> +--------------------------------------
> +
> +Those nodes have a timer property. This property is a phandle to the timer to be
> +chosen as the clocksource or clockevent. This is only useful when the platform
> +has multiple identical timers and it is not possible to let linux make the
> +correct choice.
> +
> +/ {
> +	chosen {
> +		linux,clocksource {
> +			timer = <&timer0>;
> +		};
> +
> +		linux,clockevent {
> +			timer = <&timer1>;
> +		};
> +	};
> +};
> 

It'd be nice if smth. like this will actually happen, as on some OMAP
platforms can be up to 3-4 alternatives for each clocksource/clockevent and
different combination need to be selected depending on SoC and platform
(and sometime - use case) which is pain in multi-platform environment now.

But more important note from my side is clocksource and clockevent selections seems 
not enough :( There are also sched clock (sched_clock_register()) and delay_timer
 (register_current_timer_delay() at least on ARM).
Both above can't be unregistered (at least last time I've checked).

-- 
regards,
-grygorii
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* Re: [PATCH 3/3] arm64: dts: meson-axg: add new reset DT node
From: Kevin Hilman @ 2017-12-16  0:17 UTC (permalink / raw)
  To: Neil Armstrong
  Cc: Yixun Lan, devicetree-u79uwXL29TY76Z2rM5mHXA, Rob Herring,
	Philipp Zabel, Jerome Brunet, Carlo Caione,
	linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <04b96767-2412-7242-780c-f3e1e610a62b-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>

Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> writes:

> On 10/11/2017 09:46, Yixun Lan wrote:
>> Add reset DT node for Amlogic's Meson-AXG SoC.
>> 
>> Signed-off-by: Yixun Lan <yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
>> ---
>>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++++++
>>  1 file changed, 6 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> index e0fb860e12c5..65945c6c8b65 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
>> @@ -123,6 +123,12 @@
>>  			#size-cells = <2>;
>>  			ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
>>  
>> +			reset: reset-controller@1004 {
>> +				compatible = "amlogic,meson-axg-reset";
>> +				reg = <0x0 0x01004 0x0 0x9c>;
>> +				#reset-cells = <1>;
>> +			};
>> +
>>  			uart_A: serial@24000 {
>>  				compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
>>  				reg = <0x0 0x24000 0x0 0x14>;
>> 
>
> Reviewed-by: Neil Armstrong <narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>

Applied to v4.16/dt64,

Kevin
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* Re: [PATCH v2 1/4] dt-bindings: samsung: document bindings for Midas family boards
From: Rob Herring @ 2017-12-15 23:32 UTC (permalink / raw)
  To: Simon Shields
  Cc: linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA, Kukjin Kim,
	Krzysztof Kozlowski, devicetree-u79uwXL29TY76Z2rM5mHXA,
	Marek Szyprowski, Bartłomiej Żołnierkiewicz
In-Reply-To: <20171214125015.2611-2-simon-WP75azK+jQYgsBAKwltoeQ@public.gmane.org>

On Thu, Dec 14, 2017 at 11:50:12PM +1100, Simon Shields wrote:
> Document GT-I9300, GT-I9305, GT-N7100, and GT-N7105 bindings, along
> with the shared "midas" binding.
> 
> Signed-off-by: Simon Shields <simon-WP75azK+jQYgsBAKwltoeQ@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> index e13459618581..e6765af5cf48 100644
> --- a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
> @@ -9,7 +9,11 @@ Required root node properties:
>  	- "samsung,smdkv310"	- for Exynos4210-based Samsung SMDKV310 eval board.
>  	- "samsung,trats"	- for Exynos4210-based Tizen Reference board.
>  	- "samsung,universal_c210" - for Exynos4210-based Samsung board.
> +	- "samsung,m0"          - for Exynos4412-based Samsung GT-I9300 board.
> +	- "samsung,m3"          - for Exynos4412-based Samsung GT-I9305 board.

Kind of short and it is not clear how "m3" relates to GT-I9305

> +	- "samsung,midas"       - for Exynos4412-based Samsung Midas board.
>  	- "samsung,smdk4412",	- for Exynos4412-based Samsung SMDK4412 eval board.
> +	- "samsung,t0"          - for Exynos4412-based Samsung GT-N7100/GT-N7105 board.
>  	- "samsung,trats2"	- for Exynos4412-based Tizen Reference board.
>  	- "samsung,smdk5250"	- for Exynos5250-based Samsung SMDK5250 eval board.
>  	- "samsung,xyref5260"	- for Exynos5260-based Samsung board.
> -- 
> 2.15.1
> 
> --
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* Re: [PATCH 2/6] dt-bindings: pwm: rcar: Document r8a774[35] PWM bindings
From: Rob Herring @ 2017-12-15 23:30 UTC (permalink / raw)
  To: Fabrizio Castro
  Cc: Thierry Reding, Mark Rutland, Simon Horman, Geert Uytterhoeven,
	Chris Paterson, Biju Das, linux-pwm, devicetree,
	linux-renesas-soc
In-Reply-To: <1513248976-26700-3-git-send-email-fabrizio.castro@bp.renesas.com>

On Thu, Dec 14, 2017 at 10:56:12AM +0000, Fabrizio Castro wrote:
> This patch adds compatible strings specific to r8a774[35], no driver
> change is needed as the fallback compatible string will activate the
> right code. Also, this patch replaces the example with a DT snippet used
> for adding PWM0 support to an r8a7743 based platform.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
> ---
> Dear All,
> 
> the reason for replacing the example with one of a different SoC is that
> the new example refers to recent code from a real use case. I hope that's ok.
> 
> Thanks,
> Fabrizio
> 
>  Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [PATCH v3 01/11] dt-bindings: thermal: Describe Armada AP806 and CP110
From: Rob Herring @ 2017-12-15 23:28 UTC (permalink / raw)
  To: Miquel RAYNAL
  Cc: Gregory CLEMENT, Baruch Siach, Mark Rutland, Andrew Lunn,
	Jason Cooper, Nadav Haklai, linux-pm-u79uwXL29TY76Z2rM5mHXA,
	Catalin Marinas, Antoine Tenart, Will Deacon, David Sniatkiwicz,
	Eduardo Valentin, devicetree-u79uwXL29TY76Z2rM5mHXA, Zhang Rui,
	Thomas Petazzoni,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	Sebastian Hesselbarth
In-Reply-To: <20171215115230.6fb83cb6@xps13>

On Fri, Dec 15, 2017 at 11:52:30AM +0100, Miquel RAYNAL wrote:
> Hello Baruch and Gregory,
> 
> On Fri, 15 Dec 2017 09:44:19 +0100
> Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> 
> > Hi Miquel,
> >  
> >  On ven., déc. 15 2017, Miquel RAYNAL
> > <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> > 
> > > Hello Baruch,
> > >
> > > On Fri, 15 Dec 2017 10:27:59 +0200
> > > Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org> wrote:
> > >  
> > >> Hi Miquel
> > >> 
> > >> On Thu, Dec 14, 2017 at 11:30:01AM +0100, Miquel Raynal wrote:  
> > >> > +- marvell,thermal-zone-name: The name to identify the thermal
> > >> > zone
> > >> > +                             within the sysfs, useful when
> > >> > multiple
> > >> > +                             thermal zones are registered (AP,
> > >> > CPx...).    
> > >> 
> > >> I don't think that would be acceptable. DT is about describing the
> > >> hardware. sysfs is a Linux implementation detail which is not tied
> > >> to any specific hardware. If this is accepted, the property should
> > >> be named 'linux,thermal-zone-name'.  
> > >
> > > You are right the sysfs mention should not appear in the
> > > description.
> 
> Actually, you are right for all of it, this property should not
> exist, sorry for my too quick answer.
> 
> > >
> > > Otherwise for the naming I'm not sure "linux," is a valid prefix in
> > > that case.  
> 
> Thank you both for your explanations, I was also wrong about the prefix.
> 
> > 
> > Actually the choice between linux or marvell make me realize that
> > there is something wrong. Having a name associated to a device is
> > something pretty usual with the device tree, however it is as the
> > class device level, such as clock-names, line-name, or
> > regulator-name. So in my opinion if we want to support naming from
> > device tree it would be done for all the thermal device not just for
> > the Marvell one.
> > 
> > However I don't think we need it. For example for the clocks we
> > created the name dynamically using of the base address of the
> > register to keep them unique.
> 
> I was convinced that dev_name's would be the same but after trying it on
> a 8040-DB, using dev_name(&pdev->dev) gives:
> 
>     f06f808c.thermal
>     f2400078.thermal
>     f4400078.thermal
> 
> which I found meaningful enough.
> 
> I will drop the property and use dev_name instead. I still need your
> help to solve one problem though: how to make the distinction between
> using "armada_thermal" (the previous name) and dev_name() ? If I don't
> it kind of breaks userspace, doesn't it ?

No. The /sys/devices/... or /sys/bus/platform/... paths and names are 
not guaranteed to be stable. These changed for every platform converted 
to DT for example. Userspace should be accessing things through 
/sys/class/... (or deal with changes).

Rob
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* Re: [PATCH v2 10/11] dt-bindings: clock: qcom: add misc resets for PCIE and NSS
From: Rob Herring @ 2017-12-15 23:10 UTC (permalink / raw)
  To: Abhishek Sahu
  Cc: Stephen Boyd, Michael Turquette, Andy Gross, David Brown,
	Mark Rutland, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA,
	linux-soc-u79uwXL29TY76Z2rM5mHXA,
	linux-clk-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1513175142-3702-11-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

On Wed, Dec 13, 2017 at 07:55:41PM +0530, Abhishek Sahu wrote:
> PCIE and NSS has MISC reset register in which single register has
> multiple reset bit. The patch adds the DT bindings for these MISC
> resets.
> 
> Signed-off-by: Abhishek Sahu <absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> ---
>  include/dt-bindings/clock/qcom,gcc-ipq8074.h | 42 ++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

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* Re: [PATCH v2 04/11] dt-bindings: clock: qcom: add remaining clocks for IPQ8074
From: Rob Herring @ 2017-12-15 23:09 UTC (permalink / raw)
  To: Abhishek Sahu
  Cc: Stephen Boyd, Michael Turquette, Andy Gross, David Brown,
	Mark Rutland, linux-arm-msm, linux-soc, linux-clk, linux-kernel,
	devicetree
In-Reply-To: <1513175142-3702-5-git-send-email-absahu@codeaurora.org>

On Wed, Dec 13, 2017 at 07:55:35PM +0530, Abhishek Sahu wrote:
> This patch adds the DT bindings for following IPQ8074 clocks
> 
>  - General PLL’s, NSS UBI PLL and NSS Crypto PLL.
>  - 2 instances of PCIE, USB, SDCC.
>  - 2 NSS UBI core and common NSS clocks. NSS is network switching
>    system which accelerates the ethernet traffic. IPQ8074
>    NSS has two UBI cores. Some clocks are separate for each UBI core
>    and remaining NSS clocks are common.
>  - NSS ethernet port clocks. IPQ8074 has 6 ethernet ports and
>    each port uses different TX and RX clocks.
>  - Crypto engine clocks.
>  - General purpose clocks which comes over GPIO.
> 
> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> ---
>  include/dt-bindings/clock/qcom,gcc-ipq8074.h | 180 +++++++++++++++++++++++++++
>  1 file changed, 180 insertions(+)

Reviewed-by: Rob Herring <robh@kernel.org>


^ permalink raw reply

* Re: [PATCH 1/2] media: dt-bindings: coda: Add compatible for CodaHx4 on i.MX51
From: Rob Herring @ 2017-12-15 23:08 UTC (permalink / raw)
  To: Philipp Zabel
  Cc: linux-media-u79uwXL29TY76Z2rM5mHXA, Mauro Carvalho Chehab,
	Mark Rutland, Fabio Estevam, Chris Healy,
	devicetree-u79uwXL29TY76Z2rM5mHXA, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
In-Reply-To: <20171213140918.22500-1-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>

On Wed, Dec 13, 2017 at 03:09:17PM +0100, Philipp Zabel wrote:
> Add a compatible for the CodaHx4 VPU used on i.MX51.
> 
> Signed-off-by: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/media/coda.txt | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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* Re: [PATCH] drm/panel: Add support for AUO G104SN02 V2 panel
From: Rob Herring @ 2017-12-15 23:07 UTC (permalink / raw)
  To: Christoph Fritz
  Cc: Thierry Reding, David Airlie, Mark Rutland,
	Stefan Riedmüller,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
In-Reply-To: <1513173656.2322.16.camel-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>

On Wed, Dec 13, 2017 at 03:00:56PM +0100, Christoph Fritz wrote:
> This patch adds support for AUO G104SN02 V2 800x600 10.4" panel to DRM
> simple panel driver.
> 
> Signed-off-by: Christoph Fritz <chf.fritz-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
> Signed-off-by: Stefan Riedmueller <s.riedmueller-guT5V/WYfQezQB+pC5nmwQ@public.gmane.org>
> ---
>  .../bindings/display/panel/auo,g104sn02.txt        |  7 ++++++
>  drivers/gpu/drm/panel/panel-simple.c               | 26 ++++++++++++++++++++++
>  2 files changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt
> 
> diff --git a/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt b/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt
> new file mode 100644
> index 0000000..050ac90
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/panel/auo,g104sn02.txt
> @@ -0,0 +1,7 @@
> +AU Optronics Corporation 10.4" (800x600) color TFT LCD panel
> +
> +Required properties:
> +- compatible: should be "auo,g104sn02"
> +
> +This binding is compatible with the simple-panel binding, which is specified
> +in simple-panel.txt in this directory.

Please be explicit as to which properties apply. power-supply?
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* Re: [PATCH 1/2] dt-bindings: thermal: rcar: Add device tree support for r8a7743
From: Rob Herring @ 2017-12-15 23:06 UTC (permalink / raw)
  To: Biju Das
  Cc: Mark Rutland, Zhang Rui, Eduardo Valentin, Simon Horman,
	Magnus Damm, Chris Paterson, devicetree, linux-renesas-soc,
	linux-pm
In-Reply-To: <1513162673-31531-2-git-send-email-biju.das@bp.renesas.com>

On Wed, Dec 13, 2017 at 10:57:52AM +0000, Biju Das wrote:
> Add thermal sensor support for r8a7743 SoC. The Renesas RZ/G1M
> (r8a7743) thermal sensor module is identical to the R-Car Gen2 family.
> 
> No driver change is needed due to the fallback compatible value
> "renesas,rcar-gen2-thermal".
> 
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>
> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> ---
>  Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [PATCH 1/2] dt-bindings: net: add TI CC2560 Bluetooth chip
From: Rob Herring @ 2017-12-15 23:05 UTC (permalink / raw)
  To: David Lechner
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-bluetooth-u79uwXL29TY76Z2rM5mHXA, Mark Rutland,
	Marcel Holtmann, Johan Hedberg, netdev-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <1513124971-23717-2-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>

On Tue, Dec 12, 2017 at 06:29:30PM -0600, David Lechner wrote:
> This adds a compatible string for the Texas Instruments CC2560 Bluetooth
> chip to the existing TI WiLink shared transport bindings. These chips are
> similar enough that the same bindings work for both. The file is renamed
> to ti-bluetooth.txt to make it more generic.
> 
> Signed-off-by: David Lechner <david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
> ---
>  .../bindings/net/{ti,wilink-st.txt => ti-bluetooth.txt}     | 13 +++++++++++--
>  1 file changed, 11 insertions(+), 2 deletions(-)
>  rename Documentation/devicetree/bindings/net/{ti,wilink-st.txt => ti-bluetooth.txt} (78%)

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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* Re: [PATCH v4 2/6] dt: bindings: lp8860: Update DT label binding
From: Rob Herring @ 2017-12-15 22:59 UTC (permalink / raw)
  To: Dan Murphy
  Cc: mark.rutland-5wv7dgnIgG8, rpurdie-Fm38FmjxZ/leoWH0uzbU5w,
	jacek.anaszewski-Re5JQEeQqe8AvxtiuMwx3w, pavel-+ZI9xUNit7I,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-leds-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171212220143.31210-3-dmurphy-l0cyMroinI0@public.gmane.org>

On Tue, Dec 12, 2017 at 04:01:39PM -0600, Dan Murphy wrote:
> Update the lp8860 label binding to the LED
> standard as documented in
> 
> Documentation/devicetree/bindings/leds/common.txt
> 
> Signed-off-by: Dan Murphy <dmurphy-l0cyMroinI0@public.gmane.org>
> ---
> 
> v4 - No changes
> 
> v3 - Added address and size cells, updated label with color and inserted spaces
> around the reg node - https://patchwork.kernel.org/patch/10093749/
> v2 - Added reg to child node and made it required
> 
>  Documentation/devicetree/bindings/leds/leds-lp8860.txt | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/leds/leds-lp8860.txt b/Documentation/devicetree/bindings/leds/leds-lp8860.txt
> index b9d09acbaa73..c3d64ade1e26 100644
> --- a/Documentation/devicetree/bindings/leds/leds-lp8860.txt
> +++ b/Documentation/devicetree/bindings/leds/leds-lp8860.txt
> @@ -9,20 +9,33 @@ Required properties:
>  	- compatible :
>  		"ti,lp8860"
>  	- reg : I2C slave address
> -	- label : Used for naming LEDs
> +	- #address-cells : 1
> +	- #size-cells : 0
>  
>  Optional properties:
>  	- enable-gpios : gpio pin to enable (active high)/disable the device.
>  	- vled-supply : LED supply
>  
> +Required child properties:
> +	- reg : 0
> +

This should be in previous patch?

> +Optional child properties:
> +	- label : see Documentation/devicetree/bindings/leds/common.txt
> +
>  Example:
>  
>  led-controller@2d {
>  	compatible = "ti,lp8860";
> +	#address-cells = <1>;
> +	#size-cells = <0>;
>  	reg = <0x2d>;
> -	label = "display_cluster";
>  	enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
>  	vled-supply = <&vbatt>;
> +
> +	led@0 {
> +		reg = <0>;
> +		label = "white:display_cluster";
> +	};
>  }
>  
>  For more product information please see the link below:
> -- 
> 2.15.0.124.g7668cbc60
> 
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* Re: [PATCH v4 1/6] dt: bindings: lp8860: Update bindings for lp8860
From: Rob Herring @ 2017-12-15 22:57 UTC (permalink / raw)
  To: Dan Murphy
  Cc: mark.rutland, rpurdie, jacek.anaszewski, pavel, devicetree,
	linux-kernel, linux-leds
In-Reply-To: <20171212220143.31210-2-dmurphy@ti.com>

On Tue, Dec 12, 2017 at 04:01:38PM -0600, Dan Murphy wrote:
> Update the lp8860 bindings to fix various issues
> found.  Add address-cells and size-cells, rename

You are doing this in the next patch...

> enable-gpio to enable-gpios, update the node name
> to the device name and indent the node example.
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> 
> v4 - No changes
> 
> v3 - Indicatd enable-gpios is active high, moved address and size cells to child
> node patch and updated parent DT node name - https://patchwork.kernel.org/patch/10093745/
> v2 - New patch
> 
>  Documentation/devicetree/bindings/leds/leds-lp8860.txt | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/leds/leds-lp8860.txt b/Documentation/devicetree/bindings/leds/leds-lp8860.txt
> index aad38dd94d4b..b9d09acbaa73 100644
> --- a/Documentation/devicetree/bindings/leds/leds-lp8860.txt
> +++ b/Documentation/devicetree/bindings/leds/leds-lp8860.txt
> @@ -6,22 +6,22 @@ current sinks that can be controlled by a PWM input
>  signal, a SPI/I2C master, or both.
>  
>  Required properties:
> -	- compatible:
> +	- compatible :
>  		"ti,lp8860"
> -	- reg -  I2C slave address
> -	- label - Used for naming LEDs
> +	- reg : I2C slave address
> +	- label : Used for naming LEDs
>  
>  Optional properties:
> -	- enable-gpio - gpio pin to enable/disable the device.
> -	- supply - "vled" - LED supply
> +	- enable-gpios : gpio pin to enable (active high)/disable the device.
> +	- vled-supply : LED supply
>  
>  Example:
>  
> -leds: leds@6 {
> +led-controller@2d {
>  	compatible = "ti,lp8860";
>  	reg = <0x2d>;
>  	label = "display_cluster";
> -	enable-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
> +	enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
>  	vled-supply = <&vbatt>;
>  }
>  
> -- 
> 2.15.0.124.g7668cbc60
> 

^ permalink raw reply

* Re: [PATCH v4 1/6] dt: bindings: lp8860: Update bindings for lp8860
From: Rob Herring @ 2017-12-15 22:56 UTC (permalink / raw)
  To: Dan Murphy
  Cc: mark.rutland, rpurdie, jacek.anaszewski, pavel, devicetree,
	linux-kernel, linux-leds
In-Reply-To: <20171212220143.31210-2-dmurphy@ti.com>

On Tue, Dec 12, 2017 at 04:01:38PM -0600, Dan Murphy wrote:
> Update the lp8860 bindings to fix various issues
> found.  Add address-cells and size-cells, rename
> enable-gpio to enable-gpios, update the node name
> to the device name and indent the node example.
> 
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> 
> v4 - No changes
> 
> v3 - Indicatd enable-gpios is active high, moved address and size cells to child
> node patch and updated parent DT node name - https://patchwork.kernel.org/patch/10093745/
> v2 - New patch
> 
>  Documentation/devicetree/bindings/leds/leds-lp8860.txt | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [RFC] irqchip: add support for LS1021A external interrupt lines
From: Rasmus Villemoes @ 2017-12-15 22:55 UTC (permalink / raw)
  To: Rob Herring
  Cc: Thomas Gleixner, Jason Cooper, Marc Zyngier, Mark Rutland,
	Alexander Stein, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	devicetree-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171212232839.yy3jtn6amktqjo4g@rob-hp-laptop>

On 2017-12-13 00:28, Rob Herring wrote:
> On Fri, Dec 08, 2017 at 03:33:00PM +0100, Rasmus Villemoes wrote:
>>
>>  .../interrupt-controller/fsl,ls1021a-extirq.txt    |  19 +++
> 
> Please split to separate patch.

Will do.

>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt
>> @@ -0,0 +1,19 @@
>> +* Freescale LS1021A external IRQs
>> +
>> +The LS1021A supports inverting the polarity of six external interrupt lines.
>> +
>> +Required properties:
>> +- compatible: should be "fsl,ls1021a-extirq"
>> +- interrupt-controller: Identifies the node as an interrupt controller
>> +- #interrupt-cells: Use the same format as specified by GIC in arm,gic.txt.
>> +- interrupt-parent: phandle of GIC.
>> +- syscon: phandle of Supplemental Configuration Unit (scfg).
> 
> Can this be a child of that node instead?

I suppose it could, but I don't think it would make much sense. In any
case, I did it this way because that seemed to be the way the syscon
driver is used in lots of other cases, cf. all the occurrences of
syscon_regmap_lookup_by_phandle() and the corresponding bindings - I
don't think I've seen any of those cases represent the syscon-using node
as a child of the syscon node.

>> +
>> +Example:
>> +		extirq: interrupt-controller@15701ac {
> 
> Unit-address without reg is not valid. Building with W=1 will tell you 
> this.

Thanks, that was actually a leftover from an earlier version.

Rasmus
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* Re: [RFC PATCH 1/2] dt: bindings: as3645a: Update dt node example with standard
From: Rob Herring @ 2017-12-15 22:54 UTC (permalink / raw)
  To: Dan Murphy
  Cc: mark.rutland-5wv7dgnIgG8, rpurdie-Fm38FmjxZ/leoWH0uzbU5w,
	jacek.anaszewski-Re5JQEeQqe8AvxtiuMwx3w, pavel-+ZI9xUNit7I,
	sakari.ailus-X3B1VOXEql0, laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-leds-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171212215024.30116-1-dmurphy-l0cyMroinI0@public.gmane.org>

On Tue, Dec 12, 2017 at 03:50:23PM -0600, Dan Murphy wrote:
> Update the DT binding to remove the device name from
> the DT parent node as well as removing the device
> name from the label.  The LED label will be generated
> based off the id name stored in the local driver so
> the LED function can be indicated in the label DT
> entry.

The subject seems incomplete "... with standard ?"

> 
> Also removed the indentation on the example.
> 
> Signed-off-by: Dan Murphy <dmurphy-l0cyMroinI0@public.gmane.org>
> ---
>  .../devicetree/bindings/leds/ams,as3645a.txt       | 36 +++++++++++-----------
>  1 file changed, 18 insertions(+), 18 deletions(-)

Otherwise,

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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* Re: [PATCH 1/3] dt-bindings: timer: renesas, cmt: Document r8a774[35] CMT support
From: Rob Herring @ 2017-12-15 22:51 UTC (permalink / raw)
  To: Fabrizio Castro
  Cc: Mark Rutland, linux-renesas-soc, Daniel Lezcano, Thomas Gleixner,
	Simon Horman, Geert Uytterhoeven, Chris Paterson, Biju Das,
	devicetree
In-Reply-To: <1513104579-6333-2-git-send-email-fabrizio.castro@bp.renesas.com>

On Tue, Dec 12, 2017 at 06:49:37PM +0000, Fabrizio Castro wrote:
> Document SoC specific compatible strings for r8a7743 and r8a7745.
> No driver change is needed as the fallback strings will activate
> the right code.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das@bp.renesas.com>
> ---
>  Documentation/devicetree/bindings/timer/renesas,cmt.txt | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [PATCH v11 1/2] dt: bindings: lm3692x: Add bindings for lm3692x LED driver
From: Rob Herring @ 2017-12-15 22:50 UTC (permalink / raw)
  To: Dan Murphy
  Cc: mark.rutland-5wv7dgnIgG8, rpurdie-Fm38FmjxZ/leoWH0uzbU5w,
	jacek.anaszewski-Re5JQEeQqe8AvxtiuMwx3w, pavel-+ZI9xUNit7I,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-leds-u79uwXL29TY76Z2rM5mHXA
In-Reply-To: <20171212181550.22677-1-dmurphy-l0cyMroinI0@public.gmane.org>

On Tue, Dec 12, 2017 at 12:15:49PM -0600, Dan Murphy wrote:
> This adds the devicetree bindings for the LM3692x
> I2C LED string driver.
> 
> Acked-by: Pavel Machek <pavel-+ZI9xUNit7I@public.gmane.org>
> Signed-off-by: Dan Murphy <dmurphy-l0cyMroinI0@public.gmane.org>
> ---

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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* [PATCH 2/2] ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Nanopi M1
From: Philipp Rossak @ 2017-12-15 22:39 UTC (permalink / raw)
  To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20171215223901.14500-1-embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

The dwmac-sun8i hardware is present on the Nanopi M1.
It uses the internal PHY

Signed-off-by: Philipp Rossak <embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
index 3a2ccdb28afd..c77fbca4f227 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts
@@ -45,6 +45,10 @@
 / {
 	model = "FriendlyArm NanoPi M1";
 	compatible = "friendlyarm,nanopi-m1", "allwinner,sun8i-h3";
+
+	aliases {
+		ethernet0 = &emac;
+	};
 };
 
 &ehci1 {
@@ -55,6 +59,13 @@
 	status = "okay";
 };
 
+&emac {
+	phy-handle = <&int_mii_phy>;
+	phy-mode = "mii";
+	allwinner,leds-active-low;
+	status = "okay";
+};
+
 &ir {
 	pinctrl-names = "default";
 	pinctrl-0 = <&ir_pins_a>;
-- 
2.11.0

^ permalink raw reply related

* [PATCH 1/2] ARM: dts: sun8i: h3: nanopi-m1-plus: fix missing ethernet 0 in aliases
From: Philipp Rossak @ 2017-12-15 22:39 UTC (permalink / raw)
  To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
In-Reply-To: <20171215223901.14500-1-embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Signed-off-by: Philipp Rossak <embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 0a8b79cf5954..87509a3e6aba 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -48,6 +48,7 @@
 
 	aliases {
 		serial1 = &uart3;
+		ethernet0 = &emac;
 		ethernet1 = &sdio_wifi;
 	};
 
-- 
2.11.0

^ permalink raw reply related

* [PATCH 0/2] Ethernet for the Nanopi M1 & M1 plus
From: Philipp Rossak @ 2017-12-15 22:38 UTC (permalink / raw)
  To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8, wens-jdAy2FN1RRM
  Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw

The first patch of this patch series, fixes a missing alias 
on the nanopi m1 plus. The second patch enables the dwmac-sun8i 
ethernet driver on the Nanopi M1.

Philipp Rossak (2):
  ARM: dts: sun8i: h3: nanopi-m1-plus: fix missing ethernet 0 in aliases
  ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Nanopi M1

 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts |  1 +
 arch/arm/boot/dts/sun8i-h3-nanopi-m1.dts      | 11 +++++++++++
 2 files changed, 12 insertions(+)

-- 
2.11.0

^ permalink raw reply

* Re: [PATCH 04/10] clk: qcom: Add CPU clock driver for msm8996
From: Rob Herring @ 2017-12-15 22:35 UTC (permalink / raw)
  To: Ilia Lin
  Cc: linux-clk, linux-arm-kernel, linux-arm-msm, sboyd, devicetree,
	mark.rutland, will.deacon, rnayak, qualcomm-lt, celster, tfinkel
In-Reply-To: <1513081897-31612-5-git-send-email-ilialin@codeaurora.org>

On Tue, Dec 12, 2017 at 02:31:31PM +0200, Ilia Lin wrote:
> From: Rajendra Nayak <rnayak@codeaurora.org>
> 
> Each of the CPU clusters (Power and Perf) on msm8996 are
> clocked via 2 PLLs, a primary and alternate. There are also
> 2 Mux'es, a primary and secondary all connected together
> as shown below
> 
>                              +-------+
>               XO             |       |
>           +------------------>0      |
>                              |       |
>                    PLL/2     | SMUX  +----+
>                      +------->1      |    |
>                      |       |       |    |
>                      |       +-------+    |    +-------+
>                      |                    +---->0      |
>                      |                         |       |
> +---------------+    |             +----------->1      | CPU clk
> |Primary PLL    +----+ PLL_EARLY   |           |       +------>
> |               +------+-----------+    +------>2 PMUX |
> +---------------+      |                |      |       |
>                        |   +------+     |   +-->3      |
>                        +--^+  ACD +-----+   |  +-------+
> +---------------+          +------+         |
> |Alt PLL        |                           |
> |               +---------------------------+
> +---------------+         PLL_EARLY
> 
> The primary PLL is what drives the CPU clk, except for times
> when we are reprogramming the PLL itself (for rate changes) when
> we temporarily switch to an alternate PLL. A subsequent patch adds
> support to switch between primary and alternate PLL during rate
> changes.
> 
> The primary PLL operates on a single VCO range, between 600Mhz
> and 3Ghz. However the CPUs do support OPPs with frequencies
> between 300Mhz and 600Mhz. In order to support running the CPUs
> at those frequencies we end up having to lock the PLL at twice
> the rate and drive the CPU clk via the PLL/2 output and SMUX.
> 
> So for frequencies above 600Mhz we follow the following path
>  Primary PLL --> PLL_EARLY --> PMUX(1) --> CPU clk
> and for frequencies between 300Mhz and 600Mhz we follow
>  Primary PLL --> PLL/2 --> SMUX(1) --> PMUX(0) --> CPU clk
> Support for this is added in a subsequent patch as well.
> 
> ACD stands for Adaptive Clock Distribution and is used to
> detect voltage droops. We do not add support for ACD as yet.
> This can be added at a later point as needed.
> 
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> ---
>  .../devicetree/bindings/clock/qcom,kryocc.txt      |  17 +

If you respin, please make bindings a separate patch. In any case,

Reviewed-by: Rob Herring <robh@kernel.org>

>  drivers/clk/qcom/Kconfig                           |   8 +
>  drivers/clk/qcom/Makefile                          |   1 +
>  drivers/clk/qcom/clk-cpu-8996.c                    | 388 +++++++++++++++++++++
>  4 files changed, 414 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,kryocc.txt
>  create mode 100644 drivers/clk/qcom/clk-cpu-8996.c

^ permalink raw reply

* Re: [PATCH v2 1/4] dt-bindings: pinctrl: add bindings for MediaTek MT7622 SoC
From: Rob Herring @ 2017-12-15 22:28 UTC (permalink / raw)
  To: sean.wang
  Cc: mark.rutland, linus.walleij, matthias.bgg, devicetree,
	linux-mediatek, linux-arm-kernel, linux-gpio, linux-kernel
In-Reply-To: <eb93acdb07a0205e9d3089058b45aee1a6c04d50.1513059081.git.sean.wang@mediatek.com>

On Tue, Dec 12, 2017 at 02:24:18PM +0800, sean.wang@mediatek.com wrote:
> From: Sean Wang <sean.wang@mediatek.com>
> 
> Add devicetree bindings for MediaTek MT7622 pinctrl driver.
> 
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> Reviewed-by: Biao Huang <biao.huang@mediatek.com>
> ---
>  .../devicetree/bindings/pinctrl/pinctrl-mt7622.txt | 351 +++++++++++++++++++++
>  1 file changed, 351 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt7622.txt

Acked-by: Rob Herring <robh@kernel.org>

^ permalink raw reply


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