* Re: [PATCH v4 10/12] staging: iio: ad2s1200: Add scaling factor for angle channel
From: Jonathan Cameron @ 2018-05-20 11:10 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <559356a5b2467bd871e12460faa4edb3c80980ec.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:23:14 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> A scaling factor of approximately 2 * Pi / (2^12 -1) is added,
> to scale the 12-bits angular position to radians.
>
> A return type of IIO_VAL_INT_PLUS_NANO is used, so that the scale of
> both the angle channel and angular velocity channel has 7 significant
> digits.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Applied
Thanks,
Jonathan
> ---
> drivers/staging/iio/resolver/ad2s1200.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index 7b8af558e921..10d6d79dce79 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -58,6 +58,11 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev,
> switch (m) {
> case IIO_CHAN_INFO_SCALE:
> switch (chan->type) {
> + case IIO_ANGL:
> + /* 2 * Pi / (2^12 - 1) ~= 0.001534355 */
> + *val = 0;
> + *val2 = 1534355;
> + return IIO_VAL_INT_PLUS_NANO;
> case IIO_ANGL_VEL:
> /* 2 * Pi ~= 6.283185 */
> *val = 6;
> @@ -112,6 +117,7 @@ static const struct iio_chan_spec ad2s1200_channels[] = {
> .indexed = 1,
> .channel = 0,
> .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
> + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
> }, {
> .type = IIO_ANGL_VEL,
> .indexed = 1,
^ permalink raw reply
* Re: [PATCH v4 09/12] staging: iio: ad2s1200: Add scaling factor for angular velocity channel
From: Jonathan Cameron @ 2018-05-20 11:09 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <6d616883c8431021cdfd0eaa551790e41d80a664.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:23:01 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> The sysfs iio ABI states radians per second is expected as the unit for
> angular velocity, but the 12-bit angular velocity register has
> revolution per seconds as its unit. So a scaling factor of approximately
> 2 * Pi is added to the angular velocity channel.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.
Thanks,
Jonathan
> ---
> Changes in v4:
> - Changed rps to revolutions per second in commit message
> to prevent confusion.
>
> drivers/staging/iio/resolver/ad2s1200.c | 71 ++++++++++++++++---------
> 1 file changed, 45 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index 67d9747f88a6..7b8af558e921 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -55,37 +55,55 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev,
> struct ad2s1200_state *st = iio_priv(indio_dev);
> int ret;
>
> - mutex_lock(&st->lock);
> - gpiod_set_value(st->sample, 0);
> -
> - /* delay (6 * AD2S1200_TSCLK + 20) nano seconds */
> - udelay(1);
> - gpiod_set_value(st->sample, 1);
> - gpiod_set_value(st->rdvel, !!(chan->type == IIO_ANGL));
> -
> - ret = spi_read(st->sdev, &st->rx, 2);
> - if (ret < 0) {
> + switch (m) {
> + case IIO_CHAN_INFO_SCALE:
> + switch (chan->type) {
> + case IIO_ANGL_VEL:
> + /* 2 * Pi ~= 6.283185 */
> + *val = 6;
> + *val2 = 283185;
> + return IIO_VAL_INT_PLUS_MICRO;
> + default:
> + return -EINVAL;
> + }
> + break;
> + case IIO_CHAN_INFO_RAW:
> + mutex_lock(&st->lock);
> + gpiod_set_value(st->sample, 0);
> +
> + /* delay (6 * AD2S1200_TSCLK + 20) nano seconds */
> + udelay(1);
> + gpiod_set_value(st->sample, 1);
> + gpiod_set_value(st->rdvel, !!(chan->type == IIO_ANGL));
> +
> + ret = spi_read(st->sdev, &st->rx, 2);
> + if (ret < 0) {
> + mutex_unlock(&st->lock);
> + return ret;
> + }
> +
> + switch (chan->type) {
> + case IIO_ANGL:
> + *val = be16_to_cpup(&st->rx) >> 4;
> + break;
> + case IIO_ANGL_VEL:
> + *val = sign_extend32(be16_to_cpup(&st->rx) >> 4, 11);
> + break;
> + default:
> + mutex_unlock(&st->lock);
> + return -EINVAL;
> + }
> +
> + /* delay (2 * AD2S1200_TSCLK + 20) ns for sample pulse */
> + udelay(1);
> mutex_unlock(&st->lock);
> - return ret;
> - }
>
> - switch (chan->type) {
> - case IIO_ANGL:
> - *val = be16_to_cpup(&st->rx) >> 4;
> - break;
> - case IIO_ANGL_VEL:
> - *val = sign_extend32(be16_to_cpup(&st->rx) >> 4, 11);
> - break;
> + return IIO_VAL_INT;
> default:
> - mutex_unlock(&st->lock);
> - return -EINVAL;
> + break;
> }
>
> - /* delay (2 * AD2S1200_TSCLK + 20) ns for sample pulse */
> - udelay(1);
> - mutex_unlock(&st->lock);
> -
> - return IIO_VAL_INT;
> + return -EINVAL;
> }
>
> static const struct iio_chan_spec ad2s1200_channels[] = {
> @@ -99,6 +117,7 @@ static const struct iio_chan_spec ad2s1200_channels[] = {
> .indexed = 1,
> .channel = 0,
> .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
> + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
> }
> };
>
^ permalink raw reply
* Re: [PATCH v4 08/12] dt-bindings: iio: resolver: Document AD2S1200 bindings
From: Jonathan Cameron @ 2018-05-20 11:05 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <cbe0f4194cca49c303fbe62b215bfaf0af6e2bbb.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:22:50 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> Add documentation for the device tree bindings of the AD2S1200 resolver.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Nothing fundamentally wrong it in here, but a few things to tidy up.
> ---
> Changes in v4:
> - Added vendor prefix to gpio function name.
> - Added unit address.
> - Changed commit subject to be more inline with other dt-bindings
> commit .
>
> .../bindings/iio/resolver/ad2s1200.txt | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/resolver/ad2s1200.txt
>
> diff --git a/Documentation/devicetree/bindings/iio/resolver/ad2s1200.txt b/Documentation/devicetree/bindings/iio/resolver/ad2s1200.txt
> new file mode 100644
> index 000000000000..bbf54260c911
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/resolver/ad2s1200.txt
> @@ -0,0 +1,16 @@
> +Analog Devices AD2S1200 and AD2S1205 Resolver-to-Digital Converter
> +
> +Required properties:
> + - compatible : should be "adi,ad2s1200" or "adi,ad2s1205"
One line per entry. Saves us having to change this substantially when adding
more parts in future.
> + - reg : the SPI chip select number of the device
> + - adi,sample-gpios : The GPIO pin connected to the SAMPLE line of the AD2S1200
> + - adi,rdvel-gpios : The GPIO pin connected to the RDVEL line of the AD2S1200
> +
> +Example:
> +
> + resolver@0 {
@4 if you are going to have reg = <4> below.
> + compatible = "adi,ad2s1200";
> + reg = <4>;
> + adi,sample-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
> + adi,rdvel-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
> + };
^ permalink raw reply
* Re: [PATCH v4 05/12] staging: iio: ad2s1200: Replace legacy gpio API with modern API
From: Jonathan Cameron @ 2018-05-20 11:04 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <78bc9c09403ac1fa08d610a86505416b85edb306.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:21:56 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> The legacy, integer based gpio API is replaced with the modern
> descriptor based API.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Hmm This is more complex than it needed to be because it
has to do some massaging of the two different methods only
to clean them up in the next patch.
I would have been tempted to combine the two patches or at
the very least add some comments in here that the nastier
corners are about to go away.
Anyhow, not to worry I figured it out slightly before sending
you an email saying not to do it this way ;)
Applied to the togreg branch of iio.git and pushed out as
testing for the autobuilders to play with it.
Thanks,
Jonathan
> ---
> drivers/staging/iio/resolver/ad2s1200.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index 430cc62591fe..b2c46a8c6b77 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -13,6 +13,7 @@
> #include <linux/delay.h>
> #include <linux/device.h>
> #include <linux/gpio.h>
> +#include <linux/gpio/consumer.h>
> #include <linux/module.h>
> #include <linux/mutex.h>
> #include <linux/spi/spi.h>
> @@ -43,8 +44,8 @@
> struct ad2s1200_state {
> struct mutex lock;
> struct spi_device *sdev;
> - int sample;
> - int rdvel;
> + struct gpio_desc *sample;
> + struct gpio_desc *rdvel;
> __be16 rx ____cacheline_aligned;
> };
>
> @@ -58,12 +59,12 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev,
> int ret;
>
> mutex_lock(&st->lock);
> - gpio_set_value(st->sample, 0);
> + gpiod_set_value(st->sample, 0);
>
> /* delay (6 * AD2S1200_TSCLK + 20) nano seconds */
> udelay(1);
> - gpio_set_value(st->sample, 1);
> - gpio_set_value(st->rdvel, !!(chan->type == IIO_ANGL));
> + gpiod_set_value(st->sample, 1);
> + gpiod_set_value(st->rdvel, !!(chan->type == IIO_ANGL));
>
> ret = spi_read(st->sdev, &st->rx, 2);
> if (ret < 0) {
> @@ -133,8 +134,8 @@ static int ad2s1200_probe(struct spi_device *spi)
> st = iio_priv(indio_dev);
> mutex_init(&st->lock);
> st->sdev = spi;
> - st->sample = pins[0];
> - st->rdvel = pins[1];
> + st->sample = gpio_to_desc(pins[0]);
> + st->rdvel = gpio_to_desc(pins[1]);
>
> indio_dev->dev.parent = &spi->dev;
> indio_dev->info = &ad2s1200_info;
^ permalink raw reply
* Re: [PATCH v4 07/12] staging: iio: ad2s1200: Add dt table
From: Jonathan Cameron @ 2018-05-20 11:02 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <eb4fa431405d0d4e73889d440b3b1c95d5c47e54.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:22:41 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> Add device tree table for matching with the vendor ID.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Applied
Thanks,
Jonathan
> ---
> Changes in v4:
> - Introduced in this version.
>
> drivers/staging/iio/resolver/ad2s1200.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index 9a8aa2448897..67d9747f88a6 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -154,6 +154,13 @@ static int ad2s1200_probe(struct spi_device *spi)
> return devm_iio_device_register(&spi->dev, indio_dev);
> }
>
> +static const struct of_device_id ad2s1200_of_match[] = {
> + { .compatible = "adi,ad2s1200", },
> + { .compatible = "adi,ad2s1205", },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, ad2s1200_of_match);
> +
> static const struct spi_device_id ad2s1200_id[] = {
> { "ad2s1200" },
> { "ad2s1205" },
> @@ -164,6 +171,7 @@ MODULE_DEVICE_TABLE(spi, ad2s1200_id);
> static struct spi_driver ad2s1200_driver = {
> .driver = {
> .name = DRV_NAME,
> + .of_match_table = of_match_ptr(ad2s1200_of_match),
> },
> .probe = ad2s1200_probe,
> .id_table = ad2s1200_id,
^ permalink raw reply
* Re: [PATCH v4 06/12] staging: iio: ad2s1200: Replace platform data with dt bindings
From: Jonathan Cameron @ 2018-05-20 11:01 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <6beef6b7514c53f4fac77d661dcae139b55935bf.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:22:32 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> Remove usage of platform data, and replace it with device tree
> facilities.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Great,
Applied to the togreg branch of iio.git and pushed out as testing.
I think the dt bindings that match this are uncontroversial in
what they actually are (comments to follow on that patch) so
should be no problem with this one.
Jonathan
> ---
> Changes in v4:
> - Added vendor prefix to gpio function names.
>
> drivers/staging/iio/resolver/ad2s1200.c | 32 ++++++++++++-------------
> 1 file changed, 15 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index b2c46a8c6b77..9a8aa2448897 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -25,9 +25,6 @@
>
> #define DRV_NAME "ad2s1200"
>
> -/* input pin sample and rdvel is controlled by driver */
> -#define AD2S1200_PN 2
> -
> /* input clock on serial interface */
> #define AD2S1200_HZ 8192000
> /* clock period in nano second */
> @@ -111,20 +108,9 @@ static const struct iio_info ad2s1200_info = {
>
> static int ad2s1200_probe(struct spi_device *spi)
> {
> - unsigned short *pins = spi->dev.platform_data;
> struct ad2s1200_state *st;
> struct iio_dev *indio_dev;
> - int pn, ret;
> -
> - for (pn = 0; pn < AD2S1200_PN; pn++) {
> - ret = devm_gpio_request_one(&spi->dev, pins[pn], GPIOF_DIR_OUT,
> - DRV_NAME);
> - if (ret) {
> - dev_err(&spi->dev, "request gpio pin %d failed\n",
> - pins[pn]);
> - return ret;
> - }
> - }
> + int ret;
>
> indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
> if (!indio_dev)
> @@ -134,8 +120,20 @@ static int ad2s1200_probe(struct spi_device *spi)
> st = iio_priv(indio_dev);
> mutex_init(&st->lock);
> st->sdev = spi;
> - st->sample = gpio_to_desc(pins[0]);
> - st->rdvel = gpio_to_desc(pins[1]);
> +
> + st->sample = devm_gpiod_get(&spi->dev, "adi,sample", GPIOD_OUT_LOW);
> + if (IS_ERR(st->sample)) {
> + dev_err(&spi->dev, "Failed to claim SAMPLE gpio: err=%ld\n",
> + PTR_ERR(st->sample));
> + return PTR_ERR(st->sample);
> + }
> +
> + st->rdvel = devm_gpiod_get(&spi->dev, "adi,rdvel", GPIOD_OUT_LOW);
> + if (IS_ERR(st->rdvel)) {
> + dev_err(&spi->dev, "Failed to claim RDVEL gpio: err=%ld\n",
> + PTR_ERR(st->rdvel));
> + return PTR_ERR(st->rdvel);
> + }
>
> indio_dev->dev.parent = &spi->dev;
> indio_dev->info = &ad2s1200_info;
^ permalink raw reply
* Re: [reset-control] How to initialize hardware state with the shared reset line?
From: Martin Blumenstingl @ 2018-05-20 10:57 UTC (permalink / raw)
To: Masahiro Yamada
Cc: Philipp Zabel, Rob Herring, Lee Jones, Hans de Goede,
Felipe Balbi, DTML, Arnd Bergmann, Linus Walleij,
Linux Kernel Mailing List, linux-arm-kernel
In-Reply-To: <CAK7LNATZgJ4MxOFLUCNARWv3Zz=gpL-jGReDnBnArquiaXRWoQ@mail.gmail.com>
Hi,
On Thu, May 10, 2018 at 11:16 AM, Masahiro Yamada
<yamada.masahiro@socionext.com> wrote:
[snip]
> I may be missing something, but
> one solution might be reset hogging on the
> reset provider side. This allows us to describe
> the initial state of reset lines in the reset controller.
>
> The idea for "reset-hog" is similar to:
> - "gpio-hog" defined in
> Documentation/devicetree/bindings/gpio/gpio.txt
> - "assigned-clocks" defined in
> Documetation/devicetree/bindings/clock/clock-bindings.txt
>
>
>
> For example,
>
> reset-controller {
> ....
>
> line_a {
> reset-hog;
> resets = <1>;
> reset-assert;
> };
> }
>
>
> When the reset controller is registered,
> the reset ID '1' is asserted.
>
>
> So, all reset consumers that share the reset line '1'
> will start from the asserted state
> (i.e. defined state machine state).
I wonder if a "reset hog" can be board specific:
- GPIO hogs are definitely board specific (meson-gxbb-odroidc2.dts for
example uses it to take the USB hub out of reset)
- assigned-clock-parents (and the like) can also be board specific (I
made up a use-case since I don't know of any actual examples: board A
uses an external XTAL while board B uses some other internal
clock-source because it doesn't have an external XTAL)
however, can reset lines be board specific? or in other words: do we
need to describe them in device-tree?
we could extend struct reset_controller_dev (= reset controller
driver) if they are not board specific:
- either assert all reset lines by default except if they are listed
in a new field (may break backwards compatibility, requires testing of
all reset controller drivers)
- specify a list of reset lines and their desired state (or to keep it
easy: specify a list of reset lines that should be asserted)
(I must admit that this is basically your idea but the definition is
moved from device-tree to the reset controller driver)
any "chip" specific differences could be expressed by using a
different of_device_id
one the other hand: your "reset hog" solution looks fine to me if
reset lines can be board specific
> From the discussion with Martin Blumenstingl
> (https://lkml.org/lkml/2018/4/28/115),
> the problem for Amlogic is that
> the reset line is "de-asserted" by default.
> If so, the 'reset-hog' would fix the problem,
> and DWC3 driver would be able to use
> shared, level reset, I think.
I think you are right: if we could control the initial state then we
should be able to use level resets
Regards
Martin
^ permalink raw reply
* Re: [PATCH v4 04/12] staging: iio: ad2s1200: Setup spi before iio device register
From: Jonathan Cameron @ 2018-05-20 10:55 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <2f531545d91366136c7e421f0931637a45b15d51.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:21:44 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> The spi should be set up before the device is registered as an iio
> device.
>
> This patch moves the setup to before the device registration.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Applied to the togreg branch of iio.git and pushed out as testing
for the autobuilders to play with it.
Thanks,
Jonathan
> ---
> Changes in v4:
> - Introduced in this version.
>
> drivers/staging/iio/resolver/ad2s1200.c | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index 068aa86e9c11..430cc62591fe 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -143,15 +143,16 @@ static int ad2s1200_probe(struct spi_device *spi)
> indio_dev->num_channels = ARRAY_SIZE(ad2s1200_channels);
> indio_dev->name = spi_get_device_id(spi)->name;
>
> - ret = devm_iio_device_register(&spi->dev, indio_dev);
> - if (ret)
> - return ret;
> -
> spi->max_speed_hz = AD2S1200_HZ;
> spi->mode = SPI_MODE_3;
> - spi_setup(spi);
> + ret = spi_setup(spi);
> +
> + if (ret < 0) {
> + dev_err(&spi->dev, "spi_setup failed!\n");
> + return ret;
> + }
>
> - return 0;
> + return devm_iio_device_register(&spi->dev, indio_dev);
> }
>
> static const struct spi_device_id ad2s1200_id[] = {
^ permalink raw reply
* Re: [PATCH v4 03/12] staging: iio: ad2s1200: Add kernel docs to driver state
From: Jonathan Cameron @ 2018-05-20 10:53 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <38a9e24e5cdbc98afbf4d06f9848c55c26ce37ff.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:21:34 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> Add missing kernel docs to the ad2s1200 driver state.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Nice.
Applied,
Jonathan
> ---
> Changes in v4:
> - Simplified explanation of lock.
>
> drivers/staging/iio/resolver/ad2s1200.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index 9bdcf0c86217..068aa86e9c11 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -32,6 +32,14 @@
> /* clock period in nano second */
> #define AD2S1200_TSCLK (1000000000 / AD2S1200_HZ)
>
> +/**
> + * struct ad2s1200_state - driver instance specific data.
> + * @lock: protects both the GPIO pins and the rx buffer.
> + * @sdev: spi device.
> + * @sample: GPIO pin SAMPLE.
> + * @rdvel: GPIO pin RDVEL.
> + * @rx: buffer for spi transfers.
> + */
> struct ad2s1200_state {
> struct mutex lock;
> struct spi_device *sdev;
^ permalink raw reply
* Re: [PATCH v4 02/12] staging: iio: ad2s1200: Remove unneeded initializations
From: Jonathan Cameron @ 2018-05-20 10:53 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <b241956721e6f6df3234c42306935cb0aaaefc00.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:21:23 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> Remove 2 initializations which are unneeded, because the
> initialized values are never used.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Applied.
> ---
> Changes in v4:
> - Introduced in this version.
>
> drivers/staging/iio/resolver/ad2s1200.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index df3b34200a89..9bdcf0c86217 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -47,7 +47,7 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev,
> long m)
> {
> struct ad2s1200_state *st = iio_priv(indio_dev);
> - int ret = 0;
> + int ret;
>
> mutex_lock(&st->lock);
> gpio_set_value(st->sample, 0);
> @@ -105,7 +105,7 @@ static int ad2s1200_probe(struct spi_device *spi)
> unsigned short *pins = spi->dev.platform_data;
> struct ad2s1200_state *st;
> struct iio_dev *indio_dev;
> - int pn, ret = 0;
> + int pn, ret;
>
> for (pn = 0; pn < AD2S1200_PN; pn++) {
> ret = devm_gpio_request_one(&spi->dev, pins[pn], GPIOF_DIR_OUT,
^ permalink raw reply
* Re: [PATCH v4 01/12] staging: iio: ad2s1200: Remove unneeded newline in license
From: Jonathan Cameron @ 2018-05-20 10:52 UTC (permalink / raw)
To: David Veenstra
Cc: devel, devicetree, lars, Michael.Hennerich, linux-iio, robh+dt,
pmeerw, knaack.h
In-Reply-To: <41ab35e221dd530c8caab5b1063d86e35c7e9544.1526667118.git.davidjulianveenstra@gmail.com>
On Fri, 18 May 2018 20:21:06 +0200
David Veenstra <davidjulianveenstra@gmail.com> wrote:
> Remove unneeded newline in license, as it does not improve readability.
>
> Signed-off-by: David Veenstra <davidjulianveenstra@gmail.com>
Applied, thanks
Jonathan
> ---
> Changes in v4:
> - Introduced in this version.
>
> drivers/staging/iio/resolver/ad2s1200.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
> index ea7336645116..df3b34200a89 100644
> --- a/drivers/staging/iio/resolver/ad2s1200.c
> +++ b/drivers/staging/iio/resolver/ad2s1200.c
> @@ -7,7 +7,6 @@
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> * published by the Free Software Foundation.
> - *
> */
>
> #include <linux/bitops.h>
^ permalink raw reply
* Re: [PATCH trivial] dt-bindings: iio: afe: Spelling s/mesaurement/measurement/
From: Jonathan Cameron @ 2018-05-20 10:24 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Peter Rosin, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Rob Herring, Mark Rutland, Jiri Kosina,
linux-iio, devicetree
In-Reply-To: <1526389584-19835-1-git-send-email-geert+renesas@glider.be>
On Tue, 15 May 2018 15:06:24 +0200
Geert Uytterhoeven <geert+renesas@glider.be> wrote:
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Applied to the togreg branch of iio.git and pushed out as testing for
the autobuilders to ignore it.
Thanks,
Jonathan
> ---
> Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.txt | 2 +-
> Documentation/devicetree/bindings/iio/afe/current-sense-shunt.txt | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.txt b/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.txt
> index 0ddbaebba8ceca13..821b61b8c542ff92 100644
> --- a/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.txt
> +++ b/Documentation/devicetree/bindings/iio/afe/current-sense-amplifier.txt
> @@ -2,7 +2,7 @@ Current Sense Amplifier
> =======================
>
> When an io-channel measures the output voltage from a current sense
> -amplifier, the interesting mesaurement is almost always the current
> +amplifier, the interesting measurement is almost always the current
> through the sense resistor, not the voltage output. This binding
> describes such a current sense circuit.
>
> diff --git a/Documentation/devicetree/bindings/iio/afe/current-sense-shunt.txt b/Documentation/devicetree/bindings/iio/afe/current-sense-shunt.txt
> index 8e7b3e408a5253c5..0f67108a07b6327b 100644
> --- a/Documentation/devicetree/bindings/iio/afe/current-sense-shunt.txt
> +++ b/Documentation/devicetree/bindings/iio/afe/current-sense-shunt.txt
> @@ -2,7 +2,7 @@ Current Sense Shunt
> ===================
>
> When an io-channel measures the voltage over a current sense shunt,
> -the interesting mesaurement is almost always the current through the
> +the interesting measurement is almost always the current through the
> shunt, not the voltage over it. This binding describes such a current
> sense circuit.
>
^ permalink raw reply
* Re: [PATCH v3] iio: dac: Add support for external reference voltage through the regulator framework.
From: Jonathan Cameron @ 2018-05-20 10:23 UTC (permalink / raw)
To: Silvan Murer; +Cc: lars, linux-iio, devicetree
In-Reply-To: <1526775557.32235.33.camel@gmail.com>
On Sun, 20 May 2018 02:19:17 +0200
Silvan Murer <silvan.murer@gmail.com> wrote:
> Add support for external reference voltage through the regulator framework.
>
> Signed-off-by: Silvan Murer <silvan.murer@gmail.com>
> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
Content looks fine, but I'm having the same issue with subtle issues with
patch formatting. Please check and see if you can figure out what is
causing this.
Anyhow, I'd like this to sit on the lists a little longer to give
time for Devicetree binding feedback.
Thanks,
Jonathan
> ---
> Changes in v3:
> - remove extra spaces and tab
> Changes in v2:
> - Add 'optional properties' documentation
> - Return an error when a regulator is specified
> - Use internal reference when no regulator is specified
> - Use iio_device_register instead of devm_iio_device_register
>
> .../devicetree/bindings/iio/dac/ltc2632.txt | 14 +++++
> drivers/iio/dac/ltc2632.c | 70 +++++++++++++++++++---
> 2 files changed, 75 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/dac/ltc2632.txt b/Documentation/devicetree/bindings/iio/dac/ltc2632.txt
> index eb911e5..e0d5fea 100644
> --- a/Documentation/devicetree/bindings/iio/dac/ltc2632.txt
> +++ b/Documentation/devicetree/bindings/iio/dac/ltc2632.txt
> @@ -12,12 +12,26 @@ Required properties:
> Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
> apply. In particular, "reg" and "spi-max-frequency" properties must be given.
>
> +Optional properties:
> + - vref-supply: Phandle to the external reference voltage supply. This should
> + only be set if there is an external reference voltage connected to the VREF
> + pin. If the property is not set the internal reference is used.
> +
> Example:
>
> + vref: regulator-vref {
> + compatible = "regulator-fixed";
> + regulator-name = "vref-ltc2632";
> + regulator-min-microvolt = <1250000>;
> + regulator-max-microvolt = <1250000>;
> + regulator-always-on;
> + };
> +
> spi_master {
> dac: ltc2632@0 {
> compatible = "lltc,ltc2632-l12";
> reg = <0>; /* CS0 */
> spi-max-frequency = <1000000>;
> + vref-supply = <&vref>; /* optional */
> };
> };
> diff --git a/drivers/iio/dac/ltc2632.c b/drivers/iio/dac/ltc2632.c
> index d322b78..9551156 100644
> --- a/drivers/iio/dac/ltc2632.c
> +++ b/drivers/iio/dac/ltc2632.c
> @@ -2,6 +2,7 @@
> * LTC2632 Digital to analog convertors spi driver
> *
> * Copyright 2017 Maxime Roussin-Bélanger
> + * expanded by Silvan Murer <silvan.murer@gmail.com>
> *
> * Licensed under the GPL-2.
> */
> @@ -10,6 +11,7 @@
> #include <linux/spi/spi.h>
> #include <linux/module.h>
> #include <linux/iio/iio.h>
> +#include <linux/regulator/consumer.h>
>
> #define LTC2632_DAC_CHANNELS 2
>
> @@ -28,7 +30,7 @@
> /**
> * struct ltc2632_chip_info - chip specific information
> * @channels: channel spec for the DAC
> - * @vref_mv: reference voltage
> + * @vref_mv: internal reference voltage
> */
> struct ltc2632_chip_info {
> const struct iio_chan_spec *channels;
> @@ -39,10 +41,14 @@ struct ltc2632_chip_info {
> * struct ltc2632_state - driver instance specific data
> * @spi_dev: pointer to the spi_device struct
> * @powerdown_cache_mask used to show current channel powerdown state
> + * @vref_mv used reference voltage (internal or external)
> + * @vref_reg regulator for the reference voltage
> */
> struct ltc2632_state {
> struct spi_device *spi_dev;
> unsigned int powerdown_cache_mask;
> + int vref_mv;
> + struct regulator *vref_reg;
> };
>
> enum ltc2632_supported_device_ids {
> @@ -90,7 +96,7 @@ static int ltc2632_read_raw(struct iio_dev *indio_dev,
>
> switch (m) {
> case IIO_CHAN_INFO_SCALE:
> - *val = chip_info->vref_mv;
> + *val = st->vref_mv;
> *val2 = chan->scan_type.realbits;
> return IIO_VAL_FRACTIONAL_LOG2;
> }
> @@ -247,6 +253,45 @@ static int ltc2632_probe(struct spi_device *spi)
> chip_info = (struct ltc2632_chip_info *)
> spi_get_device_id(spi)->driver_data;
>
> + st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref");
> + if (PTR_ERR(st->vref_reg) == -ENODEV) {
> + /* use internal reference voltage */
> + st->vref_reg = NULL;
> + st->vref_mv = chip_info->vref_mv;
> +
> + ret = ltc2632_spi_write(spi, LTC2632_CMD_INTERNAL_REFER,
> + 0, 0, 0);
> + if (ret) {
> + dev_err(&spi->dev,
> + "Set internal reference command failed, %d\n",
> + ret);
> + return ret;
> + }
> + } else if (IS_ERR(st->vref_reg)) {
> + dev_err(&spi->dev,
> + "Error getting voltage reference regulator\n");
> + return PTR_ERR(st->vref_reg);
> + } else {
> + /* use external reference voltage */
> + ret = regulator_enable(st->vref_reg);
> + if (ret) {
> + dev_err(&spi->dev,
> + "enable reference regulator failed, %d\n",
> + ret);
> + return ret;
> + }
> + st->vref_mv = regulator_get_voltage(st->vref_reg) / 1000;
> +
> + ret = ltc2632_spi_write(spi, LTC2632_CMD_EXTERNAL_REFER,
> + 0, 0, 0);
> + if (ret) {
> + dev_err(&spi->dev,
> + "Set external reference command failed, %d\n",
> + ret);
> + return ret;
> + }
> + }
> +
> indio_dev->dev.parent = &spi->dev;
> indio_dev->name = dev_of_node(&spi->dev) ? dev_of_node(&spi->dev)->name
> : spi_get_device_id(spi)->name;
> @@ -255,14 +300,20 @@ static int ltc2632_probe(struct spi_device *spi)
> indio_dev->channels = chip_info->channels;
> indio_dev->num_channels = LTC2632_DAC_CHANNELS;
>
> - ret = ltc2632_spi_write(spi, LTC2632_CMD_INTERNAL_REFER, 0, 0, 0);
> - if (ret) {
> - dev_err(&spi->dev,
> - "Set internal reference command failed, %d\n", ret);
> - return ret;
> - }
> + return iio_device_register(indio_dev);
> +}
> +
> +static int ltc2632_remove(struct spi_device *spi)
> +{
> + struct iio_dev *indio_dev = spi_get_drvdata(spi);
> + struct ltc2632_state *st = iio_priv(indio_dev);
> +
> + iio_device_unregister(indio_dev);
> +
> + if (st->vref_reg)
> + regulator_disable(st->vref_reg);
>
> - return devm_iio_device_register(&spi->dev, indio_dev);
> + return 0;
> }
>
> static const struct spi_device_id ltc2632_id[] = {
> @@ -306,6 +357,7 @@ static struct spi_driver ltc2632_driver = {
> .of_match_table = of_match_ptr(ltc2632_of_match),
> },
> .probe = ltc2632_probe,
> + .remove = ltc2632_remove,
> .id_table = ltc2632_id,
> };
> module_spi_driver(ltc2632_driver);
> --
> 2.7.4
^ permalink raw reply
* Re: [PATCH RFC 06/24] drm/lima: add lima uapi header
From: Marek Vasut @ 2018-05-20 9:52 UTC (permalink / raw)
To: Qiang Yu
Cc: Simon Shields, devicetree, Connor Abbott, Neil Armstrong,
Andrei Paulau, dri-devel, Vasily Khoruzhick, Erico Nunes
In-Reply-To: <CAKGbVbtoA3k8naOVLCH0xddFD=3PqWF-67F6xx2_t0bsjNRneQ@mail.gmail.com>
On 05/20/2018 09:22 AM, Qiang Yu wrote:
>
>
> On Fri, May 18, 2018 at 5:33 PM, Marek Vasut <marex@denx.de
> <mailto:marex@denx.de>> wrote:
>
> On 05/18/2018 11:27 AM, Qiang Yu wrote:
>
> Commit message is missing
>
> > Signed-off-by: Qiang Yu <yuq825@gmail.com <mailto:yuq825@gmail.com>>
> > ---
> > include/uapi/drm/lima_drm.h | 195 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 195 insertions(+)
> > create mode 100644 include/uapi/drm/lima_drm.h
> >
> > diff --git a/include/uapi/drm/lima_drm.h b/include/uapi/drm/lima_drm.h
> > new file mode 100644
> > index 000000000000..9df95e46fb2c
> > --- /dev/null
> > +++ b/include/uapi/drm/lima_drm.h
>
> Please convert this to the SPDX license identifiers, that is
>
> // SPDX...
>
> OK.
Thanks
> > @@ -0,0 +1,195 @@
> > +/*
> > + * Copyright (C) 2017-2018 Lima Project
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the "Software"),
> > + * to deal in the Software without restriction, including without limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
>
> [...]
>
> > +#if defined(__cplusplus)
> > +extern "C" {
> > +#endif
>
> Is this C++ stuff needed ?
>
>
> This file is used by both kernel and user space programs, so I added this
> following other xxx_drm.h files here.
Got it
> [...]
>
> > +#define LIMA_SUBMIT_FLAG_EXPLICIT_FENCE (1 << 0)
> > +#define LIMA_SUBMIT_FLAG_SYNC_FD_OUT (1 << 1)
>
> BIT(0) and BIT(1) if applicable
>
>
> I can use BIT() for kernel only files but not this user/kernel shared one,
> because I see BIT is defined in the kernel only, user need to define it if
> this file use it.
OK
--
Best regards,
Marek Vasut
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply
* [PATCH v4 3/3] arm64: dts: renesas: r8a77995: add thermal device support
From: Yoshihiro Kaneko @ 2018-05-20 9:26 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Simon Horman,
Magnus Damm, linux-pm, devicetree
In-Reply-To: <1526808379-3850-1-git-send-email-ykaneko0929@gmail.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 82aed7e..d4884e3 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -216,6 +216,18 @@
#power-domain-cells = <1>;
};
+ thermal: thermal@e6190000 {
+ compatible = "renesas,thermal-r8a77995";
+ reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <0>;
+ };
+
intc_ex: interrupt-controller@e61c0000 {
compatible = "renesas,intc-ex-r8a77995", "renesas,irqc";
#interrupt-cells = <2>;
@@ -785,6 +797,25 @@
};
};
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ };
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
--
1.9.1
^ permalink raw reply related
* [PATCH v4 2/3] dt-bindings: thermal: rcar-thermal: add R8A77995 support
From: Yoshihiro Kaneko @ 2018-05-20 9:26 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Simon Horman,
Magnus Damm, linux-pm, devicetree
In-Reply-To: <1526808379-3850-1-git-send-email-ykaneko0929@gmail.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
index 349e635..67c563f 100644
--- a/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rcar-thermal.txt
@@ -3,7 +3,8 @@
Required properties:
- compatible : "renesas,thermal-<soctype>",
"renesas,rcar-gen2-thermal" (with thermal-zone) or
- "renesas,rcar-thermal" (without thermal-zone) as fallback.
+ "renesas,rcar-thermal" (without thermal-zone) as
+ fallback except R-Car D3.
Examples with soctypes are:
- "renesas,thermal-r8a73a4" (R-Mobile APE6)
- "renesas,thermal-r8a7743" (RZ/G1M)
@@ -12,13 +13,15 @@ Required properties:
- "renesas,thermal-r8a7791" (R-Car M2-W)
- "renesas,thermal-r8a7792" (R-Car V2H)
- "renesas,thermal-r8a7793" (R-Car M2-N)
+ - "renesas,thermal-r8a77995" (R-Car D3)
- reg : Address range of the thermal registers.
The 1st reg will be recognized as common register
if it has "interrupts".
Option properties:
-- interrupts : use interrupt
+- interrupts : If present should contain 3 interrupts for
+ R-Car D3 or 1 interrupt otherwise.
Example (non interrupt support):
--
1.9.1
^ permalink raw reply related
* [PATCH v4 1/3] thermal: rcar_thermal: add r8a77995 support
From: Yoshihiro Kaneko @ 2018-05-20 9:26 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Simon Horman,
Magnus Damm, linux-pm, devicetree
In-Reply-To: <1526808379-3850-1-git-send-email-ykaneko0929@gmail.com>
Add support for R-Car D3 (r8a77995) thermal sensor.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Tested-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
drivers/thermal/rcar_thermal.c | 158 ++++++++++++++++++++++++++++++++---------
1 file changed, 126 insertions(+), 32 deletions(-)
diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c
index 73e5fee..45fb284 100644
--- a/drivers/thermal/rcar_thermal.c
+++ b/drivers/thermal/rcar_thermal.c
@@ -58,10 +58,47 @@ struct rcar_thermal_common {
spinlock_t lock;
};
+struct rcar_thermal_chip {
+ unsigned int use_of_thermal : 1;
+ unsigned int has_filonoff : 1;
+ unsigned int irq_per_ch : 1;
+ unsigned int needs_suspend_resume : 1;
+ unsigned int nirqs;
+};
+
+static const struct rcar_thermal_chip rcar_thermal = {
+ .use_of_thermal = 0,
+ .has_filonoff = 1,
+ .irq_per_ch = 0,
+ .needs_suspend_resume = 0,
+ .nirqs = 1,
+};
+
+static const struct rcar_thermal_chip rcar_gen2_thermal = {
+ .use_of_thermal = 1,
+ .has_filonoff = 1,
+ .irq_per_ch = 0,
+ .needs_suspend_resume = 0,
+ .nirqs = 1,
+};
+
+static const struct rcar_thermal_chip rcar_gen3_thermal = {
+ .use_of_thermal = 1,
+ .has_filonoff = 0,
+ .irq_per_ch = 1,
+ .needs_suspend_resume = 1,
+ /*
+ * The Gen3 chip has 3 interrupts, but this driver uses only 2
+ * interrupts to detect a temperature change, rise or fall.
+ */
+ .nirqs = 2,
+};
+
struct rcar_thermal_priv {
void __iomem *base;
struct rcar_thermal_common *common;
struct thermal_zone_device *zone;
+ const struct rcar_thermal_chip *chip;
struct delayed_work work;
struct mutex lock;
struct list_head list;
@@ -77,13 +114,20 @@ struct rcar_thermal_priv {
#define rcar_priv_to_dev(priv) ((priv)->common->dev)
#define rcar_has_irq_support(priv) ((priv)->common->base)
#define rcar_id_to_shift(priv) ((priv)->id * 8)
-#define rcar_of_data(dev) ((unsigned long)of_device_get_match_data(dev))
-#define rcar_use_of_thermal(dev) (rcar_of_data(dev) == USE_OF_THERMAL)
-#define USE_OF_THERMAL 1
static const struct of_device_id rcar_thermal_dt_ids[] = {
- { .compatible = "renesas,rcar-thermal", },
- { .compatible = "renesas,rcar-gen2-thermal", .data = (void *)USE_OF_THERMAL },
+ {
+ .compatible = "renesas,rcar-thermal",
+ .data = &rcar_thermal,
+ },
+ {
+ .compatible = "renesas,rcar-gen2-thermal",
+ .data = &rcar_gen2_thermal,
+ },
+ {
+ .compatible = "renesas,thermal-r8a77995",
+ .data = &rcar_gen3_thermal,
+ },
{},
};
MODULE_DEVICE_TABLE(of, rcar_thermal_dt_ids);
@@ -190,7 +234,8 @@ static int rcar_thermal_update_temp(struct rcar_thermal_priv *priv)
* enable IRQ
*/
if (rcar_has_irq_support(priv)) {
- rcar_thermal_write(priv, FILONOFF, 0);
+ if (priv->chip->has_filonoff)
+ rcar_thermal_write(priv, FILONOFF, 0);
/* enable Rising/Falling edge interrupt */
rcar_thermal_write(priv, POSNEG, 0x1);
@@ -420,7 +465,7 @@ static int rcar_thermal_remove(struct platform_device *pdev)
rcar_thermal_for_each_priv(priv, common) {
rcar_thermal_irq_disable(priv);
- if (rcar_use_of_thermal(dev))
+ if (priv->chip->use_of_thermal)
thermal_remove_hwmon_sysfs(priv->zone);
else
thermal_zone_device_unregister(priv->zone);
@@ -438,6 +483,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
struct rcar_thermal_priv *priv;
struct device *dev = &pdev->dev;
struct resource *res, *irq;
+ const struct rcar_thermal_chip *chip = of_device_get_match_data(dev);
int mres = 0;
int i;
int ret = -ENODEV;
@@ -457,19 +503,35 @@ static int rcar_thermal_probe(struct platform_device *pdev)
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
- irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- if (irq) {
- /*
- * platform has IRQ support.
- * Then, driver uses common registers
- * rcar_has_irq_support() will be enabled
- */
- res = platform_get_resource(pdev, IORESOURCE_MEM, mres++);
- common->base = devm_ioremap_resource(dev, res);
- if (IS_ERR(common->base))
- return PTR_ERR(common->base);
+ for (i = 0; i < chip->nirqs; i++) {
+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!irq)
+ continue;
+ if (!common->base) {
+ /*
+ * platform has IRQ support.
+ * Then, driver uses common registers
+ * rcar_has_irq_support() will be enabled
+ */
+ res = platform_get_resource(pdev, IORESOURCE_MEM,
+ mres++);
+ common->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(common->base))
+ return PTR_ERR(common->base);
+
+ idle = 0; /* polling delay is not needed */
+ }
- idle = 0; /* polling delay is not needed */
+ ret = devm_request_irq(dev, irq->start, rcar_thermal_irq,
+ IRQF_SHARED, dev_name(dev), common);
+ if (ret) {
+ dev_err(dev, "irq request failed\n ");
+ goto error_unregister;
+ }
+
+ /* update ENR bits */
+ if (chip->irq_per_ch)
+ enr_bits |= 1 << i;
}
for (i = 0;; i++) {
@@ -491,6 +553,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
priv->common = common;
priv->id = i;
+ priv->chip = chip;
mutex_init(&priv->lock);
INIT_LIST_HEAD(&priv->list);
INIT_DELAYED_WORK(&priv->work, rcar_thermal_work);
@@ -498,7 +561,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
if (ret < 0)
goto error_unregister;
- if (rcar_use_of_thermal(dev))
+ if (chip->use_of_thermal)
priv->zone = devm_thermal_zone_of_sensor_register(
dev, i, priv,
&rcar_thermal_zone_of_ops);
@@ -515,7 +578,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
goto error_unregister;
}
- if (rcar_use_of_thermal(dev)) {
+ if (chip->use_of_thermal) {
/*
* thermal_zone doesn't enable hwmon as default,
* but, enable it here to keep compatible
@@ -531,20 +594,12 @@ static int rcar_thermal_probe(struct platform_device *pdev)
list_move_tail(&priv->list, &common->head);
/* update ENR bits */
- enr_bits |= 3 << (i * 8);
+ if (!chip->irq_per_ch)
+ enr_bits |= 3 << (i * 8);
}
- /* enable temperature comparation */
- if (irq) {
- ret = devm_request_irq(dev, irq->start, rcar_thermal_irq, 0,
- dev_name(dev), common);
- if (ret) {
- dev_err(dev, "irq request failed\n ");
- goto error_unregister;
- }
-
+ if (enr_bits)
rcar_thermal_common_write(common, ENR, enr_bits);
- }
dev_info(dev, "%d sensor probed\n", i);
@@ -556,9 +611,48 @@ static int rcar_thermal_probe(struct platform_device *pdev)
return ret;
}
+#ifdef CONFIG_PM_SLEEP
+static int rcar_thermal_suspend(struct device *dev)
+{
+ struct rcar_thermal_common *common = dev_get_drvdata(dev);
+ struct rcar_thermal_priv *priv = list_first_entry(&common->head,
+ typeof(*priv), list);
+
+ if (priv->chip->needs_suspend_resume) {
+ rcar_thermal_common_write(common, ENR, 0);
+ rcar_thermal_irq_disable(priv);
+ rcar_thermal_bset(priv, THSCR, CPCTL, 0);
+ }
+
+ return 0;
+}
+
+static int rcar_thermal_resume(struct device *dev)
+{
+ struct rcar_thermal_common *common = dev_get_drvdata(dev);
+ struct rcar_thermal_priv *priv = list_first_entry(&common->head,
+ typeof(*priv), list);
+ int ret;
+
+ if (priv->chip->needs_suspend_resume) {
+ ret = rcar_thermal_update_temp(priv);
+ if (ret < 0)
+ return ret;
+ rcar_thermal_irq_enable(priv);
+ rcar_thermal_common_write(common, ENR, 0x03);
+ }
+
+ return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(rcar_thermal_pm_ops, rcar_thermal_suspend,
+ rcar_thermal_resume);
+
static struct platform_driver rcar_thermal_driver = {
.driver = {
.name = "rcar_thermal",
+ .pm = &rcar_thermal_pm_ops,
.of_match_table = rcar_thermal_dt_ids,
},
.probe = rcar_thermal_probe,
--
1.9.1
^ permalink raw reply related
* [PATCH v4 0/3] thermal: add support for r8a77995
From: Yoshihiro Kaneko @ 2018-05-20 9:26 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Zhang Rui, Eduardo Valentin, Rob Herring, Simon Horman,
Magnus Damm, linux-pm, devicetree
This series adds thermal support for r8a77995.
R-Car D3 (r8a77995) have a thermal sensor module which is similar to Gen2.
Therefore this series adds r8a77995 support to rcar_thermal driver not
rcar_gen3_thermal driver.
This series is based on the next branch of Zhang Rui's linux tree.
v4 [Yoshihiro Kaneko]
rcar_thermal.c:
- add Tested-by tag
* As suggested by Simon Horman
- add comment to ".nirqs = 2" of rcar_gen3_thermal
rcar-thermal.txt:
* As suggested by Simon Horman
- update the explanation of the interrupts
r8a77995.dtsi:
- repositioned the thermal subnode by bus address order
v3 [Yoshihiro Kaneko]
* As suggested by Geert Uytterhoeven
rcar_thermal.c:
- make use_of_thermal in structure rcar_thermal_chip a single bit
- add feature bits to rcar_thermal_chip
- add the number of interrupts to rcar_thermal_chip
- remove rcar_thermal_type in rcar_thermal_cip
- make variable chip in rcar_thermal_probe() a const
rcar-thermal.txt:
* No change
r8a77995.dtsi:
* No change
v2 [Yoshihiro Kaneko]
* As suggested by Geert Uytterhoeven
rcar_thermal.c:
- remove rcar_of_data macro
- store a pointer to rcar_thermal_chip in rcar_thermal_priv
- remove unnecessary cast in rcar_thermal_dt_ids
rcar-thermal.txt:
- drop the fallback for D3
- update the paragraph about interrupts
r8a77995.dtsi:
- fix the base address and the register addresses
- drop the fallback
Yoshihiro Kaneko (3):
thermal: rcar_thermal: add r8a77995 support
dt-bindings: thermal: rcar-thermal: add R8A77995 support
arm64: dts: renesas: r8a77995: add thermal device support
.../devicetree/bindings/thermal/rcar-thermal.txt | 7 +-
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 31 ++++
drivers/thermal/rcar_thermal.c | 158 ++++++++++++++++-----
3 files changed, 162 insertions(+), 34 deletions(-)
--
1.9.1
^ permalink raw reply
* Re: [PATCH 10/15] drm/sun4i: Add support for R40 TV TCONs
From: Jernej Škrabec @ 2018-05-20 7:30 UTC (permalink / raw)
To: Julian Calaby
Cc: Maxime Ripard, Chen-Yu Tsai, Rob Herring, Mark Rutland, dri-devel,
devicetree, Mailing List, Arm,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
open list:COMMON CLK FRAMEWORK, linux-sunxi
In-Reply-To: <CAGRGNgXbKGhnern4=_W9W5dKM54H5B1dnAD7up-23rUAMWWCSw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
Hi,
Dne nedelja, 20. maj 2018 ob 04:09:52 CEST je Julian Calaby napisal(a):
> Hi Jernej,
>
> On Sun, May 20, 2018 at 11:57 AM, Julian Calaby <julian.calaby-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
wrote:
> > Hi Jernej,
> >
> > On Sun, May 20, 2018 at 4:31 AM, Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
wrote:
> >> R40 display pipeline has a lot of possible configurations. HDMI can be
> >> connected to 2 different TCONs (out of 4) and mixers can be connected to
> >> any TCON. All this must be configured in TCON TOP.
> >>
> >> Along with definition of TCON capabilities also add mux callback, which
> >> can configure this complex pipeline.
> >>
> >> For now, only TCON TV is supported.
> >>
> >> Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
> >> ---
> >>
> >> drivers/gpu/drm/sun4i/sun4i_tcon.c | 39 ++++++++++++++++++++++++++++++
> >> 1 file changed, 39 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> >> b/drivers/gpu/drm/sun4i/sun4i_tcon.c index e0c562ce1c22..81b9551e4f78
> >> 100644
> >> --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
> >> +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
> >> @@ -1274,6 +1274,31 @@ static int sun6i_tcon_set_mux(struct sun4i_tcon
> >> *tcon,>>
> >> return 0;
> >>
> >> }
> >>
> >> +static int sun8i_r40_tcon_tv_set_mux(struct sun4i_tcon *tcon,
> >> + const struct drm_encoder *encoder,
> >> + int index)
> >> +{
> >> + if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
> >> + sun8i_tcon_top_set_hdmi_src(tcon->tcon_top, index);
> >> +
> >> + sun8i_tcon_top_de_config(tcon->tcon_top, tcon->id,
> >> + tcon_type_tv, index);
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static int sun8i_r40_tcon_tv_set_mux_0(struct sun4i_tcon *tcon,
> >> + const struct drm_encoder *encoder)
> >> +{
> >> + return sun8i_r40_tcon_tv_set_mux(tcon, encoder, 0);
> >> +}
> >> +
> >> +static int sun8i_r40_tcon_tv_set_mux_1(struct sun4i_tcon *tcon,
> >> + const struct drm_encoder *encoder)
> >> +{
> >> + return sun8i_r40_tcon_tv_set_mux(tcon, encoder, 1);
> >> +}
> >
> > Are TCON-TOPs going to be a common thing in new SoCs from Allwinner?
> > If so, maybe we should add an index to the TCON quirks and have a
> > common TCON-TOP set_mux function.
>
> Actually, that only moves it up a level. Should it be a devicetree property?
>
TCON-TOP is besides R40 part of two newest Allwinner SoCs, H6 and A63.
However, they have only one TV TCON and one LCD TCON, so indexes are not
needed for them (always 0). This makes R40 somewhat special. I don't think it
makes sense to expand everything just for one SoC.
Best regards,
Jernej
^ permalink raw reply
* Re: [PATCH RFC 06/24] drm/lima: add lima uapi header
From: Qiang Yu @ 2018-05-20 7:25 UTC (permalink / raw)
To: Marek Vasut
Cc: Simon Shields, devicetree, Connor Abbott, Neil Armstrong,
Andrei Paulau, dri-devel, Vasily Khoruzhick, Erico Nunes
In-Reply-To: <a2f2311c-7473-e857-a4e6-1c3e7c44aeaf@denx.de>
On Fri, May 18, 2018 at 5:33 PM, Marek Vasut <marex@denx.de> wrote:
>
> On 05/18/2018 11:27 AM, Qiang Yu wrote:
>
> Commit message is missing
>
> > Signed-off-by: Qiang Yu <yuq825@gmail.com>
> > ---
> > include/uapi/drm/lima_drm.h | 195 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 195 insertions(+)
> > create mode 100644 include/uapi/drm/lima_drm.h
> >
> > diff --git a/include/uapi/drm/lima_drm.h b/include/uapi/drm/lima_drm.h
> > new file mode 100644
> > index 000000000000..9df95e46fb2c
> > --- /dev/null
> > +++ b/include/uapi/drm/lima_drm.h
>
> Please convert this to the SPDX license identifiers, that is
>
> // SPDX...
>
OK.
> > @@ -0,0 +1,195 @@
> > +/*
> > + * Copyright (C) 2017-2018 Lima Project
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the "Software"),
> > + * to deal in the Software without restriction, including without limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
>
> [...]
>
> > +#if defined(__cplusplus)
> > +extern "C" {
> > +#endif
>
> Is this C++ stuff needed ?
>
This file is used by both kernel and user space programs, so I added this
following other xxx_drm.h files here.
> [...]
>
> > +#define LIMA_SUBMIT_FLAG_EXPLICIT_FENCE (1 << 0)
> > +#define LIMA_SUBMIT_FLAG_SYNC_FD_OUT (1 << 1)
>
> BIT(0) and BIT(1) if applicable
I can use BIT() for kernel only files but not this user/kernel shared one,
because I see BIT is defined in the kernel only, user need to define it if
this file use it.
> [...]
>
> --
> Best regards,
> Marek Vasut
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply
* Re: [PATCH RFC 06/24] drm/lima: add lima uapi header
From: Qiang Yu @ 2018-05-20 7:22 UTC (permalink / raw)
To: Marek Vasut
Cc: Simon Shields, devicetree, Connor Abbott, Neil Armstrong,
Andrei Paulau, dri-devel, Vasily Khoruzhick, Erico Nunes
In-Reply-To: <a2f2311c-7473-e857-a4e6-1c3e7c44aeaf@denx.de>
[-- Attachment #1.1: Type: text/plain, Size: 1836 bytes --]
On Fri, May 18, 2018 at 5:33 PM, Marek Vasut <marex@denx.de> wrote:
> On 05/18/2018 11:27 AM, Qiang Yu wrote:
>
> Commit message is missing
>
> > Signed-off-by: Qiang Yu <yuq825@gmail.com>
> > ---
> > include/uapi/drm/lima_drm.h | 195 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 195 insertions(+)
> > create mode 100644 include/uapi/drm/lima_drm.h
> >
> > diff --git a/include/uapi/drm/lima_drm.h b/include/uapi/drm/lima_drm.h
> > new file mode 100644
> > index 000000000000..9df95e46fb2c
> > --- /dev/null
> > +++ b/include/uapi/drm/lima_drm.h
>
> Please convert this to the SPDX license identifiers, that is
>
> // SPDX...
>
> OK.
> > @@ -0,0 +1,195 @@
> > +/*
> > + * Copyright (C) 2017-2018 Lima Project
> > + *
> > + * Permission is hereby granted, free of charge, to any person
> obtaining a
> > + * copy of this software and associated documentation files (the
> "Software"),
> > + * to deal in the Software without restriction, including without
> limitation
> > + * the rights to use, copy, modify, merge, publish, distribute,
> sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
>
> [...]
>
> > +#if defined(__cplusplus)
> > +extern "C" {
> > +#endif
>
> Is this C++ stuff needed ?
>
This file is used by both kernel and user space programs, so I added this
following other xxx_drm.h files here.
>
> [...]
>
> > +#define LIMA_SUBMIT_FLAG_EXPLICIT_FENCE (1 << 0)
> > +#define LIMA_SUBMIT_FLAG_SYNC_FD_OUT (1 << 1)
>
> BIT(0) and BIT(1) if applicable
>
I can use BIT() for kernel only files but not this user/kernel shared one,
because I see BIT is defined in the kernel only, user need to define it if
this file use it.
> [...]
>
> --
> Best regards,
> Marek Vasut
>
Regards,
Qiang
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[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply
* [PATCH v2 5/5] MAINTAINERS: Add Actions Semi S900 pinctrl entries
From: Manivannan Sadhasivam @ 2018-05-20 5:17 UTC (permalink / raw)
To: linus.walleij, robh+dt, afaerber
Cc: liuwei, mp-cs, 96boards, devicetree, andy.shevchenko,
daniel.thompson, amit.kucheria, linux-arm-kernel, linux-gpio,
linux-kernel, hzhang, bdong, manivannanece23,
Manivannan Sadhasivam
In-Reply-To: <20180520051736.4842-1-manivannan.sadhasivam@linaro.org>
Add S900 pinctrl entries under ARCH_ACTIONS
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 640dabc4c311..9e1a17c9b4a7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1125,10 +1125,12 @@ F: arch/arm/mach-actions/
F: arch/arm/boot/dts/owl-*
F: arch/arm64/boot/dts/actions/
F: drivers/clocksource/owl-*
+F: drivers/pinctrl/actions/*
F: drivers/soc/actions/
F: include/dt-bindings/power/owl-*
F: include/linux/soc/actions/
F: Documentation/devicetree/bindings/arm/actions.txt
+F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt
F: Documentation/devicetree/bindings/power/actions,owl-sps.txt
F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt
--
2.14.1
^ permalink raw reply related
* [PATCH v2 4/5] pinctrl: actions: Add gpio support for Actions S900 SoC
From: Manivannan Sadhasivam @ 2018-05-20 5:17 UTC (permalink / raw)
To: linus.walleij, robh+dt, afaerber
Cc: liuwei, mp-cs, 96boards, devicetree, andy.shevchenko,
daniel.thompson, amit.kucheria, linux-arm-kernel, linux-gpio,
linux-kernel, hzhang, bdong, manivannanece23,
Manivannan Sadhasivam
In-Reply-To: <20180520051736.4842-1-manivannan.sadhasivam@linaro.org>
Add gpio support to pinctrl driver for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
---
drivers/pinctrl/actions/Kconfig | 1 +
drivers/pinctrl/actions/pinctrl-owl.c | 198 +++++++++++++++++++++++++++++++++
drivers/pinctrl/actions/pinctrl-owl.h | 20 ++++
drivers/pinctrl/actions/pinctrl-s900.c | 29 ++++-
4 files changed, 247 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/actions/Kconfig b/drivers/pinctrl/actions/Kconfig
index ede97cdbbc12..490927b4ea76 100644
--- a/drivers/pinctrl/actions/Kconfig
+++ b/drivers/pinctrl/actions/Kconfig
@@ -4,6 +4,7 @@ config PINCTRL_OWL
select PINMUX
select PINCONF
select GENERIC_PINCONF
+ select GPIOLIB
help
Say Y here to enable Actions Semi OWL pinctrl driver
diff --git a/drivers/pinctrl/actions/pinctrl-owl.c b/drivers/pinctrl/actions/pinctrl-owl.c
index ee090697b1e9..76243caa08c6 100644
--- a/drivers/pinctrl/actions/pinctrl-owl.c
+++ b/drivers/pinctrl/actions/pinctrl-owl.c
@@ -11,6 +11,7 @@
#include <linux/clk.h>
#include <linux/err.h>
+#include <linux/gpio/driver.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
@@ -31,6 +32,7 @@
* struct owl_pinctrl - pinctrl state of the device
* @dev: device handle
* @pctrldev: pinctrl handle
+ * @chip: gpio chip
* @lock: spinlock to protect registers
* @soc: reference to soc_data
* @base: pinctrl register base address
@@ -38,6 +40,7 @@
struct owl_pinctrl {
struct device *dev;
struct pinctrl_dev *pctrldev;
+ struct gpio_chip chip;
raw_spinlock_t lock;
struct clk *clk;
const struct owl_pinctrl_soc_data *soc;
@@ -536,6 +539,190 @@ static struct pinctrl_desc owl_pinctrl_desc = {
.owner = THIS_MODULE,
};
+static const struct owl_gpio_port *
+owl_gpio_get_port(struct owl_pinctrl *pctrl, unsigned int *pin)
+{
+ unsigned int start = 0, i;
+
+ for (i = 0; i < pctrl->soc->nports; i++) {
+ const struct owl_gpio_port *port = &pctrl->soc->ports[i];
+
+ if (*pin >= start && *pin < start + port->pins) {
+ *pin -= start;
+ return port;
+ }
+
+ start += port->pins;
+ }
+
+ return NULL;
+}
+
+static void owl_gpio_update_reg(void __iomem *base, unsigned int pin, int flag)
+{
+ u32 val;
+
+ val = readl_relaxed(base);
+
+ if (flag)
+ val |= BIT(pin);
+ else
+ val &= ~BIT(pin);
+
+ writel_relaxed(val, base);
+}
+
+static int owl_gpio_request(struct gpio_chip *chip, unsigned int offset)
+{
+ struct owl_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct owl_gpio_port *port;
+ void __iomem *gpio_base;
+ unsigned long flags;
+
+ port = owl_gpio_get_port(pctrl, &offset);
+ if (WARN_ON(port == NULL))
+ return -ENODEV;
+
+ gpio_base = pctrl->base + port->offset;
+
+ /*
+ * GPIOs have higher priority over other modules, so either setting
+ * them as OUT or IN is sufficient
+ */
+ raw_spin_lock_irqsave(&pctrl->lock, flags);
+ owl_gpio_update_reg(gpio_base + port->outen, offset, true);
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static void owl_gpio_free(struct gpio_chip *chip, unsigned int offset)
+{
+ struct owl_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct owl_gpio_port *port;
+ void __iomem *gpio_base;
+ unsigned long flags;
+
+ port = owl_gpio_get_port(pctrl, &offset);
+ if (WARN_ON(port == NULL))
+ return;
+
+ gpio_base = pctrl->base + port->offset;
+
+ raw_spin_lock_irqsave(&pctrl->lock, flags);
+ /* disable gpio output */
+ owl_gpio_update_reg(gpio_base + port->outen, offset, false);
+
+ /* disable gpio input */
+ owl_gpio_update_reg(gpio_base + port->inen, offset, false);
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+}
+
+static int owl_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+ struct owl_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct owl_gpio_port *port;
+ void __iomem *gpio_base;
+ unsigned long flags;
+ u32 val;
+
+ port = owl_gpio_get_port(pctrl, &offset);
+ if (WARN_ON(port == NULL))
+ return -ENODEV;
+
+ gpio_base = pctrl->base + port->offset;
+
+ raw_spin_lock_irqsave(&pctrl->lock, flags);
+ val = readl_relaxed(gpio_base + port->dat);
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return !!(val & BIT(offset));
+}
+
+static void owl_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
+{
+ struct owl_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct owl_gpio_port *port;
+ void __iomem *gpio_base;
+ unsigned long flags;
+
+ port = owl_gpio_get_port(pctrl, &offset);
+ if (WARN_ON(port == NULL))
+ return;
+
+ gpio_base = pctrl->base + port->offset;
+
+ raw_spin_lock_irqsave(&pctrl->lock, flags);
+ owl_gpio_update_reg(gpio_base + port->dat, offset, value);
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+}
+
+static int owl_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
+{
+ struct owl_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct owl_gpio_port *port;
+ void __iomem *gpio_base;
+ unsigned long flags;
+
+ port = owl_gpio_get_port(pctrl, &offset);
+ if (WARN_ON(port == NULL))
+ return -ENODEV;
+
+ gpio_base = pctrl->base + port->offset;
+
+ raw_spin_lock_irqsave(&pctrl->lock, flags);
+ owl_gpio_update_reg(gpio_base + port->outen, offset, false);
+ owl_gpio_update_reg(gpio_base + port->inen, offset, true);
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static int owl_gpio_direction_output(struct gpio_chip *chip,
+ unsigned int offset, int value)
+{
+ struct owl_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct owl_gpio_port *port;
+ void __iomem *gpio_base;
+ unsigned long flags;
+
+ port = owl_gpio_get_port(pctrl, &offset);
+ if (WARN_ON(port == NULL))
+ return -ENODEV;
+
+ gpio_base = pctrl->base + port->offset;
+
+ raw_spin_lock_irqsave(&pctrl->lock, flags);
+ owl_gpio_update_reg(gpio_base + port->inen, offset, false);
+ owl_gpio_update_reg(gpio_base + port->outen, offset, true);
+ owl_gpio_update_reg(gpio_base + port->dat, offset, value);
+ raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+ return 0;
+}
+
+static int owl_gpio_init(struct owl_pinctrl *pctrl)
+{
+ struct gpio_chip *chip;
+ int ret;
+
+ chip = &pctrl->chip;
+ chip->base = -1;
+ chip->ngpio = pctrl->soc->ngpios;
+ chip->label = dev_name(pctrl->dev);
+ chip->parent = pctrl->dev;
+ chip->owner = THIS_MODULE;
+ chip->of_node = pctrl->dev->of_node;
+
+ ret = gpiochip_add_data(&pctrl->chip, pctrl);
+ if (ret) {
+ dev_err(pctrl->dev, "failed to register gpiochip\n");
+ return ret;
+ }
+
+ return 0;
+}
+
int owl_pinctrl_probe(struct platform_device *pdev,
struct owl_pinctrl_soc_data *soc_data)
{
@@ -571,6 +758,13 @@ int owl_pinctrl_probe(struct platform_device *pdev,
owl_pinctrl_desc.pins = soc_data->pins;
owl_pinctrl_desc.npins = soc_data->npins;
+ pctrl->chip.direction_input = owl_gpio_direction_input;
+ pctrl->chip.direction_output = owl_gpio_direction_output;
+ pctrl->chip.get = owl_gpio_get;
+ pctrl->chip.set = owl_gpio_set;
+ pctrl->chip.request = owl_gpio_request;
+ pctrl->chip.free = owl_gpio_free;
+
pctrl->soc = soc_data;
pctrl->dev = &pdev->dev;
@@ -581,6 +775,10 @@ int owl_pinctrl_probe(struct platform_device *pdev,
return PTR_ERR(pctrl->pctrldev);
}
+ ret = owl_gpio_init(pctrl);
+ if (ret)
+ return ret;
+
platform_set_drvdata(pdev, pctrl);
return 0;
diff --git a/drivers/pinctrl/actions/pinctrl-owl.h b/drivers/pinctrl/actions/pinctrl-owl.h
index 448f81a6db3b..74342378937c 100644
--- a/drivers/pinctrl/actions/pinctrl-owl.h
+++ b/drivers/pinctrl/actions/pinctrl-owl.h
@@ -114,6 +114,22 @@ struct owl_pinmux_func {
unsigned int ngroups;
};
+/**
+ * struct owl_gpio_port - Actions GPIO port info
+ * @offset: offset of the GPIO port.
+ * @pins: number of pins belongs to the GPIO port.
+ * @outen: offset of the output enable register.
+ * @inen: offset of the input enable register.
+ * @dat: offset of the data register.
+ */
+struct owl_gpio_port {
+ unsigned int offset;
+ unsigned int pins;
+ unsigned int outen;
+ unsigned int inen;
+ unsigned int dat;
+};
+
/**
* struct owl_pinctrl_soc_data - Actions pin controller driver configuration
* @pins: array describing all pins of the pin controller.
@@ -124,6 +140,8 @@ struct owl_pinmux_func {
* @ngroups: number of entries in @groups.
* @padinfo: array describing the pad info of this SoC.
* @ngpios: number of pingroups the driver should expose as GPIOs.
+ * @port: array describing all GPIO ports of this SoC.
+ * @nports: number of GPIO ports in this SoC.
*/
struct owl_pinctrl_soc_data {
const struct pinctrl_pin_desc *pins;
@@ -134,6 +152,8 @@ struct owl_pinctrl_soc_data {
unsigned int ngroups;
const struct owl_padinfo *padinfo;
unsigned int ngpios;
+ const struct owl_gpio_port *ports;
+ unsigned int nports;
};
int owl_pinctrl_probe(struct platform_device *pdev,
diff --git a/drivers/pinctrl/actions/pinctrl-s900.c b/drivers/pinctrl/actions/pinctrl-s900.c
index 08d93f8fc086..5503c7945764 100644
--- a/drivers/pinctrl/actions/pinctrl-s900.c
+++ b/drivers/pinctrl/actions/pinctrl-s900.c
@@ -33,6 +33,13 @@
#define PAD_SR1 (0x0274)
#define PAD_SR2 (0x0278)
+#define OWL_GPIO_PORT_A 0
+#define OWL_GPIO_PORT_B 1
+#define OWL_GPIO_PORT_C 2
+#define OWL_GPIO_PORT_D 3
+#define OWL_GPIO_PORT_E 4
+#define OWL_GPIO_PORT_F 5
+
#define _GPIOA(offset) (offset)
#define _GPIOB(offset) (32 + (offset))
#define _GPIOC(offset) (64 + (offset))
@@ -1814,6 +1821,24 @@ static struct owl_padinfo s900_padinfo[NUM_PADS] = {
[SGPIO3] = PAD_INFO_PULLCTL_ST(SGPIO3)
};
+#define OWL_GPIO_PORT(port, base, count, _outen, _inen, _dat) \
+ [OWL_GPIO_PORT_##port] = { \
+ .offset = base, \
+ .pins = count, \
+ .outen = _outen, \
+ .inen = _inen, \
+ .dat = _dat, \
+ }
+
+static const struct owl_gpio_port s900_gpio_ports[] = {
+ OWL_GPIO_PORT(A, 0x0000, 32, 0x0, 0x4, 0x8),
+ OWL_GPIO_PORT(B, 0x000C, 32, 0x0, 0x4, 0x8),
+ OWL_GPIO_PORT(C, 0x0018, 12, 0x0, 0x4, 0x8),
+ OWL_GPIO_PORT(D, 0x0024, 30, 0x0, 0x4, 0x8),
+ OWL_GPIO_PORT(E, 0x0030, 32, 0x0, 0x4, 0x8),
+ OWL_GPIO_PORT(F, 0x00F0, 8, 0x0, 0x4, 0x8)
+};
+
static struct owl_pinctrl_soc_data s900_pinctrl_data = {
.padinfo = s900_padinfo,
.pins = (const struct pinctrl_pin_desc *)s900_pads,
@@ -1822,7 +1847,9 @@ static struct owl_pinctrl_soc_data s900_pinctrl_data = {
.nfunctions = ARRAY_SIZE(s900_functions),
.groups = s900_groups,
.ngroups = ARRAY_SIZE(s900_groups),
- .ngpios = NUM_GPIOS
+ .ngpios = NUM_GPIOS,
+ .ports = s900_gpio_ports,
+ .nports = ARRAY_SIZE(s900_gpio_ports)
};
static int s900_pinctrl_probe(struct platform_device *pdev)
--
2.14.1
^ permalink raw reply related
* [PATCH v2 3/5] arm64: dts: actions: Add gpio line names to Bubblegum-96 board
From: Manivannan Sadhasivam @ 2018-05-20 5:17 UTC (permalink / raw)
To: linus.walleij, robh+dt, afaerber
Cc: liuwei, mp-cs, 96boards, devicetree, andy.shevchenko,
daniel.thompson, amit.kucheria, linux-arm-kernel, linux-gpio,
linux-kernel, hzhang, bdong, manivannanece23,
Manivannan Sadhasivam
In-Reply-To: <20180520051736.4842-1-manivannan.sadhasivam@linaro.org>
Add gpio line names to Actions Semi S900 based Bubblegum-96 board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 175 ++++++++++++++++++++++
1 file changed, 175 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
index ff043c961d75..d0ba35df9015 100644
--- a/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
+++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
@@ -34,3 +34,178 @@
status = "okay";
clocks = <&cmu CLK_UART5>;
};
+
+/*
+ * GPIO name legend: proper name = the GPIO line is used as GPIO
+ * NC = not connected (pin out but not routed from the chip to
+ * anything the board)
+ * "[PER]" = pin is muxed for [peripheral] (not GPIO)
+ * LSEC = Low Speed External Connector
+ * HSEC = High Speed External Connector
+ *
+ * Line names are taken from the schematic "Schematics Bubblegum96"
+ * version v1.0
+ *
+ * For the lines routed to the external connectors the
+ * lines are named after the 96Boards CE Specification 1.0,
+ * Appendix "Expansion Connector Signal Description".
+ *
+ * When the 96Boards naming of a line and the schematic name of
+ * the same line are in conflict, the 96Boards specification
+ * takes precedence, which means that the external UART on the
+ * LSEC is named UART0 while the schematic and SoC names this
+ * UART2. Only exception is the I2C lines for which the schematic
+ * naming has been preferred. This is only for the informational
+ * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L"
+ * are the only ones actually used for GPIO.
+ */
+
+&pinctrl {
+ gpio-line-names =
+ "GPIO-A", /* GPIO_0, LSEC pin 23 */
+ "GPIO-B", /* GPIO_1, LSEC pin 24 */
+ "GPIO-C", /* GPIO_2, LSEC pin 25 */
+ "GPIO-D", /* GPIO_3, LSEC pin 26 */
+ "GPIO-E", /* GPIO_4, LSEC pin 27 */
+ "GPIO-F", /* GPIO_5, LSEC pin 28 */
+ "GPIO-G", /* GPIO_6, LSEC pin 29 */
+ "GPIO-H", /* GPIO_7, LSEC pin 30 */
+ "GPIO-I", /* GPIO_8, LSEC pin 31 */
+ "GPIO-J", /* GPIO_9, LSEC pin 32 */
+ "NC", /* GPIO_10 */
+ "NC", /* GPIO_11 */
+ "SIRQ2_1V8", /* GPIO_12 */
+ "PCM0_OUT", /* GPIO_13 */
+ "WIFI_LED", /* GPIO_14 */
+ "PCM0_SYNC", /* GPIO_15 */
+ "PCM0_CLK", /* GPIO_16 */
+ "PCM0_IN", /* GPIO_17 */
+ "BT_LED", /* GPIO_18 */
+ "LED0", /* GPIO_19 */
+ "LED1", /* GPIO_20 */
+ "JTAG_TCK", /* GPIO_21 */
+ "JTAG_TMS", /* GPIO_22 */
+ "JTAG_TDI", /* GPIO_23 */
+ "JTAG_TDO", /* GPIO_24 */
+ "[UART1_RxD]", /* GPIO_25, LSEC pin 13 */
+ "NC", /* GPIO_26 */
+ "[UART1_TxD]", /* GPIO_27, LSEC pin 11 */
+ "SD0_D0", /* GPIO_28 */
+ "SD0_D1", /* GPIO_29 */
+ "SD0_D2", /* GPIO_30 */
+ "SD0_D3", /* GPIO_31 */
+ "SD1_D0", /* GPIO_32 */
+ "SD1_D1", /* GPIO_33 */
+ "SD1_D2", /* GPIO_34 */
+ "SD1_D3", /* GPIO_35 */
+ "SD0_CMD", /* GPIO_36 */
+ "SD0_CLK", /* GPIO_37 */
+ "SD1_CMD", /* GPIO_38 */
+ "SD1_CLK", /* GPIO_39 */
+ "SPI0_SCLK", /* GPIO_40, LSEC pin 8 */
+ "SPI0_CS", /* GPIO_41, LSEC pin 12 */
+ "SPI0_DIN", /* GPIO_42, LSEC pin 10 */
+ "SPI0_DOUT", /* GPIO_43, LSEC pin 14 */
+ "I2C5_SDATA", /* GPIO_44, HSEC pin 36 */
+ "I2C5_SCLK", /* GPIO_45, HSEC pin 38 */
+ "UART0_RX", /* GPIO_46, LSEC pin 7 */
+ "UART0_TX", /* GPIO_47, LSEC pin 5 */
+ "UART0_RTSB", /* GPIO_48, LSEC pin 9 */
+ "UART0_CTSB", /* GPIO_49, LSEC pin 3 */
+ "I2C4_SCLK", /* GPIO_50, HSEC pin 32 */
+ "I2C4_SDATA", /* GPIO_51, HSEC pin 34 */
+ "I2C0_SCLK", /* GPIO_52 */
+ "I2C0_SDATA", /* GPIO_53 */
+ "I2C1_SCLK", /* GPIO_54, LSEC pin 15 */
+ "I2C1_SDATA", /* GPIO_55, LSEC pin 17 */
+ "I2C2_SCLK", /* GPIO_56, LSEC pin 19 */
+ "I2C2_SDATA", /* GPIO_57, LSEC pin 21 */
+ "CSI0_DN0", /* GPIO_58, HSEC pin 10 */
+ "CSI0_DP0", /* GPIO_59, HSEC pin 8 */
+ "CSI0_DN1", /* GPIO_60, HSEC pin 16 */
+ "CSI0_DP1", /* GPIO_61, HSEC pin 14 */
+ "CSI0_CN", /* GPIO_62, HSEC pin 4 */
+ "CSI0_CP", /* GPIO_63, HSEC pin 2 */
+ "CSI0_DN2", /* GPIO_64, HSEC pin 22 */
+ "CSI0_DP2", /* GPIO_65, HSEC pin 20 */
+ "CSI0_DN3", /* GPIO_66, HSEC pin 28 */
+ "CSI0_DP3", /* GPIO_67, HSEC pin 26 */
+ "[CLK0]", /* GPIO_68, HSEC pin 15 */
+ "CSI1_DN0", /* GPIO_69, HSEC pin 44 */
+ "CSI1_DP0", /* GPIO_70, HSEC pin 42 */
+ "CSI1_DN1", /* GPIO_71, HSEC pin 50 */
+ "CSI1_DP1", /* GPIO_72, HSEC pin 48 */
+ "CSI1_CN", /* GPIO_73, HSEC pin 56 */
+ "CSI1_CP", /* GPIO_74, HSEC pin 54 */
+ "[CLK1]", /* GPIO_75, HSEC pin 17 */
+ "[GPIOD0]", /* GPIO_76 */
+ "[GPIOD1]", /* GPIO_77 */
+ "BT_RST_N", /* GPIO_78 */
+ "EXT_DC_EN", /* GPIO_79 */
+ "[PCM_DI]", /* GPIO_80, LSEC pin 22 */
+ "[PCM_DO]", /* GPIO_81, LSEC pin 20 */
+ "[PCM_CLK]", /* GPIO_82, LSEC pin 18 */
+ "[PCM_FS]", /* GPIO_83, LSEC pin 16 */
+ "WAKE_BT", /* GPIO_84 */
+ "WL_REG_ON", /* GPIO_85 */
+ "NC", /* GPIO_86 */
+ "NC", /* GPIO_87 */
+ "NC", /* GPIO_88 */
+ "NC", /* GPIO_89 */
+ "NC", /* GPIO_90 */
+ "WIFI_WAKE", /* GPIO_91 */
+ "BT_WAKE", /* GPIO_92 */
+ "NC", /* GPIO_93 */
+ "OTG_EN2", /* GPIO_94 */
+ "OTG_EN", /* GPIO_95 */
+ "DSI_DP3", /* GPIO_96, HSEC pin 45 */
+ "DSI_DN3", /* GPIO_97, HSEC pin 47 */
+ "DSI_DP1", /* GPIO_98, HSEC pin 33 */
+ "DSI_DN1", /* GPIO_99, HSEC pin 35 */
+ "DSI_CP", /* GPIO_100, HSEC pin 21 */
+ "DSI_CN", /* GPIO_101, HSEC pin 23 */
+ "DSI_DP0", /* GPIO_102, HSEC pin 27 */
+ "DSI_DN0", /* GPIO_103, HSEC pin 29 */
+ "DSI_DP2", /* GPIO_104, HSEC pin 39 */
+ "DSI_DN2", /* GPIO_105, HSEC pin 41 */
+ "N0_D0", /* GPIO_106 */
+ "N0_D1", /* GPIO_107 */
+ "N0_D2", /* GPIO_108 */
+ "N0_D3", /* GPIO_109 */
+ "N0_D4", /* GPIO_110 */
+ "N0_D5", /* GPIO_111 */
+ "N0_D6", /* GPIO_112 */
+ "N0_D7", /* GPIO_113 */
+ "N0_DQS", /* GPIO_114 */
+ "N0_DQSN", /* GPIO_115 */
+ "NC", /* GPIO_116 */
+ "NC", /* GPIO_117 */
+ "NC", /* GPIO_118 */
+ "N0_CEB1", /* GPIO_119 */
+ "CARD_DT", /* GPIO_120 */
+ "N0_CEB3", /* GPIO_121 */
+ "SD_DAT0", /* GPIO_122, HSEC pin 1 */
+ "SD_DAT1", /* GPIO_123, HSEC pin 3 */
+ "SD_DAT2", /* GPIO_124, HSEC pin 5 */
+ "SD_DAT3", /* GPIO_125, HSEC pin 7 */
+ "NC", /* GPIO_126 */
+ "NC", /* GPIO_127 */
+ "[PWR_BTN_N]", /* GPIO_128, LSEC pin 4 */
+ "[RST_BTN_N]", /* GPIO_129, LSEC pin 6 */
+ "NC", /* GPIO_130 */
+ "SD_CMD", /* GPIO_131 */
+ "GPIO-L", /* GPIO_132, LSEC pin 34 */
+ "GPIO-K", /* GPIO_133, LSEC pin 33 */
+ "NC", /* GPIO_134 */
+ "SD_SCLK", /* GPIO_135 */
+ "NC", /* GPIO_136 */
+ "JTAG_TRST", /* GPIO_137 */
+ "I2C3_SCLK", /* GPIO_138 */
+ "LED2", /* GPIO_139 */
+ "LED3", /* GPIO_140 */
+ "I2C3_SDATA", /* GPIO_141 */
+ "UART3_RX", /* GPIO_142 */
+ "UART3_TX", /* GPIO_143 */
+ "UART3_RTSB", /* GPIO_144 */
+ "UART3_CTSB"; /* GPIO_145 */
+};
--
2.14.1
^ permalink raw reply related
* [PATCH v2 2/5] arm64: dts: actions: Add gpio properties to pinctrl node for S900
From: Manivannan Sadhasivam @ 2018-05-20 5:17 UTC (permalink / raw)
To: linus.walleij, robh+dt, afaerber
Cc: liuwei, mp-cs, 96boards, devicetree, andy.shevchenko,
daniel.thompson, amit.kucheria, linux-arm-kernel, linux-gpio,
linux-kernel, hzhang, bdong, manivannanece23,
Manivannan Sadhasivam
In-Reply-To: <20180520051736.4842-1-manivannan.sadhasivam@linaro.org>
Add gpio properties to pinctrl node for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/actions/s900.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi
index 0156483f0f4d..aa3a49b0d646 100644
--- a/arch/arm64/boot/dts/actions/s900.dtsi
+++ b/arch/arm64/boot/dts/actions/s900.dtsi
@@ -178,6 +178,9 @@
compatible = "actions,s900-pinctrl";
reg = <0x0 0xe01b0000 0x0 0x1000>;
clocks = <&cmu CLK_GPIO>;
+ gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 146>;
+ #gpio-cells = <2>;
};
timer: timer@e0228000 {
--
2.14.1
^ permalink raw reply related
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