* [Patch v2 1/2] soc: qcom: Extend AOSS QMP driver to support resources that are used to wake up the SoC.
From: Thara Gopinath @ 2019-07-30 15:24 UTC (permalink / raw)
To: linux-arm-msm, agross, robh+dt, mark.rutland, bjorn.andersson,
amit.kucheria, vinod.koul
Cc: devicetree, linux-kernel
In-Reply-To: <1564500283-16038-1-git-send-email-thara.gopinath@linaro.org>
The AOSS QMP driver is extended to communicate with the additional
resources. These resources are then registered as cooling devices
with the thermal framework.
Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org>
---
v1->v2:
Added back name variable in qmp_cooling_device to fix the
compilation error.
Other minor naming changes as mentioned in review on the list.
drivers/soc/qcom/qcom_aoss.c | 131 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 131 insertions(+)
diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c
index 5f88519..dc6201e 100644
--- a/drivers/soc/qcom/qcom_aoss.c
+++ b/drivers/soc/qcom/qcom_aoss.c
@@ -10,6 +10,8 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
+#include <linux/thermal.h>
+#include <linux/slab.h>
#define QMP_DESC_MAGIC 0x0
#define QMP_DESC_VERSION 0x4
@@ -40,6 +42,17 @@
/* 64 bytes is enough to store the requests and provides padding to 4 bytes */
#define QMP_MSG_LEN 64
+#define QMP_NUM_COOLING_RESOURCES 2
+
+static bool qmp_cdev_init_state = 1;
+
+struct qmp_cooling_device {
+ struct thermal_cooling_device *cdev;
+ struct qmp *qmp;
+ char *name;
+ bool state;
+};
+
/**
* struct qmp - driver state for QMP implementation
* @msgram: iomem referencing the message RAM used for communication
@@ -69,6 +82,7 @@ struct qmp {
struct clk_hw qdss_clk;
struct genpd_onecell_data pd_data;
+ struct qmp_cooling_device *cooling_devs;
};
struct qmp_pd {
@@ -385,6 +399,118 @@ static void qmp_pd_remove(struct qmp *qmp)
pm_genpd_remove(data->domains[i]);
}
+static int qmp_cdev_get_max_state(struct thermal_cooling_device *cdev,
+ unsigned long *state)
+{
+ *state = qmp_cdev_init_state;
+ return 0;
+}
+
+static int qmp_cdev_get_cur_state(struct thermal_cooling_device *cdev,
+ unsigned long *state)
+{
+ struct qmp_cooling_device *qmp_cdev = cdev->devdata;
+
+ *state = qmp_cdev->state;
+ return 0;
+}
+
+static int qmp_cdev_set_cur_state(struct thermal_cooling_device *cdev,
+ unsigned long state)
+{
+ struct qmp_cooling_device *qmp_cdev = cdev->devdata;
+ char buf[QMP_MSG_LEN] = {};
+ bool cdev_state;
+ int ret;
+
+ /* Normalize state */
+ cdev_state = !!state;
+
+ if (qmp_cdev->state == state)
+ return 0;
+
+ snprintf(buf, sizeof(buf),
+ "{class: volt_flr, event:zero_temp, res:%s, value:%s}",
+ qmp_cdev->name,
+ cdev_state ? "off" : "on");
+
+ ret = qmp_send(qmp_cdev->qmp, buf, sizeof(buf));
+
+ if (!ret)
+ qmp_cdev->state = cdev_state;
+
+ return ret;
+}
+
+static struct thermal_cooling_device_ops qmp_cooling_device_ops = {
+ .get_max_state = qmp_cdev_get_max_state,
+ .get_cur_state = qmp_cdev_get_cur_state,
+ .set_cur_state = qmp_cdev_set_cur_state,
+};
+
+static int qmp_cooling_device_add(struct qmp *qmp,
+ struct qmp_cooling_device *qmp_cdev,
+ struct device_node *node)
+{
+ char *cdev_name = (char *)node->name;
+
+ qmp_cdev->qmp = qmp;
+ qmp_cdev->state = qmp_cdev_init_state;
+ qmp_cdev->name = cdev_name;
+ qmp_cdev->cdev = devm_thermal_of_cooling_device_register
+ (qmp->dev, node,
+ cdev_name,
+ qmp_cdev, &qmp_cooling_device_ops);
+
+ if (IS_ERR(qmp_cdev->cdev))
+ dev_err(qmp->dev, "unable to register %s cooling device\n",
+ cdev_name);
+
+ return PTR_ERR_OR_ZERO(qmp_cdev->cdev);
+}
+
+static int qmp_cooling_devices_register(struct qmp *qmp)
+{
+ struct device_node *np, *child;
+ int count = QMP_NUM_COOLING_RESOURCES;
+ int ret;
+
+ np = qmp->dev->of_node;
+
+ qmp->cooling_devs = devm_kcalloc(qmp->dev, count,
+ sizeof(*qmp->cooling_devs),
+ GFP_KERNEL);
+
+ if (!qmp->cooling_devs)
+ return -ENOMEM;
+
+ for_each_available_child_of_node(np, child) {
+ if (!of_find_property(child, "#cooling-cells", NULL))
+ continue;
+ ret = qmp_cooling_device_add(qmp, &qmp->cooling_devs[count++],
+ child);
+ if (ret)
+ goto uroll;
+ }
+
+ return 0;
+
+uroll:
+ while (--count >= 0)
+ thermal_cooling_device_unregister
+ (qmp->cooling_devs[count].cdev);
+
+ return ret;
+}
+
+static void qmp_cooling_devices_remove(struct qmp *qmp)
+{
+ int i;
+
+ for (i = 0; i < QMP_NUM_COOLING_RESOURCES; i++)
+ thermal_cooling_device_unregister(qmp->cooling_devs[i].cdev);
+}
+
static int qmp_probe(struct platform_device *pdev)
{
struct resource *res;
@@ -433,6 +559,10 @@ static int qmp_probe(struct platform_device *pdev)
if (ret)
goto err_remove_qdss_clk;
+ ret = qmp_cooling_devices_register(qmp);
+ if (ret)
+ dev_err(&pdev->dev, "failed to register aoss cooling devices\n");
+
platform_set_drvdata(pdev, qmp);
return 0;
@@ -453,6 +583,7 @@ static int qmp_remove(struct platform_device *pdev)
qmp_qdss_clk_remove(qmp);
qmp_pd_remove(qmp);
+ qmp_cooling_devices_remove(qmp);
qmp_close(qmp);
mbox_free_channel(qmp->mbox_chan);
--
2.1.4
^ permalink raw reply related
* [Patch v2 0/2] Add support for AOSS resources that are used to warm up the SoC
From: Thara Gopinath @ 2019-07-30 15:24 UTC (permalink / raw)
To: linux-arm-msm, agross, robh+dt, mark.rutland, bjorn.andersson,
amit.kucheria, vinod.koul
Cc: devicetree, linux-kernel
The Always On Sub System (AOSS) hosts certain resources
that are used to warm up the soc if the temperature falls
below certain threshold. These resources are
added can be considered as thermal warming devices
(opposite of thermal cooling devices).
These resources are controlled via AOSS QMP protocol
In kernel, these devices can be treated the same way as any other
thermal cooling device and hence are registered with the thermal
cooling framework.
To use these resources as warming devices require further tweaks in
the thermal framework which are out of scope of this patch series.
Thara Gopinath (2):
soc: qcom: Extend AOSS QMP driver to support resources that are used
to wake up the SoC.
arm64: dts: qcom: Extend AOSS QMP node
arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 +++
drivers/soc/qcom/qcom_aoss.c | 131 +++++++++++++++++++++++++++++++++++
2 files changed, 139 insertions(+)
--
2.1.4
^ permalink raw reply
* [v6 1/2] dt-bindings: gpio: aspeed: Add SGPIO support
From: Hongwei Zhang @ 2019-07-30 15:24 UTC (permalink / raw)
To: Andrew Jeffery, Linus Walleij, Joel Stanley, devicetree
Cc: Hongwei Zhang, Rob Herring, Bartosz Golaszewski, linux-aspeed,
linux-kernel, linux-arm-kernel, linux-gpio
In-Reply-To: <1564500268-2627-1-git-send-email-hongweiz@ami.com>
Add bindings to support SGPIO on AST2400 or AST2500.
Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
---
.../devicetree/bindings/gpio/sgpio-aspeed.txt | 55 ++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
diff --git a/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
new file mode 100644
index 0000000..f9ed438
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
@@ -0,0 +1,55 @@
+Aspeed SGPIO controller Device Tree Bindings
+-------------------------------------------
+
+This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
+featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
+support the following options:
+- Support interrupt option for each input port and various interrupt
+ sensitivity option (level-high, level-low, edge-high, edge-low)
+- Support reset tolerance option for each output port
+- Directly connected to APB bus and its shift clock is from APB bus clock
+ divided by a programmable value.
+- Co-work with external signal-chained TTL components (74LV165/74LV595)
+
+
+Required properties:
+
+- compatible : Either "aspeed,ast2400-sgpio" or "aspeed,ast2500-sgpio"
+
+- #gpio-cells : Should be two
+ - First cell is the GPIO line number
+ - Second cell is used to specify optional
+ parameters (unused)
+
+- reg : Address and length of the register set for the device
+- gpio-controller : Marks the device node as a GPIO controller
+- interrupts : Interrupt specifier (see interrupt bindings for
+ details)
+
+- interrupt-controller : Mark the GPIO controller as an interrupt-controller
+
+- ngpios : number of GPIO pins to serialise.
+ (should be multiple of 8, up to 80 pins)
+
+- clocks : A phandle to the APB clock for SGPM clock division
+
+- bus-frequency : SGPM CLK frequency
+
+
+The sgpio and interrupt properties are further described in their respective bindings documentation:
+
+- Documentation/devicetree/bindings/sgpio/gpio.txt
+- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+
+ Example:
+ sgpio: sgpio@1e780200 {
+ #gpio-cells = <2>;
+ compatible = "aspeed,ast2500-sgpio";
+ gpio-controller;
+ interrupts = <40>;
+ reg = <0x1e780200 0x0100>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ interrupt-controller;
+ ngpios = <8>;
+ bus-frequency = <12000000>;
+ };
--
2.7.4
^ permalink raw reply related
* [v6 0/2] gpio: aspeed: Add SGPIO driver
From: Hongwei Zhang @ 2019-07-30 15:24 UTC (permalink / raw)
To: Andrew Jeffery, Linus Walleij, linux-gpio
Cc: Hongwei Zhang, Joel Stanley, devicetree, linux-aspeed,
Bartosz Golaszewski, Rob Herring, Mark Rutland, linux-kernel,
linux-arm-kernel
Hello,
This short series introduce dt-binding document and a driver for the
Aspeed AST2500 SGPIO controller. Please review.
[v6]: Changes between v5 and v6:
- fix a bug in aspeed_sgpio_dir_out()
- v5 feedback updates, some comments cleanup
The related SGPM pinmux dt-binding document, dts, and pinctrl driver
updates have been accepted and merged:
_http://patchwork.ozlabs.org/patch/1110210/
Hongwei Zhang (2):
dt-bindings: gpio: aspeed: Add SGPIO support
gpio: aspeed: Add SGPIO driver
.../devicetree/bindings/gpio/sgpio-aspeed.txt | 55 +++
drivers/gpio/sgpio-aspeed.c | 521 +++++++++++++++++++++
2 files changed, 576 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
create mode 100644 drivers/gpio/sgpio-aspeed.c
--
2.7.4
^ permalink raw reply
* Re: [PATCH] ARM: DTS: vybrid: Update qspi node description for VF610 BK4 board
From: Fabio Estevam @ 2019-07-30 15:19 UTC (permalink / raw)
To: Lukasz Majewski
Cc: Shawn Guo, Sascha Hauer, Stefan Agner, Rob Herring, Mark Rutland,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-kernel
In-Reply-To: <20190730150552.24927-1-lukma@denx.de>
Hi Lukasz,
Subject line could be improved:
ARM: dts: vf610-bk4: Fix qspi node description
On Tue, Jul 30, 2019 at 12:06 PM Lukasz Majewski <lukma@denx.de> wrote:
>
> Before this change the device tree description of qspi node for
> second memory on BK4 board was wrong (applicable to old, in-house
> tunned fsl-quadspi.c driver).
>
> As a result this memory was not recognized correctly when used
> with the new spi-fsl-qspi.c driver.
>
> From the dt-bindings:
>
> "Required SPI slave node properties:
> - reg: There are two buses (A and B) with two chip selects each.
> This encodes to which bus and CS the flash is connected:
> <0>: Bus A, CS 0
> <1>: Bus A, CS 1
> <2>: Bus B, CS 0
> <3>: Bus B, CS 1"
>
> According to above with new driver the second SPI-NOR memory shall
> have reg=<2> as it is connected to Bus B, CS 0.
I am glad you got it working!
This looks very familiar with the suggestion I sent yesterday:
http://lists.infradead.org/pipermail/linux-mtd/2019-July/090655.html
It is a good practice to give some credit to someone who has helped in
finding the solution of your problem.
Adding a Suggested-by: Fabio Estevam <festevam@gmail.com> would be nice here.
This also needs a Fixes tag.
^ permalink raw reply
* [PATCH] ARM: DTS: vybrid: Update qspi node description for VF610 BK4 board
From: Lukasz Majewski @ 2019-07-30 15:05 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, Sascha Hauer, Stefan Agner, Rob Herring,
Mark Rutland, linux-arm-kernel, devicetree, linux-kernel,
Lukasz Majewski
Before this change the device tree description of qspi node for
second memory on BK4 board was wrong (applicable to old, in-house
tunned fsl-quadspi.c driver).
As a result this memory was not recognized correctly when used
with the new spi-fsl-qspi.c driver.
>From the dt-bindings:
"Required SPI slave node properties:
- reg: There are two buses (A and B) with two chip selects each.
This encodes to which bus and CS the flash is connected:
<0>: Bus A, CS 0
<1>: Bus A, CS 1
<2>: Bus B, CS 0
<3>: Bus B, CS 1"
According to above with new driver the second SPI-NOR memory shall
have reg=<2> as it is connected to Bus B, CS 0.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
---
arch/arm/boot/dts/vf610-bk4.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts
index 3fa0cbe456db..0f3870d3b099 100644
--- a/arch/arm/boot/dts/vf610-bk4.dts
+++ b/arch/arm/boot/dts/vf610-bk4.dts
@@ -246,13 +246,13 @@
reg = <0>;
};
- n25q128a13_2: flash@1 {
+ n25q128a13_2: flash@2 {
compatible = "n25q128a13", "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <66000000>;
spi-rx-bus-width = <2>;
- reg = <1>;
+ reg = <2>;
};
};
--
2.11.0
^ permalink raw reply related
* [PATCH] dt-bindings: Fix generated example files getting added to schemas
From: Rob Herring @ 2019-07-30 14:59 UTC (permalink / raw)
To: devicetree; +Cc: linux-kernel, Guido Günther
Commit 837158b847a4 ("dt-bindings: Check the examples against the
schemas") started generating YAML encoded DT files to validate the
examples against the schema. When running 'make dt_binding_check' in
tree after the 1st time, the generated example .dt.yaml files are
mistakenly added to the list of schema files. Exclude *.example.dt.yaml
files from the search for schema files.
Fixes: 837158b847a4 ("dt-bindings: Check the examples against the schemas")
Reported-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile
index 6b0dfd5c17ba..5138a2f6232a 100644
--- a/Documentation/devicetree/bindings/Makefile
+++ b/Documentation/devicetree/bindings/Makefile
@@ -19,7 +19,9 @@ quiet_cmd_mk_schema = SCHEMA $@
DT_DOCS = $(shell \
cd $(srctree)/$(src) && \
- find * \( -name '*.yaml' ! -name $(DT_TMP_SCHEMA) \) \
+ find * \( -name '*.yaml' ! \
+ -name $(DT_TMP_SCHEMA) ! \
+ -name '*.example.dt.yaml' \) \
)
DT_SCHEMA_FILES ?= $(addprefix $(src)/,$(DT_DOCS))
--
2.20.1
^ permalink raw reply related
* Re: [PATCH v2 2/3] ASoC: Add codec driver for ST TDA7802
From: Mark Brown @ 2019-07-30 14:58 UTC (permalink / raw)
To: Thomas Preston
Cc: Liam Girdwood, Rob Herring, Mark Rutland, Jaroslav Kysela,
Takashi Iwai, Charles Keepax, Jerome Brunet, Srinivas Kandagatla,
Marco Felsch, Paul Cercueil, Kirill Marinushkin, Cheng-Yi Chiang,
Kuninori Morimoto, Vinod Koul, Annaliese McDermond, alsa-devel,
devicetree, linux-kernel, Patrick Glaser, Rob Duncan, Nate
In-Reply-To: <20190730120937.16271-3-thomas.preston@codethink.co.uk>
[-- Attachment #1: Type: text/plain, Size: 2861 bytes --]
On Tue, Jul 30, 2019 at 01:09:36PM +0100, Thomas Preston wrote:
> index 000000000000..0f82a88bc1a4
> --- /dev/null
> +++ b/sound/soc/codecs/tda7802.c
> @@ -0,0 +1,509 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * tda7802.c -- codec driver for ST TDA7802
Please make the entire comment a C++ one so this looks intentional.
> +static int tda7802_digital_mute(struct snd_soc_dai *dai, int mute)
> +{
> + const u8 mute_disabled = mute ? 0 : IB2_DIGITAL_MUTE_DISABLED;
Please write normal conditional statements to make the code easier to
read.
> + case SND_SOC_BIAS_STANDBY:
> + err = regulator_enable(tda7802->enable_reg);
> + if (err < 0) {
> + dev_err(component->dev, "Could not enable.\n");
> + return err;
> + }
> + dev_dbg(component->dev, "Regulator enabled\n");
> + msleep(ENABLE_DELAY_MS);
Is this delay needed by the device or is it for the regulator to ramp?
If it's for the regulator to ramp then the regulator should be doing it.
> + case SND_SOC_BIAS_OFF:
> + regcache_mark_dirty(component->regmap);
If the regulator is going off you should really be marking the device as
cache only.
> + err = regulator_disable(tda7802->enable_reg);
> + if (err < 0)
> + dev_err(component->dev, "Could not disable.\n");
Any non-zero value from regulator_disable() is an error, there's similar
error checking issues in other places.
> +static const struct snd_kcontrol_new tda7802_snd_controls[] = {
> + SOC_SINGLE("Channel 4 Tristate", TDA7802_IB0, 7, 1, 0),
> + SOC_SINGLE("Channel 3 Tristate", TDA7802_IB0, 6, 1, 0),
> + SOC_SINGLE("Channel 2 Tristate", TDA7802_IB0, 5, 1, 0),
> + SOC_SINGLE("Channel 1 Tristate", TDA7802_IB0, 4, 1, 0),
These look like simple on/off switches so should have Switch at the end
of the control name. It's also not clear to me why this is exported to
userspace - why would this change at runtime and won't any changes need
to be coordinated with whatever else is connected to the signal?
> + SOC_ENUM("Mute time", mute_time),
> + SOC_SINGLE("Unmute channels 1 & 3", TDA7802_IB2, 4, 1, 0),
> + SOC_SINGLE("Unmute channels 2 & 4", TDA7802_IB2, 3, 1, 0),
These are also Switch controls. There are *lots* of problems with
control names, see control-names.rst.
> +static const struct snd_soc_component_driver tda7802_component_driver = {
> + .set_bias_level = tda7802_set_bias_level,
> + .idle_bias_on = 1,
Any reason to keep the device powered up? It looks like the power on
process is just powering things up and writing the register cache out
and there's not that many registers so the delay is trivial.
> + tda7802->enable_reg = devm_regulator_get(dev, "enable");
> + if (IS_ERR(tda7802->enable_reg)) {
> + dev_err(dev, "Failed to get enable regulator\n");
It's better to print error codes if you have them and are printing a
diagnostic so people have more to go on when debugging problems.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* [PATCH 22/22] ARM: dts: imx6ull-colibri: Add touchscreens used with Eval Board
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This adds the common touchscreens that are used with Toradex's
Eval Boards.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
.../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
index d3c4809f140e..cd72d3decf6a 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
@@ -112,6 +112,34 @@
&i2c1 {
status = "okay";
+ /*
+ * the PCAPs use SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm5,
+ * pwm6. so if you enable one of the PCAP controllers disable the pwms
+ */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiotouch>;
+ reg = <0x4a>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <16 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
+ reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */
+ status = "disabled";
+ };
+
+ touch: touchrevf0710a@10 {
+ compatible = "touchrevolution,fusion-f0710a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiotouch>;
+ reg = <0x10>;
+ /* SODIMM 28, Pen down interrupt */
+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH
+ /* SODIMM 30, Reset interrupt */
+ &gpio2 5 GPIO_ACTIVE_LOW
+ >;
+ status = "disabled";
+ };
+
/* M41T0M6 real time clock on carrier board */
m41t0m6: rtc@68 {
compatible = "st,m41t0";
@@ -188,3 +216,12 @@
sd-uhs-sdr104;
status = "okay";
};
+
+&iomuxc {
+ pinctrl_gpiotouch: touchgpios {
+ fsl,pins = <
+ MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x74
+ MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0x14
+ >;
+ };
+};
--
2.22.0
^ permalink raw reply related
* [PATCH 21/22] ARM: dts: imx6/7-colibri: switch dr_mode to otg
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
In order for the otg ports, that these modules support, it is needed
that dr_mode is on otg. Switch to use that feature.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 2 +-
arch/arm/boot/dts/imx7-colibri.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 9a63debab0b5..6674198346d2 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -388,7 +388,7 @@
&usbotg {
pinctrl-names = "default";
disable-over-current;
- dr_mode = "peripheral";
+ dr_mode = "otg";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 67f5e0c87fdc..42478f1aa146 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -320,7 +320,7 @@
};
&usbotg1 {
- dr_mode = "host";
+ dr_mode = "otg";
};
&usdhc1 {
--
2.22.0
^ permalink raw reply related
* [PATCH 20/22] ARM: dts: imx6ull-colibri: Add general wakeup key used on Colibri
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This adds the possibility to wake the module with an external signal
as defined in the Colibri standard
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
index 3bee37c75aa6..d3c4809f140e 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
@@ -8,6 +8,20 @@
stdout-path = "serial0:115200n8";
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_snvs_gpiokeys>;
+
+ power {
+ label = "Wake-Up";
+ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_WAKEUP>;
+ debounce-interval = <10>;
+ wakeup-source;
+ };
+ };
+
/* fixed crystal dedicated to mcp2515 */
clk16m: clk16m {
compatible = "fixed-clock";
--
2.22.0
^ permalink raw reply related
* [PATCH 19/22] ARM: dts: imx6ull: improve can templates
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Max Krummenacher <max.krummenacher@toradex.com>
Add the pinmuxing and a inactive node for flexcan1 on SODIMM 55/63
and move the inactive flexcan nodes to imx6ull-colibri-eval-v3.dtsi
where they belong.
Note that this commit does not enable flexcan functionality, but rather
eases the effort needed to do so.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 12 ++++++++++++
arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi | 2 +-
arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 2 +-
arch/arm/boot/dts/imx6ull-colibri.dtsi | 16 ++++++++++++++--
4 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
index b6147c76d159..3bee37c75aa6 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
@@ -83,6 +83,18 @@
};
};
+&can1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ status = "disabled";
+};
+
+&can2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ status = "disabled";
+};
+
&i2c1 {
status = "okay";
diff --git a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
index fb213bec4654..95a11b8bcbdb 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi
@@ -15,7 +15,7 @@
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
- &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6>;
+ &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6 &pinctrl_gpio7>;
};
&iomuxc_snvs {
diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
index 038d8c90f6df..a0545431b3dc 100644
--- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi
@@ -26,7 +26,7 @@
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3
- &pinctrl_gpio4 &pinctrl_gpio5>;
+ &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio7>;
};
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index e3220298dd6f..553d4c1f80e9 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -256,6 +256,13 @@
>;
};
+ pinctrl_flexcan1: flexcan1-grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x1b020
+ MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x1b020
+ >;
+ };
+
pinctrl_flexcan2: flexcan2-grp {
fsl,pins = <
MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020
@@ -271,8 +278,6 @@
pinctrl_gpio1: gpio1-grp {
fsl,pins = <
- MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x74 /* SODIMM 55 */
- MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x74 /* SODIMM 63 */
MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0X14 /* SODIMM 77 */
MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x14 /* SODIMM 99 */
MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x14 /* SODIMM 133 */
@@ -325,6 +330,13 @@
>;
};
+ pinctrl_gpio7: gpio7-grp { /* CAN1 */
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x74 /* SODIMM 55 */
+ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x74 /* SODIMM 63 */
+ >;
+ };
+
pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = <
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9
--
2.22.0
^ permalink raw reply related
* [PATCH 18/22] ARM: dts: imx6ull-colibri: Add watchdog
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This patch adds the watchdog to the imx6ull-colibri devicetree
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6ull-colibri.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index 1f112ec55e5c..e3220298dd6f 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -199,6 +199,12 @@
assigned-clock-rates = <0>, <198000000>;
};
+&wdog1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdog>;
+ fsl,ext-reset-output;
+};
+
&iomuxc {
pinctrl_can_int: canint-grp {
fsl,pins = <
@@ -506,6 +512,12 @@
MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x14
>;
};
+
+ pinctrl_wdog: wdog-grp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0
+ >;
+ };
};
&iomuxc_snvs {
--
2.22.0
^ permalink raw reply related
* [PATCH 17/22] ARM: dts: imx6ull-colibri: reduce v_batt current in power off
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Max Krummenacher <max.krummenacher@toradex.com>
Reduce the current drawn from VCC_BATT when the main power on the 3V3
pins to the module are switched off.
This switches off SoC internal pull resistors which are provided on the
module for TAMPER7 and TAMPER9 SoC pin and switches on a pull down
instead of a pullup for the USBC_DET module pin (TAMPER2).
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6ull-colibri.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index 1019ce69a242..1f112ec55e5c 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -533,19 +533,19 @@
pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */
fsl,pins = <
- MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b0b0
+ MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x100b0
>;
};
pinctrl_snvs_reg_sd: snvs-reg-sd-grp {
fsl,pins = <
- MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x4001b8b0
+ MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400100b0
>;
};
pinctrl_snvs_usbc_det: snvs-usbc-det-grp {
fsl,pins = <
- MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0
+ MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0
>;
};
--
2.22.0
^ permalink raw reply related
* [PATCH 16/22] ARM: dts: imx6ull-colibri: Add sleep mode to fec
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
Do not change the clock as the power for this phy is switched
with that clock.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6ull-colibri.dtsi | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index d56728f03c35..1019ce69a242 100644
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -62,8 +62,9 @@
};
&fec2 {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_enet2>;
+ pinctrl-1 = <&pinctrl_enet2_sleep>;
phy-mode = "rmii";
phy-handle = <ðphy1>;
status = "okay";
@@ -220,6 +221,21 @@
>;
};
+ pinctrl_enet2_sleep: enet2sleepgrp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x0
+ MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0x0
+ MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x0
+ MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x0
+ MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x0
+ MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x0
+ MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
+ MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x0
+ MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x0
+ MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x0
+ >;
+ };
+
pinctrl_ecspi1_cs: ecspi1-cs-grp {
fsl,pins = <
MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x000a0
--
2.22.0
^ permalink raw reply related
* [PATCH 15/22] ARM: dts: apalis-imx6: Add some optional I2C devices
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This commit adds the mipi_csi node to Toradex's evalboard as found
on the mezzanine connector
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6q-apalis-eval.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts
index 33193d6137c0..ea419b9a0386 100644
--- a/arch/arm/boot/dts/imx6q-apalis-eval.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts
@@ -166,6 +166,14 @@
};
};
+&mipi_csi {
+ ipu_id = <0>;
+ csi_id = <1>;
+ v_channel = <0>;
+ lanes = <2>;
+ status = "okay";
+};
+
&backlight {
brightness-levels = <0 127 191 223 239 247 251 255>;
default-brightness-level = <1>;
--
2.22.0
^ permalink raw reply related
* [PATCH 14/22] ARM: dts: apalis-imx6: Add some example I2C devices
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
Those devices are used in conjunction with Toradex's evalboard.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6q-apalis-eval.dts | 95 +++++++++++++++++++++++++
1 file changed, 95 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts
index 60ec5e89d215..33193d6137c0 100644
--- a/arch/arm/boot/dts/imx6q-apalis-eval.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts
@@ -140,6 +140,30 @@
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ reg_2p5v: regulator-2p5v {
+ compatible = "regulator-fixed";
+ regulator-name = "2P5V";
+ regulator-min-microvolt = <2500000>;
+ regulator-max-microvolt = <2500000>;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
};
&backlight {
@@ -204,6 +228,77 @@
*/
&i2c3 {
status = "okay";
+
+ adv7280: adv7280@21 {
+ compatible = "adv7280";
+ reg = <0x21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>;
+ clocks = <&clks 200>;
+ clock-names = "csi_mclk";
+ DOVDD-supply = <®_3p3v>;
+ AVDD-supply = <®_3p3v>;
+ DVDD-supply = <®_3p3v>;
+ PVDD-supply = <®_3p3v>;
+ csi_id = <0>;
+ mclk = <24000000>;
+ mclk_source = <1>;
+ status = "okay";
+ };
+
+ /* Video ADC on Analog Camera Module */
+ adv7180: adv7180@21 {
+ compatible = "adv,adv7180";
+ reg = <0x21>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>;
+ clocks = <&clks 200>;
+ clock-names = "csi_mclk";
+ DOVDD-supply = <®_3p3v>; /* 3.3v */
+ AVDD-supply = <®_3p3v>; /* 1.8v */
+ DVDD-supply = <®_3p3v>; /* 1.8v */
+ PVDD-supply = <®_3p3v>; /* 1.8v */
+ csi_id = <0>;
+ mclk = <24000000>;
+ mclk_source = <1>;
+ cvbs = <1>;
+ status = "disabled";
+ };
+
+ max9526: max9526@20 {
+ compatible = "maxim,max9526";
+ reg = <0x20>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>;
+ clocks = <&clks 200>;
+ clock-names = "csi_mclk";
+ DVDDIO-supply = <®_3p3v>; /* 3.3v */
+ AVDD-supply = <®_3p3v>; /* 1.8v */
+ DVDD-supply = <®_3p3v>; /* 1.8v */
+ csi_id = <0>;
+ mclk = <24000000>;
+ mclk_source = <1>;
+ cvbs = <1>;
+ status = "okay";
+ };
+
+ ov5640_mipi@3c {
+ compatible = "ovti,ov564x_mipi";
+ reg = <0x3c>;
+ clocks = <&clks 147>;
+ clock-names = "csi_mclk";
+ DOVDD-supply = <®_1p8v>;
+ AVDD-supply = <®_2p5v>;
+ DVDD-supply = <®_1p8v>;
+ pwn-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
+ rst-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+ ipu_id = <0>;
+ csi_id = <1>;
+ mclk = <22000000>;
+ mclk_source = <0>;
+ pwms = <&pwm3 0 45 0>;
+ status = "okay";
+ };
};
&ipu1_di1_disp1 {
--
2.22.0
^ permalink raw reply related
* [PATCH 13/22] ARM: dts: colibri-imx6: Add missing pinmuxing to Toradex eval board
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This patch adds some missing pinmuxing that is in the colibri
standard to the dts.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 63d4f9ca9ad8..13800e60246c 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -204,6 +204,14 @@
};
&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
+ &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
+ &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
+ &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
+ >;
+
pinctrl_pcap_1: pcap-1 {
fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */
--
2.22.0
^ permalink raw reply related
* [PATCH 12/22] ARM: dts: imx6: Add touchscreens used on Toradex eval boards
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This commit adds the touchscreens from Toradex so one can enable it.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 44 +++++++++++++++++++
arch/arm/boot/dts/imx6q-apalis-eval.dts | 19 ++++++++
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 19 ++++++++
arch/arm/boot/dts/imx6q-apalis-ixora.dts | 19 ++++++++
4 files changed, 101 insertions(+)
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
index 9a5d6c94cca4..63d4f9ca9ad8 100644
--- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -168,6 +168,34 @@
&i2c3 {
status = "okay";
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcap_1>;
+ reg = <0x4a>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
+ reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */
+ status = "disabled";
+ };
+
+ /*
+ * the PCAPs use SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm1,
+ * pwm4. So if you enable one of the PCAP controllers disable the pwms.
+ */
+ pcap: pcap@10 {
+ /* TouchRevolution Fusion 7 and 10 multi-touch controller */
+ compatible = "touchrevolution,fusion-f0710a";
+ reg = <0x10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcap_1>;
+ gpios = <&gpio1 9 0 /* SODIMM 28, Pen down interrupt */
+ &gpio2 10 0 /* SODIMM 30, Reset */
+ >;
+ status = "disabled";
+ };
+
/* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 {
compatible = "st,m41t0";
@@ -175,6 +203,22 @@
};
};
+&iomuxc {
+ pinctrl_pcap_1: pcap-1 {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */
+ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */
+ >;
+ };
+
+ pinctrl_mxt_ts: mxt-ts {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */
+ MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */
+ >;
+ };
+};
+
&ipu1_di0_disp0 {
remote-endpoint = <&lcd_display_in>;
};
diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts
index 0edd3043d9c1..60ec5e89d215 100644
--- a/arch/arm/boot/dts/imx6q-apalis-eval.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts
@@ -167,6 +167,25 @@
&i2c1 {
status = "okay";
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ reg = <0x4a>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13 */
+ status = "disabled";
+ };
+
+ pcap@10 {
+ /* TouchRevolution Fusion 7 and 10 multi-touch controller */
+ compatible = "touchrevolution,fusion-f0710a";
+ reg = <0x10>;
+ gpios = <&gpio6 10 0 /* MXM3 11, Pen down interrupt */
+ &gpio6 9 0 /* MXM3 13, Reset */
+ >;
+ };
+
pcie-switch@58 {
compatible = "plx,pex8605";
reg = <0x58>;
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
index b94bb687be6b..98a8ae20b1f2 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
@@ -172,6 +172,25 @@
&i2c1 {
status = "okay";
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ reg = <0x4a>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13 */
+ status = "disabled";
+ };
+
+ pcap@10 {
+ /* TouchRevolution Fusion 7 and 10 multi-touch controller */
+ compatible = "touchrevolution,fusion-f0710a";
+ reg = <0x10>;
+ gpios = <&gpio6 10 GPIO_ACTIVE_HIGH /* MXM3 11, Pen down interrupt */
+ &gpio6 9 GPIO_ACTIVE_HIGH /* MXM3 13, Reset */
+ >;
+ };
+
/* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 {
compatible = "st,m41t0";
diff --git a/arch/arm/boot/dts/imx6q-apalis-ixora.dts b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
index 302fd6adc8a7..67f6b36e6f94 100644
--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts
+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts
@@ -171,6 +171,25 @@
&i2c1 {
status = "okay";
+ /* Atmel maxtouch controller */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ reg = <0x4a>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
+ reset-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* SODIMM 13 */
+ status = "disabled";
+ };
+
+ pcap@10 {
+ /* TouchRevolution Fusion 7 and 10 multi-touch controller */
+ compatible = "touchrevolution,fusion-f0710a";
+ reg = <0x10>;
+ gpios = <&gpio6 10 GPIO_ACTIVE_HIGH /* MXM3 11, Pen down interrupt */
+ &gpio6 9 GPIO_ACTIVE_HIGH /* MXM3 13, Reset */
+ >;
+ };
+
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
--
2.22.0
^ permalink raw reply related
* [PATCH 11/22] ARM: dts: imx6: Add sleep state to can interfaces
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This patch prepares the devicetree for the new Ixora V1.2 where we are
able to turn off the supply of the can transceiver. This implies to use
a sleep state on transmission pins in order to prevent backfeeding.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6qdl-apalis.dtsi | 27 +++++++++++++++++++++------
1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 7c4ad541c3f5..59ed2e4a1fd1 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -148,14 +148,16 @@
};
&can1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan1>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_flexcan1_default>;
+ pinctrl-1 = <&pinctrl_flexcan1_sleep>;
status = "disabled";
};
&can2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flexcan2>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&pinctrl_flexcan2_default>;
+ pinctrl-1 = <&pinctrl_flexcan2_sleep>;
status = "disabled";
};
@@ -599,19 +601,32 @@
>;
};
- pinctrl_flexcan1: flexcan1grp {
+ pinctrl_flexcan1_default: flexcan1defgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
>;
};
- pinctrl_flexcan2: flexcan2grp {
+ pinctrl_flexcan1_sleep: flexcan1slpgrp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0
+ >;
+ };
+
+ pinctrl_flexcan2_default: flexcan2defgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
>;
};
+ pinctrl_flexcan2_sleep: flexcan2slpgrp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x0
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0
+ >;
+ };
pinctrl_gpio_bl_on: gpioblon {
fsl,pins = <
--
2.22.0
^ permalink raw reply related
* [PATCH 10/22] ARM: dts: imx6qdl-colibri: Add missing pin declaration in iomuxc
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Philippe Schenker, Fabio Estevam, linux-kernel, linux-arm-kernel,
Pengutronix Kernel Team, NXP Linux Team, Sascha Hauer
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
This adds the muxing for the optional pins usb-oc (overcurrent) and
usb-id.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 019dda6b88ad..9a63debab0b5 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -615,6 +615,13 @@
>;
};
+ pinctrl_usbh_oc_1: usbh_oc-1 {
+ fsl,pins = <
+ /* USBH_OC */
+ MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0
+ >;
+ };
+
pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
@@ -681,6 +688,13 @@
>;
};
+ pinctrl_usbc_id_1: usbc_id-1 {
+ fsl,pins = <
+ /* USBC_ID */
+ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
--
2.22.0
^ permalink raw reply related
* [PATCH 09/22] ARM: dts: imx6qdl-colibri: add phy to fec
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Sascha Hauer, linux-kernel, Philippe Schenker, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
Add the phy-node and mdio bus to the fec-node, represented as is on
hardware.
This commit includes micrel,led-mode that is set to the default
value, prepared for someone who wants to change this.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
index 1beac22266ed..019dda6b88ad 100644
--- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -140,7 +140,18 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
+ phy-handle = <ðphy>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy: ethernet-phy@0 {
+ reg = <0>;
+ micrel,led-mode = <0>;
+ };
+ };
};
&hdmi {
--
2.22.0
^ permalink raw reply related
* [PATCH 08/22] ARM: dts: imx7-colibri: Add touch controllers
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Sascha Hauer, linux-kernel, Philippe Schenker, NXP Linux Team,
Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Philippe Schenker <philippe.schenker@toradex.com>
Add atmel mxt multitouch controller and TouchRevolution multitouch
controller which are connected over an I2C bus.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 37 +++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index d4dbc4fc1adf..f6cbbe876532 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -145,6 +145,34 @@
&i2c4 {
status = "okay";
+ /*
+ * the PCAPs use SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2,
+ * pwm3. so if you enable one of the PCAP controllers disable the pwms
+ */
+ atmel_mxt_ts: atmel_mxt_ts@4a {
+ compatible = "atmel,maxtouch";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiotouch>;
+ reg = <0x4a>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */
+ reset-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */
+ status = "disabled";
+ };
+
+ touch: touchrevf0710a@10 {
+ compatible = "touchrevolution,fusion-f0710a";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiotouch>;
+ reg = <0x10>;
+ /* SODIMM 28, Pen down interrupt */
+ gpios = <&gpio1 9 GPIO_ACTIVE_HIGH
+ /* SODIMM 30, Reset interrupt */
+ &gpio1 10 GPIO_ACTIVE_LOW
+ >;
+ status = "disabled";
+ };
+
/* M41T0M6 real time clock on carrier board */
rtc: m41t0m6@68 {
compatible = "st,m41t0";
@@ -200,3 +228,12 @@
vmmc-supply = <®_3v3>;
status = "okay";
};
+
+&iomuxc {
+ pinctrl_gpiotouch: touchgpios {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74
+ MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14
+ >;
+ };
+};
--
2.22.0
^ permalink raw reply related
* [PATCH 07/22] ARM: dts: imx7-colibri: fix 1.8V/UHS support
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Stefan Agner, Sascha Hauer, linux-kernel, Philippe Schenker,
NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
linux-arm-kernel
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Stefan Agner <stefan.agner@toradex.com>
Add pinmuxing and do not specify voltage restrictions in the
module level device tree.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx7-colibri.dtsi | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 16d1a1ed1aff..67f5e0c87fdc 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -326,7 +326,6 @@
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
- no-1-8-v;
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
disable-wp;
vqmmc-supply = <®_LDO2>;
@@ -671,6 +670,28 @@
>;
};
+ pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
--
2.22.0
^ permalink raw reply related
* [PATCH 06/22] ARM: dts: imx7-colibri: add GPIO wakeup key
From: Philippe Schenker @ 2019-07-30 14:46 UTC (permalink / raw)
To: marcel.ziswiler, max.krummenacher, stefan, devicetree,
Rob Herring, Shawn Guo, Mark Rutland
Cc: Stefan Agner, Sascha Hauer, linux-kernel, Philippe Schenker,
NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
linux-arm-kernel
In-Reply-To: <20190730144649.19022-1-dev@pschenker.ch>
From: Stefan Agner <stefan.agner@toradex.com>
Add wakeup GPIO key which is able to wake the system from sleep
modes (e.g. Suspend-to-Memory).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
---
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 14 ++++++++++++++
arch/arm/boot/dts/imx7-colibri.dtsi | 7 ++++++-
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
index 3f2746169181..d4dbc4fc1adf 100644
--- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
@@ -52,6 +52,20 @@
clock-frequency = <16000000>;
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiokeys>;
+
+ power {
+ label = "Wake-Up";
+ gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_WAKEUP>;
+ debounce-interval = <10>;
+ gpio-key,wakeup;
+ };
+ };
+
panel: panel {
compatible = "edt,et057090dhu";
backlight = <&bl>;
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi
index 2480623c92ff..16d1a1ed1aff 100644
--- a/arch/arm/boot/dts/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/imx7-colibri.dtsi
@@ -741,12 +741,17 @@
pinctrl_gpio_lpsr: gpio1-grp {
fsl,pins = <
- MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x59
MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59
MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59
>;
};
+ pinctrl_gpiokeys: gpiokeysgrp {
+ fsl,pins = <
+ MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19
+ >;
+ };
+
pinctrl_i2c1: i2c1-grp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
--
2.22.0
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox