* [PATCH v4 13/13] arm64: defconfig: Enable HFPLL
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
The high frequency pll is required on compatible Qualcomm SoCs to
support the CPU frequency scaling feature.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 34c3ac4e4b79..04b7fb26a942 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -698,6 +698,7 @@ CONFIG_MSM_MMCC_8996=y
CONFIG_MSM_GCC_8998=y
CONFIG_QCS_GCC_404=y
CONFIG_SDM_GCC_845=y
+CONFIG_QCOM_HFPLL=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_ARM_MHU=y
--
2.22.0
^ permalink raw reply related
* [PATCH v4 12/13] arm64: dts: qcom: qcs404: Add DVFS support
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Support dynamic voltage and frequency scaling on qcs404.
CPUFreq will soon be superseeded by Core Power Reduction (CPR, a form
of Adaptive Voltage Scaling found on some Qualcomm SoCs like the
qcs404).
Due to the CPR upstreaming already being in progress - and some
commits already merged - the following commit will need to be
reverted to enable CPUFreq support
Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date: Thu Jul 25 12:41:36 2019 +0200
cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 31 ++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 5b7d6258e9bf..8cce4a224de2 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -36,6 +36,10 @@
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
+
};
CPU1: cpu@101 {
@@ -46,6 +50,9 @@
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
};
CPU2: cpu@102 {
@@ -56,6 +63,9 @@
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
};
CPU3: cpu@103 {
@@ -66,6 +76,9 @@
cpu-idle-states = <&CPU_SLEEP_0>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
+ clocks = <&apcs_glb>;
+ operating-points-v2 = <&cpu_opp_table>;
+ cpu-supply = <&pms405_s3>;
};
L2_0: l2-cache {
@@ -88,6 +101,24 @@
};
};
+ cpu_opp_table: cpu-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-1094400000 {
+ opp-hz = /bits/ 64 <1094400000>;
+ opp-microvolt = <1224000 1224000 1224000>;
+ };
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1288000 1288000 1288000>;
+ };
+ opp-1401600000 {
+ opp-hz = /bits/ 64 <1401600000>;
+ opp-microvolt = <1384000 1384000 1384000>;
+ };
+ };
+
firmware {
scm: scm {
compatible = "qcom,scm-qcs404", "qcom,scm";
--
2.22.0
^ permalink raw reply related
* [PATCH v4 11/13] arm64: dts: qcom: qcs404: Add the clocks for APCS mux/divider
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 3714099306b7..5b7d6258e9bf 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -857,6 +857,9 @@
compatible = "qcom,qcs404-apcs-apps-global", "syscon";
reg = <0x0b011000 0x1000>;
#mbox-cells = <1>;
+ clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>;
+ clock-names = "aux", "pll";
+ #clock-cells = <0>;
};
apcs_hfpll: clock-controller@b016000 {
--
2.22.0
^ permalink raw reply related
* [PATCH v4 10/13] arm64: dts: qcom: qcs404: Add HFPLL node
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
The high frequency pll functionality is required to enable CPU
frequency scaling operation.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 3d0789775009..3714099306b7 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -859,6 +859,15 @@
#mbox-cells = <1>;
};
+ apcs_hfpll: clock-controller@b016000 {
+ compatible = "qcom,hfpll";
+ reg = <0x0b016000 0x30>;
+ #clock-cells = <0>;
+ clock-output-names = "apcs_hfpll";
+ clocks = <&xo_board>;
+ clock-names = "xo";
+ };
+
timer@b120000 {
#address-cells = <1>;
#size-cells = <1>;
--
2.22.0
^ permalink raw reply related
* [PATCH v4 09/13] arm64: dts: qcom: msm8916: Add the clocks for the APCS mux/divider
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.
The driver still supports the previous bindings; however with this
update it we allow the msm8916 to access the parent clock names
required by the driver operation using the device tree node.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 5ea9fb8f2f87..96dc7a12aa94 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -429,7 +429,8 @@
compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
reg = <0xb011000 0x1000>;
#mbox-cells = <1>;
- clocks = <&a53pll>;
+ clocks = <&gcc GPLL0_VOTE>, <&a53pll>;
+ clock-names = "aux", "pll";
#clock-cells = <0>;
};
--
2.22.0
^ permalink raw reply related
* [PATCH v4 08/13] clk: qcom: hfpll: CLK_IGNORE_UNUSED
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
When COMMON_CLK_DISABLED_UNUSED is set, in an effort to save power and
to keep the software model of the clock in line with reality, the
framework transverses the clock tree and disables those clocks that
were enabled by the firmware but have not been enabled by any device
driver.
If CPUFREQ is enabled, early during the system boot, it might attempt
to change the CPU frequency ("set_rate"). If the HFPLL is selected as
a provider, it will then change the rate for this clock.
As boot continues, clk_disable_unused_subtree will run. Since it wont
find a valid counter (enable_count) for a clock that is actually
enabled it will attempt to disable it which will cause the CPU to
stop. Notice that in this driver, calls to check whether the clock is
enabled are routed via the is_enabled callback which queries the
hardware.
The following commit, rather than marking the clock critical and
forcing the clock to be always enabled, addresses the above scenario
making sure the clock is not disabled but it continues to rely on the
firmware to enable the clock.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/clk/qcom/hfpll.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index 0ffed0d41c50..d5fd27938e7b 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -58,6 +58,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
.parent_names = (const char *[]){ "xo" },
.num_parents = 1,
.ops = &clk_ops_hfpll,
+ /*
+ * rather than marking the clock critical and forcing the clock
+ * to be always enabled, we make sure that the clock is not
+ * disabled: the firmware remains responsible of enabling this
+ * clock (for more info check the commit log)
+ */
+ .flags = CLK_IGNORE_UNUSED,
};
h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
--
2.22.0
^ permalink raw reply related
* [PATCH v4 07/13] clk: qcom: hfpll: register as clock provider
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Make the output of the high frequency pll a clock provider.
On the QCS404 this PLL controls cpu frequency scaling.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/qcom/hfpll.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index 87b7f46d27e0..0ffed0d41c50 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -53,6 +53,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
struct regmap *regmap;
struct clk_hfpll *h;
struct clk *pclk;
+ int ret;
struct clk_init_data init = {
.parent_names = (const char *[]){ "xo" },
.num_parents = 1,
@@ -87,7 +88,14 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
h->clkr.hw.init = &init;
spin_lock_init(&h->lock);
- return devm_clk_register_regmap(&pdev->dev, &h->clkr);
+ ret = devm_clk_register_regmap(dev, &h->clkr);
+ if (ret) {
+ dev_err(dev, "failed to register regmap clock: %d\n", ret);
+ return ret;
+ }
+
+ return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
+ &h->clkr.hw);
}
static struct platform_driver qcom_hfpll_driver = {
--
2.22.0
^ permalink raw reply related
* [PATCH v4 06/13] clk: qcom: hfpll: get parent clock names from DT
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Allow accessing the parent clock name required for the driver
operation using the device tree node.
This permits extending the driver to other platforms without having to
modify its source code.
For backwards compatibility leave the previous value as default.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/clk/qcom/hfpll.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index a6de7101430c..87b7f46d27e0 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -52,6 +52,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
void __iomem *base;
struct regmap *regmap;
struct clk_hfpll *h;
+ struct clk *pclk;
struct clk_init_data init = {
.parent_names = (const char *[]){ "xo" },
.num_parents = 1,
@@ -75,6 +76,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
0, &init.name))
return -ENODEV;
+ /* get parent clock from device tree (optional) */
+ pclk = devm_clk_get(dev, "xo");
+ if (!IS_ERR(pclk))
+ init.parent_names = (const char *[]){ __clk_get_name(pclk) };
+ else if (PTR_ERR(pclk) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+
h->d = &hdata;
h->clkr.hw.init = &init;
spin_lock_init(&h->lock);
--
2.22.0
^ permalink raw reply related
* [PATCH v4 05/13] clk: qcom: apcs-msm8916: get parent clock names from DT
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Allow accessing the parent clock names required for the driver
operation by using the device tree node.
This permits extending the driver to other platforms without having to
modify its source code.
For backwards compatibility leave previous values as default.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/clk/qcom/apcs-msm8916.c | 23 ++++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/apcs-msm8916.c b/drivers/clk/qcom/apcs-msm8916.c
index a6c89a310b18..dd82eb1e5202 100644
--- a/drivers/clk/qcom/apcs-msm8916.c
+++ b/drivers/clk/qcom/apcs-msm8916.c
@@ -19,7 +19,7 @@
static const u32 gpll0_a53cc_map[] = { 4, 5 };
-static const char * const gpll0_a53cc[] = {
+static const char *gpll0_a53cc[] = {
"gpll0_vote",
"a53pll",
};
@@ -50,6 +50,8 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
struct regmap *regmap;
struct clk_init_data init = { };
int ret = -ENODEV;
+ const char *parents[2];
+ int pll_index = 0;
regmap = dev_get_regmap(parent, NULL);
if (!regmap) {
@@ -61,6 +63,16 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
if (!a53cc)
return -ENOMEM;
+ /* legacy bindings only defined the pll parent clock (index = 0) with no
+ * name; when both of the parents are specified in the bindings, the
+ * pll is the second one (index = 1).
+ */
+ if (of_clk_parent_fill(parent->of_node, parents, 2) == 2) {
+ gpll0_a53cc[0] = parents[0];
+ gpll0_a53cc[1] = parents[1];
+ pll_index = 1;
+ }
+
init.name = "a53mux";
init.parent_names = gpll0_a53cc;
init.num_parents = ARRAY_SIZE(gpll0_a53cc);
@@ -76,10 +88,11 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
a53cc->src_shift = 8;
a53cc->parent_map = gpll0_a53cc_map;
- a53cc->pclk = devm_clk_get(parent, NULL);
+ a53cc->pclk = of_clk_get(parent->of_node, pll_index);
if (IS_ERR(a53cc->pclk)) {
ret = PTR_ERR(a53cc->pclk);
- dev_err(dev, "failed to get clk: %d\n", ret);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "failed to get clk: %d\n", ret);
return ret;
}
@@ -87,6 +100,7 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb);
if (ret) {
dev_err(dev, "failed to register clock notifier: %d\n", ret);
+ clk_put(a53cc->pclk);
return ret;
}
@@ -109,6 +123,8 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
err:
clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
+ clk_put(a53cc->pclk);
+
return ret;
}
@@ -117,6 +133,7 @@ static int qcom_apcs_msm8916_clk_remove(struct platform_device *pdev)
struct clk_regmap_mux_div *a53cc = platform_get_drvdata(pdev);
clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
+ clk_put(a53cc->pclk);
return 0;
}
--
2.22.0
^ permalink raw reply related
* [PATCH v4 04/13] dt-bindings: mailbox: qcom: Add clock-name optional property
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: devicetree, linux-arm-msm, khasim.mohammed, linux-kernel,
amit.kucheria, linux-clk, vkoul, niklas.cassel, georgi.djakov,
linux-arm-kernel
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
When the APCS clock is registered (platform dependent), it retrieves
its parent names from hardcoded values in the driver.
The following commit allows the DT node to provide such clock names to
the platform data based clock driver therefore avoiding having to
explicitly embed those names in the clock driver source code.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
.../mailbox/qcom,apcs-kpss-global.txt | 24 ++++++++++++++++---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
index 1232fc9fc709..b69310322b09 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
@@ -18,10 +18,11 @@ platforms.
Usage: required
Value type: <prop-encoded-array>
Definition: must specify the base address and size of the global block
+
- clocks:
- Usage: required if #clocks-cells property is present
- Value type: <phandle>
- Definition: phandle to the input PLL, which feeds the APCS mux/divider
+ Usage: required if #clock-names property is present
+ Value type: <phandle array>
+ Definition: phandles to the two parent clocks of the clock driver.
- #mbox-cells:
Usage: required
@@ -33,6 +34,12 @@ platforms.
Value type: <u32>
Definition: as described in clock.txt, must be 0
+- clock-names:
+ Usage: required if the platform data based clock driver needs to
+ retrieve the parent clock names from device tree.
+ This will requires two mandatory clocks to be defined.
+ Value type: <string-array>
+ Definition: must be "aux" and "pll"
= EXAMPLE
The following example describes the APCS HMSS found in MSM8996 and part of the
@@ -65,3 +72,14 @@ Below is another example of the APCS binding on MSM8916 platforms:
clocks = <&a53pll>;
#clock-cells = <0>;
};
+
+Below is another example of the APCS binding on QCS404 platforms:
+
+ apcs_glb: mailbox@b011000 {
+ compatible = "qcom,qcs404-apcs-apps-global", "syscon";
+ reg = <0x0b011000 0x1000>;
+ #mbox-cells = <1>;
+ clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>;
+ clock-names = "aux", "pll";
+ #clock-cells = <0>;
+ };
--
2.22.0
^ permalink raw reply related
* [PATCH v4 03/13] mbox: qcom: replace integer with valid macro
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Use the correct macro when registering the platform device.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
index 76e1ad433b3f..dc198802bdf7 100644
--- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
+++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
@@ -96,7 +96,8 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev)
apcs->clk = platform_device_register_data(&pdev->dev,
"qcom-apcs-msm8916-clk",
- -1, NULL, 0);
+ PLATFORM_DEVID_NONE,
+ NULL, 0);
if (IS_ERR(apcs->clk))
dev_err(&pdev->dev, "failed to register APCS clk\n");
}
--
2.22.0
^ permalink raw reply related
* [PATCH v4 02/13] mbox: qcom: add APCS child device for QCS404
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: devicetree, linux-arm-msm, khasim.mohammed, linux-kernel,
amit.kucheria, linux-clk, vkoul, niklas.cassel, georgi.djakov,
linux-arm-kernel
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
There is clock controller functionality in the APCS hardware block of
qcs404 devices similar to msm8916.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
index 705e17a5479c..76e1ad433b3f 100644
--- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
+++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
@@ -89,7 +89,11 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev)
return ret;
}
- if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global")) {
+ platform_set_drvdata(pdev, apcs);
+
+ if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global") ||
+ of_device_is_compatible(np, "qcom,qcs404-apcs-apps-global")) {
+
apcs->clk = platform_device_register_data(&pdev->dev,
"qcom-apcs-msm8916-clk",
-1, NULL, 0);
@@ -97,8 +101,6 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failed to register APCS clk\n");
}
- platform_set_drvdata(pdev, apcs);
-
return 0;
}
--
2.22.0
^ permalink raw reply related
* [PATCH v4 01/13] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org>
Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/qcom/clk-alpha-pll.c | 8 ++++++++
drivers/clk/qcom/clk-alpha-pll.h | 1 +
drivers/clk/qcom/gcc-qcs404.c | 2 +-
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 0ced4a5a9a17..ef51f302bdf0 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -730,6 +730,14 @@ static long alpha_pll_huayra_round_rate(struct clk_hw *hw, unsigned long rate,
return alpha_huayra_pll_round_rate(rate, *prate, &l, &a);
}
+const struct clk_ops clk_alpha_pll_fixed_ops = {
+ .enable = clk_alpha_pll_enable,
+ .disable = clk_alpha_pll_disable,
+ .is_enabled = clk_alpha_pll_is_enabled,
+ .recalc_rate = clk_alpha_pll_recalc_rate,
+};
+EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);
+
const struct clk_ops clk_alpha_pll_ops = {
.enable = clk_alpha_pll_enable,
.disable = clk_alpha_pll_disable,
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 66755f0f84fc..6b4eb74706b4 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -104,6 +104,7 @@ struct alpha_pll_config {
};
extern const struct clk_ops clk_alpha_pll_ops;
+extern const struct clk_ops clk_alpha_pll_fixed_ops;
extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
extern const struct clk_ops clk_alpha_pll_postdiv_ops;
extern const struct clk_ops clk_alpha_pll_huayra_ops;
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index 29cf464dd2c8..18c6563889f3 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -330,7 +330,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = {
.parent_names = (const char *[]){ "cxo" },
.num_parents = 1,
.flags = CLK_IS_CRITICAL,
- .ops = &clk_alpha_pll_ops,
+ .ops = &clk_alpha_pll_fixed_ops,
},
},
};
--
2.22.0
^ permalink raw reply related
* [PATCH v4 00/13] Support CPU frequency scaling on QCS404
From: Jorge Ramirez-Ortiz @ 2019-07-31 20:29 UTC (permalink / raw)
To: jorge.ramirez-ortiz, bjorn.andersson, sboyd, david.brown,
jassisinghbrar, mark.rutland, mturquette, robh+dt, will.deacon,
arnd, horms+renesas, heiko, sibis, enric.balletbo, jagan, olof
Cc: vkoul, niklas.cassel, georgi.djakov, amit.kucheria, devicetree,
linux-kernel, linux-arm-kernel, linux-clk, linux-arm-msm,
khasim.mohammed
The following patchset enables CPU frequency scaling support on the
QCS404 (with dynamic voltage scaling).
It is important to notice that this functionality will be superseded
by Core Power Reduction (CPR), a more accurate form of AVS found on
certain Qualcomm SoCs.
Some of the changes required to support CPR do conflict with the
configuration required for CPUFreq.
In particular, the following commit for CPR - already merged - will
need to be reverted in order to enable CPUFreq.
Author: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date: Thu Jul 25 12:41:36 2019 +0200
cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist
Patch 8 "clk: qcom: hfpll: CLK_IGNORE_UNUSED" is a bit controversial;
in this platform, this PLL provides the clock signal to a CPU
core. But in others it might not.
We opted for the minimal ammount of changes without affecting the
default functionality: simply bypassing the COMMON_CLK_DISABLE_UNUSED
framework and letting the firwmare chose whether to enable or disable
the clock at boot. However maybe a DT property and marking the clock
as critical would be more appropriate for this PLL. we'd appreciate the
maintainer's input on this topic.
v2:
- dts: ms8916: apcs mux/divider: new bindings
(the driver can still support the old bindings)
- qcs404.dtsi
fix apcs-hfpll definition
fix cpu_opp_table definition
- GPLL0_AO_OUT operating frequency
define new alpha_pll_fixed_ops to limit the operating frequency
v3:
- qcom-apcs-ipc-mailbox
replace goto to ease readability
- apcs-msm8916.c
rework patch to use of_clk_parent_fill
- hfpll.c
add relevant comments to the code
- qcs404.dtsi
add voltage scaling support
v4:
- squash OPP definition and DVFS enablement in dts
(patches 10 and 13 in previous version)
- qcom-apcs-ipc-mailbox
replace return condition for readability
- answer one question on CLK_IGNORE_UNUSED in mailing list
Jorge Ramirez-Ortiz, Niklas Cassel (13):
clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
mbox: qcom: add APCS child device for QCS404
mbox: qcom: replace integer with valid macro
dt-bindings: mailbox: qcom: Add clock-name optional property
clk: qcom: apcs-msm8916: get parent clock names from DT
clk: qcom: hfpll: get parent clock names from DT
clk: qcom: hfpll: register as clock provider
clk: qcom: hfpll: CLK_IGNORE_UNUSED
arm64: dts: qcom: msm8916: Add the clocks for the APCS mux/divider
arm64: dts: qcom: qcs404: Add HFPLL node
arm64: dts: qcom: qcs404: Add the clocks for APCS mux/divider
arm64: dts: qcom: qcs404: Add DVFS support
arm64: defconfig: Enable HFPLL
.../mailbox/qcom,apcs-kpss-global.txt | 24 +++++++++--
arch/arm64/boot/dts/qcom/msm8916.dtsi | 3 +-
arch/arm64/boot/dts/qcom/qcs404.dtsi | 43 +++++++++++++++++++
arch/arm64/configs/defconfig | 1 +
drivers/clk/qcom/apcs-msm8916.c | 23 ++++++++--
drivers/clk/qcom/clk-alpha-pll.c | 8 ++++
drivers/clk/qcom/clk-alpha-pll.h | 1 +
drivers/clk/qcom/gcc-qcs404.c | 2 +-
drivers/clk/qcom/hfpll.c | 25 ++++++++++-
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 11 +++--
10 files changed, 128 insertions(+), 13 deletions(-)
--
2.22.0
^ permalink raw reply
* Re: [PATCH 0/6] ReST conversion patches not applied yet
From: Mauro Carvalho Chehab @ 2019-07-31 20:26 UTC (permalink / raw)
To: Mark Brown
Cc: Mark Rutland, Dave Kleikamp, alsa-devel, Linux Doc Mailing List,
Maxime Ripard, jfs-discussion, linux-kernel,
Peter Meerwald-Stadler, Evgeniy Polyakov, linux-cifs,
Lars-Peter Clausen, Jonathan Corbet, Alexander Shishkin,
Chen-Yu Tsai, devicetree, Evgeniy Dushistov, Suzuki K Poulose,
Mauro Carvalho Chehab, Rob Herring, linux-arm-kernel,
Mathieu Poirier, samba-technical, Liam Girdwood
In-Reply-To: <20190731202007.GI4369@sirena.org.uk>
Em Wed, 31 Jul 2019 21:20:07 +0100
Mark Brown <broonie@kernel.org> escreveu:
> On Wed, Jul 31, 2019 at 02:17:34PM -0600, Jonathan Corbet wrote:
> > Mauro Carvalho Chehab <mchehab+samsung@kernel.org> wrote:
>
> > > As promised, this is the rebased version of the patches that were not applied
> > > from the /26 patch series because you had merge conflicts.
> > >
> > > They're all based on your docs-next branch, so should apply fine.
> > >
> > > The first one fixes all but one error with a broken reference.
> > >
> > > The only broken reference right now is due to a DT patch with was not
> > > accepted (no idea why), but whose driver is upstream.
>
> > All but 5/6 applied, thanks.
>
> Oh, I still hadn't reviewed this version of the SPI stuff :(
It is basically the one sent on that /26 patch series, just rebased
on the top of docs-next.
> There were outstanding questions about where it was going to get moved
> to but if I read the diff correctly it looks like it didn't actually get
> moved in the end?
Yeah, it doesn't have the move. My understanding from our discussions
is that we didn't reach a conclusion.
In any case, I can send a separate patch with the move part once
we reach an agreement about what's the best way to proceed (or you
can do it directly, if you prefer so).
Thanks,
Mauro
^ permalink raw reply
* Re: [PATCH 1/6] docs: fix a couple of new broken references
From: Rob Herring @ 2019-07-31 20:21 UTC (permalink / raw)
To: Mauro Carvalho Chehab
Cc: Linux Doc Mailing List, Mauro Carvalho Chehab,
linux-kernel@vger.kernel.org, Jonathan Corbet, Liam Girdwood,
Mark Brown, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
Mathieu Poirier, Suzuki K Poulose, Alexander Shishkin,
Dave Kleikamp, Evgeniy Dushistov, Linux-ALSA, devicetree,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
In-Reply-To: <5b4fae5978d309641fa8ba233a9efe2b48201cd6.1564603513.git.mchehab+samsung@kernel.org>
On Wed, Jul 31, 2019 at 2:08 PM Mauro Carvalho Chehab
<mchehab+samsung@kernel.org> wrote:
>
> Those are due to recent changes. Most of the issues
> can be automatically fixed with:
>
> $ ./scripts/documentation-file-ref-check --fix
>
> The only exception was the sound binding with required
> manual work.
>
> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
> ---
> Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt | 2 +-
Acked-by: Rob Herring <robh@kernel.org>
> MAINTAINERS | 4 ++--
> drivers/hwtracing/coresight/Kconfig | 2 +-
> fs/jfs/Kconfig | 2 +-
> fs/ufs/Kconfig | 2 +-
> 5 files changed, 6 insertions(+), 6 deletions(-)
^ permalink raw reply
* Re: [PATCH 0/6] ReST conversion patches not applied yet
From: Mark Brown @ 2019-07-31 20:20 UTC (permalink / raw)
To: Jonathan Corbet
Cc: Mark Rutland, Dave Kleikamp, alsa-devel, Linux Doc Mailing List,
Maxime Ripard, jfs-discussion, linux-kernel,
Peter Meerwald-Stadler, Mauro Carvalho Chehab, Evgeniy Polyakov,
linux-cifs, Lars-Peter Clausen, Alexander Shishkin, Chen-Yu Tsai,
devicetree, Evgeniy Dushistov, Suzuki K Poulose,
Mauro Carvalho Chehab, Rob Herring, linux-arm-kernel,
Mathieu Poirier, samba-technical, Liam Girdwood <lgirdwoo>
In-Reply-To: <20190731141734.1fa9ce64@lwn.net>
[-- Attachment #1.1: Type: text/plain, Size: 832 bytes --]
On Wed, Jul 31, 2019 at 02:17:34PM -0600, Jonathan Corbet wrote:
> Mauro Carvalho Chehab <mchehab+samsung@kernel.org> wrote:
> > As promised, this is the rebased version of the patches that were not applied
> > from the /26 patch series because you had merge conflicts.
> >
> > They're all based on your docs-next branch, so should apply fine.
> >
> > The first one fixes all but one error with a broken reference.
> >
> > The only broken reference right now is due to a DT patch with was not
> > accepted (no idea why), but whose driver is upstream.
> All but 5/6 applied, thanks.
Oh, I still hadn't reviewed this version of the SPI stuff :(
There were outstanding questions about where it was going to get moved
to but if I read the diff correctly it looks like it didn't actually get
moved in the end?
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: [PATCH 0/6] ReST conversion patches not applied yet
From: Jonathan Corbet @ 2019-07-31 20:17 UTC (permalink / raw)
To: Mauro Carvalho Chehab
Cc: Linux Doc Mailing List, Mauro Carvalho Chehab, linux-kernel,
alsa-devel, Maxime Ripard, samba-technical, Mark Brown,
devicetree, Liam Girdwood, linux-iio, Lars-Peter Clausen,
Evgeniy Dushistov, Jonathan Cameron, Peter Meerwald-Stadler,
Steve French, Alexander Shishkin, Chen-Yu Tsai, Suzuki K Poulose,
linux-cifs, Dave Kleikamp, Mark Rutland
In-Reply-To: <cover.1564603513.git.mchehab+samsung@kernel.org>
On Wed, 31 Jul 2019 17:08:47 -0300
Mauro Carvalho Chehab <mchehab+samsung@kernel.org> wrote:
> As promised, this is the rebased version of the patches that were not applied
> from the /26 patch series because you had merge conflicts.
>
> They're all based on your docs-next branch, so should apply fine.
>
> The first one fixes all but one error with a broken reference.
>
> The only broken reference right now is due to a DT patch with was not
> accepted (no idea why), but whose driver is upstream.
All but 5/6 applied, thanks.
jon
^ permalink raw reply
* [PATCH 2/6] docs: writing-schema.md: convert from markdown to ReST
From: Mauro Carvalho Chehab @ 2019-07-31 20:08 UTC (permalink / raw)
To: Linux Doc Mailing List
Cc: Mauro Carvalho Chehab, Mauro Carvalho Chehab, linux-kernel,
Jonathan Corbet, Rob Herring, Mark Rutland, devicetree,
Rob Herring
In-Reply-To: <cover.1564603513.git.mchehab+samsung@kernel.org>
The documentation standard is ReST and not markdown.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/writing-schema.md | 130 -----------------
Documentation/devicetree/writing-schema.rst | 153 ++++++++++++++++++++
2 files changed, 153 insertions(+), 130 deletions(-)
delete mode 100644 Documentation/devicetree/writing-schema.md
create mode 100644 Documentation/devicetree/writing-schema.rst
diff --git a/Documentation/devicetree/writing-schema.md b/Documentation/devicetree/writing-schema.md
deleted file mode 100644
index dc032db36262..000000000000
--- a/Documentation/devicetree/writing-schema.md
+++ /dev/null
@@ -1,130 +0,0 @@
-# Writing DeviceTree Bindings in json-schema
-
-Devicetree bindings are written using json-schema vocabulary. Schema files are
-written in a JSON compatible subset of YAML. YAML is used instead of JSON as it
-considered more human readable and has some advantages such as allowing
-comments (Prefixed with '#').
-
-## Schema Contents
-
-Each schema doc is a structured json-schema which is defined by a set of
-top-level properties. Generally, there is one binding defined per file. The
-top-level json-schema properties used are:
-
-- __$id__ - A json-schema unique identifier string. The string must be a valid
-URI typically containing the binding's filename and path. For DT schema, it must
-begin with "http://devicetree.org/schemas/". The URL is used in constructing
-references to other files specified in schema "$ref" properties. A $ref values
-with a leading '/' will have the hostname prepended. A $ref value a relative
-path or filename only will be prepended with the hostname and path components
-of the current schema file's '$id' value. A URL is used even for local files,
-but there may not actually be files present at those locations.
-
-- __$schema__ - Indicates the meta-schema the schema file adheres to.
-
-- __title__ - A one line description on the contents of the binding schema.
-
-- __maintainers__ - A DT specific property. Contains a list of email address(es)
-for maintainers of this binding.
-
-- __description__ - Optional. A multi-line text block containing any detailed
-information about this binding. It should contain things such as what the block
-or device does, standards the device conforms to, and links to datasheets for
-more information.
-
-- __select__ - Optional. A json-schema used to match nodes for applying the
-schema. By default without 'select', nodes are matched against their possible
-compatible string values or node name. Most bindings should not need select.
-
-- __allOf__ - Optional. A list of other schemas to include. This is used to
-include other schemas the binding conforms to. This may be schemas for a
-particular class of devices such as I2C or SPI controllers.
-
-- __properties__ - A set of sub-schema defining all the DT properties for the
-binding. The exact schema syntax depends on whether properties are known,
-common properties (e.g. 'interrupts') or are binding/vendor specific properties.
-
- A property can also define a child DT node with child properties defined
-under it.
-
- For more details on properties sections, see 'Property Schema' section.
-
-- __patternProperties__ - Optional. Similar to 'properties', but names are regex.
-
-- __required__ - A list of DT properties from the 'properties' section that
-must always be present.
-
-- __examples__ - Optional. A list of one or more DTS hunks implementing the
-binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead.
-
-Unless noted otherwise, all properties are required.
-
-## Property Schema
-
-The 'properties' section of the schema contains all the DT properties for a
-binding. Each property contains a set of constraints using json-schema
-vocabulary for that property. The properties schemas are what is used for
-validation of DT files.
-
-For common properties, only additional constraints not covered by the common
-binding schema need to be defined such as how many values are valid or what
-possible values are valid.
-
-Vendor specific properties will typically need more detailed schema. With the
-exception of boolean properties, they should have a reference to a type in
-schemas/types.yaml. A "description" property is always required.
-
-The Devicetree schemas don't exactly match the YAML encoded DT data produced by
-dtc. They are simplified to make them more compact and avoid a bunch of
-boilerplate. The tools process the schema files to produce the final schema for
-validation. There are currently 2 transformations the tools perform.
-
-The default for arrays in json-schema is they are variable sized and allow more
-entries than explicitly defined. This can be restricted by defining 'minItems',
-'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed
-size is desired in most cases, so these properties are added based on the
-number of entries in an 'items' list.
-
-The YAML Devicetree format also makes all string values an array and scalar
-values a matrix (in order to define groupings) even when only a single value
-is present. Single entries in schemas are fixed up to match this encoding.
-
-## Testing
-
-### Dependencies
-
-The DT schema project must be installed in order to validate the DT schema
-binding documents and validate DTS files using the DT schema. The DT schema
-project can be installed with pip:
-
-`pip3 install git+https://github.com/devicetree-org/dt-schema.git@master`
-
-dtc must also be built with YAML output support enabled. This requires that
-libyaml and its headers be installed on the host system.
-
-### Running checks
-
-The DT schema binding documents must be validated using the meta-schema (the
-schema for the schema) to ensure they are both valid json-schema and valid
-binding schema. All of the DT binding documents can be validated using the
-`dt_binding_check` target:
-
-`make dt_binding_check`
-
-In order to perform validation of DT source files, use the `dtbs_check` target:
-
-`make dtbs_check`
-
-This will first run the `dt_binding_check` which generates the processed schema.
-
-It is also possible to run checks with a single schema file by setting the
-'DT_SCHEMA_FILES' variable to a specific schema file.
-
-`make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml`
-
-
-## json-schema Resources
-
-[JSON-Schema Specifications](http://json-schema.org/)
-
-[Using JSON Schema Book](http://usingjsonschema.com/)
diff --git a/Documentation/devicetree/writing-schema.rst b/Documentation/devicetree/writing-schema.rst
new file mode 100644
index 000000000000..8f71d1e2ac52
--- /dev/null
+++ b/Documentation/devicetree/writing-schema.rst
@@ -0,0 +1,153 @@
+:orphan:
+
+Writing DeviceTree Bindings in json-schema
+==========================================
+
+Devicetree bindings are written using json-schema vocabulary. Schema files are
+written in a JSON compatible subset of YAML. YAML is used instead of JSON as it
+considered more human readable and has some advantages such as allowing
+comments (Prefixed with '#').
+
+Schema Contents
+---------------
+
+Each schema doc is a structured json-schema which is defined by a set of
+top-level properties. Generally, there is one binding defined per file. The
+top-level json-schema properties used are:
+
+$id
+ A json-schema unique identifier string. The string must be a valid
+ URI typically containing the binding's filename and path. For DT schema, it must
+ begin with "http://devicetree.org/schemas/". The URL is used in constructing
+ references to other files specified in schema "$ref" properties. A $ref values
+ with a leading '/' will have the hostname prepended. A $ref value a relative
+ path or filename only will be prepended with the hostname and path components
+ of the current schema file's '$id' value. A URL is used even for local files,
+ but there may not actually be files present at those locations.
+
+$schema
+ Indicates the meta-schema the schema file adheres to.
+
+title
+ A one line description on the contents of the binding schema.
+
+maintainers
+ A DT specific property. Contains a list of email address(es)
+ for maintainers of this binding.
+
+description
+ Optional. A multi-line text block containing any detailed
+ information about this binding. It should contain things such as what the block
+ or device does, standards the device conforms to, and links to datasheets for
+ more information.
+
+select
+ Optional. A json-schema used to match nodes for applying the
+ schema. By default without 'select', nodes are matched against their possible
+ compatible string values or node name. Most bindings should not need select.
+
+ allOf
+ Optional. A list of other schemas to include. This is used to
+ include other schemas the binding conforms to. This may be schemas for a
+ particular class of devices such as I2C or SPI controllers.
+
+ properties
+ A set of sub-schema defining all the DT properties for the
+ binding. The exact schema syntax depends on whether properties are known,
+ common properties (e.g. 'interrupts') or are binding/vendor specific properties.
+
+A property can also define a child DT node with child properties defined
+under it.
+
+For more details on properties sections, see 'Property Schema' section.
+
+patternProperties
+ Optional. Similar to 'properties', but names are regex.
+
+required
+ A list of DT properties from the 'properties' section that
+ must always be present.
+
+examples
+ Optional. A list of one or more DTS hunks implementing the
+ binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead.
+
+Unless noted otherwise, all properties are required.
+
+Property Schema
+---------------
+
+The 'properties' section of the schema contains all the DT properties for a
+binding. Each property contains a set of constraints using json-schema
+vocabulary for that property. The properties schemas are what is used for
+validation of DT files.
+
+For common properties, only additional constraints not covered by the common
+binding schema need to be defined such as how many values are valid or what
+possible values are valid.
+
+Vendor specific properties will typically need more detailed schema. With the
+exception of boolean properties, they should have a reference to a type in
+schemas/types.yaml. A "description" property is always required.
+
+The Devicetree schemas don't exactly match the YAML encoded DT data produced by
+dtc. They are simplified to make them more compact and avoid a bunch of
+boilerplate. The tools process the schema files to produce the final schema for
+validation. There are currently 2 transformations the tools perform.
+
+The default for arrays in json-schema is they are variable sized and allow more
+entries than explicitly defined. This can be restricted by defining 'minItems',
+'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed
+size is desired in most cases, so these properties are added based on the
+number of entries in an 'items' list.
+
+The YAML Devicetree format also makes all string values an array and scalar
+values a matrix (in order to define groupings) even when only a single value
+is present. Single entries in schemas are fixed up to match this encoding.
+
+Testing
+-------
+
+Dependencies
+~~~~~~~~~~~~
+
+The DT schema project must be installed in order to validate the DT schema
+binding documents and validate DTS files using the DT schema. The DT schema
+project can be installed with pip::
+
+ pip3 install git+https://github.com/devicetree-org/dt-schema.git@master
+
+dtc must also be built with YAML output support enabled. This requires that
+libyaml and its headers be installed on the host system.
+
+Running checks
+~~~~~~~~~~~~~~
+
+The DT schema binding documents must be validated using the meta-schema (the
+schema for the schema) to ensure they are both valid json-schema and valid
+binding schema. All of the DT binding documents can be validated using the
+``dt_binding_check`` target::
+
+ make dt_binding_check
+
+In order to perform validation of DT source files, use the `dtbs_check` target::
+
+ make dtbs_check
+
+This will first run the `dt_binding_check` which generates the processed schema.
+
+It is also possible to run checks with a single schema file by setting the
+``DT_SCHEMA_FILES`` variable to a specific schema file.
+
+::
+
+ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml
+
+
+json-schema Resources
+---------------------
+
+
+`JSON-Schema Specifications <http://json-schema.org/>`_
+
+`Using JSON Schema Book <http://usingjsonschema.com/>`_
--
2.21.0
^ permalink raw reply related
* [PATCH 1/6] docs: fix a couple of new broken references
From: Mauro Carvalho Chehab @ 2019-07-31 20:08 UTC (permalink / raw)
To: Linux Doc Mailing List
Cc: Mark Rutland, Dave Kleikamp, alsa-devel, Evgeniy Dushistov,
Mathieu Poirier, Jonathan Corbet, Maxime Ripard, Suzuki K Poulose,
Liam Girdwood, Rob Herring, linux-kernel, Alexander Shishkin,
Chen-Yu Tsai, Mark Brown, linux-arm-kernel, jfs-discussion,
Mauro Carvalho Chehab, Mauro Carvalho Chehab, devicetree
In-Reply-To: <cover.1564603513.git.mchehab+samsung@kernel.org>
Those are due to recent changes. Most of the issues
can be automatically fixed with:
$ ./scripts/documentation-file-ref-check --fix
The only exception was the sound binding with required
manual work.
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
---
Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt | 2 +-
MAINTAINERS | 4 ++--
drivers/hwtracing/coresight/Kconfig | 2 +-
fs/jfs/Kconfig | 2 +-
fs/ufs/Kconfig | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt b/Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt
index 2ca3d138528e..7ecf6bd60d27 100644
--- a/Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt
+++ b/Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt
@@ -4,7 +4,7 @@ Allwinner SUN8I audio codec
On Sun8i-A33 SoCs, the audio is separated in different parts:
- A DAI driver. It uses the "sun4i-i2s" driver which is
documented here:
- Documentation/devicetree/bindings/sound/sun4i-i2s.txt
+ Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml
- An analog part of the codec which is handled as PRCM registers.
See Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt
- An digital part of the codec which is documented in this current
diff --git a/MAINTAINERS b/MAINTAINERS
index 6de82f019a52..f109a8bcffda 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8659,7 +8659,7 @@ L: jfs-discussion@lists.sourceforge.net
W: http://jfs.sourceforge.net/
T: git git://github.com/kleikamp/linux-shaggy.git
S: Maintained
-F: Documentation/filesystems/jfs.txt
+F: Documentation/admin-guide/jfs.rst
F: fs/jfs/
JME NETWORK DRIVER
@@ -16439,7 +16439,7 @@ F: drivers/hid/hid-udraw-ps3.c
UFS FILESYSTEM
M: Evgeniy Dushistov <dushistov@mail.ru>
S: Maintained
-F: Documentation/filesystems/ufs.txt
+F: Documentation/admin-guide/ufs.rst
F: fs/ufs/
UHID USERSPACE HID IO DRIVER:
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
index 14638db4991d..7a9f5fb08330 100644
--- a/drivers/hwtracing/coresight/Kconfig
+++ b/drivers/hwtracing/coresight/Kconfig
@@ -106,7 +106,7 @@ config CORESIGHT_CPU_DEBUG
can quickly get to know program counter (PC), secure state,
exception level, etc. Before use debugging functionality, platform
needs to ensure the clock domain and power domain are enabled
- properly, please refer Documentation/trace/coresight-cpu-debug.txt
+ properly, please refer Documentation/trace/coresight-cpu-debug.rst
for detailed description and the example for usage.
endif
diff --git a/fs/jfs/Kconfig b/fs/jfs/Kconfig
index 22a273bd4648..05cb0e8e4382 100644
--- a/fs/jfs/Kconfig
+++ b/fs/jfs/Kconfig
@@ -5,7 +5,7 @@ config JFS_FS
select CRC32
help
This is a port of IBM's Journaled Filesystem . More information is
- available in the file <file:Documentation/filesystems/jfs.txt>.
+ available in the file <file:Documentation/admin-guide/jfs.rst>.
If you do not intend to use the JFS filesystem, say N.
diff --git a/fs/ufs/Kconfig b/fs/ufs/Kconfig
index fcb41516ea59..6d30adb6b890 100644
--- a/fs/ufs/Kconfig
+++ b/fs/ufs/Kconfig
@@ -9,7 +9,7 @@ config UFS_FS
this file system as well. Saying Y here will allow you to read from
these partitions; if you also want to write to them, say Y to the
experimental "UFS file system write support", below. Please read the
- file <file:Documentation/filesystems/ufs.txt> for more information.
+ file <file:Documentation/admin-guide/ufs.rst> for more information.
The recently released UFS2 variant (used in FreeBSD 5.x) is
READ-ONLY supported.
--
2.21.0
^ permalink raw reply related
* [PATCH 0/6] ReST conversion patches not applied yet
From: Mauro Carvalho Chehab @ 2019-07-31 20:08 UTC (permalink / raw)
To: Linux Doc Mailing List, Jonathan Corbet
Cc: Mauro Carvalho Chehab, Mauro Carvalho Chehab, linux-kernel,
alsa-devel, Maxime Ripard, samba-technical, Mark Brown,
devicetree, Liam Girdwood, linux-iio, Lars-Peter Clausen,
Evgeniy Dushistov, Jonathan Cameron, Peter Meerwald-Stadler,
Steve French, Alexander Shishkin, Chen-Yu Tsai, Suzuki K Poulose,
linux-cifs, Dave Kleikamp, Mark Rutland
Hi Jon,
As promised, this is the rebased version of the patches that were not applied
from the /26 patch series because you had merge conflicts.
They're all based on your docs-next branch, so should apply fine.
The first one fixes all but one error with a broken reference.
The only broken reference right now is due to a DT patch with was not
accepted (no idea why), but whose driver is upstream.
Mauro Carvalho Chehab (6):
docs: fix a couple of new broken references
docs: writing-schema.md: convert from markdown to ReST
spi: docs: convert to ReST and add it to the kABI bookset
docs: fs: cifs: convert to ReST and add to admin-guide book
docs: fs: convert porting to ReST
docs: w1: convert to ReST and add to the kAPI group of docs
Documentation/ABI/stable/sysfs-bus-w1 | 2 +-
.../ABI/stable/sysfs-driver-w1_ds28e04 | 4 +-
.../ABI/stable/sysfs-driver-w1_ds28ea00 | 2 +-
.../AUTHORS => admin-guide/cifs/authors.rst} | 64 +-
.../CHANGES => admin-guide/cifs/changes.rst} | 4 +
Documentation/admin-guide/cifs/index.rst | 21 +
.../cifs/introduction.rst} | 8 +
.../cifs/TODO => admin-guide/cifs/todo.rst} | 87 +--
.../README => admin-guide/cifs/usage.rst} | 560 +++++++++++-------
.../cifs/winucase_convert.pl | 0
Documentation/admin-guide/index.rst | 1 +
.../bindings/sound/sun8i-a33-codec.txt | 2 +-
Documentation/devicetree/writing-schema.md | 130 ----
Documentation/devicetree/writing-schema.rst | 153 +++++
Documentation/filesystems/porting.rst | 2 +-
Documentation/index.rst | 2 +
.../spi/{butterfly => butterfly.rst} | 44 +-
Documentation/spi/index.rst | 22 +
Documentation/spi/{pxa2xx => pxa2xx.rst} | 95 +--
.../spi/{spi-lm70llp => spi-lm70llp.rst} | 17 +-
.../spi/{spi-sc18is602 => spi-sc18is602.rst} | 3 +
.../spi/{spi-summary => spi-summary.rst} | 105 ++--
Documentation/spi/{spidev => spidev.rst} | 30 +-
Documentation/w1/index.rst | 21 +
.../w1/masters/{ds2482 => ds2482.rst} | 16 +-
.../w1/masters/{ds2490 => ds2490.rst} | 6 +-
Documentation/w1/masters/index.rst | 14 +
Documentation/w1/masters/mxc-w1 | 12 -
Documentation/w1/masters/mxc-w1.rst | 17 +
.../w1/masters/{omap-hdq => omap-hdq.rst} | 12 +-
.../w1/masters/{w1-gpio => w1-gpio.rst} | 21 +-
Documentation/w1/slaves/index.rst | 16 +
.../w1/slaves/{w1_ds2406 => w1_ds2406.rst} | 4 +-
.../w1/slaves/{w1_ds2413 => w1_ds2413.rst} | 9 +
Documentation/w1/slaves/w1_ds2423 | 47 --
Documentation/w1/slaves/w1_ds2423.rst | 54 ++
.../w1/slaves/{w1_ds2438 => w1_ds2438.rst} | 10 +-
.../w1/slaves/{w1_ds28e04 => w1_ds28e04.rst} | 5 +
.../w1/slaves/{w1_ds28e17 => w1_ds28e17.rst} | 16 +-
.../w1/slaves/{w1_therm => w1_therm.rst} | 11 +-
.../w1/{w1.generic => w1-generic.rst} | 88 +--
.../w1/{w1.netlink => w1-netlink.rst} | 89 +--
MAINTAINERS | 6 +-
drivers/hwtracing/coresight/Kconfig | 2 +-
drivers/iio/dummy/iio_simple_dummy.c | 2 +-
drivers/spi/Kconfig | 2 +-
drivers/spi/spi-butterfly.c | 2 +-
drivers/spi/spi-lm70llp.c | 2 +-
fs/jfs/Kconfig | 2 +-
fs/ufs/Kconfig | 2 +-
include/linux/platform_data/sc18is602.h | 2 +-
51 files changed, 1126 insertions(+), 722 deletions(-)
rename Documentation/{filesystems/cifs/AUTHORS => admin-guide/cifs/authors.rst} (60%)
rename Documentation/{filesystems/cifs/CHANGES => admin-guide/cifs/changes.rst} (91%)
create mode 100644 Documentation/admin-guide/cifs/index.rst
rename Documentation/{filesystems/cifs/cifs.txt => admin-guide/cifs/introduction.rst} (98%)
rename Documentation/{filesystems/cifs/TODO => admin-guide/cifs/todo.rst} (58%)
rename Documentation/{filesystems/cifs/README => admin-guide/cifs/usage.rst} (72%)
rename Documentation/{filesystems => admin-guide}/cifs/winucase_convert.pl (100%)
delete mode 100644 Documentation/devicetree/writing-schema.md
create mode 100644 Documentation/devicetree/writing-schema.rst
rename Documentation/spi/{butterfly => butterfly.rst} (71%)
create mode 100644 Documentation/spi/index.rst
rename Documentation/spi/{pxa2xx => pxa2xx.rst} (83%)
rename Documentation/spi/{spi-lm70llp => spi-lm70llp.rst} (88%)
rename Documentation/spi/{spi-sc18is602 => spi-sc18is602.rst} (97%)
rename Documentation/spi/{spi-summary => spi-summary.rst} (93%)
rename Documentation/spi/{spidev => spidev.rst} (90%)
create mode 100644 Documentation/w1/index.rst
rename Documentation/w1/masters/{ds2482 => ds2482.rst} (71%)
rename Documentation/w1/masters/{ds2490 => ds2490.rst} (98%)
create mode 100644 Documentation/w1/masters/index.rst
delete mode 100644 Documentation/w1/masters/mxc-w1
create mode 100644 Documentation/w1/masters/mxc-w1.rst
rename Documentation/w1/masters/{omap-hdq => omap-hdq.rst} (90%)
rename Documentation/w1/masters/{w1-gpio => w1-gpio.rst} (75%)
create mode 100644 Documentation/w1/slaves/index.rst
rename Documentation/w1/slaves/{w1_ds2406 => w1_ds2406.rst} (96%)
rename Documentation/w1/slaves/{w1_ds2413 => w1_ds2413.rst} (81%)
delete mode 100644 Documentation/w1/slaves/w1_ds2423
create mode 100644 Documentation/w1/slaves/w1_ds2423.rst
rename Documentation/w1/slaves/{w1_ds2438 => w1_ds2438.rst} (93%)
rename Documentation/w1/slaves/{w1_ds28e04 => w1_ds28e04.rst} (93%)
rename Documentation/w1/slaves/{w1_ds28e17 => w1_ds28e17.rst} (88%)
rename Documentation/w1/slaves/{w1_therm => w1_therm.rst} (95%)
rename Documentation/w1/{w1.generic => w1-generic.rst} (59%)
rename Documentation/w1/{w1.netlink => w1-netlink.rst} (77%)
--
2.21.0
^ permalink raw reply
* [v7 1/2] dt-bindings: gpio: aspeed: Add SGPIO support
From: Hongwei Zhang @ 2019-07-31 20:01 UTC (permalink / raw)
To: Andrew Jeffery, Linus Walleij, Joel Stanley, devicetree
Cc: Hongwei Zhang, Rob Herring, Bartosz Golaszewski, linux-aspeed,
linux-kernel, linux-arm-kernel, linux-gpio
In-Reply-To: <1564603297-1391-1-git-send-email-hongweiz@ami.com>
Add bindings to support SGPIO on AST2400 or AST2500.
Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
---
.../devicetree/bindings/gpio/sgpio-aspeed.txt | 55 ++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
diff --git a/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
new file mode 100644
index 0000000..8545bbc
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
@@ -0,0 +1,55 @@
+Aspeed SGPIO controller Device Tree Bindings
+-------------------------------------------
+
+This SGPIO controller is for ASPEED AST2500 SoC, it supports up to 80 full
+featured Serial GPIOs. Each of the Serial GPIO pins can be programmed to
+support the following options:
+- Support interrupt option for each input port and various interrupt
+ sensitivity option (level-high, level-low, edge-high, edge-low)
+- Support reset tolerance option for each output port
+- Directly connected to APB bus and its shift clock is from APB bus clock
+ divided by a programmable value.
+- Co-work with external signal-chained TTL components (74LV165/74LV595)
+
+
+Required properties:
+
+- compatible : Either "aspeed,ast2400-sgpio" or "aspeed,ast2500-sgpio"
+
+- #gpio-cells : Should be two
+ - First cell is the GPIO line number
+ - Second cell is used to specify optional
+ parameters (unused)
+
+- reg : Address and length of the register set for the device
+- gpio-controller : Marks the device node as a GPIO controller
+- interrupts : Interrupt specifier (see interrupt bindings for
+ details)
+
+- interrupt-controller : Mark the GPIO controller as an interrupt-controller
+
+- ngpios : number of GPIO pins to serialise.
+ (should be multiple of 8, up to 80 pins)
+
+- clocks : A phandle to the APB clock for SGPM clock division
+
+- bus-frequency : SGPM CLK frequency
+
+
+The sgpio and interrupt properties are further described in their respective bindings documentation:
+
+- Documentation/devicetree/bindings/gpio/gpio.txt
+- Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+
+ Example:
+ sgpio: sgpio@1e780200 {
+ #gpio-cells = <2>;
+ compatible = "aspeed,ast2500-sgpio";
+ gpio-controller;
+ interrupts = <40>;
+ reg = <0x1e780200 0x0100>;
+ clocks = <&syscon ASPEED_CLK_APB>;
+ interrupt-controller;
+ ngpios = <8>;
+ bus-frequency = <12000000>;
+ };
--
2.7.4
^ permalink raw reply related
* [v7 0/2] gpio: aspeed: Add SGPIO driver
From: Hongwei Zhang @ 2019-07-31 20:01 UTC (permalink / raw)
To: Andrew Jeffery, Linus Walleij, linux-gpio
Cc: Hongwei Zhang, Joel Stanley, devicetree, linux-aspeed,
Bartosz Golaszewski, Rob Herring, Mark Rutland, linux-kernel,
linux-arm-kernel
Hello,
This short series introduce dt-binding document and a driver for the
Aspeed AST2500 SGPIO controller. Please review.
[v7]: Changes between v6 and v7:
- fix missing variable 'reg' assign issue in aspeed_sgpio_set()
- v6 feedback updates
[v6]: Changes between v5 and v6:
- fix a bug in aspeed_sgpio_dir_out()
- v5 feedback updates, some comments cleanup
The related SGPM pinmux dt-binding document, dts, and pinctrl driver
updates have been accepted and merged:
_http://patchwork.ozlabs.org/patch/1110210/
Hongwei Zhang (2):
dt-bindings: gpio: aspeed: Add SGPIO support
gpio: aspeed: Add SGPIO driver
.../devicetree/bindings/gpio/sgpio-aspeed.txt | 55 +++
drivers/gpio/sgpio-aspeed.c | 530 +++++++++++++++++++++
2 files changed, 585 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/sgpio-aspeed.txt
create mode 100644 drivers/gpio/sgpio-aspeed.c
--
2.7.4
^ permalink raw reply
* Re: [PATCH] scripts/dtc: dtx_diff - make help text formatting consistent
From: Frank Rowand @ 2019-07-31 19:20 UTC (permalink / raw)
To: Geert Uytterhoeven, Rob Herring; +Cc: devicetree
In-Reply-To: <20190731123548.13787-1-geert+renesas@glider.be>
On 7/31/19 5:35 AM, Geert Uytterhoeven wrote:
> None of the help texts use capitalization, except the one for the -T
> option. Drop the capitalization for consistency.
> Split the single long line that doesn't fit in 80 characters.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> scripts/dtc/dtx_diff | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/scripts/dtc/dtx_diff b/scripts/dtc/dtx_diff
> index 00fd4738a5877948..e9ad7834a22d9459 100755
> --- a/scripts/dtc/dtx_diff
> +++ b/scripts/dtc/dtx_diff
> @@ -27,7 +27,8 @@ Usage:
> -s SRCTREE linux kernel source tree is at path SRCTREE
> (default is current directory)
> -S linux kernel source tree is at root of current git repo
> - -T Annotate output .dts with input source file and line (-T -T for more details)
> + -T annotate output .dts with input source file and line
> + (-T -T for more details)
> -u unsorted, do not sort DTx
>
>
>
Thanks Geert!
Reviewed-by: Frank Rowand <frowand.list@gmail.com>
^ permalink raw reply
* [PATCH] of/platform: Add missing const qualifier in of_link_property
From: Nathan Chancellor @ 2019-07-31 18:17 UTC (permalink / raw)
To: saravanak
Cc: collinsd, corbet, devicetree, frowand.list, gregkh, kernel-team,
linux-doc, linux-kernel, mark.rutland, rafael, robh+dt,
Nathan Chancellor, kbuild test robot
In-Reply-To: <20190729221101.228240-4-saravanak@google.com>
Clang errors:
drivers/of/platform.c:632:28: error: initializing 'struct
supplier_bindings *' with an expression of type 'const struct
supplier_bindings [4]' discards qualifiers
[-Werror,-Wincompatible-pointer-types-discards-qualifiers]
struct supplier_bindings *s = bindings;
^ ~~~~~~~~
1 error generated.
Fixes: 05f812549f53 ("of/platform: Add functional dependency link from DT bindings")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
---
Given this is still in the driver-core-testing branch, I am fine with
this being squashed in if desired.
drivers/of/platform.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index e2da90e53edb..21838226d68a 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -629,7 +629,7 @@ static bool of_link_property(struct device *dev, struct device_node *con_np,
const char *prop)
{
struct device_node *phandle;
- struct supplier_bindings *s = bindings;
+ const struct supplier_bindings *s = bindings;
unsigned int i = 0;
bool done = true, matched = false;
--
2.22.0
^ permalink raw reply related
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