* RE: [EXT] Re: [PATCH net v2 3/4] ARM: dts: imx: add ethernet stop mode property
From: Andy Duan @ 2020-05-25 15:39 UTC (permalink / raw)
To: Andrew Lunn
Cc: martin.fuzzey@flowbird.group, davem@davemloft.net,
netdev@vger.kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
devicetree@vger.kernel.org, kuba@kernel.org
In-Reply-To: <20200525135104.GB752669@lunn.ch>
From: Andrew Lunn <andrew@lunn.ch> Sent: Monday, May 25, 2020 9:51 PM
> On Mon, May 25, 2020 at 03:09:28PM +0800, fugang.duan@nxp.com wrote:
> > From: Fugang Duan <fugang.duan@nxp.com>
> >
> > - Update the imx6qdl gpr property to define gpr register
> > offset and bit in DT.
> > - Add imx6sx/imx6ul/imx7d ethernet stop mode property.
> >
> > Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
>
> Thanks for adding a user.
>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
>
> Andrew
Andrew, thanks for your review.
^ permalink raw reply
* RE: [EXT] Re: [PATCH net v2 1/4] net: ethernet: fec: move GPR register offset and bit into DT
From: Andy Duan @ 2020-05-25 15:38 UTC (permalink / raw)
To: Sascha Hauer
Cc: andrew@lunn.ch, martin.fuzzey@flowbird.group, davem@davemloft.net,
netdev@vger.kernel.org, robh+dt@kernel.org, shawnguo@kernel.org,
devicetree@vger.kernel.org, kuba@kernel.org
In-Reply-To: <20200525104849.GQ11869@pengutronix.de>
From: Sascha Hauer <s.hauer@pengutronix.de> Sent: Monday, May 25, 2020 6:49 PM
> On Mon, May 25, 2020 at 03:09:26PM +0800, fugang.duan@nxp.com wrote:
> > From: Fugang Duan <fugang.duan@nxp.com>
> >
> > The commit da722186f654 (net: fec: set GPR bit on suspend by DT
> > configuration) set the GPR reigster offset and bit in driver for wake
> > on lan feature.
> >
> > But it introduces two issues here:
> > - one SOC has two instances, they have different bit
> > - different SOCs may have different offset and bit
> >
> > So to support wake-on-lan feature on other i.MX platforms, it should
> > configure the GPR reigster offset and bit from DT.
> >
> > So the patch is to improve the commit da722186f654 (net: fec: set GPR
> > bit on suspend by DT configuration) to support multiple ethernet
> > instances on i.MX series.
> >
> > v2:
> > * switch back to store the quirks bitmask in driver_data
> >
> > Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
> > ---
> > drivers/net/ethernet/freescale/fec_main.c | 103
> > ++++++++++--------------------
> > 1 file changed, 34 insertions(+), 69 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/freescale/fec_main.c
> > b/drivers/net/ethernet/freescale/fec_main.c
> > index 2e20914..4f55d30 100644
> > --- a/drivers/net/ethernet/freescale/fec_main.c
> > +++ b/drivers/net/ethernet/freescale/fec_main.c
> > @@ -86,56 +86,6 @@ static void fec_enet_itr_coal_init(struct net_device
> *ndev);
> > #define FEC_ENET_OPD_V 0xFFF0
> > #define FEC_MDIO_PM_TIMEOUT 100 /* ms */
> >
> > -struct fec_devinfo {
> > - u32 quirks;
> > - u8 stop_gpr_reg;
> > - u8 stop_gpr_bit;
> > -};
>
> Honestly I like the approach of having a struct fec_devinfo for abstracting
> differences between different hardware variants. It gives you more freedom
> to describe the differences. Converting this back to a single bitfield is a step
> backward, even when currently struct fec_devinfo only contains a single
> value.
>
> Sascha
>
Sascha, thanks for your review.
v1 patch is doing like this by using a struct fec_devinfo for abstracting differences.
In fact, I also like v1 method.
I will send the v3 version by using v1 patch.
> --
> Pengutronix e.K. |
> |
> Steuerwalder Str. 21 |
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.p
> engutronix.de%2F&data=02%7C01%7Cfugang.duan%40nxp.com%7C2ae
> 2657af251492ced5608d80099384e%7C686ea1d3bc2b4c6fa92cd99c5c30163
> 5%7C0%7C0%7C637260005356084997&sdata=sarhmRepUf1o4hCZ8WH
> oSBrg%2Fl128jz%2BNXxHRGAM%2FL0%3D&reserved=0 |
> 31137 Hildesheim, Germany | Phone:
> +49-5121-206917-0 |
> Amtsgericht Hildesheim, HRA 2686 | Fax:
> +49-5121-206917-5555 |
^ permalink raw reply
* [PATCH 1/4] ARM: dts: r8a7742-iwg21d-q7: Enable scifb2 node
From: Lad Prabhakar @ 2020-05-25 15:22 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Lad Prabhakar
In-Reply-To: <1590420129-7531-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable scifb2 interface on iWave RZ/G1H carrier board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 1f5c35c..e154e3a 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -14,6 +14,7 @@
aliases {
serial2 = &scifa2;
+ serial4 = &scifb2;
};
chosen {
@@ -27,6 +28,11 @@
groups = "scifa2_data_c";
function = "scifa2";
};
+
+ scifb2_pins: scifb2 {
+ groups = "scifb2_data", "scifb2_ctrl";
+ function = "scifb2";
+ };
};
&scifa2 {
@@ -35,3 +41,11 @@
status = "okay";
};
+
+&scifb2 {
+ pinctrl-0 = <&scifb2_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+ status = "okay";
+};
--
2.7.4
^ permalink raw reply related
* [PATCH 2/4] ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller
From: Lad Prabhakar @ 2020-05-25 15:22 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Lad Prabhakar
In-Reply-To: <1590420129-7531-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable the SDHI2 controller on iWave RZ/G1H carrier board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 47 +++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index e154e3a..bb1deb0 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -21,6 +21,28 @@
bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait";
stdout-path = "serial2:115200n8";
};
+
+ vcc_sdhi2: regulator-vcc-sdhi2 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI2 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&gpio1 27 GPIO_ACTIVE_LOW>;
+ };
+
+ vccq_sdhi2: regulator-vccq-sdhi2 {
+ compatible = "regulator-gpio";
+
+ regulator-name = "SDHI2 VccQ";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ gpios-states = <1>;
+ states = <3300000 1>, <1800000 0>;
+ };
};
&pfc {
@@ -33,6 +55,18 @@
groups = "scifb2_data", "scifb2_ctrl";
function = "scifb2";
};
+
+ sdhi2_pins: sd2 {
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <3300>;
+ };
+
+ sdhi2_pins_uhs: sd2_uhs {
+ groups = "sdhi2_data4", "sdhi2_ctrl";
+ function = "sdhi2";
+ power-source = <1800>;
+ };
};
&scifa2 {
@@ -49,3 +83,16 @@
uart-has-rtscts;
status = "okay";
};
+
+&sdhi2 {
+ pinctrl-0 = <&sdhi2_pins>;
+ pinctrl-1 = <&sdhi2_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&vcc_sdhi2>;
+ vqmmc-supply = <&vccq_sdhi2>;
+ cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
+ wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
+ sd-uhs-sdr50;
+ status = "okay";
+};
--
2.7.4
^ permalink raw reply related
* [PATCH 3/4] ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet avb
From: Lad Prabhakar @ 2020-05-25 15:22 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Lad Prabhakar
In-Reply-To: <1590420129-7531-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable ethernet avb on iWave RZ/G1H carrier board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index bb1deb0..c57a571 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -15,6 +15,7 @@
aliases {
serial2 = &scifa2;
serial4 = &scifb2;
+ ethernet0 = &avb;
};
chosen {
@@ -45,7 +46,27 @@
};
};
+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+
+ phy-handle = <&phy3>;
+ phy-mode = "gmii";
+ renesas,no-ether-link;
+ status = "okay";
+
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ micrel,led-mode = <1>;
+ };
+};
+
&pfc {
+ avb_pins: avb {
+ groups = "avb_mdio", "avb_gmii";
+ function = "avb";
+ };
+
scifa2_pins: scifa2 {
groups = "scifa2_data_c";
function = "scifa2";
--
2.7.4
^ permalink raw reply related
* [PATCH 4/4] ARM: dts: r8a7742-iwg21d-q7: Add RWDT support
From: Lad Prabhakar @ 2020-05-25 15:22 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Lad Prabhakar
In-Reply-To: <1590420129-7531-1-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com>
Enable RWDT and use 60 seconds as default timeout.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index c57a571..f23c2ba 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -90,6 +90,11 @@
};
};
+&rwdt {
+ timeout-sec = <60>;
+ status = "okay";
+};
+
&scifa2 {
pinctrl-0 = <&scifa2_pins>;
pinctrl-names = "default";
--
2.7.4
^ permalink raw reply related
* [PATCH 0/4] iW-RainboW-G21D-Qseven Enable SCIFB2, SDHI2, AVB and RWDT
From: Lad Prabhakar @ 2020-05-25 15:22 UTC (permalink / raw)
To: Geert Uytterhoeven, Magnus Damm, Rob Herring
Cc: linux-renesas-soc, devicetree, linux-kernel, Prabhakar,
Lad Prabhakar
Hi All,
This patch series enables support for SCIFB2, SDHI2, AVB and
RWDT on iW-RainboW-G21D-Qseven develpoment board.
This patch series is dependent on [1].
[1] https://patchwork.kernel.org/project/linux-renesas-soc/
list/?series=288491&archive=both&state=*
Cheers,
Prabhakar
Lad Prabhakar (4):
ARM: dts: r8a7742-iwg21d-q7: Enable scifb2 node
ARM: dts: r8a7742-iwg21d-q7: Enable SDHI2 controller
ARM: dts: r8a7742-iwg21d-q7: Enable Ethernet avb
ARM: dts: r8a7742-iwg21d-q7: Add RWDT support
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 87 +++++++++++++++++++++++++++++++++
1 file changed, 87 insertions(+)
--
2.7.4
^ permalink raw reply
* [PATCH v6 5/5] iio: magnetometer: ak8975: Add gpio reset support
From: Jonathan Albrieux @ 2020-05-25 15:10 UTC (permalink / raw)
To: linux-kernel
Cc: ~postmarketos/upstreaming, Jonathan Albrieux, Andy Shevchenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Hartmut Knaack, Jonathan Cameron, Lars-Peter Clausen,
Linus Walleij, open list:IIO SUBSYSTEM AND DRIVERS,
Peter Meerwald-Stadler, Jonathan Cameron
In-Reply-To: <20200525151117.32540-1-jonathan.albrieux@gmail.com>
According to AK09911 datasheet, if reset gpio is provided then
deassert reset on ak8975_power_on() and assert reset on ak8975_power_off().
Without reset's deassertion during ak8975_power_on(), driver's probe fails
on ak8975_who_i_am() while checking for device identity for AK09911 chip.
AK09911 has an active low reset gpio to handle register's reset.
AK09911 datasheet says that, if not used, reset pin should be connected
to VID. This patch emulates this situation.
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
---
drivers/iio/magnetometer/ak8975.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/iio/magnetometer/ak8975.c b/drivers/iio/magnetometer/ak8975.c
index fd368455cd7b..a23422aad97d 100644
--- a/drivers/iio/magnetometer/ak8975.c
+++ b/drivers/iio/magnetometer/ak8975.c
@@ -358,6 +358,7 @@ struct ak8975_data {
u8 asa[3];
long raw_to_gauss[3];
struct gpio_desc *eoc_gpiod;
+ struct gpio_desc *reset_gpiod;
int eoc_irq;
wait_queue_head_t data_ready_queue;
unsigned long flags;
@@ -384,6 +385,9 @@ static int ak8975_power_on(const struct ak8975_data *data)
"Failed to enable specified Vid supply\n");
return ret;
}
+
+ gpiod_set_value_cansleep(data->reset_gpiod, 0);
+
/*
* According to the datasheet the power supply rise time is 200us
* and the minimum wait time before mode setting is 100us, in
@@ -396,6 +400,8 @@ static int ak8975_power_on(const struct ak8975_data *data)
/* Disable attached power regulator if any. */
static void ak8975_power_off(const struct ak8975_data *data)
{
+ gpiod_set_value_cansleep(data->reset_gpiod, 1);
+
regulator_disable(data->vid);
regulator_disable(data->vdd);
}
@@ -839,6 +845,7 @@ static int ak8975_probe(struct i2c_client *client,
struct ak8975_data *data;
struct iio_dev *indio_dev;
struct gpio_desc *eoc_gpiod;
+ struct gpio_desc *reset_gpiod;
const void *match;
unsigned int i;
int err;
@@ -856,6 +863,16 @@ static int ak8975_probe(struct i2c_client *client,
if (eoc_gpiod)
gpiod_set_consumer_name(eoc_gpiod, "ak_8975");
+ /*
+ * According to AK09911 datasheet, if reset GPIO is provided then
+ * deassert reset on ak8975_power_on() and assert reset on
+ * ak8975_power_off().
+ */
+ reset_gpiod = devm_gpiod_get_optional(&client->dev,
+ "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(reset_gpiod))
+ return PTR_ERR(reset_gpiod);
+
/* Register with IIO */
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
if (indio_dev == NULL)
@@ -866,6 +883,7 @@ static int ak8975_probe(struct i2c_client *client,
data->client = client;
data->eoc_gpiod = eoc_gpiod;
+ data->reset_gpiod = reset_gpiod;
data->eoc_irq = 0;
err = iio_read_mount_matrix(&client->dev, "mount-matrix", &data->orientation);
--
2.17.1
^ permalink raw reply related
* [PATCH v6 4/5] iio: magnetometer: ak8975: Fix typo, uniform measurement unit style
From: Jonathan Albrieux @ 2020-05-25 15:10 UTC (permalink / raw)
To: linux-kernel
Cc: ~postmarketos/upstreaming, Jonathan Albrieux, Andy Shevchenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Hartmut Knaack, Jonathan Cameron, Lars-Peter Clausen,
Linus Walleij, open list:IIO SUBSYSTEM AND DRIVERS,
Peter Meerwald-Stadler, Jonathan Cameron
In-Reply-To: <20200525151117.32540-1-jonathan.albrieux@gmail.com>
Minor comment style edits.
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/iio/magnetometer/ak8975.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iio/magnetometer/ak8975.c b/drivers/iio/magnetometer/ak8975.c
index 3c881541ae72..fd368455cd7b 100644
--- a/drivers/iio/magnetometer/ak8975.c
+++ b/drivers/iio/magnetometer/ak8975.c
@@ -385,9 +385,9 @@ static int ak8975_power_on(const struct ak8975_data *data)
return ret;
}
/*
- * According to the datasheet the power supply rise time i 200us
+ * According to the datasheet the power supply rise time is 200us
* and the minimum wait time before mode setting is 100us, in
- * total 300 us. Add some margin and say minimum 500us here.
+ * total 300us. Add some margin and say minimum 500us here.
*/
usleep_range(500, 1000);
return 0;
--
2.17.1
^ permalink raw reply related
* [PATCH v6 3/5] dt-bindings: iio: magnetometer: ak8975: add gpio reset support
From: Jonathan Albrieux @ 2020-05-25 15:10 UTC (permalink / raw)
To: linux-kernel
Cc: ~postmarketos/upstreaming, Jonathan Albrieux, Andy Shevchenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Hartmut Knaack, Jonathan Cameron, Lars-Peter Clausen,
Linus Walleij, open list:IIO SUBSYSTEM AND DRIVERS,
Peter Meerwald-Stadler, Jonathan Cameron, Rob Herring
In-Reply-To: <20200525151117.32540-1-jonathan.albrieux@gmail.com>
Add reset-gpio support.
Without reset's deassertion during ak8975_power_on(), driver's probe fails
on ak8975_who_i_am() while checking for device identity for AK09911 chip.
AK09911 has an active low reset gpio to handle register's reset.
AK09911 datasheet says that, if not used, reset pin should be connected
to VID. This patch emulates this situation.
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
---
.../bindings/iio/magnetometer/asahi-kasei,ak8975.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
index a603659d5fa5..04b895c7143c 100644
--- a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
+++ b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
@@ -48,6 +48,11 @@ properties:
mount-matrix:
description: an optional 3x3 mounting rotation matrix.
+ reset-gpios:
+ description: |
+ an optional pin needed for AK09911 to set the reset state. This should
+ be usually active low
+
required:
- compatible
- reg
@@ -55,6 +60,7 @@ required:
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
@@ -65,6 +71,7 @@ examples:
interrupt-parent = <&gpio6>;
interrupts = <15 IRQ_TYPE_EDGE_RISING>;
vdd-supply = <&ldo_3v3_gnss>;
+ reset-gpios = <&msmgpio 111 GPIO_ACTIVE_LOW>;
mount-matrix = "-0.984807753012208", /* x0 */
"0", /* y0 */
"-0.173648177666930", /* z0 */
--
2.17.1
^ permalink raw reply related
* [PATCH v6 2/5] dt-bindings: iio: magnetometer: ak8975: convert format to yaml, add maintainer
From: Jonathan Albrieux @ 2020-05-25 15:10 UTC (permalink / raw)
To: linux-kernel
Cc: ~postmarketos/upstreaming, Jonathan Albrieux, Andy Shevchenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Hartmut Knaack, Jonathan Cameron, Lars-Peter Clausen,
Linus Walleij, open list:IIO SUBSYSTEM AND DRIVERS,
Peter Meerwald-Stadler, Jonathan Cameron, Rob Herring
In-Reply-To: <20200525151117.32540-1-jonathan.albrieux@gmail.com>
Converts documentation from txt format to yaml.
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
---
.../bindings/iio/magnetometer/ak8975.txt | 37 ---------
.../iio/magnetometer/asahi-kasei,ak8975.yaml | 78 +++++++++++++++++++
2 files changed, 78 insertions(+), 37 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
create mode 100644 Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
diff --git a/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt b/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
deleted file mode 100644
index 0576b9df0bf2..000000000000
--- a/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
+++ /dev/null
@@ -1,37 +0,0 @@
-* AsahiKASEI AK8975 magnetometer sensor
-
-Required properties:
-
- - compatible : should be "asahi-kasei,ak8975".
- - reg : the I2C address of the magnetometer.
-
-Optional properties:
-
- - gpios : AK8975 has a "Data ready" pin (DRDY) which informs that data
- is ready to be read and is possible to listen on it. If used,
- this should be active high. Prefer interrupt over this.
-
- - interrupts : interrupt for DRDY pin. Triggered on rising edge.
-
- - vdd-supply: an optional regulator that needs to be on to provide VDD.
-
- - mount-matrix: an optional 3x3 mounting rotation matrix.
-
-Example:
-
-ak8975@c {
- compatible = "asahi-kasei,ak8975";
- reg = <0x0c>;
- interrupt-parent = <&gpio6>;
- interrupts = <15 IRQ_TYPE_EDGE_RISING>;
- vdd-supply = <&ldo_3v3_gnss>;
- mount-matrix = "-0.984807753012208", /* x0 */
- "0", /* y0 */
- "-0.173648177666930", /* z0 */
- "0", /* x1 */
- "-1", /* y1 */
- "0", /* z1 */
- "-0.173648177666930", /* x2 */
- "0", /* y2 */
- "0.984807753012208"; /* z2 */
-};
diff --git a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
new file mode 100644
index 000000000000..a603659d5fa5
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/magnetometer/asahi-kasei,ak8975.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AsahiKASEI AK8975 magnetometer sensor
+
+maintainers:
+ - Jonathan Albrieux <jonathan.albrieux@gmail.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: asahi-kasei,ak8975
+ - const: asahi-kasei,ak8963
+ - const: asahi-kasei,ak09911
+ - const: asahi-kasei,ak09912
+ - const: ak8975
+ deprecated: true
+ - const: ak8963
+ deprecated: true
+ - const: ak09911
+ deprecated: true
+ - const: ak09912
+ deprecated: true
+
+ reg:
+ maxItems: 1
+ description: the I2C address of the magnetometer.
+
+ gpios:
+ description: |
+ AK8975 has a "Data ready" pin (DRDY) which informs that data
+ is ready to be read and is possible to listen on it. If used,
+ this should be active high. Prefer interrupt over this.
+
+ interrupts:
+ maxItems: 1
+ description: interrupt for DRDY pin. Triggered on rising edge.
+
+ vdd-supply:
+ maxItems: 1
+ description: |
+ an optional regulator that needs to be on to provide VDD power to
+ the sensor.
+
+ mount-matrix:
+ description: an optional 3x3 mounting rotation matrix.
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ magnetometer@c {
+ compatible = "asahi-kasei,ak8975";
+ reg = <0x0c>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <15 IRQ_TYPE_EDGE_RISING>;
+ vdd-supply = <&ldo_3v3_gnss>;
+ mount-matrix = "-0.984807753012208", /* x0 */
+ "0", /* y0 */
+ "-0.173648177666930", /* z0 */
+ "0", /* x1 */
+ "-1", /* y1 */
+ "0", /* z1 */
+ "-0.173648177666930", /* x2 */
+ "0", /* y2 */
+ "0.984807753012208"; /* z2 */
+ };
+ };
--
2.17.1
^ permalink raw reply related
* [PATCH v6 1/5] dt-bindings: iio: magnetometer: ak8975: reword gpios, add interrupts, fix style
From: Jonathan Albrieux @ 2020-05-25 15:10 UTC (permalink / raw)
To: linux-kernel
Cc: ~postmarketos/upstreaming, Jonathan Albrieux, Andy Shevchenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Hartmut Knaack, Jonathan Cameron, Lars-Peter Clausen,
Linus Walleij, open list:IIO SUBSYSTEM AND DRIVERS,
Peter Meerwald-Stadler, Jonathan Cameron, Rob Herring
In-Reply-To: <20200525151117.32540-1-jonathan.albrieux@gmail.com>
Reword gpios documentation, add interrupt documentation and fix styles.
Update example to use interrupts instead of gpios.
Signed-off-by: Jonathan Albrieux <jonathan.albrieux@gmail.com>
---
.../bindings/iio/magnetometer/ak8975.txt | 19 +++++++++++++------
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt b/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
index aa67ceb0d4e0..0576b9df0bf2 100644
--- a/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
+++ b/Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
@@ -2,21 +2,28 @@
Required properties:
- - compatible : should be "asahi-kasei,ak8975"
- - reg : the I2C address of the magnetometer
+ - compatible : should be "asahi-kasei,ak8975".
+ - reg : the I2C address of the magnetometer.
Optional properties:
- - gpios : should be device tree identifier of the magnetometer DRDY pin
- - vdd-supply: an optional regulator that needs to be on to provide VDD
- - mount-matrix: an optional 3x3 mounting rotation matrix
+ - gpios : AK8975 has a "Data ready" pin (DRDY) which informs that data
+ is ready to be read and is possible to listen on it. If used,
+ this should be active high. Prefer interrupt over this.
+
+ - interrupts : interrupt for DRDY pin. Triggered on rising edge.
+
+ - vdd-supply: an optional regulator that needs to be on to provide VDD.
+
+ - mount-matrix: an optional 3x3 mounting rotation matrix.
Example:
ak8975@c {
compatible = "asahi-kasei,ak8975";
reg = <0x0c>;
- gpios = <&gpj0 7 0>;
+ interrupt-parent = <&gpio6>;
+ interrupts = <15 IRQ_TYPE_EDGE_RISING>;
vdd-supply = <&ldo_3v3_gnss>;
mount-matrix = "-0.984807753012208", /* x0 */
"0", /* y0 */
--
2.17.1
^ permalink raw reply related
* [PATCH v6 0/4] iio: magnetometer: ak8975: Add gpio reset support
From: Jonathan Albrieux @ 2020-05-25 15:10 UTC (permalink / raw)
To: linux-kernel
Cc: ~postmarketos/upstreaming, Jonathan Albrieux, Andy Shevchenko,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Hartmut Knaack, Jonathan Cameron, Lars-Peter Clausen,
Linus Walleij, open list:IIO SUBSYSTEM AND DRIVERS,
Peter Meerwald-Stadler
v6:
- reword documentation for gpios, add interrupt documentation
v5:
- add maintainer
https://lore.kernel.org/linux-iio/20200520163417.27805-1-jonathan.albrieux@gmail.com/
v4:
- fix some typo
- use gpio's dt-bindings for more clarity in documentation
- set compatible properties without vendor prefix as deprecated
https://lore.kernel.org/linux-iio/20200520073125.30808-1-jonathan.albrieux@gmail.com/
v3:
- fix patch messages style
- align reset gpio comment to kernel doc reccomendation
- introduce changelog
https://lore.kernel.org/linux-iio/20200519124402.26076-1-jonathan.albrieux@gmail.com/
v2:
- rewording of reset gpio comment and patch messages to better clarify
reset gpio behaviour
https://lore.kernel.org/linux-iio/20200518133645.19127-1-jonathan.albrieux@gmail.com/
v1:
- initial patch submission
https://lore.kernel.org/linux-iio/20200519065749.4624-1-jonathan.albrieux@gmail.com/
Convert documentation from txt format to yaml. Add documentation about
reset-gpio.
Deassert reset on ak8975_power_on(), assert reset on ak8975_power_off().
Without reset's deassertion during ak8975_power_on(), driver's probe fails
on ak8975_who_i_am() while checking for device identity for AK09911 chip.
AK09911 has an active low reset gpio to handle register's reset.
AK09911 datasheet says that, if not used, reset pin should be connected
to VID. This patch emulates this situation.
Jonathan Albrieux (5):
dt-bindings: iio: magnetometer: ak8975: reword gpios, add interrupts,
fix style
dt-bindings: iio: magnetometer: ak8975: convert format to yaml, add
maintainer
dt-bindings: iio: magnetometer: ak8975: add gpio reset support
iio: magnetometer: ak8975: Fix typo, uniform measurement unit style
iio: magnetometer: ak8975: Add gpio reset support
.../bindings/iio/magnetometer/ak8975.txt | 30 -------
.../iio/magnetometer/asahi-kasei,ak8975.yaml | 85 +++++++++++++++++++
drivers/iio/magnetometer/ak8975.c | 22 ++++-
3 files changed, 105 insertions(+), 32 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/iio/magnetometer/ak8975.txt
create mode 100644 Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
--
2.17.1
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: pinctrl: Add bindings for mscc,ocelot-sgpio
From: Lars Povlsen @ 2020-05-25 14:38 UTC (permalink / raw)
To: Linus Walleij
Cc: Lars Povlsen, SoC Team, Rob Herring,
Microchip Linux Driver Support,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list:GPIO SUBSYSTEM, Linux ARM, linux-kernel@vger.kernel.org,
Alexandre Belloni
In-Reply-To: <CACRpkdYesD9sRQZXQNEaBY2Ouu3bjKKGWpRtU-Lpa4AcjyPwXw@mail.gmail.com>
Linus Walleij writes:
> On Mon, May 18, 2020 at 10:50 PM Lars Povlsen
> <lars.povlsen@microchip.com> wrote:
>> Linus Walleij writes:
>>
>> > On Wed, May 13, 2020 at 4:11 PM Lars Povlsen <lars.povlsen@microchip.com> wrote:
>> >
>> >> This adds DT bindings for the Microsemi SGPIO controller, bindings
>> >> mscc,ocelot-sgpio and mscc,luton-sgpio.
>> >>
>> >> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>> >> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>> >
>> >> + microchip,sgpio-ports:
>> >> + description: This is a 32-bit bitmask, configuring whether a
>> >> + particular port in the controller is enabled or not. This allows
>> >> + unused ports to be removed from the bitstream and reduce latency.
>> >> + $ref: "/schemas/types.yaml#/definitions/uint32"
>> >
>> > I don't know about this.
>> >
>> > You are saying this pin controller can have up to 32 GPIO "ports"
>> > (also known as banks).
>> >
>> > Why can't you just represent each such port as a separate GPIO
>> > node:
>> >
>> > pinctrl@nnn {
>> > gpio@0 {
>> > ....
>> > };
>> > gpio@1 {
>> > ....
>> > };
>> > ....
>> > gpio@31 {
>> > ....
>> > };
>> > };
>> >
>> > Then if some of them are unused just set it to status = "disabled";
>> >
>> > This also makes your Linux driver simpler because each GPIO port
>> > just becomes a set of 32bit registers and you can use
>> > select GPIO_GENERIC and bgpio_init() and save a whole
>> > slew of standard stock code.
>> >
>>
>> Linus, thank you for your input.
>>
>> The controller handles an array of 32*n signals, where n >= 1 && n <=
>> 4.
>>
>> The problem with the above approach is that the ports are disabled
>> *port*-wise - so they remove all (upto) 4 bits. That would be across the
>> banks.
>>
>> You could of course have the "implied" semantics that a disabled port at
>> any bit position disabled all (bit positions for the same port).
>
> I don't understand this, you would have to elaborate...
>
> In any case microchip,sgpio-ports is probably not the right thing,
> use ngpios which is documented and just divide by 32 to get the
> number of ports I think? But that is just in case they get
> enabled strictly in sequence, otherwise you'd need a custom
> property.
>
Hi Linus,
Yes, the problem is they're not in sequence. F.ex. you could have ports
0,1 enabled, skip 2,3,4 and have 5,6,7 enabled.
In the data stream you would then have:
p0.0 p0.1 p0.2 p0.3
p1.0 p1.1 p1.2 p1.3
p5.0 p5.1 p5.2 p5.3
p6.0 p6.1 p6.2 p6.3
p7.0 p7.1 p7.2 p7.3
I will mull about this and try to come up with something better and more
understandable.
Luckily, this is not gating for integrating sparx5, so its possible
we'll just skip the SGPIO driver for now.
I'll provide an update as soon as possible.
---Lars
> Yours,
> Linus Walleij
--
Lars Povlsen,
Microchip
^ permalink raw reply
* Re: [PATCH 2/3] sdhci: sparx5: Add Sparx5 SoC eMMC driver
From: Lars Povlsen @ 2020-05-25 14:26 UTC (permalink / raw)
To: Adrian Hunter
Cc: Lars Povlsen, Ulf Hansson, SoC Team,
Microchip Linux Driver Support, linux-mmc, devicetree,
linux-arm-kernel, linux-kernel, Alexandre Belloni
In-Reply-To: <abbd2306-55ed-014c-4b06-a5cb3f34796f@intel.com>
Adrian Hunter writes:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 20/05/20 2:14 pm, Lars Povlsen wrote:
>>
>> Lars Povlsen writes:
>>
>>> Adrian Hunter writes:
>>>
>>>> On 13/05/20 4:31 pm, Lars Povlsen wrote:
>>>>> This adds the eMMC driver for the Sparx5 SoC. It is based upon the
>>>>> designware IP, but requires some extra initialization and quirks.
>>>>>
>>>>> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
>>>>> Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
>>>>> ---
>> {Snip]
>>>>> +};
>>>>> +
>>>>> +static const struct sdhci_pltfm_data sdhci_sparx5_pdata = {
>>>>> + .quirks = 0,
>>>>> + .quirks2 = SDHCI_QUIRK2_HOST_NO_CMD23 | /* Card quirk */
>>>>
>>>> If this is a card quirk then it should be in drivers/mmc/core/quirks.h not here.
>>>
>>
>> Adrian, I had a go at changing the controller quirk to a card quirk.
>>
>> Unfortunately, SDHCI_QUIRK2_HOST_NO_CMD23 does not directly translate to
>> MMC_QUIRK_BLK_NO_CMD23, as for 'do_rel_wr' in mmc_blk_rw_rq_prep(), it
>> will *still* use MMC_SET_BLOCK_COUNT (cmd23), causing the issue.
>>
>> We are using a ISSI "IS004G" device, and so I have gone through the
>> motions of adding it to quirks.h. The comment before the list of devices
>> using MMC_QUIRK_BLK_NO_CMD23 suggest working around a performance issue,
>> which is not exactly the issue I'm seeing. I'm seeing combinations of
>> CMD_TOUT_ERR, DATA_CRC_ERR and DATA_END_BIT_ERR whenever a cmd23 is
>> issued.
>>
>> I have not been able to test the controller with another eMMC device
>> yet, but I expect its not the controller at fault.
>>
>> So, I'm a little bit in doubt of how to proceed - either keep the quirk
>> as a controller quirk - or make a *new* card quirk (with
>> SDHCI_QUIRK2_HOST_NO_CMD23 semantics)?
>>
>> Anybody else have had experience with ISSI eMMC devices?
>>
>> I have also tried to use DT sdhci-caps-mask, but MMC_CAP_CMD23 is not
>> read from the controller just (unconditionally) set in sdhci.c - so that
>> doesn't fly either.
>>
>> Any suggestions?
>
> It is up to you. In the future, you may want to distinguish devices that
> have this problem from ones that do not.
>
> If you are not sure it is the ISSI eMMC, and maybe not the host controller,
> then might it be the board? Perhaps make SDHCI_QUIRK2_HOST_NO_CMD23
> conditional on the particular compatibility string?
>
> At a minimum, change the "/* Card quirk */" comment to a fuller explanation.
>
Adrian, I'm getting a board ready with another eMMC device, and we're
also trying to contact ISSI for info.
My hope is to at least verify whether this is a controller or a card
issue one way or the other. Then, I'll choose an appropriate solution
for it.
Thank you for your advice so far.
---Lars
>>
>>> Yes, its supposedly a card quirk. I'll see to use the card quirks
>>> methods in place.
>>>
>>
--
Lars Povlsen,
Microchip
^ permalink raw reply
* Re: [PATCH v5 09/13] soc: mediatek: cmdq: add write_s value function
From: Matthias Brugger @ 2020-05-25 13:59 UTC (permalink / raw)
To: Dennis-YC Hsieh
Cc: Rob Herring, Mark Rutland, Jassi Brar, Philipp Zabel,
David Airlie, Daniel Vetter, linux-kernel, linux-mediatek,
devicetree, wsd_upstream, dri-devel, Bibby Hsieh, CK Hu,
Houlong Wei, linux-arm-kernel, HS Liao
In-Reply-To: <1590403125.11988.5.camel@mtkswgap22>
On 25/05/2020 12:38, Dennis-YC Hsieh wrote:
>
> On Mon, 2020-05-25 at 10:39 +0200, Matthias Brugger wrote:
>>
>> On 25/05/2020 04:27, Dennis-YC Hsieh wrote:
>>>
>>> On Sun, 2020-05-24 at 20:13 +0200, Matthias Brugger wrote:
>>>>
>>>> On 24/05/2020 19:31, Dennis-YC Hsieh wrote:
>>>>> Hi Matthias,
>>>>>
>>>>> Thanks for your comment.
>>>>>
>>>>> On Sat, 2020-05-16 at 20:20 +0200, Matthias Brugger wrote:
>>>>>>
>>>>>> On 08/03/2020 11:52, Dennis YC Hsieh wrote:
>>>>>>> add write_s function in cmdq helper functions which
>>>>>>> writes a constant value to address with large dma
>>>>>>> access support.
>>>>>>>
>>>>>>> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
>>>>>>> Reviewed-by: CK Hu <ck.hu@mediatek.com>
>>>>>>> ---
>>>>>>> drivers/soc/mediatek/mtk-cmdq-helper.c | 26 ++++++++++++++++++++++++++
>>>>>>> include/linux/soc/mediatek/mtk-cmdq.h | 14 ++++++++++++++
>>>>>>> 2 files changed, 40 insertions(+)
>>>>>>>
>>>>>>> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
>>>>>>> index 03c129230cd7..a9ebbabb7439 100644
>>>>>>> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
>>>>>>> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
>>>>>>> @@ -269,6 +269,32 @@ int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
>>>>>>> }
>>>>>>> EXPORT_SYMBOL(cmdq_pkt_write_s);
>>>>>>>
>>>>>>> +int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
>>>>>>> + u16 addr_low, u32 value, u32 mask)
>>>>>>> +{
>>>>>>> + struct cmdq_instruction inst = { {0} };
>>>>>>> + int err;
>>>>>>> +
>>>>>>> + if (mask != U32_MAX) {
>>>>>>> + inst.op = CMDQ_CODE_MASK;
>>>>>>> + inst.mask = ~mask;
>>>>>>> + err = cmdq_pkt_append_command(pkt, inst);
>>>>>>> + if (err < 0)
>>>>>>> + return err;
>>>>>>> +
>>>>>>> + inst.op = CMDQ_CODE_WRITE_S_MASK;
>>>>>>> + } else {
>>>>>>> + inst.op = CMDQ_CODE_WRITE_S;
>>>>>>> + }
>>>>>>> +
>>>>>>> + inst.sop = high_addr_reg_idx;
>>>>>>
>>>>>> Writing u16 value in a 5 bit wide variable?
>>>>>
>>>>> We need only 5 bits in this case. I'll change high_addr_reg_idx
>>>>> parameter to u8.
>>>>>
>>>>
>>>> Ok, please make sure to mask the value, so that it's explicit in the code that
>>>> we only use the lowest 5 bits of high_addr_reg_idx.
>>>
>>> Is it necessary to mask the value?
>>> Since sop already defined as "u8 sop:5;", I thought it is explicit that
>>> only use 5 bits and compiler should do the rest jobs.
>>
>> Yes but it makes the code more explicit if we have a
>> inst.sop = high_addr_reg_idx & 0x1f;
>>
>> What do you think?
>
> The value assign to sop will restrict by hardware spec. Clients call
> this function will define constant value and use it as parameter. So I
> think we don't worry about client call this api with wrong value.
>
Ok, then let's change the parameter to u8 and don't add a mask.
Regards,
Matthias
^ permalink raw reply
* Re: [PATCH v3 1/8] dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property
From: Andrew Lunn @ 2020-05-25 13:57 UTC (permalink / raw)
To: Pavel Machek
Cc: Florian Fainelli, Martin Blumenstingl, robh+dt, linux-amlogic,
devicetree, jianxin.pan, davem, netdev, linux-kernel,
linux-arm-kernel
In-Reply-To: <20200525090718.GB16796@amd>
> > standardizing on rx-delay-ps and tx-delay-ps would make sense since that
> > is the lowest resolution and the property would be correctly named with
> > an unit in the name.
>
> Seems like similar patch is already being reviewed from Dan Murphy (?)
> from TI.
Dan is working on the PHY side. But there is probably code which can
be shared.
One question to consider, do we want the same properties names for MAC
and PHY, or do we want to make them different, to avoid confusion?
Andrew
^ permalink raw reply
* Re: [PATCH net v2 0/4] net: ethernet: fec: move GPR reigster offset and bit into DT
From: Andrew Lunn @ 2020-05-25 13:54 UTC (permalink / raw)
To: fugang.duan
Cc: martin.fuzzey, davem, netdev, robh+dt, shawnguo, devicetree, kuba
In-Reply-To: <1590390569-4394-1-git-send-email-fugang.duan@nxp.com>
On Mon, May 25, 2020 at 03:09:25PM +0800, fugang.duan@nxp.com wrote:
> From: Fugang Duan <fugang.duan@nxp.com>
>
> The commit da722186f654 (net: fec: set GPR bit on suspend by DT configuration) set the GPR reigster offset and bit in driver for wol feature.
The cover letter gets committed as the merge commit message. So please
wrap long longs.
> It bring trouble to enable wol feature on imx6sx/imx6ul/imx7d
> platforms that have multiple ethernet instances with different GPR
> bit for stop mode control. So the patch set is to move GPR reigster
register
> offset and bit define into DT, and enable
> imx6q/imx6dl/imx6sx/imx6ul/imx7d stop mode support.
>
> Currently, below NXP i.MX boards support wol:
> - imx6q/imx6dl sabresd
> - imx6sx sabreauto
> - imx7d sdb
>
> imx6q/imx6dl sarebsd board dts file miss the property "fsl,magic-packet;", so patch#4 is to add the property for stop mode support.
sabresd?
Andrew
^ permalink raw reply
* Re: [PATCH net v2 4/4] ARM: dts: imx6qdl-sabresd: enable fec wake-on-lan
From: Andrew Lunn @ 2020-05-25 13:51 UTC (permalink / raw)
To: fugang.duan
Cc: martin.fuzzey, davem, netdev, robh+dt, shawnguo, devicetree, kuba
In-Reply-To: <1590390569-4394-5-git-send-email-fugang.duan@nxp.com>
On Mon, May 25, 2020 at 03:09:29PM +0800, fugang.duan@nxp.com wrote:
> From: Fugang Duan <fugang.duan@nxp.com>
>
> Enable ethernet wake-on-lan feature for imx6q/dl/qp sabresd
> boards since the PHY clock is supplied by exteranl osc.
external
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply
* Re: [PATCH net v2 3/4] ARM: dts: imx: add ethernet stop mode property
From: Andrew Lunn @ 2020-05-25 13:51 UTC (permalink / raw)
To: fugang.duan
Cc: martin.fuzzey, davem, netdev, robh+dt, shawnguo, devicetree, kuba
In-Reply-To: <1590390569-4394-4-git-send-email-fugang.duan@nxp.com>
On Mon, May 25, 2020 at 03:09:28PM +0800, fugang.duan@nxp.com wrote:
> From: Fugang Duan <fugang.duan@nxp.com>
>
> - Update the imx6qdl gpr property to define gpr register
> offset and bit in DT.
> - Add imx6sx/imx6ul/imx7d ethernet stop mode property.
>
> Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Thanks for adding a user.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
^ permalink raw reply
* [PATCH v6 2/3] dt-bindings: arm: actions: Document Caninos Loucos Labrador
From: Matheus Castello @ 2020-05-25 13:22 UTC (permalink / raw)
To: afaerber, manivannan.sadhasivam, mark.rutland, robh+dt
Cc: edgar.righi, igor.lima, linux-arm-kernel, devicetree,
linux-kernel, linux-actions, Matheus Castello, Rob Herring
In-Reply-To: <20200525132218.190841-1-matheus@castello.eng.br>
Update the documentation to add the Caninos Loucos Labrador. Labrador
project consists of a computer on module based on the Actions Semi S500
processor and the Labrador base board.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/actions.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml
index ace3fdaa8396..0eac72335a05 100644
--- a/Documentation/devicetree/bindings/arm/actions.yaml
+++ b/Documentation/devicetree/bindings/arm/actions.yaml
@@ -19,6 +19,11 @@ properties:
- allo,sparky # Allo.com Sparky
- cubietech,cubieboard6 # Cubietech CubieBoard6
- const: actions,s500
+ - items:
+ - enum:
+ - caninos,labrador-base-m # Labrador Base Board M v1
+ - const: caninos,labrador-v2
+ - const: actions,s500
- items:
- enum:
- lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B
--
2.26.2
^ permalink raw reply related
* Re: [PATCH v2 08/12] i2c: designware: Introduce platform drivers glue layer interface
From: Andy Shevchenko @ 2020-05-25 13:42 UTC (permalink / raw)
To: Jarkko Nikula
Cc: Serge Semin, Serge Semin, Mika Westerberg, Alexey Malahov,
Thomas Bogendoerfer, Paul Burton, Ralf Baechle, Rob Herring,
Frank Rowand, linux-mips, devicetree, Wolfram Sang,
Rafael J. Wysocki, Hanjun Guo, Hans de Goede, linux-kernel,
linux-i2c
In-Reply-To: <80cf1d67-5de1-f3f1-27a0-b88cc105b228@linux.intel.com>
On Mon, May 25, 2020 at 04:16:05PM +0300, Jarkko Nikula wrote:
> On 5/21/20 5:37 AM, Serge Semin wrote:
> For this patchset I'd like more if changes are done to
> i2c-designware-platdrv.c since it's not too complicated yet :-)
And after moving ACPI stuff to common code, the one has even been shrunk significantly.
> If it starts to look too messy in the future then it's time split I think.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* Re: [PATCH v3 10/16] gpio: add a reusable generic gpio_chip using regmap
From: Andy Shevchenko @ 2020-05-25 13:25 UTC (permalink / raw)
To: Linus Walleij, Pierre-louis Bossart
Cc: Michael Walle, Bartosz Golaszewski, linux-gpio, linux-devicetree,
LKML, linux-hwmon, linux-pwm, LINUXWATCHDOG, arm-soc, Rob Herring,
Jean Delvare, Guenter Roeck, Lee Jones, Thierry Reding,
Uwe Kleine-König, Wim Van Sebroeck, Shawn Guo, Li Yang,
Thomas Gleixner, Jason Cooper, Marc Zyngier, Mark Brown,
Greg Kroah-Hartman
In-Reply-To: <CACRpkdZYEZk7o+Y2-AqnHGsY8N7KGGmPGSuSS=H7YY8VLZ3jZw@mail.gmail.com>
On Mon, May 25, 2020 at 02:59:36PM +0200, Linus Walleij wrote:
> On Mon, May 25, 2020 at 12:20 PM Michael Walle <michael@walle.cc> wrote:
>
> > If you like I could submit this patch on its own. But then there
> > wouldn't be a user for it.
>
> I'm pretty much fine with that, we do merge code that has no
> users if we anticipate they will be around the corner.
I remember we discussed with Pierre to use it for his ASoC work.
Pierre, does it sound useful for you?
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply
* [PATCH v6 3/3] ARM: dts: Add Caninos Loucos Labrador
From: Matheus Castello @ 2020-05-25 13:22 UTC (permalink / raw)
To: afaerber, manivannan.sadhasivam, mark.rutland, robh+dt
Cc: edgar.righi, igor.lima, linux-arm-kernel, devicetree,
linux-kernel, linux-actions, Matheus Castello
In-Reply-To: <20200525132218.190841-1-matheus@castello.eng.br>
Add Device Trees for Caninos Loucos Labrador CoM and base board.
Based on the work of Andreas Färber on Lemaker Guitar device tree.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/owl-s500-labrador-base-m.dts | 34 +++++++++++++++++++
arch/arm/boot/dts/owl-s500-labrador-v2.dtsi | 22 ++++++++++++
3 files changed, 57 insertions(+)
create mode 100644 arch/arm/boot/dts/owl-s500-labrador-base-m.dts
create mode 100644 arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..0f8c1f255574 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -856,6 +856,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
dtb-$(CONFIG_ARCH_ACTIONS) += \
owl-s500-cubieboard6.dtb \
owl-s500-guitar-bb-rev-b.dtb \
+ owl-s500-labrador-base-m.dtb \
owl-s500-sparky.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
diff --git a/arch/arm/boot/dts/owl-s500-labrador-base-m.dts b/arch/arm/boot/dts/owl-s500-labrador-base-m.dts
new file mode 100644
index 000000000000..044568fec25e
--- /dev/null
+++ b/arch/arm/boot/dts/owl-s500-labrador-base-m.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Caninos Labrador Base Board
+ *
+ * Copyright (c) 2019-2020 Matheus Castello
+ */
+
+/dts-v1/;
+
+#include "owl-s500-labrador-v2.dtsi"
+
+/ {
+ model = "Caninos Labrador Base-M v1.0a";
+ compatible = "caninos,labrador-base-m", "actions,s500";
+
+ aliases {
+ serial3 = &uart3;
+ };
+
+ chosen {
+ stdout-path = "serial3:115200n8";
+ };
+
+ uart3_clk: uart3-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <921600>;
+ #clock-cells = <0>;
+ };
+};
+
+&uart3 {
+ status = "okay";
+ clocks = <&uart3_clk>;
+};
diff --git a/arch/arm/boot/dts/owl-s500-labrador-v2.dtsi b/arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
new file mode 100644
index 000000000000..883ff2f9886d
--- /dev/null
+++ b/arch/arm/boot/dts/owl-s500-labrador-v2.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Caninos Labrador SoM V2
+ *
+ * Copyright (c) 2019-2020 Matheus Castello
+ */
+
+#include "owl-s500.dtsi"
+
+/ {
+ model = "Caninos Labrador Core V2.1";
+ compatible = "caninos,labrador-v2", "actions,s500";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x80000000>;
+ };
+};
+
+&timer {
+ clocks = <&hosc>;
+};
--
2.26.2
^ permalink raw reply related
* [PATCH v6 1/3] dt-bindings: Add vendor prefix for Caninos Loucos
From: Matheus Castello @ 2020-05-25 13:22 UTC (permalink / raw)
To: afaerber, manivannan.sadhasivam, mark.rutland, robh+dt
Cc: edgar.righi, igor.lima, linux-arm-kernel, devicetree,
linux-kernel, linux-actions, Matheus Castello, Rob Herring
In-Reply-To: <20200525132218.190841-1-matheus@castello.eng.br>
The Caninos Loucos Program develops Single Board Computers with an open
structure. The Program wants to form a community of developers to use
IoT technologies and disseminate the learning of embedded systems in
Brazil.
It is an initiative of the Technological Integrated Systems Laboratory
(LSI-TEC) with the support of Polytechnic School of the University of
São Paulo (Poli-USP) and Jon "Maddog" Hall.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index d3891386d671..a20a05e3deaa 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -167,6 +167,8 @@ patternProperties:
description: CALAO Systems SAS
"^calxeda,.*":
description: Calxeda
+ "^caninos,.*":
+ description: Caninos Loucos Program
"^capella,.*":
description: Capella Microsystems, Inc
"^cascoda,.*":
--
2.26.2
^ permalink raw reply related
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