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* Re: [PATCH v1 2/4] dt-bindings: regulator: add pca9450 regulator yaml
From: Rob Herring @ 2020-05-28 21:20 UTC (permalink / raw)
  To: Robin Gong
  Cc: broonie, kernel, john.lee, anson.huang, linux-imx,
	catalin.marinas, s.hauer, linux-arm-kernel, robh+dt, linux-kernel,
	devicetree, will, lgirdwood, festevam, shawnguo
In-Reply-To: <1589925907-9195-3-git-send-email-yibin.gong@nxp.com>

On Wed, 20 May 2020 06:05:05 +0800, Robin Gong wrote:
> Add device binding doc for pca9450 pmic driver.
> 
> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> ---
>  .../bindings/regulator/nxp,pca9450-regulator.yaml  | 190 +++++++++++++++++++++
>  1 file changed, 190 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [PATCH v2 08/10] dt-bindings: mmc: owl: add compatible string actions, s700-mmc
From: Rob Herring @ 2020-05-28 21:17 UTC (permalink / raw)
  To: Amit Singh Tomar
  Cc: cristian.ciocaltea, andre.przywara, devicetree, linux-arm-kernel,
	afaerber, linux-actions, linux-kernel, manivannan.sadhasivam,
	robh+dt
In-Reply-To: <1589912368-480-9-git-send-email-amittomer25@gmail.com>

On Tue, 19 May 2020 23:49:26 +0530, Amit Singh Tomar wrote:
> The commit adds a new SoC specific compatible string "actions,s700-mmc"
> in combination with more generic string "actions,owl-mmc".
> 
> Placement order of these strings should abide by the principle of
> "from most specific to most general".
> 
> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
> ---
> 	* Newly added patch in v2.
> ---
>  Documentation/devicetree/bindings/mmc/owl-mmc.yaml | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [PATCH v2 05/10] dt-bindings: dmaengine: convert Actions Semi Owl SoCs bindings to yaml
From: Rob Herring @ 2020-05-28 21:17 UTC (permalink / raw)
  To: Amit Singh Tomar
  Cc: andre.przywara, afaerber, vkoul, manivannan.sadhasivam,
	dan.j.williams, cristian.ciocaltea, linux-kernel,
	linux-arm-kernel, linux-actions, devicetree
In-Reply-To: <1589912368-480-6-git-send-email-amittomer25@gmail.com>

On Tue, May 19, 2020 at 11:49:23PM +0530, Amit Singh Tomar wrote:
> Converts the device tree bindings for the Actions Semi Owl SoCs DMA
> Controller over to YAML schemas.
> 
> It also adds new compatible string "actions,s700-dma".
> 
> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
> ---
> Change since v1:
> 	* Updated the description field to reflect
> 	  only the necessary information.
> 	* replaced the maxItems field with description for each 
>           controller attribute(except interrupts).
> 	* Replaced the clock macro with number to keep the example
>           as independent as possible.
> 	  	
>  New patch, was not there in RFC.
> ---
>  Documentation/devicetree/bindings/dma/owl-dma.txt  | 47 -------------
>  Documentation/devicetree/bindings/dma/owl-dma.yaml | 76 ++++++++++++++++++++++
>  2 files changed, 76 insertions(+), 47 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt
>  create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.yaml
> 
> diff --git a/Documentation/devicetree/bindings/dma/owl-dma.txt b/Documentation/devicetree/bindings/dma/owl-dma.txt
> deleted file mode 100644
> index 03e9bb12b75f..000000000000
> --- a/Documentation/devicetree/bindings/dma/owl-dma.txt
> +++ /dev/null
> @@ -1,47 +0,0 @@
> -* Actions Semi Owl SoCs DMA controller
> -
> -This binding follows the generic DMA bindings defined in dma.txt.
> -
> -Required properties:
> -- compatible: Should be "actions,s900-dma".
> -- reg: Should contain DMA registers location and length.
> -- interrupts: Should contain 4 interrupts shared by all channel.
> -- #dma-cells: Must be <1>. Used to represent the number of integer
> -              cells in the dmas property of client device.
> -- dma-channels: Physical channels supported.
> -- dma-requests: Number of DMA request signals supported by the controller.
> -                Refer to Documentation/devicetree/bindings/dma/dma.txt
> -- clocks: Phandle and Specifier of the clock feeding the DMA controller.
> -
> -Example:
> -
> -Controller:
> -                dma: dma-controller@e0260000 {
> -                        compatible = "actions,s900-dma";
> -                        reg = <0x0 0xe0260000 0x0 0x1000>;
> -                        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> -                                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> -                                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> -                                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> -                        #dma-cells = <1>;
> -                        dma-channels = <12>;
> -                        dma-requests = <46>;
> -                        clocks = <&clock CLK_DMAC>;
> -                };
> -
> -Client:
> -
> -DMA clients connected to the Actions Semi Owl SoCs DMA controller must
> -use the format described in the dma.txt file, using a two-cell specifier
> -for each channel.
> -
> -The two cells in order are:
> -1. A phandle pointing to the DMA controller.
> -2. The channel id.
> -
> -uart5: serial@e012a000 {
> -        ...
> -        dma-names = "tx", "rx";
> -        dmas = <&dma 26>, <&dma 27>;
> -        ...
> -};
> diff --git a/Documentation/devicetree/bindings/dma/owl-dma.yaml b/Documentation/devicetree/bindings/dma/owl-dma.yaml
> new file mode 100644
> index 000000000000..82e7d261e967
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/owl-dma.yaml
> @@ -0,0 +1,76 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Actions Semi Owl SoCs DMA controller
> +
> +description: |
> +  The OWL DMA is a general-purpose direct memory access controller capable of
> +  supporting 10 and 12 independent DMA channels for S700 and S900 SoCs
> +  respectively.
> +
> +maintainers:
> +  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> +
> +allOf:
> +  - $ref: "dma-controller.yaml#"
> +
> +properties:
> +  compatible:
> +    enum:
> +      - actions,s900-dma
> +      - actions,s700-dma
> +
> +  reg:
> +    description:
> +      DMA registers location and length.

Don't need a description. Just need: 

maxItems: 1

> +
> +  interrupts:
> +    description:
> +      controller supports 4 interrupts, which are freely assignable to the
> +      DMA channels.
> +    maxItems: 4
> +
> +  "#dma-cells":
> +    const: 1
> +
> +  dma-channels:
> +    description:
> +      Physical channels supported.

Already defined in dma-controller.yaml. You need to add any constraints.
2^32 channels okay?

> +
> +  dma-requests:
> +    description:
> +      Number of DMA request signals supported by the controller.

Same here.

> +
> +  clocks:
> +    description:
> +      Phandle and Specifier of the clock feeding the DMA controller.

How many?

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - "#dma-cells"
> +  - dma-channels
> +  - dma-requests
> +  - clocks

Add:

unevaluatedProperties: false

> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    dma: dma-controller@e0260000 {
> +        compatible = "actions,s900-dma";
> +        reg = <0x0 0xe0260000 0x0 0x1000>;
> +        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
> +                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> +        #dma-cells = <1>;
> +        dma-channels = <12>;
> +        dma-requests = <46>;
> +        clocks = <&clock 22>;
> +    };
> +
> +...
> -- 
> 2.7.4
> 

^ permalink raw reply

* Re: [PATCH v2 1/4] ARM: dts: dove: Make the DT compliant with the ti,tfp410 binding
From: Laurent Pinchart @ 2020-05-28 21:12 UTC (permalink / raw)
  To: Rob Herring
  Cc: Ricardo Cañuelo, kernel, devicetree, dri-devel,
	linux-arm-kernel, jason, tomi.valkeinen, airlied, shawnguo
In-Reply-To: <20200528173755.GA113289@bogus>

Hi Rob,

On Thu, May 28, 2020 at 11:37:55AM -0600, Rob Herring wrote:
> On Thu, May 14, 2020 at 04:36:09PM +0200, Ricardo Cañuelo wrote:
> > Define a 'ports' node for 'dvi: video@39' and use the proper naming for
> > the powerdown-gpios property to make it compliant with the ti,tfp410
> > binding.
> > 
> > This fills the minimum requirements to meet the binding requirements,
> > port endpoints are not defined.
> 
> Just make 'ports' optional. This isn't really any better unless you add 
> endpoints too.

I wonder how this is supposed to work though. The ti-tfp410 driver will
fail to probe if there's no endpoint. I'd rather already add a node for
the DVI connector and connect it to port@1 of the TFP410.

> > Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com>
> > ---
> >  arch/arm/boot/dts/dove-sbc-a510.dts | 13 ++++++++++++-
> >  1 file changed, 12 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/boot/dts/dove-sbc-a510.dts b/arch/arm/boot/dts/dove-sbc-a510.dts
> > index 2bb85a9b7614..32804c981625 100644
> > --- a/arch/arm/boot/dts/dove-sbc-a510.dts
> > +++ b/arch/arm/boot/dts/dove-sbc-a510.dts
> > @@ -132,7 +132,18 @@
> >  	dvi: video@39 {
> >  		compatible = "ti,tfp410";
> >  		reg = <0x39>;
> > -		powerdown-gpio = <&gpio_ext 3 GPIO_ACTIVE_LOW>;
> > +		powerdown-gpios = <&gpio_ext 3 GPIO_ACTIVE_LOW>;
> > +
> > +		ports {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			port@0 {
> > +				reg = <0>;
> > +			};
> > +			port@1 {
> > +				reg = <1>;
> > +			};
> > +		};
> >  	};
> >  };
> >  

-- 
Regards,

Laurent Pinchart

^ permalink raw reply

* Re: [PATCH] dt-bindings: serial: Add renesas,em-uart bindings
From: Rob Herring @ 2020-05-28 21:12 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Greg Kroah-Hartman, Rob Herring, linux-serial, devicetree,
	Magnus Damm, linux-renesas-soc
In-Reply-To: <20200519080945.28798-1-geert+renesas@glider.be>

On Tue, 19 May 2020 10:09:45 +0200, Geert Uytterhoeven wrote:
> Document Device Tree bindings for the Renesas EMMA Mobile UART
> Interface.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  .../bindings/serial/renesas,em-uart.yaml      | 49 +++++++++++++++++++
>  1 file changed, 49 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/serial/renesas,em-uart.yaml
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH] dt-bindings: memory-controllers: renesas,dbsc: Convert to json-schema
From: Rob Herring @ 2020-05-28 21:11 UTC (permalink / raw)
  To: Geert Uytterhoeven; +Cc: devicetree, linux-renesas-soc, Rob Herring
In-Reply-To: <20200519080812.28632-1-geert+renesas@glider.be>

On Tue, 19 May 2020 10:08:12 +0200, Geert Uytterhoeven wrote:
> Convert the Renesas DDR Bus Controller Device Tree binding documentation
> to json-schema.
> 
> Drop referrals to driver behavior.
> Make power-domains required, as it is present for all current users.
> Update the example to match reality.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  .../memory-controllers/renesas,dbsc.txt       | 44 ---------------
>  .../memory-controllers/renesas,dbsc.yaml      | 56 +++++++++++++++++++
>  2 files changed, 56 insertions(+), 44 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.txt
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH] dt-bindings: interrupt-controller: arm, gic: Document resets property
From: Rob Herring @ 2020-05-28 21:10 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Andre Przywara, linux-arm-kernel, Marc Zyngier, Thomas Gleixner,
	linux-renesas-soc, Jason Cooper, linux-kernel, devicetree,
	Rob Herring
In-Reply-To: <20200519080519.28324-1-geert+renesas@glider.be>

On Tue, 19 May 2020 10:05:19 +0200, Geert Uytterhoeven wrote:
> A generic GIC block embedded in an SoC may be connected to an on-SoC
> reset controller.  Hence allow the DTS writer to describe this relation,
> by documenting the optional presence of a "reset" property.
> 
> This gets rid of "make dtbs_check" warnings like:
> 
>     arch/arm/boot/dts/r8a7791-porter.dt.yaml: interrupt-controller@f1001000: 'resets' does not match any of the regexes: '^v2m@[0-9a-f]+$', 'pinctrl-[0-9]+'
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  .../devicetree/bindings/interrupt-controller/arm,gic.yaml      | 3 +++
>  1 file changed, 3 insertions(+)
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH] ASoC: fsi: Add missing properties to DT bindings
From: Rob Herring @ 2020-05-28 21:09 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Kuninori Morimoto, Mark Brown, alsa-devel, Rob Herring,
	Liam Girdwood, linux-renesas-soc, devicetree
In-Reply-To: <20200519075858.27869-1-geert+renesas@glider.be>

On Tue, 19 May 2020 09:58:58 +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
> 
>     arch/arm/boot/dts/r8a7740-armadillo800eva.dt.yaml: sound@fe1f0000: '#sound-dai-cells', 'clocks', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+'
> 
> Fix this by documenting the missing properties.
> Update the example to match reality.
> While at it, improve the document title, and comment the various
> compatible values with the corresponding SoC names.
> 
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")
> Fixes: 2f52475bac7e1572 ("ASoC: fsi: switch to yaml base Documentation")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> For a clean "make dtbs_check", this depends on "ARM: dts: sh73a0: Add
> missing clocks to sound node"
> (http://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be).
> ---
>  .../bindings/sound/renesas,fsi.yaml           | 29 +++++++++++++++----
>  1 file changed, 23 insertions(+), 6 deletions(-)
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH v6 08/16] soc: mediatek: cmdq: add write_s function
From: Matthias Brugger @ 2020-05-28 21:08 UTC (permalink / raw)
  To: Dennis YC Hsieh, Rob Herring, Mark Rutland, Jassi Brar,
	Philipp Zabel, David Airlie, Daniel Vetter
  Cc: linux-kernel, linux-mediatek, devicetree, wsd_upstream, dri-devel,
	Bibby Hsieh, CK Hu, Houlong Wei, linux-arm-kernel, HS Liao
In-Reply-To: <1590685491-17107-9-git-send-email-dennis-yc.hsieh@mediatek.com>



On 28/05/2020 19:04, Dennis YC Hsieh wrote:
> add write_s function in cmdq helper functions which
> writes value contains in internal register to address
> with large dma access support.
> 
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> ---
>  drivers/soc/mediatek/mtk-cmdq-helper.c   | 21 ++++++++++++++++++++-
>  include/linux/mailbox/mtk-cmdq-mailbox.h |  1 +
>  include/linux/soc/mediatek/mtk-cmdq.h    | 20 ++++++++++++++++++++
>  3 files changed, 41 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 33153d17c9d9..ee24c0ec0a24 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -18,6 +18,10 @@ struct cmdq_instruction {
>  	union {
>  		u32 value;
>  		u32 mask;
> +		struct {
> +			u16 arg_c;
> +			u16 src_reg;
> +		};
>  	};
>  	union {
>  		u16 offset;
> @@ -29,7 +33,7 @@ struct cmdq_instruction {
>  		struct {
>  			u8 sop:5;
>  			u8 arg_c_t:1;
> -			u8 arg_b_t:1;
> +			u8 src_t:1;

This should be part of 7/16.

>  			u8 dst_t:1;
>  		};
>  	};
> @@ -222,6 +226,21 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
>  }
>  EXPORT_SYMBOL(cmdq_pkt_write_mask);
>  
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> +		     u16 addr_low, u16 src_reg_idx)
> +{
> +	struct cmdq_instruction inst = { {0} };

If you want an empty struct on the stack, I think {}; should be enough, right?

Regards,
Matthias

> +
> +	inst.op = CMDQ_CODE_WRITE_S;
> +	inst.src_t = CMDQ_REG_TYPE;
> +	inst.sop = high_addr_reg_idx;
> +	inst.offset = addr_low;
> +	inst.src_reg = src_reg_idx;
> +
> +	return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_write_s);
> +
>  int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
>  {
>  	struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 121c3bb6d3de..ee67dd3b86f5 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -59,6 +59,7 @@ enum cmdq_code {
>  	CMDQ_CODE_JUMP = 0x10,
>  	CMDQ_CODE_WFE = 0x20,
>  	CMDQ_CODE_EOC = 0x40,
> +	CMDQ_CODE_WRITE_S = 0x90,
>  	CMDQ_CODE_LOGIC = 0xa0,
>  };
>  
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 83340211e1d3..d623f1aa7814 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -12,6 +12,8 @@
>  #include <linux/timer.h>
>  
>  #define CMDQ_NO_TIMEOUT		0xffffffffu
> +#define CMDQ_ADDR_HIGH(addr)	((u32)(((addr) >> 16) & GENMASK(31, 0)))
> +#define CMDQ_ADDR_LOW(addr)	((u16)(addr) | BIT(1))
>  
>  struct cmdq_pkt;
>  
> @@ -102,6 +104,24 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
>  int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
>  			u16 offset, u32 value, u32 mask);
>  
> +/**
> + * cmdq_pkt_write_s() - append write_s command to the CMDQ packet
> + * @pkt:	the CMDQ packet
> + * @high_addr_reg_idx:	internal register ID which contains high address of pa
> + * @addr_low:	low address of pa
> + * @src_reg_idx:	the CMDQ internal register ID which cache source value
> + * @mask:	the specified target address mask, use U32_MAX if no need
> + *
> + * Return: 0 for success; else the error code is returned
> + *
> + * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()
> + * to get high address and call cmdq_pkt_assign() to assign value into internal
> + * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameter when
> + * call to this function.
> + */
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
> +		     u16 addr_low, u16 src_reg_idx);
> +
>  /**
>   * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
>   * @pkt:	the CMDQ packet
> 

^ permalink raw reply

* Re: [PATCH] dt-bindings: rtc: rtc-sh: Add missing power-domains property
From: Rob Herring @ 2020-05-28 21:06 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: devicetree, linux-renesas-soc, Alessandro Zummo,
	Alexandre Belloni, linux-rtc, Rob Herring, Simon Horman
In-Reply-To: <20200519074953.24328-1-geert+renesas@glider.be>

On Tue, 19 May 2020 09:49:53 +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
> 
>     arch/arm/boot/dts/r7s72100-rskrza1.dt.yaml: rtc@fcff1000: 'power-domains' does not match any of the regexes: 'pinctrl-[0-9]+'
> 
> Fix this by documenting the missing power-domains property.
> Update the example to match reality.
> 
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")
> Fixes: 7ae8b2f5dfb357f0 ("dt-bindings: rtc: rtc-sh: convert bindings to json-schema")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  Documentation/devicetree/bindings/rtc/renesas,sh-rtc.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH] dt-bindings: media: Add missing clock domain description
From: Rob Herring @ 2020-05-28 21:05 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: linux-renesas-soc, Rob Herring, devicetree, linux-media,
	Mauro Carvalho Chehab, Jacopo Mondi
In-Reply-To: <20200519074229.22308-1-geert+renesas@glider.be>

On Tue, 19 May 2020 09:42:29 +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
> 
>     arch/arm/boot/dts/r7s72100-genmai.dt.yaml: camera@e8210000: 'clocks', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+'
> 
> Fix this by documenting the missing properties.
> Update the example to match reality.
> 
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")
> Fixes: 58361eaa11d561f3 ("dt-bindings: media: renesas,ceu: Convert to yaml")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  .../devicetree/bindings/media/renesas,ceu.yaml        | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH] dt-bindings: media: Add missing clock domain description
From: Rob Herring @ 2020-05-28 21:05 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Jacopo Mondi, Mauro Carvalho Chehab, linux-media,
	linux-renesas-soc, devicetree
In-Reply-To: <20200519074229.22308-1-geert+renesas@glider.be>

On Tue, May 19, 2020 at 09:42:29AM +0200, Geert Uytterhoeven wrote:
> make dtbs_check:
> 
>     arch/arm/boot/dts/r7s72100-genmai.dt.yaml: camera@e8210000: 'clocks', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+'
> 
> Fix this by documenting the missing properties.
> Update the example to match reality.
> 
> Fixes: 7f464532b05dadc8 ("dt-bindings: Add missing 'additionalProperties: false'")

The above is not a error in this commit. It just exposed an error in 
the binding. So I don't think Fixes is appropriate. I'll drop when 
applying.

> Fixes: 58361eaa11d561f3 ("dt-bindings: media: renesas,ceu: Convert to yaml")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  .../devicetree/bindings/media/renesas,ceu.yaml        | 11 +++++++++++
>  1 file changed, 11 insertions(+)

^ permalink raw reply

* Re: [PATCH V2 3/3] dt-bindings: timer: Convert i.MX SYSCTR to json-schema
From: Rob Herring @ 2020-05-28 21:00 UTC (permalink / raw)
  To: Anson Huang
  Cc: aisheng.dong, devicetree, Linux-imx, daniel.lezcano, ping.bai,
	linux-kernel, s.hauer, robh+dt, tglx, linux-arm-kernel, festevam,
	shawnguo, kernel
In-Reply-To: <1589860547-3207-4-git-send-email-Anson.Huang@nxp.com>

On Tue, 19 May 2020 11:55:47 +0800, Anson Huang wrote:
> Convert the i.MX SYSCTR binding to DT schema format using json-schema.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
> No changes.
> ---
>  .../devicetree/bindings/timer/nxp,sysctr-timer.txt | 25 ----------
>  .../bindings/timer/nxp,sysctr-timer.yaml           | 54 ++++++++++++++++++++++
>  2 files changed, 54 insertions(+), 25 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/timer/nxp,sysctr-timer.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH V2 2/3] dt-bindings: timer: Convert i.MX TPM to json-schema
From: Rob Herring @ 2020-05-28 20:59 UTC (permalink / raw)
  To: Anson Huang
  Cc: daniel.lezcano, s.hauer, linux-kernel, shawnguo, ping.bai,
	devicetree, kernel, festevam, robh+dt, Linux-imx, aisheng.dong,
	tglx, linux-arm-kernel
In-Reply-To: <1589860547-3207-3-git-send-email-Anson.Huang@nxp.com>

On Tue, 19 May 2020 11:55:46 +0800, Anson Huang wrote:
> Convert the i.MX TPM binding to DT schema format using json-schema.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
> Changes since V1:
> 	- remove unnecessary maxItems for clocks/clock-names.
> ---
>  .../devicetree/bindings/timer/nxp,tpm-timer.txt    | 28 ----------
>  .../devicetree/bindings/timer/nxp,tpm-timer.yaml   | 61 ++++++++++++++++++++++
>  2 files changed, 61 insertions(+), 28 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.yaml
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH V2 1/3] dt-bindings: timer: Convert i.MX GPT to json-schema
From: Rob Herring @ 2020-05-28 20:58 UTC (permalink / raw)
  To: Anson Huang
  Cc: daniel.lezcano, tglx, shawnguo, s.hauer, kernel, festevam,
	ping.bai, aisheng.dong, linux-kernel, devicetree,
	linux-arm-kernel, Linux-imx
In-Reply-To: <1589860547-3207-2-git-send-email-Anson.Huang@nxp.com>

On Tue, May 19, 2020 at 11:55:45AM +0800, Anson Huang wrote:
> Convert the i.MX GPT binding to DT schema format using json-schema.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V1:
> 	- remove unnecessary compatible item descriptions;
> 	- remove unnecessary maxItems for clocks/clock-names;
> ---
>  .../devicetree/bindings/timer/fsl,imxgpt.txt       | 45 ------------
>  .../devicetree/bindings/timer/fsl,imxgpt.yaml      | 80 ++++++++++++++++++++++
>  2 files changed, 80 insertions(+), 45 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> 
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> deleted file mode 100644
> index 5d8fd5b..0000000
> --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> +++ /dev/null
> @@ -1,45 +0,0 @@
> -Freescale i.MX General Purpose Timer (GPT)
> -
> -Required properties:
> -
> -- compatible : should be one of following:
> -  for i.MX1:
> -  - "fsl,imx1-gpt";
> -  for i.MX21:
> -  - "fsl,imx21-gpt";
> -  for i.MX27:
> -  - "fsl,imx27-gpt", "fsl,imx21-gpt";
> -  for i.MX31:
> -  - "fsl,imx31-gpt";
> -  for i.MX25:
> -  - "fsl,imx25-gpt", "fsl,imx31-gpt";
> -  for i.MX50:
> -  - "fsl,imx50-gpt", "fsl,imx31-gpt";
> -  for i.MX51:
> -  - "fsl,imx51-gpt", "fsl,imx31-gpt";
> -  for i.MX53:
> -  - "fsl,imx53-gpt", "fsl,imx31-gpt";
> -  for i.MX6Q:
> -  - "fsl,imx6q-gpt", "fsl,imx31-gpt";
> -  for i.MX6DL:
> -  - "fsl,imx6dl-gpt";
> -  for i.MX6SL:
> -  - "fsl,imx6sl-gpt", "fsl,imx6dl-gpt";
> -  for i.MX6SX:
> -  - "fsl,imx6sx-gpt", "fsl,imx6dl-gpt";
> -- reg : specifies base physical address and size of the registers.
> -- interrupts : should be the gpt interrupt.
> -- clocks : the clocks provided by the SoC to drive the timer, must contain
> -           an entry for each entry in clock-names.
> -- clock-names : must include "ipg" entry first, then "per" entry.
> -
> -Example:
> -
> -gpt1: timer@10003000 {
> -	compatible = "fsl,imx27-gpt", "fsl,imx21-gpt";
> -	reg = <0x10003000 0x1000>;
> -	interrupts = <26>;
> -	clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>,
> -		 <&clks IMX27_CLK_PER1_GATE>;
> -	clock-names = "ipg", "per";
> -};
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> new file mode 100644
> index 0000000..5479290
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
> @@ -0,0 +1,80 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/fsl,imxgpt.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale i.MX General Purpose Timer (GPT)
> +
> +maintainers:
> +  - Sascha Hauer <s.hauer@pengutronix.de>
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - const: "fsl,imx1-gpt"
> +      - const: "fsl,imx21-gpt"
> +      - items:
> +          - const: "fsl,imx27-gpt"
> +          - const: "fsl,imx21-gpt"
> +      - const: "fsl,imx31-gpt"
> +      - items:
> +          - const: "fsl,imx25-gpt"
> +          - const: "fsl,imx31-gpt"
> +      - items:
> +          - const: "fsl,imx50-gpt"
> +          - const: "fsl,imx31-gpt"
> +      - items:
> +          - const: "fsl,imx51-gpt"
> +          - const: "fsl,imx31-gpt"
> +      - items:
> +          - const: "fsl,imx53-gpt"
> +          - const: "fsl,imx31-gpt"
> +      - items:
> +          - const: "fsl,imx6q-gpt"
> +          - const: "fsl,imx31-gpt"
> +      - const: "fsl,imx6dl-gpt"
> +      - items:
> +          - const: "fsl,imx6sl-gpt"
> +          - const: "fsl,imx6dl-gpt"
> +      - items:
> +          - const: "fsl,imx6sx-gpt"
> +          - const: "fsl,imx6dl-gpt"

Don't need quotes.

Group all the ones with the same fallback to a single 'items' list 
using enum for the first entry.

Rob

^ permalink raw reply

* Re: [PATCH 1/3] dt-bindings: vendor-prefixes: Add MikroTik
From: Rob Herring @ 2020-05-28 20:55 UTC (permalink / raw)
  To: Jonathan McDowell; +Cc: devicetree, linux-kernel, linux-arm-msm
In-Reply-To: <aae96cddb2d1426482cae7f6fc4d1dc0aecfde5d.1589824955.git.noodles@earth.li>

On Mon, 18 May 2020 19:09:30 +0100, Jonathan McDowell wrote:
> MikroTik (SIA Mikrotīkls) is a Latvian company who develop routers and
> wireless ISP systems.
> 
> Signed-off-by: Jonathan McDowell <noodles@earth.li>
> ---
>  Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH V2] dt-bindings: clock: Convert i.MX7D clock to json-schema
From: Rob Herring @ 2020-05-28 20:54 UTC (permalink / raw)
  To: Anson Huang
  Cc: linux-arm-kernel, kernel, linux-kernel, robh+dt, festevam,
	Frank.Li, mturquette, shawnguo, linux-clk, devicetree, s.hauer,
	sboyd, Linux-imx
In-Reply-To: <1589813554-20929-1-git-send-email-Anson.Huang@nxp.com>

On Mon, 18 May 2020 22:52:34 +0800, Anson Huang wrote:
> Convert the i.MX7D clock binding to DT schema format using json-schema.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V1:
> 	- Update maintainer's e-mail address.
> ---
>  .../devicetree/bindings/clock/imx7d-clock.txt      | 13 -----
>  .../devicetree/bindings/clock/imx7d-clock.yaml     | 64 ++++++++++++++++++++++
>  2 files changed, 64 insertions(+), 13 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/clock/imx7d-clock.txt
>  create mode 100644 Documentation/devicetree/bindings/clock/imx7d-clock.yaml
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH v3 1/2] dt-bindings: serial: Add binding for rs485 bus termination GPIO
From: Rob Herring @ 2020-05-28 20:50 UTC (permalink / raw)
  To: Lukas Wunner
  Cc: devicetree, Jan Kiszka, Matwey V. Kornilov, Greg Kroah-Hartman,
	Andy Shevchenko, Christoph Muellner, Jiri Slaby, linux-serial,
	Heiko Stuebner, Giulio Benetti, Rob Herring
In-Reply-To: <4f4411895dc52c846f766e7f7207ec412c4811b6.1589811297.git.lukas@wunner.de>

On Mon, 18 May 2020 16:45:01 +0200, Lukas Wunner wrote:
> Commit e8759ad17d41 ("serial: uapi: Add support for bus termination")
> introduced the ability to enable rs485 bus termination from user space.
> So far the feature is only used by a single driver, 8250_exar.c, using a
> hardcoded GPIO pin specific to Siemens IOT2040 products.
> 
> Provide for a more generic solution by allowing specification of an
> rs485 bus termination GPIO pin in the device tree.  An upcoming commit
> implements support for this pin for any 8250 driver.  The binding is
> used in device trees of the "Revolution Pi" PLCs offered by KUNBUS.
> 
> [Heiko Stuebner converted the binding to YAML, hence his Signed-off-by.]
> 
> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
> Signed-off-by: Lukas Wunner <lukas@wunner.de>
> Cc: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  Documentation/devicetree/bindings/serial/rs485.yaml | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* Re: [PATCH v4 5/8] dt-bindings: display: panel: Add ilitek ili9341 panel bindings
From: Rob Herring @ 2020-05-28 20:49 UTC (permalink / raw)
  To: dillon.minfei
  Cc: devicetree, airlied, p.zabel, thierry.reding, daniel, dri-devel,
	linux-kernel, linux-spi, sam, mcoquelin.stm32, linux-clk,
	linux-arm-kernel, robh+dt, linux-stm32, alexandre.torgue,
	mturquette, sboyd, broonie
In-Reply-To: <1589800165-3271-6-git-send-email-dillon.minfei@gmail.com>

On Mon, 18 May 2020 19:09:22 +0800, dillon.minfei@gmail.com wrote:
> From: dillon min <dillon.minfei@gmail.com>
> 
> Add documentation for "ilitek,ili9341" panel.
> 
> Signed-off-by: dillon min <dillon.minfei@gmail.com>
> ---
>  .../bindings/display/panel/ilitek,ili9341.yaml     | 69 ++++++++++++++++++++++
>  1 file changed, 69 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>

^ permalink raw reply

* [PATCH 1/2] ARM: dts: orange-pi-zero-plus2: enable USB OTG port
From: Diego Rondini @ 2020-05-28 20:47 UTC (permalink / raw)
  To: Maxime Ripard
  Cc: Rob Herring, Chen-Yu Tsai, devicetree, linux-arm-kernel,
	linux-kernel, linux-sunxi, Diego Rondini

Enable support for USB OTG port on Orange Pi Zero Plus 2 (both H3 and H5
variants). As, according to the board schematics, the USB OTG port cannot
provide power to external devices, we set dr_mode to peripheral.

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
---
 .../boot/dts/sun8i-h3-orangepi-zero-plus2.dts | 23 +++++++++++++++++++
 .../sun50i-h5-orangepi-zero-plus2.dts         | 23 +++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
index b8f46e2802fd3..4376767699a47 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
@@ -137,3 +137,26 @@ &uart0 {
 	pinctrl-0 = <&uart0_pa_pins>;
 	status = "okay";
 };
+
+&usbphy {
+	status = "okay";
+};
+
+&usb_otg {
+	/*
+	 * According to schematics CN1 MicroUSB port can be used to take
+	 * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB
+	 * port cannot provide power externally even if the board is powered
+	 * via GPIO pins. It thus makes sense to force peripheral mode.
+	 */
+	dr_mode = "peripheral";
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index c95a68541309c..d8192a7483e9e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -103,3 +103,26 @@ &uart1 {
 	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
 	status = "okay";
 };
+
+&usbphy {
+	status = "okay";
+};
+
+&usb_otg {
+	/*
+	 * According to schematics CN1 MicroUSB port can be used to take
+	 * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB
+	 * port cannot provide power externally even if the board is powered
+	 * via GPIO pins. It thus makes sense to force peripheral mode.
+	 */
+	dr_mode = "peripheral";
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
-- 
2.25.4


^ permalink raw reply related

* [PATCH 2/2] ARM: dts: orange-pi-zero-plus2: add leds configuration
From: Diego Rondini @ 2020-05-28 20:47 UTC (permalink / raw)
  To: Maxime Ripard
  Cc: Rob Herring, Chen-Yu Tsai, devicetree, linux-arm-kernel,
	linux-kernel, linux-sunxi, Diego Rondini
In-Reply-To: <20200528204712.552964-1-diego.rondini@kynetics.com>

Add pwr and status leds configuration and turn on pwr led by default for Orange
Pi Zero Plus 2 (both H3 and H5 variants).

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
---
 .../boot/dts/sun8i-h3-orangepi-zero-plus2.dts    | 16 ++++++++++++++++
 .../allwinner/sun50i-h5-orangepi-zero-plus2.dts  | 16 ++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
index 4376767699a47..4cd0ac706bd2c 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts
@@ -82,6 +82,22 @@ wifi_pwrseq: wifi_pwrseq {
 		reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
 		post-power-on-delay-ms = <200>;
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		pwr_led {
+			label = "orangepi:green:pwr";
+			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		status_led {
+			label = "orangepi:red:status";
+			gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+		};
+
+	};
 };
 
 &de {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index d8192a7483e9e..517d53e1b0ff1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -42,6 +42,22 @@ wifi_pwrseq: wifi_pwrseq {
 		reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
 		post-power-on-delay-ms = <200>;
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		pwr_led {
+			label = "orangepi:green:pwr";
+			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+
+		status_led {
+			label = "orangepi:red:status";
+			gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+		};
+
+	};
 };
 
 &de {
-- 
2.25.4


^ permalink raw reply related

* Re: [PATCH v3 09/10] dmaengine: dw: Introduce max burst length hw config
From: Andy Shevchenko @ 2020-05-28 20:38 UTC (permalink / raw)
  To: Serge Semin
  Cc: Andy Shevchenko, Serge Semin, Vinod Koul, Viresh Kumar,
	Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
	Rob Herring, linux-mips, devicetree, dmaengine,
	Linux Kernel Mailing List
In-Reply-To: <20200528154022.3reghhjcd4dnsr3g@mobilestation>

On Thu, May 28, 2020 at 6:43 PM Serge Semin
<Sergey.Semin@baikalelectronics.ru> wrote:
> On Thu, May 28, 2020 at 05:52:24PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:20AM +0300, Serge Semin wrote:

...

> > Perhaps,
> >
> >       /* DesignWare DMA supports burst value from 0 */
> >       caps->min_burst = 0;
>
> Regarding min_burst being zero. I don't fully understand what it means.
> It means no burst or burst with minimum length or what?
> In fact DW DMA burst length starts from 1. Remember the burst-length run-time
> parameter we were arguing about? Anyway the driver makes sure that both
> 0 and 1 requested burst length are setup as burst length of 1 in the
> CTLx.SRC_MSIZE, CTLx.DST_MSIZE fields.

Yeah, I also thought about it after I sent a message. 1 sounds better.

-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply

* Re: [PATCH V3] dt-bindings: interrupt-controller: Convert imx irqsteer to json-schema
From: Rob Herring @ 2020-05-28 20:35 UTC (permalink / raw)
  To: Anson Huang
  Cc: tglx, linux-kernel, maz, jason, robh+dt, devicetree, Linux-imx,
	l.stach
In-Reply-To: <1589790957-7904-1-git-send-email-Anson.Huang@nxp.com>

On Mon, 18 May 2020 16:35:57 +0800, Anson Huang wrote:
> Convert the i.MX IRQSTEER binding to DT schema format using json-schema.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
> Changes since V2:
> 	- Improve the interrupt items description.
> ---
>  .../bindings/interrupt-controller/fsl,irqsteer.txt | 35 ---------
>  .../interrupt-controller/fsl,irqsteer.yaml         | 89 ++++++++++++++++++++++
>  2 files changed, 89 insertions(+), 35 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.txt
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml
> 

Applied, thanks!

^ permalink raw reply

* Re: [PATCH v3 05/10] dmaengine: Introduce DMA-device device_caps callback
From: Andy Shevchenko @ 2020-05-28 20:34 UTC (permalink / raw)
  To: Serge Semin
  Cc: Andy Shevchenko, Serge Semin, Vinod Koul, Viresh Kumar,
	Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
	Rob Herring, linux-mips, devicetree, dmaengine,
	Linux Kernel Mailing List
In-Reply-To: <20200528151902.vemr7aolvtean2f3@mobilestation>

On Thu, May 28, 2020 at 6:23 PM Serge Semin
<Sergey.Semin@baikalelectronics.ru> wrote:
> On Thu, May 28, 2020 at 05:42:57PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:16AM +0300, Serge Semin wrote:

...

> > > +   if (device->device_caps)
> > > +           device->device_caps(chan, caps);
> > > +
> > >     return 0;
> >
> > I dunno why this returns int, but either we get rid of this returned value
> > (perhaps in the future, b/c it's not directly related to this series), or
> > something like
> >
> >       if (device->device_caps)
> >               return device->device_caps(chan, caps);
>
> It returns int because dma_get_slave_caps() check parameters and some other
> stuff.
>
> Regarding device_caps() callback having a return value. IMO it's redundant.
> The only thing what the callback should do is to update the caps and device
> is supposed to know it' capabilities, otherwise who else should know? So I
> don't see why device_caps would be needed.

It might be useful in some (weird?) cases, when you would like to
override a parameter which device provides to relax it (my common
sense tells me that device on global level should not be restrictive,
rather permissive), which might be considered as an error (we would
like to set return capability out of the boundaries of global ones
which provided on device level).

But okay, up to you and Vinod.

-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply

* Re: [PATCH v3 08/10] dmaengine: dw: Add dummy device_caps callback
From: Serge Semin @ 2020-05-28 20:34 UTC (permalink / raw)
  To: Andy Shevchenko
  Cc: Serge Semin, Andy Shevchenko, Vinod Koul, Viresh Kumar,
	Dan Williams, Alexey Malahov, Thomas Bogendoerfer, Arnd Bergmann,
	Rob Herring, linux-mips, devicetree, dmaengine,
	Linux Kernel Mailing List
In-Reply-To: <CAHp75VdrOJF6R9YDpeV7x+9=DZJULM0hsfdr0o_Jmgf69CRKvQ@mail.gmail.com>

On Thu, May 28, 2020 at 11:29:16PM +0300, Andy Shevchenko wrote:
> On Thu, May 28, 2020 at 6:30 PM Serge Semin
> <Sergey.Semin@baikalelectronics.ru> wrote:
> >
> > On Thu, May 28, 2020 at 05:53:03PM +0300, Andy Shevchenko wrote:
> > > On Wed, May 27, 2020 at 01:50:19AM +0300, Serge Semin wrote:
> > > > Since some DW DMA controllers (like one installed on Baikal-T1 SoC) may
> > > > have non-uniform DMA capabilities per device channels, let's add
> > > > the DW DMA specific device_caps callback to expose that specifics up to
> > > > the DMA consumer. It's a dummy function for now. We'll fill it in with
> > > > capabilities overrides in the next commits.
> > >
> > > I think per se it is not worth to have it separated. Squash into the next one.
> >
> > bikeshadding?
> 
> Actually no.
> 
> > There is no any difference whether I add a dummy callback, then
> > fill it in in a following up patch, or have the callback added together
> > with some content. Let's see what Vinod thinks of it. Until then I'll stick with
> > the current solution.
> 
> The rule of thumb that we don't add dead code or code which is useless
> per se. Go ahead and provide it with some usefulness.

Actually yes. I've seen examples, which preparation patches first added
prototypes with empty functionality, that in follow-up patches have been
filled with a required code. I've seen Greg accepted such approach. So it's
absolutely normal and acceptable.

-Sergey

> 
> -- 
> With Best Regards,
> Andy Shevchenko

^ permalink raw reply


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