* Re: [PATCH v26 06/15] dt-bindings: leds: Convert leds-lp55xx to yaml
From: Rob Herring @ 2020-06-04 23:04 UTC (permalink / raw)
To: Dan Murphy; +Cc: jacek.anaszewski, pavel, devicetree, linux-leds, linux-kernel
In-Reply-To: <20200604120504.32425-7-dmurphy@ti.com>
On Thu, Jun 04, 2020 at 07:04:55AM -0500, Dan Murphy wrote:
> Convert the leds-lp55xx.txt to yaml binding.
>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> .../devicetree/bindings/leds/leds-lp55xx.txt | 228 ------------------
> .../devicetree/bindings/leds/leds-lp55xx.yaml | 220 +++++++++++++++++
> 2 files changed, 220 insertions(+), 228 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/leds/leds-lp55xx.txt
> create mode 100644 Documentation/devicetree/bindings/leds/leds-lp55xx.yaml
>
> diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt
> deleted file mode 100644
> index 1b66a413fb9d..000000000000
> --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt
> +++ /dev/null
> @@ -1,228 +0,0 @@
> -Binding for TI/National Semiconductor LP55xx Led Drivers
> -
> -Required properties:
> -- compatible: one of
> - national,lp5521
> - national,lp5523
> - ti,lp55231
> - ti,lp5562
> - ti,lp8501
> -
> -- reg: I2C slave address
> -- clock-mode: Input clock mode, (0: automode, 1: internal, 2: external)
> -
> -Each child has own specific current settings
> -- led-cur: Current setting at each led channel (mA x10, 0 if led is not connected)
> -- max-cur: Maximun current at each led channel.
> -
> -Optional properties:
> -- enable-gpio: GPIO attached to the chip's enable pin
> -- label: Used for naming LEDs
> -- pwr-sel: LP8501 specific property. Power selection for output channels.
> - 0: D1~9 are connected to VDD
> - 1: D1~6 with VDD, D7~9 with VOUT
> - 2: D1~6 with VOUT, D7~9 with VDD
> - 3: D1~9 are connected to VOUT
> -
> -Alternatively, each child can have a specific channel name and trigger:
> -- chan-name (optional): name of channel
> -- linux,default-trigger (optional): see
> - Documentation/devicetree/bindings/leds/common.txt
> -
> -example 1) LP5521
> -3 LED channels, external clock used. Channel names are 'lp5521_pri:channel0',
> -'lp5521_pri:channel1' and 'lp5521_pri:channel2', with a heartbeat trigger
> -on channel 0.
> -
> -lp5521@32 {
> - compatible = "national,lp5521";
> - reg = <0x32>;
> - label = "lp5521_pri";
> - clock-mode = /bits/ 8 <2>;
> -
> - chan0 {
> - led-cur = /bits/ 8 <0x2f>;
> - max-cur = /bits/ 8 <0x5f>;
> - linux,default-trigger = "heartbeat";
> - };
> -
> - chan1 {
> - led-cur = /bits/ 8 <0x2f>;
> - max-cur = /bits/ 8 <0x5f>;
> - };
> -
> - chan2 {
> - led-cur = /bits/ 8 <0x2f>;
> - max-cur = /bits/ 8 <0x5f>;
> - };
> -};
> -
> -example 2) LP5523
> -9 LED channels with specific name. Internal clock used.
> -The I2C slave address is configurable with ASEL1 and ASEL0 pins.
> -Available addresses are 32/33/34/35h.
> -
> -ASEL1 ASEL0 Address
> --------------------------
> - GND GND 32h
> - GND VEN 33h
> - VEN GND 34h
> - VEN VEN 35h
> -
> -lp5523@32 {
> - compatible = "national,lp5523";
> - reg = <0x32>;
> - clock-mode = /bits/ 8 <1>;
> -
> - chan0 {
> - chan-name = "d1";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan1 {
> - chan-name = "d2";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan2 {
> - chan-name = "d3";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan3 {
> - chan-name = "d4";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan4 {
> - chan-name = "d5";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan5 {
> - chan-name = "d6";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan6 {
> - chan-name = "d7";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan7 {
> - chan-name = "d8";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan8 {
> - chan-name = "d9";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -};
> -
> -example 3) LP5562
> -4 channels are defined.
> -
> -lp5562@30 {
> - compatible = "ti,lp5562";
> - reg = <0x30>;
> - clock-mode = /bits/8 <2>;
> -
> - chan0 {
> - chan-name = "R";
> - led-cur = /bits/ 8 <0x20>;
> - max-cur = /bits/ 8 <0x60>;
> - };
> -
> - chan1 {
> - chan-name = "G";
> - led-cur = /bits/ 8 <0x20>;
> - max-cur = /bits/ 8 <0x60>;
> - };
> -
> - chan2 {
> - chan-name = "B";
> - led-cur = /bits/ 8 <0x20>;
> - max-cur = /bits/ 8 <0x60>;
> - };
> -
> - chan3 {
> - chan-name = "W";
> - led-cur = /bits/ 8 <0x20>;
> - max-cur = /bits/ 8 <0x60>;
> - };
> -};
> -
> -example 4) LP8501
> -9 channels are defined. The 'pwr-sel' is LP8501 specific property.
> -Others are same as LP5523.
> -
> -lp8501@32 {
> - compatible = "ti,lp8501";
> - reg = <0x32>;
> - clock-mode = /bits/ 8 <2>;
> - pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
> -
> - chan0 {
> - chan-name = "d1";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan1 {
> - chan-name = "d2";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan2 {
> - chan-name = "d3";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan3 {
> - chan-name = "d4";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan4 {
> - chan-name = "d5";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan5 {
> - chan-name = "d6";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan6 {
> - chan-name = "d7";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan7 {
> - chan-name = "d8";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -
> - chan8 {
> - chan-name = "d9";
> - led-cur = /bits/ 8 <0x14>;
> - max-cur = /bits/ 8 <0x20>;
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml
> new file mode 100644
> index 000000000000..9d6ded5fbc14
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml
> @@ -0,0 +1,220 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI/National Semiconductor LP55xx and LP8501 LED Drivers
> +
> +maintainers:
> + - Jacek Anaszewski <jacek.anaszewski@gmail.com>
> + - Pavel Machek <pavel@ucw.cz>
> +
> +description: |
> + Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel
> + LED Drivers.
> +
> + For more product information please see the link below:
> + https://www.ti.com/lit/gpn/lp5521
> + https://www.ti.com/lit/gpn/lp5523
> + https://www.ti.com/lit/gpn/lp55231
> + https://www.ti.com/lit/gpn/lp5562
> + https://www.ti.com/lit/gpn/lp8501
> +
> +properties:
> + #allOf:
> + #- $ref: "common.yaml#"
> + #- $ref: "leds-class-multicolor.yaml#"
> +
> + compatible:
> + enum:
> + - national,lp5521
> + - national,lp5523
> + - ti,lp55231
> + - ti,lp5562
> + - ti,lp8501
> +
> + reg:
> + maxItems: 1
> + description: I2C slave address
> +
> + clock-mode:
> + $ref: /schemas/types.yaml#definitions/uint8
> + maxItems: 1
'maxItems' is for an array. This is a scalar, so drop.
> + description: |
> + Input clock mode
> + 0 - automode
> + 1 - internal
> + 2 - external
enum:
- 0 # automode
- 1
- 2
> +
> + enable-gpio:
> + maxItems: 1
> + description: |
> + GPIO attached to the chip's enable pin
> +
> + pwr-sel:
> + $ref: /schemas/types.yaml#definitions/uint8
> + maxItems: 1
> + description: |
> + LP8501 specific property. Power selection for output channels.
> + 0 - D1~9 are connected to VDD
> + 1 - D1~6 with VDD, D7~9 with VOUT
> + 2 - D1~6 with VOUT, D7~9 with VDD
> + 3 - D1~9 are connected to VOUT
Similarly here, make this a schema.
> +
> + child-node:
This needs to be a pattern matching the child nodes' names.
> + type: object
> + properties:
> + led-cur:
> + $ref: /schemas/types.yaml#definitions/uint8
> + maxItems: 1
Not an array.
> + description: |
> + Current setting at each LED channel (mA x10, 0 if LED is not connected)
0-255 are valid values?
> +
> + max-cur:
> + $ref: /schemas/types.yaml#definitions/uint8
> + maxItems: 1
> + description: Maximun current at each LED channel.
> +
> + reg:
> + maxItems: 1
> + description: |
> + Output channel for the LED. This is zero based channel identifier and
> + the data sheet is a one based channel identifier.
> + reg value to output to LED output number
> + D1 = reg value is 0
> + D2 = reg value is 1
> + D3 = reg value is 2
> + D4 = reg value is 3
> + D5 = reg value is 4
> + D6 = reg value is 5
> + D7 = reg value is 6
> + D8 = reg value is 7
> + D9 = reg value is 8
> +
> + chan-name:
> + $ref: /schemas/types.yaml#definitions/string
> + description: name of channel
> +
> +required:
> + - compatible
> + - reg
> +
> +examples:
> + - |
> + #include <dt-bindings/leds/common.h>
> +
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + led-controller@32 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "ti,lp8501";
> + reg = <0x32>;
> + clock-mode = /bits/ 8 <2>;
> + pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
> +
> + led@0 {
> + reg = <0>;
> + chan-name = "d1";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@1 {
> + reg = <1>;
> + chan-name = "d2";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@2 {
> + reg = <2>;
> + chan-name = "d3";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@3 {
> + reg = <3>;
> + chan-name = "d4";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@4 {
> + reg = <4>;
> + chan-name = "d5";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@5 {
> + reg = <5>;
> + chan-name = "d6";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@6 {
> + reg = <6>;
> + chan-name = "d7";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@7 {
> + reg = <7>;
> + chan-name = "d8";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> +
> + led@8 {
> + reg = <8>;
> + chan-name = "d9";
> + led-cur = /bits/ 8 <0x14>;
> + max-cur = /bits/ 8 <0x20>;
> + };
> + };
> +
> + led-controller@33 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "national,lp5523";
> + reg = <0x33>;
> + clock-mode = /bits/ 8 <0>;
> +
> + multi-led@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> + color = <LED_COLOR_ID_MULTI>;
> + function = LED_FUNCTION_STANDBY;
> + linux,default-trigger = "heartbeat";
> +
> + led@0 {
> + led-cur = /bits/ 8 <50>;
> + max-cur = /bits/ 8 <100>;
> + reg = <0x0>;
> + color = <LED_COLOR_ID_GREEN>;
> + };
> +
> + led@1 {
> + led-cur = /bits/ 8 <50>;
> + max-cur = /bits/ 8 <100>;
> + reg = <0x1>;
> + color = <LED_COLOR_ID_BLUE>;
> + };
> +
> + led@6 {
> + led-cur = /bits/ 8 <50>;
> + max-cur = /bits/ 8 <100>;
> + reg = <0x6>;
> + color = <LED_COLOR_ID_RED>;
> + };
> + };
> + };
> + };
> --
> 2.26.2
>
^ permalink raw reply
* Re: [V7 PATCH] dt-bindings: Added device tree binding for max98390
From: Rob Herring @ 2020-06-04 23:10 UTC (permalink / raw)
To: Steve Lee
Cc: ryan.lee.maxim, lgirdwood, linux-kernel, steves.lee.maxim,
robh+dt, alsa-devel, broonie, ryans.lee, devicetree
In-Reply-To: <20200602084337.22116-1-steves.lee@maximintegrated.com>
On Tue, 02 Jun 2020 17:43:37 +0900, Steve Lee wrote:
> Add DT binding of max98390 amplifier driver.
>
> Signed-off-by: Steve Lee <steves.lee@maximintegrated.com>
> ---
>
> Changed since V6:
> * Re-confirm yaml dt binding check
> * Add minimum and maximum value for each temperature_calib and r0_calib
> * Add maxim prefix for naming.
> Changed since V5:
> * Change txt to yaml and fix up the examples.
> Changed since V4:
> * No changes.
> Changed since V3:
> * No changes.
> Changed since V2:
> * No changes.
> Changed since V1:
> * Modified sample text in example
>
> .../bindings/sound/maxim,max98390.yaml | 51 +++++++++++++++++++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/sound/maxim,max98390.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v3 4/4] dt-bindings: drm: bridge: adi, adv7511.txt: convert to yaml
From: Rob Herring @ 2020-06-04 23:09 UTC (permalink / raw)
To: Ricardo Cañuelo
Cc: marex, kernel, michal.simek, laurent.pinchart, xuwei5, robh+dt,
mcoquelin.stm32, linux-arm-kernel, devicetree
In-Reply-To: <20200601063308.13045-5-ricardo.canuelo@collabora.com>
On Mon, 01 Jun 2020 08:33:08 +0200, Ricardo Cañuelo wrote:
> Convert the ADV7511/11w/13/33/35 DT bindings to json-schema. The
> original binding has been split into two files: adi,adv7511.yaml for
> ADV7511/11W/13 and adi,adv7533.yaml for ADV7533/35.
>
> Signed-off-by: Ricardo Cañuelo <ricardo.canuelo@collabora.com>
> ---
> .../bindings/display/bridge/adi,adv7511.txt | 143 -----------
> .../bindings/display/bridge/adi,adv7511.yaml | 231 ++++++++++++++++++
> .../bindings/display/bridge/adi,adv7533.yaml | 175 +++++++++++++
> 3 files changed, 406 insertions(+), 143 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
> create mode 100644 Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml
> create mode 100644 Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v10 07/20] dt-bindings: mtd: Document boolean NAND ECC properties
From: Rob Herring @ 2020-06-04 23:08 UTC (permalink / raw)
To: Miquel Raynal
Cc: Richard Weinberger, Vignesh Raghavendra, Tudor Ambarus, linux-mtd,
Boris Brezillon, Thomas Petazzoni, linux-arm-kernel, Mason Yang,
Julien Su, Mark Rutland, devicetree
In-Reply-To: <20200603175759.19948-8-miquel.raynal@bootlin.com>
On Wed, Jun 03, 2020 at 07:57:46PM +0200, Miquel Raynal wrote:
> Document nand-use-soft-ecc-engine and nand-no-ecc-engine properties.
> The former is here to force software correction, the latter prevents
> any correction to happen.
>
> These properties (along with nand-ecc-engine) are supposed to be more
> accurate than the current nand-ecc-modes wich is very misleading and
> very often people think it is mandatory while the core should be
> relied upon to decide which correction to handle.
>
> nand-ecc-mode was already inacurate, but it becomes totally
> problematic with setups where there are several hardware engines.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> Documentation/devicetree/bindings/mtd/nand-controller.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index 0969d2e6720b..a3750978ebb8 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -68,6 +68,12 @@ patternProperties:
> 3/ The ECC engine is external, in this case the phandle should
> reference the specific ECC engine node.
>
> + nand-use-soft-ecc-engine: true
> + description: Use a software ECC engine.
Humm, I'm surprised this is valid YAML. nand-use-soft-ecc-engine can't
be both a boolean and a map (aka schema, aka dict).
nand-use-soft-ecc-engine:
type: boolean
description: ...
> +
> + nand-no-ecc-engine: true
> + description: Do not use any ECC correction.
> +
> nand-ecc-placement:
> allOf:
> - $ref: /schemas/types.yaml#/definitions/string
> --
> 2.20.1
>
^ permalink raw reply
* Re: [PATCH v26 04/15] dt: bindings: lp50xx: Introduce the lp50xx family of RGB drivers
From: Rob Herring @ 2020-06-04 22:59 UTC (permalink / raw)
To: Dan Murphy; +Cc: jacek.anaszewski, pavel, devicetree, linux-leds, linux-kernel
In-Reply-To: <20200604120504.32425-5-dmurphy@ti.com>
On Thu, Jun 04, 2020 at 07:04:53AM -0500, Dan Murphy wrote:
> Introduce the bindings for the Texas Instruments LP5036, LP5030, LP5024,
> LP5018, LP5012 and LP5009 RGB LED device driver. The LP5036/30/24/18/12/9
> can control RGB LEDs individually or as part of a control bank group.
> These devices have the ability to adjust the mixing control for the RGB
> LEDs to obtain different colors independent of the overall brightness of
> the LED grouping.
>
> Datasheet:
> http://www.ti.com/lit/ds/symlink/lp5012.pdf
> http://www.ti.com/lit/ds/symlink/lp5024.pdf
> http://www.ti.com/lit/ds/symlink/lp5036.pdf
>
> Acked-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> .../devicetree/bindings/leds/leds-lp50xx.yaml | 136 ++++++++++++++++++
> 1 file changed, 136 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/leds/leds-lp50xx.yaml
>
> diff --git a/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml
> new file mode 100644
> index 000000000000..02fcdc13262f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml
> @@ -0,0 +1,136 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/leds/leds-lp50xx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: LED driver for LP50XX RGB LED from Texas Instruments.
> +
> +maintainers:
> + - Dan Murphy <dmurphy@ti.com>
> +
> +description: |
> + The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into
> + a LED group or control them individually.
> +
> + The difference in these RGB LED drivers is the number of supported RGB
> + modules.
> +
> + For more product information please see the link below:
> + http://www.ti.com/lit/ds/symlink/lp5012.pdf
> + http://www.ti.com/lit/ds/symlink/lp5024.pdf
> + http://www.ti.com/lit/ds/symlink/lp5036.pdf
> +
> +properties:
> + #allOf:
> + #- $ref: "common.yaml#"
> + #- $ref: "leds-class-multicolor.yaml#"
These describe properties in the 'multi-led' nodes, so the $ref goes
there. And you only need the 2nd one because it already references the
1st one (or it should once you fix patch 1).
> +
> + compatible:
> + enum:
> + - ti,lp5009
> + - ti,lp5012
> + - ti,lp5018
> + - ti,lp5024
> + - ti,lp5030
> + - ti,lp5036
> +
> + reg:
> + maxItems: 1
> + description:
> + I2C slave address
> + lp5009/12 - 0x14, 0x15, 0x16, 0x17
> + lp5018/24 - 0x28, 0x29, 0x2a, 0x2b
> + lp5030/36 - 0x30, 0x31, 0x32, 0x33
> +
> + enable-gpios:
> + maxItems: 1
> + description: GPIO pin to enable/disable the device.
> +
> + vled-supply:
> + description: LED supply.
> +
> + child-node:
I guess you didn't understand what I said on this. What you need is:
patternProperties:
'^multi-led@[0-9]$':
type: object
$ref: leds-class-multicolor.yaml#
properties:
...
patternProperties:
'^led@[0-9]$':
type: object
$ref: common.yaml#
Adjust '[0-9]' based on how many possible child addresses there can be.
It's hex if more than 10.
> + properties:
> + ti,led-bank:
> + description:
> + This property denotes the LED module numbers that will be controlled as
> + a single RGB cluster. Each LED module number will be controlled by a
> + single LED class instance.
> + There can only be one instance of the ti,led-bank
> + property for each device node. This is a required node if the LED
> + modules are to be banked.
> + $ref: /schemas/types.yaml#definitions/uint32-array
> +
> +required:
> + - compatible
> + - reg
additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> + #include <dt-bindings/leds/common.h>
> +
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + led-controller@14 {
> + compatible = "ti,lp5009";
> + reg = <0x14>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + enable-gpios = <&gpio1 16>;
> +
> + multi-led@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + color = <LED_COLOR_ID_MULTI>;
> + function = LED_FUNCTION_CHARGING;
> +
> + led@0 {
> + reg = <0>;
> + color = <LED_COLOR_ID_RED>;
> + };
> +
> + led@1 {
> + reg = <1>;
> + color = <LED_COLOR_ID_GREEN>;
> + };
> +
> + led@2 {
> + reg = <2>;
> + color = <LED_COLOR_ID_BLUE>;
> + };
> + };
> +
> + multi-led@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + color = <LED_COLOR_ID_MULTI>;
> + function = LED_FUNCTION_STANDBY;
> + ti,led-bank = <2 3 5>;
I still don't understand why 'reg = <2 3 5>;' with the 1st entry being
the control bank. Is '2' in reg not the same thing as '2' here?
> +
> + led@6 {
> + reg = <0x6>;
> + color = <LED_COLOR_ID_RED>;
> + led-sources = <6 9 15>;
> + };
> +
> + led@7 {
> + reg = <0x7>;
> + color = <LED_COLOR_ID_GREEN>;
> + led-sources = <7 10 16>;
> + };
> +
> + led@8 {
> + reg = <0x8>;
> + color = <LED_COLOR_ID_BLUE>;
> + led-sources = <8 11 17>;
> + };
> + };
> + };
> + };
> --
> 2.26.2
>
^ permalink raw reply
* Re: [Freedreno] [PATCH v7 6/6] arm6: dts: qcom: sm845: Set the compatible string for the GPU SMMU
From: Jordan Crouse @ 2020-06-04 22:47 UTC (permalink / raw)
To: Rob Clark
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-arm-msm, Linux Kernel Mailing List, Rob Herring,
Bjorn Andersson, Andy Gross, freedreno
In-Reply-To: <CAF6AEGssC5ZJKh3oMR6fFRJwZvWLy4YjE2anvq5sDmPB_ikv0Q@mail.gmail.com>
On Thu, Jun 04, 2020 at 03:38:28PM -0700, Rob Clark wrote:
> On Thu, Jun 4, 2020 at 3:02 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
> >
> > On Thu, Jun 04, 2020 at 02:27:21PM -0700, Rob Clark wrote:
> > > On Thu, Jun 4, 2020 at 1:57 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
> > > >
> > > > Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
> > > > split pagetables.
> > > >
> > > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> > > > ---
> > > >
> > > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > > index 8eb5a31346d2..8b15cd74e9ba 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > > @@ -3556,7 +3556,7 @@
> > > > };
> > > >
> > > > adreno_smmu: iommu@5040000 {
> > > > - compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
> > > > + compatible = "qcom,adreno-smmu", "qcom,smmu-v2";
> > >
> > > Should this be something like:
> > >
> > > compatible = "qcom,adreno-smmu", "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
> > >
> > > so that new dtb still works with old kernel?
> >
> > As far as I know qcom,sdm845-smmu-v2 never was actually used unless we were
> > doing the parsing trick somewhere.
>
> I *think* it has a use queued up for v5.8 for the
> select-direct-mapping stuff? I'm not 100% sure of the status of that
> off the top of my head.
That uses the compatible string of the consumer device. I can add
it back in but I didn't think we needed to complicate the bindings any more if
we didn't have to.
Jordan
> BR,
> -R
>
> > Jordan
> >
> > > > reg = <0 0x5040000 0 0x10000>;
> > > > #iommu-cells = <1>;
> > > > #global-interrupts = <2>;
> > > > --
> > > > 2.17.1
> > > >
> > > > _______________________________________________
> > > > Freedreno mailing list
> > > > Freedreno@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/freedreno
> > > _______________________________________________
> > > Freedreno mailing list
> > > Freedreno@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/freedreno
> >
> > --
> > The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> > a Linux Foundation Collaborative Project
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* Re: [PATCH v26 01/15] dt: bindings: Add multicolor class dt bindings documention
From: Rob Herring @ 2020-06-04 22:40 UTC (permalink / raw)
To: Dan Murphy; +Cc: jacek.anaszewski, pavel, devicetree, linux-leds, linux-kernel
In-Reply-To: <20200604120504.32425-2-dmurphy@ti.com>
On Thu, Jun 04, 2020 at 07:04:50AM -0500, Dan Murphy wrote:
> Add DT bindings for the LEDs multicolor class framework.
> Add multicolor ID to the color ID list for device tree bindings.
>
> CC: Rob Herring <robh@kernel.org>
> Acked-by: Pavel Machek <pavel@ucw.cz>
> Acked-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
> Signed-off-by: Dan Murphy <dmurphy@ti.com>
> ---
> .../bindings/leds/leds-class-multicolor.yaml | 39 +++++++++++++++++++
> include/dt-bindings/leds/common.h | 3 +-
> 2 files changed, 41 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml
>
> diff --git a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml
> new file mode 100644
> index 000000000000..6cab2a1405e1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml
> @@ -0,0 +1,39 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/leds/leds-class-multicolor.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Common properties for the multicolor LED class.
> +
> +maintainers:
> + - Dan Murphy <dmurphy@ti.com>
> +
> +description: |
> + Bindings for multi color LEDs show how to describe current outputs of
> + either integrated multi-color LED elements (like RGB, RGBW, RGBWA-UV
> + etc.) or standalone LEDs, to achieve logically grouped multi-color LED
> + modules. This is achieved by adding multi-led nodes layer to the
> + monochrome LED bindings.
> + The nodes and properties defined in this document are unique to the multicolor
> + LED class. Common LED nodes and properties are inherited from the common.txt
> + within this documentation directory.
> +
> +patternProperties:
> + "^multi-led@([0-9a-f])$":
> + type: object
> + description: Represents the LEDs that are to be grouped.
> + properties:
> + #allOf:
> + #- $ref: "common.yaml#"
Why is this commented out? Other than it is wrong. Uncommented, this
would be defining a DT property called 'allOf'.
You can drop 'allOf' now. '$ref' should be at the level of 'properties'.
> +
> + color:
> + $ref: /schemas/types.yaml#definitions/uint32
common.yaml already defines the type, so drop this.
> + const: 8 # LED_COLOR_ID_MULTI
> + description: |
> + For multicolor LED support this property should be defined as
> + LED_COLOR_ID_MULTI which can be found in include/linux/leds/common.h.
> +
> + required:
> + - color
> +...
> diff --git a/include/dt-bindings/leds/common.h b/include/dt-bindings/leds/common.h
> index 0ce7dfc00dcb..a463ce6a8794 100644
> --- a/include/dt-bindings/leds/common.h
> +++ b/include/dt-bindings/leds/common.h
> @@ -30,7 +30,8 @@
> #define LED_COLOR_ID_VIOLET 5
> #define LED_COLOR_ID_YELLOW 6
> #define LED_COLOR_ID_IR 7
> -#define LED_COLOR_ID_MAX 8
> +#define LED_COLOR_ID_MULTI 8
> +#define LED_COLOR_ID_MAX 9
>
> /* Standard LED functions */
> /* Keyboard LEDs, usually it would be input4::capslock etc. */
> --
> 2.26.2
>
^ permalink raw reply
* Re: [Freedreno] [PATCH v7 6/6] arm6: dts: qcom: sm845: Set the compatible string for the GPU SMMU
From: Rob Clark @ 2020-06-04 22:38 UTC (permalink / raw)
To: Rob Clark,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-arm-msm, Linux Kernel Mailing List, Rob Herring,
Bjorn Andersson, Andy Gross, freedreno
In-Reply-To: <20200604220216.GA12322@jcrouse1-lnx.qualcomm.com>
On Thu, Jun 4, 2020 at 3:02 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> On Thu, Jun 04, 2020 at 02:27:21PM -0700, Rob Clark wrote:
> > On Thu, Jun 4, 2020 at 1:57 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
> > >
> > > Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
> > > split pagetables.
> > >
> > > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> > > ---
> > >
> > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > index 8eb5a31346d2..8b15cd74e9ba 100644
> > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > > @@ -3556,7 +3556,7 @@
> > > };
> > >
> > > adreno_smmu: iommu@5040000 {
> > > - compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
> > > + compatible = "qcom,adreno-smmu", "qcom,smmu-v2";
> >
> > Should this be something like:
> >
> > compatible = "qcom,adreno-smmu", "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
> >
> > so that new dtb still works with old kernel?
>
> As far as I know qcom,sdm845-smmu-v2 never was actually used unless we were
> doing the parsing trick somewhere.
I *think* it has a use queued up for v5.8 for the
select-direct-mapping stuff? I'm not 100% sure of the status of that
off the top of my head.
BR,
-R
> Jordan
>
> > > reg = <0 0x5040000 0 0x10000>;
> > > #iommu-cells = <1>;
> > > #global-interrupts = <2>;
> > > --
> > > 2.17.1
> > >
> > > _______________________________________________
> > > Freedreno mailing list
> > > Freedreno@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/freedreno
> > _______________________________________________
> > Freedreno mailing list
> > Freedreno@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/freedreno
>
> --
> The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
^ permalink raw reply
* Re: [PATCH v25 01/16] dt: bindings: Add multicolor class dt bindings documention
From: Rob Herring @ 2020-06-04 22:35 UTC (permalink / raw)
To: Pavel Machek
Cc: Dan Murphy, Jacek Anaszewski, devicetree, Linux LED Subsystem,
linux-kernel@vger.kernel.org
In-Reply-To: <20200604125111.GA7222@duo.ucw.cz>
On Thu, Jun 4, 2020 at 6:51 AM Pavel Machek <pavel@ucw.cz> wrote:
>
> On Tue 2020-06-02 15:44:32, Rob Herring wrote:
> > On Tue, Jun 2, 2020 at 2:04 PM Pavel Machek <pavel@ucw.cz> wrote:
> > >
> > > On Wed 2020-05-27 08:35:06, Rob Herring wrote:
> > > > On Wed, May 27, 2020 at 7:39 AM Pavel Machek <pavel@ucw.cz> wrote:
> > > > >
> > > > > Hi!
> > > > >
> > > > > Thanks for reviews!
> > > > >
> > > > > > > +additionalProperties: false
> > > > > > > +...
> > > > > > > diff --git a/drivers/leds/led-core.c b/drivers/leds/led-core.c
> > > > > >
> > > > > > This isn't a binding file. Belongs in another patch.
> > > > >
> > > > > These constants are directly related to the binding. It makes sense to
> > > > > go in one patch...
> > > >
> > > > Yes, the header does go in this patch, but kernel subsystem files do not.
> > > >
> > > > Part of the reason for separating is we generate a DT only repository
> > > > which filters out all the kernel code. Ideally this is just filtering
> > > > out commits and the commit messages still make sens
> > >
> > > Well, but the patch can't be split like that. Otherwise we risk null
> > > pointer dereferences when one part is applied but not the second one.
> >
> > There's no risk because you are supposed to apply both patches. I
> > don't apply binding patches that are a part of a series like this.
>
> Yes, this is always guaranteed to happen, because "git bisect"
> understand patch series. Oh, wait.
What!? If the binding patch with the header comes first, how would
bisect build the driver change without the header?
> Patches are supposed to be correct on their own. If your repository
> filtering can not handle that, you need to fix that...
I'm just asking you to follow the process that *everyone* else is
following and works. It's not really about the repository filtering.
That doesn't care. A binding ABI is defined by the schema and any
defines it has. That is the logical unit that stands on its own.
Rob
^ permalink raw reply
* Re: [PATCH v12 1/2] dt-bindings: drm/bridge: anx7625: MIPI to DP transmitter DT schema
From: Rob Herring @ 2020-06-04 22:24 UTC (permalink / raw)
To: Xin Ji
Cc: Neil Armstrong, Pi-Hsun Shih, Jonas Karlman, devel, linux-kernel,
devicetree, Nicolas Boichat, dri-devel, Laurent Pinchart,
Dan Carpenter, Hsin-Yi Wang, Sheng Pan, Andrzej Hajda,
Sam Ravnborg, Nicolas Boichat, Daniel Vetter, Jernej Skrabec,
David Airlie
In-Reply-To: <eb82c52574bf41b5edad488e14c27cabad39b922.1591253353.git.xji@analogixsemi.com>
On Thu, 04 Jun 2020 15:56:36 +0800, Xin Ji wrote:
> anx7625: MIPI to DP transmitter DT schema
>
> Signed-off-by: Xin Ji <xji@analogixsemi.com>
> ---
> .../bindings/display/bridge/analogix,anx7625.yaml | 95 ++++++++++++++++++++++
> 1 file changed, 95 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
^ permalink raw reply
* Re: [PATCH v3 10/10] net: eth: altera: update devicetree bindings documentation
From: Rob Herring @ 2020-06-04 22:23 UTC (permalink / raw)
To: Ooi, Joyce
Cc: David S . Miller, Jakub Kicinski, Thor Thayer, netdev,
Rob Herring, See Chin Liang, linux-kernel, Dinh Nguyen,
Dalon Westergreen, devicetree, Dalon Westergreen, Tan Ley Foon
In-Reply-To: <20200604073256.25702-11-joyce.ooi@intel.com>
On Thu, 04 Jun 2020 15:32:56 +0800, Ooi, Joyce wrote:
> From: Dalon Westergreen <dalon.westergreen@intel.com>
>
> Update devicetree bindings documentation to include msgdma
> prefetcher and ptp bindings.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
> Signed-off-by: Joyce Ooi <joyce.ooi@intel.com>
> ---
> v2: no change
> v3: no change
> ---
> .../devicetree/bindings/net/altera_tse.txt | 103 +++++++++++++++++----
> 1 file changed, 84 insertions(+), 19 deletions(-)
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
^ permalink raw reply
* [GIT PULL] Devicetree updates for v5.8
From: Rob Herring @ 2020-06-04 22:04 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linux-kernel, devicetree, Frank Rowand
Hi Linus,
Please pull DT updates for v5.8.
There's a couple of conflicts with your tree. renesas,wdt.txt can just
be deleted, my tree already has the necessary changes. For
qcom,ipa.yaml, take 'reg' property from my tree and 'iommus' from
yours(net). linux-next has the correct resolutions. Note that there's a
couple of other similar conflicts you can expect in linux-next.
Rob
The following changes since commit 4bc77b2d211e107fa54b1f39cd0d7dac5537b8cb:
dt-bindings: phy: qcom-qusb2: Fix defaults (2020-04-24 17:53:57 -0500)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git tags/devicetree-for-5.8
for you to fetch changes up to 8211d1e83aded34631aa87fa37f97d7bb712e925:
dt-bindings: clock: Add documentation for X1830 bindings. (2020-06-03 15:59:40 -0600)
----------------------------------------------------------------
Devicetree updates for v5.8:
- Convert various DT (non-binding) doc files to ReST
- Various improvements to device link code
- Fix __of_attach_node_sysfs refcounting bug
- Add support for 'memory-region-names' with reserved-memory binding
- Vendor prefixes for Protonic Holland, BeagleBoard.org, Alps, Check
Point, Würth Elektronik, U-Boot, Vaisala, Baikal Electronics, Shanghai
Awinic Technology Co., MikroTik, Silex Insight
- A bunch more binding conversions to DT schema. Only 3K to go.
- Add a minimum version check for schema tools
- Treewide dropping of 'allOf' usage with schema references. Not needed
in new json-schema spec.
- Some formatting clean-ups of schemas
----------------------------------------------------------------
Akash Asthana (3):
dt-bindings: geni-se: Convert QUP geni-se bindings to YAML
dt-bindings: geni-se: Add interconnect binding for GENI QUP
dt-bindings: serial: Add binding for UART pin swap
Alain Volmat (1):
dt-bindings: i2c: i2c-stm32f7: add st,stm32mp15-i2c compatible
Andre Przywara (11):
dt-bindings: clock: Convert Calxeda clock bindings to json-schema
dt-bindings: sata: Convert Calxeda SATA controller to json-schema
dt-bindings: net: Convert Calxeda Ethernet binding to json-schema
dt-bindings: phy: Convert Calxeda ComboPHY binding to json-schema
dt-bindings: arm: Convert Calxeda L2 cache controller to json-schema
dt-bindings: memory-controllers: Convert Calxeda DDR to json-schema
dt-bindings: ipmi: Convert IPMI-SMIC bindings to json-schema
dt-bindings: arm: Add Calxeda system registers json-schema binding
dt-bindings: arm: gic: Allow combining arm,gic-400 compatible strings
dt-bindings: mali-midgard: Allow dma-coherent
dt-bindings: ehci/ohci: Allow iommus property
Anson Huang (37):
dt-bindings: thermal: Convert i.MX8MM to json-schema
dt-bindings: gpio: Convert i.MX to json-schema
dt-bindings: nvmem: Convert i.MX OCOTP to json-schema
dt-bindings: nvmem: Convert i.MX IIM to json-schema
dt-bindings: nvmem: Convert MXS OCOTP to json-schema
dt-bindings: watchdog: Convert i.MX to json-schema
dt-bindings: watchdog: Convert i.MX7ULP to json-schema
dt-bindings: clock: Convert i.MX6Q clock to json-schema
dt-bindings: clock: Convert i.MX6SX clock to json-schema
dt-bindings: clock: Convert i.MX6SL clock to json-schema
dt-bindings: clock: Convert i.MX6SLL clock to json-schema
dt-bindings: clock: Convert i.MX6UL clock to json-schema
dt-bindings: rtc: Convert MXC RTC to json-schema
dt-bindings: rtc: Convert MXC RTC V2 to json-schema
dt-bindings: pwm: Convert imx pwm to json-schema
dt-bindings: pwm: Convert imx tpm pwm to json-schema
dt-bindings: pwm: Convert mxs pwm to json-schema
dt-bindings: interrupt-controller: Convert imx irqsteer to json-schema
dt-bindings: clock: Convert i.MX7D clock to json-schema
dt-bindings: timer: Convert i.MX TPM to json-schema
dt-bindings: timer: Convert i.MX SYSCTR to json-schema
dt-bindings: gpio: Convert mxs to json-schema
dt-bindings: thermal: Convert i.MX to json-schema
dt-bindings: clock: Convert i.MX5 clock to json-schema
dt-bindings: clock: Convert i.MX35 clock to json-schema
dt-bindings: clock: Convert i.MX31 clock to json-schema
dt-bindings: clock: Convert i.MX28 clock to json-schema
dt-bindings: clock: Convert i.MX23 clock to json-schema
dt-bindings: clock: Convert i.MX27 clock to json-schema
dt-bindings: clock: Convert i.MX25 clock to json-schema
dt-bindings: clock: Convert i.MX21 clock to json-schema
dt-bindings: clock: Convert i.MX1 clock to json-schema
dt-bindings: timer: Convert i.MX GPT to json-schema
dt-bindings: clock: Convert i.MX8QXP LPCG to json-schema
dt-bindings: power: Convert imx gpc to json-schema
dt-bindings: power: Convert imx gpcv2 to json-schema
dt-bindings: mailbox: Convert imx mu to json-schema
Charles Keepax (12):
hwmon: lochnagar: Move binding over to dtschema
ASoC: lochnagar: Move binding over to dtschema
pinctrl: lochnagar: Move binding over to dtschema
clk: lochnagar: Move binding over to dtschema
mfd: lochnagar: Move binding over to dtschema
regulator: arizona-regulator: Move binding over to dtschema
extcon: arizona: Move binding over to dtschema
ASoC: arizona: Move binding over to dtschema
mfd: arizona: Move binding over to dtschema
ASoC: madera: Move binding over to dtschema
pinctrl: madera: Move binding over to dtschema
mfd: madera: Move binding over to dtschema
Christophe Roullier (2):
dt-bindings: net: dwmac: increase 'maxItems' for 'clocks', 'clock-names' properties
dt-bindings: net: dwmac: Convert stm32 dwmac to DT schema
Dan Carpenter (1):
of: Fix a refcounting bug in __of_attach_node_sysfs()
Ding Xiang (1):
of: of_detach_node() remove unneeded local return variable
Drew Fustini (1):
dt-bindings: Add vendor prefix for BeagleBoard.org
Etienne Carriere (1):
dt-bindings: nvmem: stm32: new property for data access
Frank Rowand (1):
of: Documentation: change overlay example to use current syntax
Geert Uytterhoeven (16):
dt-bindings: usb: generic-ehci: Document power-domains property
dt-bindings: usb: generic-ohci: Document power-domains property
dt-bindings: gpio: rcar: Convert to json-schema
dt-bindings: watchdog: renesas-wdt: Convert to json-schema
dt-bindings: timer: renesas: ostm: Convert to json-schema
dt-bindings: eeprom: at24: Fix list of page sizes for writing
dt-bindings: auxdisplay: hd44780: Convert to json-schema
dt-bindings: serial: renesas,scifa: Remove part numbers from comments
dt-bindings: media: Add missing clock domain description
dt-bindings: rtc: rtc-sh: Add missing power-domains property
ASoC: fsi: Add missing properties to DT bindings
dt-bindings: interrupt-controller: arm,gic: Document resets property
dt-bindings: memory-controllers: renesas,dbsc: Convert to json-schema
dt-bindings: serial: Add renesas,em-uart bindings
dt-bindings: timer: renesas: mtu2: Convert to json-schema
dt-bindings: timer: renesas: cmt: Convert to json-schema
Johan Jonker (4):
dt-bindings: sram: convert rockchip-pmu-sram bindings to yaml
dt-bindings: gpu: add power-domains #cooling-cells to arm,mali-bifrost.yaml
dt-bindings: usb: dwc2: add power-domains property
dt-bindings: input: touchscreen: edt-ft5x06: change reg property
Jonathan Albrieux (1):
dt-bindings: iio: imu: bmi160: convert format to yaml, add maintainer
Jonathan McDowell (1):
dt-bindings: vendor-prefixes: Add MikroTik
Joseph Lo (1):
dt-bindings: memory: tegra: Add external memory controller binding for Tegra210
Kangmin Park (1):
docs/devicetree/i2c: brcm,bcm2835: fix node id in example
Krzysztof Kozlowski (1):
dt-bindings: memory-controllers: exynos-srom: Remove unneeded type for reg-io-width
Kunihiko Hayashi (5):
dt-bindings: phy: Convert UniPhier PCIe-PHY controller to json-schema
dt-bindings: phy: Convert UniPhier USB2-PHY controller to json-schema
dt-bindings: phy: Convert UniPhier USB3-PHY conroller to json-schema
dt-bindings: thermal: Convert UniPhier thermal monitor to json-schema
dt-bindings: watchdog: Convert UniPhier watchdog timer to json-schema
Lad Prabhakar (19):
dt-bindings: sh_eth: Sort compatible string in increasing number of the SoC
dt-bindings: irqchip: renesas-irqc: Document r8a7742 bindings
dt-bindings: serial: renesas,scif: Document r8a7742 bindings
dt-bindings: serial: renesas,scifb: Document r8a7742 bindings
dt-bindings: serial: renesas,hscif: Document r8a7742 bindings
dt-bindings: watchdog: renesas,wdt: Document r8a7742 support
dt-bindings: serial: renesas,scifa: Document r8a7742 bindings
dt-bindings: i2c: renesas, i2c: Document r8a7742 support
dt-bindings: i2c: renesas, iic: Document r8a7742 support
dt-bindings: ata: renesas,rcar-sata: Add r8a7742 support
dt-bindings: net: renesas, ravb: Add support for r8a7742 SoC
dt-bindings: net: renesas,ether: Document R8A7742 SoC
dt-bindings: power: renesas,apmu: Document r8a7742 support
dt-bindings: gpio: renesas, rcar-gpio: Add r8a7742 (RZ/G1H) support
dt-bindings: phy: rcar-gen2: Add r8a7742 support
dt-bindings: PCI: pci-rcar-gen2: Add device tree support for r8a7742
dt-bindings: usb: renesas,usbhs: Add support for r8a7742
dt-bindings: usb: usb-xhci: Document r8a7742 support
dt-bindings: thermal: rcar-thermal: Add device tree support for r8a7742
Lubomir Rintel (5):
dt-bindings: serial: Move Marvell compatible string to 8250 binding doc
dt-bindings: serial: Convert 8250 to json-schema
dt-bindings: media: Convert marvell,mmp2-ccic to json-schema
dt-bindings: spi: Convert spi-pxa2xx to json-schema
dt-bindings: usb: Convert ehci-mv to json-schema
Martin Blumenstingl (1):
dt-bindings: gpu: mali-utgard: Add the #cooling-cells property
Masahiro Yamada (1):
dt-bindings: at24: add microchip, 24lc[0-9]+ to the compatible pattern
Matthias Brugger (1):
dt-bindings: dma: uart: mtk: fix example
Mauro Carvalho Chehab (10):
docs: dt: add an index.rst file for devicetree
docs: dt: convert usage-model.txt to ReST
docs: dt: usage_model.rst: fix link for DT usage
docs: dt: convert changesets to ReST
docs: dt: convert dynamic-resolution-notes.txt to ReST
docs: dt: convert of_unittest.txt to ReST
docs: dt: convert overlay-notes.txt to ReST format
docs: dt: convert ABI.txt to ReST format
docs: dt: convert submitting-patches.txt to ReST format
docs: dt: convert writing-bindings.txt to ReST
Michal Simek (1):
dt-bindings: vendor-prefixes: Add U-Boot bootloader prefix
Neil Armstrong (1):
dt-bindings: sram: Add Amlogic SCP SRAM compatibles
Nick Reitemeyer (1):
dt-bindings: vendor-prefixes: Add Alps
Nicolas Saenz Julienne (2):
of: property: Fix create device links for all child-supplier dependencies
of: property: Do not link to disabled devices
Nikita Travkin (1):
dt-bindings: vendor-prefixes: Add Shanghai Awinic Technology Co., Ltd.
Niklas Söderlund (1):
dt-bindings: thermal: rcar-gen3-thermal: Convert bindings to json-schema
Nobuhiro Iwamatsu (3):
dt-bindings: i2c: cadence: Migrate i2c-cadence documentation to YAML
dt-bindings: i2c: xiic: Migrate i2c-xiic documentation to YAML
dt-bindings: timer: cadence_ttc: Migrate timer-cadence-ttc documentation to YAML
Oleksij Rempel (2):
dt-bindings: vendor-prefixes: Add an entry for Protonic Holland
dt-bindings: serial: qca,ar9330-uart: Convert to json-schema
Olivier Sobrie (1):
dt-bindings: vendor-prefixes: Add Silex Insight vendor prefix
Paul Cercueil (11):
dt-bindings: timer: Convert ingenic,tcu.txt to YAML
dt-bindings: mmc: Convert jz4740-mmc doc to YAML
dt-bindings: dma: Convert jz4740-dma doc to YAML
dt-bindings: usb: ingenic,musb: Add usb-role-switch property
dt-bindings: MIPS: Require SoC compatible string after board string
dt-bindings: clock: Convert ingenic,cgu.txt to YAML
dt-bindings: intc: Convert ingenic,intc.txt to YAML
dt-bindings: i2c: Convert i2c-jz4780.txt to YAML
dt-bindings: serial: Convert ingenic,uart.txt to YAML
dt-bindings: memory: Convert ingenic,jz4780-nemc.txt to YAML
dt-bindings: mtd: Convert ingenic,jz4780-nand.txt to YAML
Pawel Dembicki (1):
dt-bindings: vendor-prefixes: Add Check Point
Peng Fan (1):
dt-bindings: mailbox: imx-mu: correct example
Qi Zheng (2):
dt/platform: Fix comment in of_dev_lookup()
of/fdt: Remove redundant kbasename function call
Ricardo Cañuelo (2):
dt-bindings: nvmem: Convert rockchip-efuse bindings to yaml
dt-bindings: display: anx7814.txt: convert to yaml
Rob Herring (12):
dt-bindings: input: Convert gpio-keys bindings to schema
dt-bindings: Clean-up schema indentation formatting
Merge branch 'dt/linus' into dt/next
dt-bindings: iio: adi,ltc2983: Add missing quotes on dependencies
Merge branch 'dt/linus' into 'dt/next'
dt-bindings: Add a minimum version check for dtschema
dt-bindings: Remove cases of 'allOf' containing a '$ref'
spi: dt-bindings: sifive: Add missing 2nd register region
dt-bindings: usb: ehci: Add missing 2nd register region
dt-bindings: ufs: ti: Fix address properties handling
dt-bindings: ufs: ti: Add missing 'additionalProperties: false'
dt-bindings: Fix incorrect 'reg' property sizes
Samuel Holland (1):
dt-bindings: timer: Document allwinner,erratum-unknown1 property
Sandeep Maheswaram (3):
dt-bindings: usb: qcom,dwc3: Convert USB DWC3 bindings
dt-bindings: usb: qcom,dwc3: Add compatible for SC7180
dt-bindings: usb: qcom,dwc3: Introduce interconnect properties for Qualcomm DWC3 driver
Saravana Kannan (2):
of: property: Add device link support for extcon
of: property: Don't retry device_link_add() upon failure
Saravanan Sekar (1):
dt-bindings: Add an entry for Würth Elektronik, we
Serge Semin (1):
dt-bindings: Add vendor prefix for Baikal Electronics, JSC
Thierry Reding (2):
dt-bindings: reserved-memory: Introduce memory-region-names
dt-bindings: Merge gpio-usb-b-connector with usb-connector
Vesa Jääskeläinen (1):
dt-bindings: vendor-prefixes: Add Vaisala
Yoshihiro Kaneko (1):
dt-bindings: irqchip: renesas-intc-irqpin: Convert to json-schema
Yoshihiro Shimoda (1):
dt-bindings: iommu: renesas,ipmmu-vmsa: convert to json-schema
chenqiwu (1):
drivers/of: keep description of function consistent with function name
tangjianqiang (1):
of: fix the warnings from command line.
周琰杰 (Zhou Yanjie) (1):
dt-bindings: clock: Add documentation for X1830 bindings.
Documentation/arm/microchip.rst | 2 +-
.../devicetree/bindings/{ABI.txt => ABI.rst} | 5 +-
Documentation/devicetree/bindings/Makefile | 14 +-
Documentation/devicetree/bindings/arm/altera.yaml | 6 +-
Documentation/devicetree/bindings/arm/amlogic.yaml | 2 +-
.../arm/amlogic/amlogic,meson-gx-ao-secure.yaml | 2 +-
.../devicetree/bindings/arm/arm,vexpress-juno.yaml | 34 +-
Documentation/devicetree/bindings/arm/bitmain.yaml | 2 +-
.../devicetree/bindings/arm/calxeda/hb-sregs.yaml | 49 +++
.../devicetree/bindings/arm/calxeda/l2ecc.txt | 15 -
.../devicetree/bindings/arm/calxeda/l2ecc.yaml | 42 +++
.../devicetree/bindings/arm/coresight-cti.yaml | 20 +-
Documentation/devicetree/bindings/arm/cpus.yaml | 85 +++--
Documentation/devicetree/bindings/arm/l2c2x0.yaml | 87 +++--
.../devicetree/bindings/arm/nxp/lpc32xx.yaml | 9 +-
Documentation/devicetree/bindings/arm/psci.yaml | 16 +-
.../devicetree/bindings/arm/renesas,prr.yaml | 2 +-
.../bindings/arm/samsung/exynos-chipid.yaml | 5 +-
.../bindings/arm/socionext/uniphier.yaml | 26 +-
.../devicetree/bindings/arm/stm32/st,mlahb.yaml | 2 +-
.../bindings/arm/stm32/st,stm32-syscon.yaml | 6 +-
Documentation/devicetree/bindings/arm/syna.txt | 2 +-
.../bindings/arm/tegra/nvidia,tegra20-pmc.yaml | 2 +-
.../devicetree/bindings/ata/faraday,ftide010.yaml | 4 +-
.../devicetree/bindings/ata/renesas,rcar-sata.yaml | 1 +
.../devicetree/bindings/ata/sata_highbank.txt | 44 ---
.../devicetree/bindings/ata/sata_highbank.yaml | 95 ++++++
.../devicetree/bindings/auxdisplay/hit,hd44780.txt | 45 ---
.../bindings/auxdisplay/hit,hd44780.yaml | 96 ++++++
.../bindings/bus/allwinner,sun50i-a64-de2.yaml | 5 +-
.../bindings/bus/allwinner,sun8i-a23-rsb.yaml | 4 +-
.../clock/allwinner,sun4i-a10-gates-clk.yaml | 8 +-
.../bindings/clock/bitmain,bm1880-clk.yaml | 2 +-
.../devicetree/bindings/clock/calxeda.txt | 17 -
.../devicetree/bindings/clock/calxeda.yaml | 82 +++++
.../devicetree/bindings/clock/cirrus,lochnagar.txt | 94 ------
.../bindings/clock/cirrus,lochnagar.yaml | 78 +++++
.../bindings/clock/fixed-factor-clock.yaml | 5 +-
.../devicetree/bindings/clock/fsl,plldig.yaml | 19 +-
.../devicetree/bindings/clock/imx1-clock.txt | 26 --
.../devicetree/bindings/clock/imx1-clock.yaml | 51 +++
.../devicetree/bindings/clock/imx21-clock.txt | 27 --
.../devicetree/bindings/clock/imx21-clock.yaml | 51 +++
.../devicetree/bindings/clock/imx23-clock.txt | 70 ----
.../devicetree/bindings/clock/imx23-clock.yaml | 92 ++++++
.../devicetree/bindings/clock/imx25-clock.txt | 160 ----------
.../devicetree/bindings/clock/imx25-clock.yaml | 186 +++++++++++
.../devicetree/bindings/clock/imx27-clock.txt | 27 --
.../devicetree/bindings/clock/imx27-clock.yaml | 55 ++++
.../devicetree/bindings/clock/imx28-clock.txt | 93 ------
.../devicetree/bindings/clock/imx28-clock.yaml | 115 +++++++
.../devicetree/bindings/clock/imx31-clock.txt | 90 ------
.../devicetree/bindings/clock/imx31-clock.yaml | 120 +++++++
.../devicetree/bindings/clock/imx35-clock.txt | 114 -------
.../devicetree/bindings/clock/imx35-clock.yaml | 139 ++++++++
.../devicetree/bindings/clock/imx5-clock.txt | 28 --
.../devicetree/bindings/clock/imx5-clock.yaml | 65 ++++
.../devicetree/bindings/clock/imx6q-clock.txt | 41 ---
.../devicetree/bindings/clock/imx6q-clock.yaml | 72 +++++
.../devicetree/bindings/clock/imx6sl-clock.txt | 10 -
.../devicetree/bindings/clock/imx6sl-clock.yaml | 48 +++
.../devicetree/bindings/clock/imx6sll-clock.txt | 36 ---
.../devicetree/bindings/clock/imx6sll-clock.yaml | 66 ++++
.../devicetree/bindings/clock/imx6sx-clock.txt | 13 -
.../devicetree/bindings/clock/imx6sx-clock.yaml | 70 ++++
.../devicetree/bindings/clock/imx6ul-clock.txt | 13 -
.../devicetree/bindings/clock/imx6ul-clock.yaml | 66 ++++
.../devicetree/bindings/clock/imx7d-clock.txt | 13 -
.../devicetree/bindings/clock/imx7d-clock.yaml | 65 ++++
.../devicetree/bindings/clock/imx8qxp-lpcg.txt | 51 ---
.../devicetree/bindings/clock/imx8qxp-lpcg.yaml | 73 +++++
.../devicetree/bindings/clock/ingenic,cgu.txt | 57 ----
.../devicetree/bindings/clock/ingenic,cgu.yaml | 124 ++++++++
.../devicetree/bindings/clock/qcom,gcc-sc7180.yaml | 2 +-
.../devicetree/bindings/clock/qcom,gcc-sm8150.yaml | 2 +-
.../devicetree/bindings/clock/qcom,gcc-sm8250.yaml | 2 +-
.../devicetree/bindings/clock/qcom,mmcc.yaml | 16 +-
.../bindings/clock/qcom,sc7180-dispcc.yaml | 2 +-
.../bindings/clock/qcom,sc7180-gpucc.yaml | 2 +-
.../devicetree/bindings/clock/qcom,sc7180-mss.yaml | 2 +-
.../bindings/clock/qcom,sc7180-videocc.yaml | 2 +-
.../bindings/clock/qcom,sdm845-dispcc.yaml | 2 +-
.../bindings/clock/qcom,sdm845-gpucc.yaml | 2 +-
.../bindings/clock/qcom,sdm845-videocc.yaml | 2 +-
.../bindings/clock/sprd,sc9863a-clk.yaml | 29 +-
.../bindings/connector/usb-connector.yaml | 73 +++--
.../crypto/allwinner,sun4i-a10-crypto.yaml | 14 +-
.../bindings/crypto/allwinner,sun8i-ce.yaml | 16 +-
.../bindings/crypto/amlogic,gxl-crypto.yaml | 4 +-
.../devicetree/bindings/crypto/st,stm32-hash.yaml | 9 +-
.../allwinner,sun4i-a10-display-engine.yaml | 7 +-
.../bindings/display/allwinner,sun4i-a10-hdmi.yaml | 40 +--
.../bindings/display/allwinner,sun4i-a10-tcon.yaml | 63 ++--
.../display/allwinner,sun6i-a31-mipi-dsi.yaml | 28 +-
.../display/allwinner,sun8i-a83t-dw-hdmi.yaml | 10 +-
.../bindings/display/bridge/analogix,anx7814.yaml | 119 +++++++
.../devicetree/bindings/display/bridge/anx7814.txt | 42 ---
.../bindings/display/bridge/lvds-codec.yaml | 18 +-
.../bindings/display/panel/panel-common.yaml | 11 +-
.../bindings/display/panel/panel-timing.yaml | 120 ++++---
.../bindings/display/panel/sony,acx424akp.yaml | 2 +-
.../bindings/display/panel/xinpeng,xpp055c272.yaml | 4 +-
.../devicetree/bindings/display/renesas,cmm.yaml | 18 +-
.../bindings/display/ti/ti,am65x-dss.yaml | 19 +-
.../bindings/display/ti/ti,j721e-dss.yaml | 34 +-
.../devicetree/bindings/dma/dma-common.yaml | 3 +-
.../devicetree/bindings/dma/ingenic,dma.yaml | 80 +++++
.../devicetree/bindings/dma/jz4780-dma.txt | 64 ----
.../devicetree/bindings/dma/mtk-uart-apdma.txt | 3 +-
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 2 +-
.../devicetree/bindings/dma/ti/k3-udma.yaml | 29 +-
Documentation/devicetree/bindings/eeprom/at24.yaml | 13 +-
.../devicetree/bindings/example-schema.yaml | 17 +-
.../devicetree/bindings/extcon/extcon-arizona.txt | 76 -----
.../bindings/extcon/extcon-usbc-cros-ec.yaml | 3 +-
.../devicetree/bindings/extcon/wlf,arizona.yaml | 125 ++++++++
.../bindings/gpio/brcm,xgs-iproc-gpio.yaml | 2 +-
.../devicetree/bindings/gpio/fsl-imx-gpio.txt | 35 --
.../devicetree/bindings/gpio/fsl-imx-gpio.yaml | 68 ++++
.../devicetree/bindings/gpio/gpio-mxs.txt | 88 ------
.../devicetree/bindings/gpio/gpio-mxs.yaml | 136 ++++++++
.../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 94 ------
.../bindings/gpio/renesas,rcar-gpio.yaml | 144 +++++++++
.../devicetree/bindings/gpio/sifive,gpio.yaml | 2 +-
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 6 +
.../devicetree/bindings/gpu/arm,mali-midgard.yaml | 20 +-
.../devicetree/bindings/gpu/arm,mali-utgard.yaml | 4 +
.../devicetree/bindings/gpu/vivante,gc.yaml | 2 +-
.../bindings/hwmon/adi,axi-fan-control.yaml | 3 +-
.../devicetree/bindings/hwmon/adi,ltc2947.yaml | 32 +-
.../devicetree/bindings/hwmon/adt7475.yaml | 18 +-
.../devicetree/bindings/hwmon/cirrus,lochnagar.txt | 26 --
.../bindings/hwmon/cirrus,lochnagar.yaml | 35 ++
.../devicetree/bindings/hwmon/ti,tmp513.yaml | 21 +-
.../devicetree/bindings/i2c/brcm,bcm2835-i2c.txt | 2 +-
.../devicetree/bindings/i2c/cdns,i2c-r1p10.yaml | 58 ++++
.../devicetree/bindings/i2c/i2c-cadence.txt | 28 --
.../devicetree/bindings/i2c/i2c-jz4780.txt | 33 --
.../devicetree/bindings/i2c/i2c-rk3x.yaml | 10 +-
Documentation/devicetree/bindings/i2c/i2c-xiic.txt | 25 --
.../devicetree/bindings/i2c/ingenic,i2c.yaml | 88 ++++++
.../devicetree/bindings/i2c/renesas,i2c.txt | 1 +
.../devicetree/bindings/i2c/renesas,iic.txt | 1 +
.../devicetree/bindings/i2c/st,stm32-i2c.yaml | 15 +-
.../bindings/i2c/xlnx,xps-iic-2.00.a.yaml | 49 +++
.../devicetree/bindings/iio/adc/adi,ad7124.yaml | 9 +-
.../devicetree/bindings/iio/adc/lltc,ltc2496.yaml | 9 +-
.../bindings/iio/adc/microchip,mcp3911.yaml | 7 +-
.../devicetree/bindings/iio/adc/st,stm32-adc.yaml | 35 +-
.../bindings/iio/adc/st,stm32-dfsdm-adc.yaml | 27 +-
.../devicetree/bindings/iio/imu/bmi160.txt | 37 ---
.../devicetree/bindings/iio/imu/bosch,bmi160.yaml | 75 +++++
.../devicetree/bindings/iio/light/tsl2772.yaml | 13 +-
.../bindings/iio/temperature/adi,ltc2983.yaml | 60 ++--
Documentation/devicetree/bindings/index.rst | 12 +
.../input/allwinner,sun4i-a10-lradc-keys.yaml | 9 +-
.../devicetree/bindings/input/gpio-keys-polled.txt | 45 ---
.../devicetree/bindings/input/gpio-keys.txt | 58 ----
.../devicetree/bindings/input/gpio-keys.yaml | 149 +++++++++
Documentation/devicetree/bindings/input/input.yaml | 9 +-
.../devicetree/bindings/input/iqs62x-keys.yaml | 7 +-
.../bindings/input/touchscreen/edt-ft5x06.yaml | 30 +-
.../bindings/input/touchscreen/goodix.yaml | 2 +-
.../bindings/interconnect/qcom,msm8916.yaml | 4 +-
.../bindings/interconnect/qcom,msm8974.yaml | 4 +-
.../bindings/interconnect/qcom,qcs404.yaml | 4 +-
.../bindings/interconnect/qcom,sc7180.yaml | 6 +-
.../bindings/interconnect/qcom,sdm845.yaml | 4 +-
.../allwinner,sun7i-a20-sc-nmi.yaml | 12 +-
.../bindings/interrupt-controller/arm,gic-v3.yaml | 39 +--
.../bindings/interrupt-controller/arm,gic.yaml | 9 +
.../bindings/interrupt-controller/fsl,irqsteer.txt | 35 --
.../interrupt-controller/fsl,irqsteer.yaml | 89 ++++++
.../bindings/interrupt-controller/ingenic,intc.txt | 28 --
.../interrupt-controller/ingenic,intc.yaml | 63 ++++
.../intel,ixp4xx-interrupt.yaml | 8 +-
.../interrupt-controller/loongson,liointc.yaml | 8 +-
.../interrupt-controller/renesas,intc-irqpin.txt | 62 ----
.../interrupt-controller/renesas,intc-irqpin.yaml | 107 +++++++
.../interrupt-controller/renesas,irqc.yaml | 3 +-
.../interrupt-controller/st,stm32-exti.yaml | 12 +-
.../devicetree/bindings/iommu/arm,smmu.yaml | 3 +-
.../bindings/iommu/renesas,ipmmu-vmsa.txt | 73 -----
.../bindings/iommu/renesas,ipmmu-vmsa.yaml | 98 ++++++
.../devicetree/bindings/iommu/samsung,sysmmu.yaml | 10 +-
.../devicetree/bindings/ipmi/ipmi-smic.txt | 25 --
.../devicetree/bindings/ipmi/ipmi-smic.yaml | 63 ++++
Documentation/devicetree/bindings/leds/common.yaml | 13 +-
.../devicetree/bindings/leds/leds-gpio.yaml | 3 +-
.../bindings/leds/rohm,bd71828-leds.yaml | 9 +-
.../devicetree/bindings/mailbox/fsl,mu.txt | 58 ----
.../devicetree/bindings/mailbox/fsl,mu.yaml | 91 ++++++
.../devicetree/bindings/mailbox/st,stm32-ipcc.yaml | 7 +-
.../bindings/media/allwinner,sun4i-a10-csi.yaml | 28 +-
.../devicetree/bindings/media/amlogic,gx-vdec.yaml | 20 +-
.../bindings/media/amlogic,meson-gx-ao-cec.yaml | 5 +-
.../devicetree/bindings/media/i2c/imx219.yaml | 3 +-
.../bindings/media/marvell,mmp2-ccic.txt | 50 ---
.../bindings/media/marvell,mmp2-ccic.yaml | 99 ++++++
.../bindings/media/qcom,sc7180-venus.yaml | 2 +-
.../bindings/media/qcom,sdm845-venus-v2.yaml | 2 +-
.../bindings/media/qcom,sdm845-venus.yaml | 2 +-
Documentation/devicetree/bindings/media/rc.yaml | 265 ++++++++--------
.../devicetree/bindings/media/renesas,ceu.yaml | 39 ++-
.../devicetree/bindings/media/renesas,csi2.yaml | 2 +-
.../devicetree/bindings/media/renesas,vin.yaml | 21 +-
.../devicetree/bindings/media/ti,vpe.yaml | 2 +-
.../memory-controllers/calxeda-ddr-ctrlr.txt | 16 -
.../memory-controllers/calxeda-ddr-ctrlr.yaml | 42 +++
.../bindings/memory-controllers/exynos-srom.yaml | 13 +-
.../memory-controllers/fsl/imx8m-ddrc.yaml | 6 +-
.../memory-controllers/ingenic,jz4780-nemc.txt | 76 -----
.../bindings/memory-controllers/ingenic,nemc.yaml | 126 ++++++++
.../memory-controllers/nvidia,tegra124-emc.yaml | 13 +-
.../memory-controllers/nvidia,tegra124-mc.yaml | 5 +-
.../memory-controllers/nvidia,tegra210-emc.yaml | 82 +++++
.../memory-controllers/nvidia,tegra30-emc.yaml | 9 +-
.../memory-controllers/nvidia,tegra30-mc.yaml | 3 +-
.../bindings/memory-controllers/renesas,dbsc.txt | 44 ---
.../bindings/memory-controllers/renesas,dbsc.yaml | 56 ++++
.../bindings/mfd/allwinner,sun4i-a10-ts.yaml | 20 +-
Documentation/devicetree/bindings/mfd/arizona.txt | 101 ------
.../devicetree/bindings/mfd/cirrus,lochnagar.txt | 85 -----
.../devicetree/bindings/mfd/cirrus,lochnagar.yaml | 352 +++++++++++++++++++++
.../devicetree/bindings/mfd/cirrus,madera.yaml | 299 +++++++++++++++++
Documentation/devicetree/bindings/mfd/madera.txt | 114 -------
.../devicetree/bindings/mfd/st,stm32-lptimer.yaml | 4 +-
.../devicetree/bindings/mfd/st,stm32-timers.yaml | 37 ++-
.../devicetree/bindings/mfd/st,stpmic1.yaml | 9 +-
Documentation/devicetree/bindings/mfd/syscon.yaml | 17 +-
.../devicetree/bindings/mfd/wlf,arizona.yaml | 280 ++++++++++++++++
.../devicetree/bindings/mips/ingenic/devices.yaml | 4 +
.../devicetree/bindings/mmc/aspeed,sdhci.yaml | 4 +-
.../devicetree/bindings/mmc/cdns,sdhci.yaml | 79 ++---
.../devicetree/bindings/mmc/ingenic,mmc.yaml | 79 +++++
Documentation/devicetree/bindings/mmc/jz4740.txt | 41 ---
.../devicetree/bindings/mmc/mmc-controller.yaml | 37 +--
Documentation/devicetree/bindings/mmc/owl-mmc.yaml | 2 +-
.../devicetree/bindings/mmc/rockchip-dw-mshc.yaml | 24 +-
.../bindings/mmc/socionext,uniphier-sd.yaml | 14 +-
.../bindings/mmc/synopsys-dw-mshc-common.yaml | 14 +-
.../bindings/mtd/allwinner,sun4i-a10-nand.yaml | 13 +-
.../devicetree/bindings/mtd/denali,nand.yaml | 4 +-
.../bindings/mtd/ingenic,jz4780-nand.txt | 92 ------
.../devicetree/bindings/mtd/ingenic,nand.yaml | 132 ++++++++
.../devicetree/bindings/mtd/nand-controller.yaml | 27 +-
.../bindings/net/allwinner,sun8i-a83t-emac.yaml | 4 +-
.../devicetree/bindings/net/calxeda-xgmac.txt | 18 --
.../devicetree/bindings/net/calxeda-xgmac.yaml | 49 +++
.../devicetree/bindings/net/can/bosch,m_can.yaml | 111 ++++---
.../bindings/net/ethernet-controller.yaml | 34 +-
.../devicetree/bindings/net/qca,ar803x.yaml | 17 +-
.../devicetree/bindings/net/qcom,ipa.yaml | 12 +-
.../devicetree/bindings/net/renesas,ether.yaml | 9 +-
.../devicetree/bindings/net/renesas,ravb.txt | 1 +
.../devicetree/bindings/net/snps,dwmac.yaml | 30 +-
.../devicetree/bindings/net/stm32-dwmac.txt | 44 ---
.../devicetree/bindings/net/stm32-dwmac.yaml | 148 +++++++++
.../devicetree/bindings/net/ti,cpsw-switch.yaml | 18 +-
.../devicetree/bindings/net/ti,davinci-mdio.yaml | 34 +-
.../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 98 +++---
.../devicetree/bindings/nvmem/imx-iim.txt | 22 --
.../devicetree/bindings/nvmem/imx-iim.yaml | 57 ++++
.../devicetree/bindings/nvmem/imx-ocotp.txt | 50 ---
.../devicetree/bindings/nvmem/imx-ocotp.yaml | 95 ++++++
.../devicetree/bindings/nvmem/mxs-ocotp.txt | 24 --
.../devicetree/bindings/nvmem/mxs-ocotp.yaml | 50 +++
Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 -
.../devicetree/bindings/nvmem/rockchip-efuse.txt | 54 ----
.../devicetree/bindings/nvmem/rockchip-efuse.yaml | 70 ++++
.../devicetree/bindings/nvmem/st,stm32-romem.yaml | 17 +
.../devicetree/bindings/pci/cdns-pcie-host.yaml | 3 +-
.../devicetree/bindings/pci/cdns-pcie.yaml | 3 +-
.../devicetree/bindings/pci/intel-gw-pcie.yaml | 7 +-
Documentation/devicetree/bindings/pci/pci-ep.yaml | 9 +-
.../devicetree/bindings/pci/pci-rcar-gen2.txt | 3 +-
.../phy/amlogic,meson-axg-mipi-pcie-analog.yaml | 2 +-
.../bindings/phy/amlogic,meson-axg-pcie.yaml | 2 +-
.../devicetree/bindings/phy/calxeda-combophy.txt | 17 -
.../devicetree/bindings/phy/calxeda-combophy.yaml | 51 +++
.../bindings/phy/intel,lgm-emmc-phy.yaml | 2 +-
.../bindings/phy/phy-cadence-torrent.yaml | 59 ++--
.../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 65 ++--
.../devicetree/bindings/phy/rcar-gen2-phy.txt | 3 +-
.../bindings/phy/rockchip,px30-dsi-dphy.yaml | 2 +-
.../bindings/phy/socionext,uniphier-pcie-phy.yaml | 77 +++++
.../bindings/phy/socionext,uniphier-usb2-phy.yaml | 85 +++++
.../phy/socionext,uniphier-usb3hs-phy.yaml | 103 ++++++
.../phy/socionext,uniphier-usb3ss-phy.yaml | 96 ++++++
.../devicetree/bindings/phy/uniphier-pcie-phy.txt | 36 ---
.../devicetree/bindings/phy/uniphier-usb2-phy.txt | 45 ---
.../bindings/phy/uniphier-usb3-hsphy.txt | 69 ----
.../bindings/phy/uniphier-usb3-ssphy.txt | 58 ----
.../pinctrl/allwinner,sun4i-a10-pinctrl.yaml | 12 +-
.../bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 37 +--
.../bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 46 ++-
.../bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 108 +++----
.../bindings/pinctrl/cirrus,lochnagar.txt | 141 ---------
.../bindings/pinctrl/cirrus,lochnagar.yaml | 190 +++++++++++
.../bindings/pinctrl/cirrus,madera-pinctrl.txt | 99 ------
.../devicetree/bindings/pinctrl/cirrus,madera.yaml | 122 +++++++
.../bindings/pinctrl/fsl,imx8mm-pinctrl.yaml | 31 +-
.../bindings/pinctrl/fsl,imx8mn-pinctrl.yaml | 31 +-
.../bindings/pinctrl/fsl,imx8mp-pinctrl.yaml | 31 +-
.../bindings/pinctrl/fsl,imx8mq-pinctrl.yaml | 31 +-
.../devicetree/bindings/pinctrl/intel,lgm-io.yaml | 4 +-
.../devicetree/bindings/pinctrl/pinmux-node.yaml | 3 +-
.../bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 3 +-
.../bindings/pinctrl/st,stm32-pinctrl.yaml | 54 ++--
.../bindings/power/amlogic,meson-ee-pwrc.yaml | 3 +-
.../devicetree/bindings/power/fsl,imx-gpc.txt | 91 ------
.../devicetree/bindings/power/fsl,imx-gpc.yaml | 124 ++++++++
.../devicetree/bindings/power/fsl,imx-gpcv2.txt | 77 -----
.../devicetree/bindings/power/fsl,imx-gpcv2.yaml | 108 +++++++
.../devicetree/bindings/power/renesas,apmu.yaml | 1 +
Documentation/devicetree/bindings/pwm/imx-pwm.txt | 27 --
Documentation/devicetree/bindings/pwm/imx-pwm.yaml | 66 ++++
.../devicetree/bindings/pwm/imx-tpm-pwm.txt | 22 --
.../devicetree/bindings/pwm/imx-tpm-pwm.yaml | 55 ++++
Documentation/devicetree/bindings/pwm/mxs-pwm.txt | 17 -
Documentation/devicetree/bindings/pwm/mxs-pwm.yaml | 43 +++
.../devicetree/bindings/pwm/pwm-samsung.yaml | 27 +-
.../devicetree/bindings/pwm/renesas,pwm-rcar.yaml | 2 +-
.../bindings/regulator/arizona-regulator.txt | 18 --
.../bindings/regulator/cirrus,lochnagar.txt | 82 -----
.../bindings/regulator/gpio-regulator.yaml | 35 +-
.../devicetree/bindings/regulator/mps,mp5416.yaml | 6 +-
.../devicetree/bindings/regulator/mps,mpq7920.yaml | 28 +-
.../devicetree/bindings/regulator/regulator.yaml | 5 +-
.../bindings/regulator/rohm,bd71828-regulator.yaml | 34 +-
.../bindings/regulator/rohm,bd71837-regulator.yaml | 27 +-
.../bindings/regulator/st,stm32-booster.yaml | 3 +-
.../bindings/regulator/st,stm32mp1-pwr-reg.yaml | 3 +-
.../devicetree/bindings/regulator/wlf,arizona.yaml | 37 +++
.../bindings/remoteproc/st,stm32-rproc.yaml | 11 +-
.../bindings/reserved-memory/reserved-memory.txt | 2 +
.../reset/brcm,bcm7216-pcie-sata-rescal.yaml | 4 +-
.../devicetree/bindings/reset/intel,rcu-gw.yaml | 3 +-
Documentation/devicetree/bindings/riscv/cpus.yaml | 20 +-
.../devicetree/bindings/rtc/renesas,sh-rtc.yaml | 5 +
Documentation/devicetree/bindings/rtc/rtc-mxc.txt | 26 --
Documentation/devicetree/bindings/rtc/rtc-mxc.yaml | 57 ++++
.../devicetree/bindings/rtc/rtc-mxc_v2.txt | 17 -
.../devicetree/bindings/rtc/rtc-mxc_v2.yaml | 46 +++
.../devicetree/bindings/rtc/st,stm32-rtc.yaml | 47 ++-
Documentation/devicetree/bindings/serial/8250.txt | 100 ------
Documentation/devicetree/bindings/serial/8250.yaml | 233 ++++++++++++++
.../bindings/serial/amlogic,meson-uart.yaml | 16 +-
.../devicetree/bindings/serial/ingenic,uart.txt | 28 --
.../devicetree/bindings/serial/ingenic,uart.yaml | 94 ++++++
.../devicetree/bindings/serial/mrvl-serial.txt | 4 -
.../devicetree/bindings/serial/pl011.yaml | 10 +-
.../devicetree/bindings/serial/qca,ar9330-uart.txt | 31 --
.../bindings/serial/qca,ar9330-uart.yaml | 50 +++
.../bindings/serial/renesas,em-uart.yaml | 49 +++
.../devicetree/bindings/serial/renesas,hscif.yaml | 1 +
.../devicetree/bindings/serial/renesas,scif.yaml | 1 +
.../devicetree/bindings/serial/renesas,scifa.yaml | 15 +-
.../devicetree/bindings/serial/renesas,scifb.yaml | 1 +
.../devicetree/bindings/serial/rs485.yaml | 43 ++-
.../devicetree/bindings/serial/samsung_uart.yaml | 5 +-
.../devicetree/bindings/serial/serial.yaml | 8 +
.../devicetree/bindings/serial/sifive-serial.yaml | 2 +-
.../bindings/soc/amlogic/amlogic,canvas.yaml | 10 +-
.../devicetree/bindings/soc/qcom/qcom,geni-se.txt | 94 ------
.../devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 225 +++++++++++++
.../devicetree/bindings/sound/adi,adau7118.yaml | 20 +-
.../bindings/sound/allwinner,sun4i-a10-codec.yaml | 51 ++-
.../devicetree/bindings/sound/amlogic,aiu.yaml | 3 +-
.../bindings/sound/amlogic,g12a-toacodec.yaml | 2 +-
.../devicetree/bindings/sound/amlogic,t9015.yaml | 3 +-
.../devicetree/bindings/sound/cirrus,lochnagar.txt | 39 ---
.../bindings/sound/cirrus,lochnagar.yaml | 52 +++
.../devicetree/bindings/sound/cirrus,madera.yaml | 113 +++++++
Documentation/devicetree/bindings/sound/madera.txt | 67 ----
.../devicetree/bindings/sound/qcom,wcd934x.yaml | 3 +-
.../devicetree/bindings/sound/renesas,fsi.yaml | 41 ++-
.../devicetree/bindings/sound/rockchip-i2s.yaml | 6 +-
.../devicetree/bindings/sound/tlv320adcx140.yaml | 10 +-
.../devicetree/bindings/sound/wlf,arizona.txt | 53 ----
.../devicetree/bindings/sound/wlf,arizona.yaml | 114 +++++++
.../devicetree/bindings/spi/marvell,mmp2-ssp.yaml | 58 ++++
.../bindings/spi/qcom,spi-qcom-qspi.yaml | 10 +-
.../devicetree/bindings/spi/renesas,hspi.yaml | 4 +-
.../devicetree/bindings/spi/renesas,sh-msiof.yaml | 44 ++-
.../devicetree/bindings/spi/spi-controller.yaml | 14 +-
.../devicetree/bindings/spi/spi-pl022.yaml | 57 ++--
.../devicetree/bindings/spi/spi-pxa2xx.txt | 27 --
.../devicetree/bindings/spi/spi-sifive.yaml | 25 +-
.../devicetree/bindings/spi/st,stm32-qspi.yaml | 4 +-
.../sram/allwinner,sun4i-a10-system-control.yaml | 64 ++--
.../devicetree/bindings/sram/rockchip-pmu-sram.txt | 16 -
Documentation/devicetree/bindings/sram/sram.yaml | 28 +-
...bmitting-patches.txt => submitting-patches.rst} | 12 +-
.../bindings/thermal/amlogic,thermal.yaml | 10 +-
.../devicetree/bindings/thermal/imx-thermal.txt | 61 ----
.../devicetree/bindings/thermal/imx-thermal.yaml | 102 ++++++
.../devicetree/bindings/thermal/imx8mm-thermal.txt | 15 -
.../bindings/thermal/imx8mm-thermal.yaml | 58 ++++
.../devicetree/bindings/thermal/qcom-tsens.yaml | 7 +-
.../bindings/thermal/rcar-gen3-thermal.txt | 60 ----
.../bindings/thermal/rcar-gen3-thermal.yaml | 99 ++++++
.../devicetree/bindings/thermal/rcar-thermal.yaml | 7 +-
.../thermal/socionext,uniphier-thermal.yaml | 59 ++++
.../devicetree/bindings/thermal/sprd-thermal.yaml | 2 +-
.../bindings/thermal/uniphier-thermal.txt | 65 ----
.../devicetree/bindings/timer/arm,arch_timer.yaml | 10 +-
.../bindings/timer/arm,arch_timer_mmio.yaml | 11 +-
.../bindings/timer/cadence,ttc-timer.txt | 21 --
.../devicetree/bindings/timer/cdns,ttc.yaml | 48 +++
.../devicetree/bindings/timer/fsl,imxgpt.txt | 45 ---
.../devicetree/bindings/timer/fsl,imxgpt.yaml | 72 +++++
.../devicetree/bindings/timer/ingenic,tcu.txt | 138 --------
.../devicetree/bindings/timer/ingenic,tcu.yaml | 280 ++++++++++++++++
.../devicetree/bindings/timer/nxp,sysctr-timer.txt | 25 --
.../bindings/timer/nxp,sysctr-timer.yaml | 54 ++++
.../devicetree/bindings/timer/nxp,tpm-timer.txt | 28 --
.../devicetree/bindings/timer/nxp,tpm-timer.yaml | 61 ++++
.../devicetree/bindings/timer/renesas,cmt.txt | 110 -------
.../devicetree/bindings/timer/renesas,cmt.yaml | 182 +++++++++++
.../devicetree/bindings/timer/renesas,mtu2.txt | 42 ---
.../devicetree/bindings/timer/renesas,mtu2.yaml | 76 +++++
.../devicetree/bindings/timer/renesas,ostm.txt | 31 --
.../devicetree/bindings/timer/renesas,ostm.yaml | 59 ++++
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 65 ++--
.../bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml | 3 +-
.../devicetree/bindings/usb/aspeed,usb-vhub.yaml | 18 +-
Documentation/devicetree/bindings/usb/dwc2.yaml | 11 +-
Documentation/devicetree/bindings/usb/ehci-mv.txt | 23 --
.../devicetree/bindings/usb/generic-ehci.yaml | 27 +-
.../devicetree/bindings/usb/generic-ohci.yaml | 6 +
.../devicetree/bindings/usb/ingenic,musb.yaml | 3 +
.../bindings/usb/marvell,pxau2o-ehci.yaml | 62 ++++
.../devicetree/bindings/usb/nvidia,tegra-xudc.yaml | 6 +-
.../devicetree/bindings/usb/qcom,dwc3.txt | 104 ------
.../devicetree/bindings/usb/qcom,dwc3.yaml | 174 ++++++++++
.../devicetree/bindings/usb/renesas,usb3-peri.yaml | 2 +-
.../devicetree/bindings/usb/renesas,usbhs.yaml | 3 +-
.../devicetree/bindings/usb/ti,j721e-usb.yaml | 54 ++--
.../devicetree/bindings/usb/usb-conn-gpio.txt | 30 --
Documentation/devicetree/bindings/usb/usb-xhci.txt | 1 +
.../devicetree/bindings/vendor-prefixes.yaml | 22 ++
.../devicetree/bindings/watchdog/fsl-imx-wdt.txt | 24 --
.../devicetree/bindings/watchdog/fsl-imx-wdt.yaml | 54 ++++
.../bindings/watchdog/fsl-imx7ulp-wdt.txt | 22 --
.../bindings/watchdog/fsl-imx7ulp-wdt.yaml | 60 ++++
.../devicetree/bindings/watchdog/renesas,wdt.txt | 50 ---
.../devicetree/bindings/watchdog/renesas,wdt.yaml | 101 ++++++
.../bindings/watchdog/socionext,uniphier-wdt.yaml | 36 +++
.../devicetree/bindings/watchdog/ti,rti-wdt.yaml | 2 +-
.../devicetree/bindings/watchdog/uniphier-wdt.txt | 20 --
.../{writing-bindings.txt => writing-bindings.rst} | 9 +-
.../devicetree/{changesets.txt => changesets.rst} | 24 +-
...tion-notes.txt => dynamic-resolution-notes.rst} | 5 +-
Documentation/devicetree/index.rst | 17 +
.../{of_unittest.txt => of_unittest.rst} | 192 +++++------
.../{overlay-notes.txt => overlay-notes.rst} | 119 ++++---
.../{usage-model.txt => usage-model.rst} | 35 +-
Documentation/index.rst | 3 +
Documentation/process/submitting-patches.rst | 2 +-
.../it_IT/process/submitting-patches.rst | 2 +-
MAINTAINERS | 33 +-
drivers/of/dynamic.c | 3 +-
drivers/of/fdt.c | 8 +-
drivers/of/kobj.c | 3 +-
drivers/of/of_reserved_mem.c | 10 +-
drivers/of/platform.c | 2 +-
drivers/of/property.c | 20 +-
include/linux/mfd/core.h | 2 +-
scripts/checkpatch.pl | 2 +-
470 files changed, 11822 insertions(+), 7433 deletions(-)
rename Documentation/devicetree/bindings/{ABI.txt => ABI.rst} (94%)
create mode 100644 Documentation/devicetree/bindings/arm/calxeda/hb-sregs.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/calxeda/l2ecc.txt
create mode 100644 Documentation/devicetree/bindings/arm/calxeda/l2ecc.yaml
delete mode 100644 Documentation/devicetree/bindings/ata/sata_highbank.txt
create mode 100644 Documentation/devicetree/bindings/ata/sata_highbank.yaml
delete mode 100644 Documentation/devicetree/bindings/auxdisplay/hit,hd44780.txt
create mode 100644 Documentation/devicetree/bindings/auxdisplay/hit,hd44780.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/calxeda.txt
create mode 100644 Documentation/devicetree/bindings/clock/calxeda.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/cirrus,lochnagar.txt
create mode 100644 Documentation/devicetree/bindings/clock/cirrus,lochnagar.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx1-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx1-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx21-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx21-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx23-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx23-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx25-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx25-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx27-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx27-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx28-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx28-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx31-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx31-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx35-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx35-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx5-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx5-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx6q-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx6q-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/imx6sl-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/imx6sl-clock.yaml
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^ permalink raw reply
* Re: [Freedreno] [PATCH v7 6/6] arm6: dts: qcom: sm845: Set the compatible string for the GPU SMMU
From: Jordan Crouse @ 2020-06-04 22:02 UTC (permalink / raw)
To: Rob Clark
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
linux-arm-msm, Linux Kernel Mailing List, Rob Herring,
Bjorn Andersson, Andy Gross, freedreno
In-Reply-To: <CAF6AEGt4N5+0h0fkrO7m6KD3VMXkdoFyhN5Nz72DcMjoHX6XWA@mail.gmail.com>
On Thu, Jun 04, 2020 at 02:27:21PM -0700, Rob Clark wrote:
> On Thu, Jun 4, 2020 at 1:57 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
> >
> > Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
> > split pagetables.
> >
> > Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> > ---
> >
> > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > index 8eb5a31346d2..8b15cd74e9ba 100644
> > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> > @@ -3556,7 +3556,7 @@
> > };
> >
> > adreno_smmu: iommu@5040000 {
> > - compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
> > + compatible = "qcom,adreno-smmu", "qcom,smmu-v2";
>
> Should this be something like:
>
> compatible = "qcom,adreno-smmu", "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
>
> so that new dtb still works with old kernel?
As far as I know qcom,sdm845-smmu-v2 never was actually used unless we were
doing the parsing trick somewhere.
Jordan
> > reg = <0 0x5040000 0 0x10000>;
> > #iommu-cells = <1>;
> > #global-interrupts = <2>;
> > --
> > 2.17.1
> >
> > _______________________________________________
> > Freedreno mailing list
> > Freedreno@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/freedreno
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno
--
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply
* [PATCH v2] spi: bcm2835: Enable shared interrupt support
From: Florian Fainelli @ 2020-06-04 21:28 UTC (permalink / raw)
To: linux-kernel
Cc: Florian Fainelli, Mark Brown, Rob Herring, Nicolas Saenz Julienne,
Ray Jui, Scott Branden,
maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...,
open list:SPI SUBSYSTEM,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE,
Martin Sperl, lukas
The 4 SPI controller instances added in BCM2711 and BCM7211 SoCs (SPI3,
SPI4, SPI5 and SPI6) share the same interrupt line with SPI0.
For the BCM2835 case which is deemed performance critical, we would like
to continue using an interrupt handler which does not have the extra
comparison on BCM2835_SPI_CS_INTR.
To support that requirement the common interrupt handling code between
the shared and non-shared interrupt paths is split into a
bcm2835_spi_interrupt_common() and both bcm2835_spi_interrupt() as well
as bcm2835_spi_shared_interrupt() make use of it.
During probe, we determine if there is at least another instance of this
SPI controller, and if there is, then we install a shared interrupt
handler.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Changes in v2:
- identify other available SPI nodes to determine if we need to set-up
interrupt sharing. This needs to happen for the very first instance
since we cannot know for the first instance whether interrupt sharing
is needed or not.
drivers/spi/spi-bcm2835.c | 61 ++++++++++++++++++++++++++++++++-------
1 file changed, 50 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c
index 237bd306c268..0288b5b3de1e 100644
--- a/drivers/spi/spi-bcm2835.c
+++ b/drivers/spi/spi-bcm2835.c
@@ -361,11 +361,10 @@ static void bcm2835_spi_reset_hw(struct spi_controller *ctlr)
bcm2835_wr(bs, BCM2835_SPI_DLEN, 0);
}
-static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
+static inline irqreturn_t bcm2835_spi_interrupt_common(struct spi_controller *ctlr,
+ u32 cs)
{
- struct spi_controller *ctlr = dev_id;
struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
- u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
/*
* An interrupt is signaled either if DONE is set (TX FIFO empty)
@@ -394,6 +393,27 @@ static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static irqreturn_t bcm2835_spi_interrupt(int irq, void *dev_id)
+{
+ struct spi_controller *ctlr = dev_id;
+ struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
+ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
+
+ return bcm2835_spi_interrupt_common(ctlr, cs);
+}
+
+static irqreturn_t bcm2835_spi_shared_interrupt(int irq, void *dev_id)
+{
+ struct spi_controller *ctlr = dev_id;
+ struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr);
+ u32 cs = bcm2835_rd(bs, BCM2835_SPI_CS);
+
+ if (!(cs & BCM2835_SPI_CS_INTR))
+ return IRQ_NONE;
+
+ return bcm2835_spi_interrupt_common(ctlr, cs);
+}
+
static int bcm2835_spi_transfer_one_irq(struct spi_controller *ctlr,
struct spi_device *spi,
struct spi_transfer *tfr,
@@ -1287,12 +1307,37 @@ static int bcm2835_spi_setup(struct spi_device *spi)
return 0;
}
+static const struct of_device_id bcm2835_spi_match[] = {
+ { .compatible = "brcm,bcm2835-spi", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, bcm2835_spi_match);
+
static int bcm2835_spi_probe(struct platform_device *pdev)
{
+ irq_handler_t bcm2835_spi_isr_func = bcm2835_spi_interrupt;
struct spi_controller *ctlr;
+ unsigned long flags = 0;
+ struct device_node *dn;
struct bcm2835_spi *bs;
int err;
+ /* On BCM2711 there can be multiple SPI controllers enabled sharing the
+ * same interrupt line, but we also want to minimize the overhead if
+ * there is no need to support interrupt sharing. If we find at least
+ * another available instane (not counting the one we are probed from),
+ * then we assume that interrupt sharing is necessary.
+ */
+ for_each_compatible_node(dn, NULL, bcm2835_spi_match[0].compatible) {
+ err = of_device_is_available(dn) && dn != pdev->dev.of_node;
+ of_node_put(dn);
+ if (err) {
+ flags = IRQF_SHARED;
+ bcm2835_spi_isr_func = bcm2835_spi_shared_interrupt;
+ break;
+ }
+ }
+
ctlr = spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs),
dma_get_cache_alignment()));
if (!ctlr)
@@ -1344,8 +1389,8 @@ static int bcm2835_spi_probe(struct platform_device *pdev)
bcm2835_wr(bs, BCM2835_SPI_CS,
BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX);
- err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, 0,
- dev_name(&pdev->dev), ctlr);
+ err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_isr_func,
+ flags, dev_name(&pdev->dev), ctlr);
if (err) {
dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
goto out_dma_release;
@@ -1400,12 +1445,6 @@ static void bcm2835_spi_shutdown(struct platform_device *pdev)
dev_err(&pdev->dev, "failed to shutdown\n");
}
-static const struct of_device_id bcm2835_spi_match[] = {
- { .compatible = "brcm,bcm2835-spi", },
- {}
-};
-MODULE_DEVICE_TABLE(of, bcm2835_spi_match);
-
static struct platform_driver bcm2835_spi_driver = {
.driver = {
.name = DRV_NAME,
--
2.17.1
^ permalink raw reply related
* Re: [Freedreno] [PATCH v7 6/6] arm6: dts: qcom: sm845: Set the compatible string for the GPU SMMU
From: Rob Clark @ 2020-06-04 21:27 UTC (permalink / raw)
To: Jordan Crouse
Cc: linux-arm-msm,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Linux Kernel Mailing List, Rob Herring, Bjorn Andersson,
Andy Gross, freedreno
In-Reply-To: <20200604205710.3167-7-jcrouse@codeaurora.org>
On Thu, Jun 4, 2020 at 1:57 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
> split pagetables.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 8eb5a31346d2..8b15cd74e9ba 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -3556,7 +3556,7 @@
> };
>
> adreno_smmu: iommu@5040000 {
> - compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
> + compatible = "qcom,adreno-smmu", "qcom,smmu-v2";
Should this be something like:
compatible = "qcom,adreno-smmu", "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
so that new dtb still works with old kernel?
BR,
-R
> reg = <0 0x5040000 0 0x10000>;
> #iommu-cells = <1>;
> #global-interrupts = <2>;
> --
> 2.17.1
>
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply
* [PATCH v4 01/11] dt-bindings: mfd: Add bindings for sl28cpld
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add a device tree bindings for the board management controller found on
the Kontron SMARC-sAL28 board.
Signed-off-by: Michael Walle <michael@walle.cc>
---
.../bindings/gpio/kontron,sl28cpld-gpio.yaml | 54 +++++++
.../hwmon/kontron,sl28cpld-hwmon.yaml | 27 ++++
.../kontron,sl28cpld-intc.yaml | 54 +++++++
.../bindings/mfd/kontron,sl28cpld.yaml | 153 ++++++++++++++++++
.../bindings/pwm/kontron,sl28cpld-pwm.yaml | 35 ++++
.../watchdog/kontron,sl28cpld-wdt.yaml | 35 ++++
6 files changed, 358 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml
create mode 100644 Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml
create mode 100644 Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml
create mode 100644 Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml
create mode 100644 Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml
diff --git a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml
new file mode 100644
index 000000000000..9a63a158a796
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/kontron,sl28cpld-gpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: GPIO driver for the sl28cpld board management controller
+
+maintainers:
+ - Michael Walle <michael@walle.cc>
+
+description: |
+ This module is part of the sl28cpld multi-function device. For more
+ details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml.
+
+ There are three flavors of the GPIO controller, one full featured
+ input/output with interrupt support (kontron,sl28cpld-gpio), one
+ output-only (kontron,sl28-gpo) and one input-only (kontron,sl28-gpi).
+
+ Each controller supports 8 GPIO lines.
+
+properties:
+ compatible:
+ enum:
+ - kontron,sl28cpld-gpio
+ - kontron,sl28cpld-gpi
+ - kontron,sl28cpld-gpo
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#interrupt-cells":
+ const: 2
+
+ interrupt-controller: true
+
+ "#gpio-cells":
+ const: 2
+
+ gpio-controller: true
+
+ gpio-line-names:
+ minItems: 1
+ maxItems: 8
+
+required:
+ - compatible
+ - "#gpio-cells"
+ - gpio-controller
+
+additionalProperties: false
diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml
new file mode 100644
index 000000000000..1cebd61c6c32
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/kontron,sl28cpld-hwmon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hardware monitoring driver for the sl28cpld board management controller
+
+maintainers:
+ - Michael Walle <michael@walle.cc>
+
+description: |
+ This module is part of the sl28cpld multi-function device. For more
+ details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml.
+
+properties:
+ compatible:
+ enum:
+ - kontron,sl28cpld-fan
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+
+additionalProperties: false
diff --git a/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml
new file mode 100644
index 000000000000..4c39e9ff9aea
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/kontron,sl28cpld-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Interrupt controller driver for the sl28cpld board management controller
+
+maintainers:
+ - Michael Walle <michael@walle.cc>
+
+description: |
+ This module is part of the sl28cpld multi-function device. For more
+ details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml.
+
+ The following interrupts are available. All types and levels are fixed
+ and handled by the board management controller.
+
+ ==== ============= ==================================
+ IRQ line/device description
+ ==== ============= ==================================
+ 0 RTC_INT# Interrupt line from on-board RTC
+ 1 SMB_ALERT# Event on SMB_ALERT# line (P1)
+ 2 ESPI_ALERT0# Event on ESPI_ALERT0# line (S43)
+ 3 ESPI_ALERT1# Event on ESPI_ALERT1# line (S44)
+ 4 PWR_BTN# Event on PWR_BTN# line (P128)
+ 5 SLEEP# Event on SLEEP# line (S149)
+ 6 watchdog Interrupt of the internal watchdog
+ 7 n/a not used
+ ==== ============= ==================================
+
+properties:
+ compatible:
+ enum:
+ - kontron,sl28cpld-intc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#interrupt-cells":
+ const: 2
+
+ interrupt-controller: true
+
+required:
+ - compatible
+ - interrupts
+ - "#interrupt-cells"
+ - interrupt-controller
+
+additionalProperties: false
diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml
new file mode 100644
index 000000000000..1d13bb24afb8
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml
@@ -0,0 +1,153 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/kontron,sl28cpld.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Kontron's sl28cpld board management controller
+
+maintainers:
+ - Michael Walle <michael@walle.cc>
+
+description: |
+ The board management controller may contain different IP blocks like
+ watchdog, fan monitoring, PWM controller, interrupt controller and a
+ GPIO controller.
+
+properties:
+ compatible:
+ const: kontron,sl28cpld-r1
+
+ reg:
+ description:
+ I2C device address.
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ "#interrupt-cells":
+ const: 2
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+patternProperties:
+ "^gpio(@[0-9]+)?$":
+ $ref: ../gpio/kontron,sl28cpld-gpio.yaml
+
+ "^hwmon(@[0-9]+)?$":
+ $ref: ../hwmon/kontron,sl28cpld-hwmon.yaml
+
+ "^interrupt-controller(@[0-9]+)?$":
+ $ref: ../interrupt-controller/kontron,sl28cpld-intc.yaml
+
+ "^pwm(@[0-9]+)?$":
+ $ref: ../pwm/kontron,sl28cpld-pwm.yaml
+
+ "^watchdog(@[0-9]+)?$":
+ $ref: ../watchdog/kontron,sl28cpld-wdt.yaml
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sl28cpld@4a {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "kontron,sl28cpld-r1";
+ reg = <0x4a>;
+
+ watchdog@4 {
+ compatible = "kontron,sl28cpld-wdt";
+ reg = <0x4>;
+ kontron,assert-wdt-timeout-pin;
+ };
+
+ hwmon@b {
+ compatible = "kontron,sl28cpld-fan";
+ reg = <0xb>;
+ };
+
+ pwm@c {
+ #pwm-cells = <2>;
+ compatible = "kontron,sl28cpld-pwm";
+ reg = <0xc>;
+ };
+
+ pwm@e {
+ #pwm-cells = <2>;
+ compatible = "kontron,sl28cpld-pwm";
+ reg = <0xe>;
+ };
+
+ gpio@10 {
+ compatible = "kontron,sl28cpld-gpio";
+ reg = <0x10>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "a", "b", "c";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio@15 {
+ compatible = "kontron,sl28cpld-gpio";
+ reg = <0x15>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio@1a {
+ compatible = "kontron,sl28cpld-gpo";
+ reg = <0x1a>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@1b {
+ compatible = "kontron,sl28cpld-gpi";
+ reg = <0x1b>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ interrupt-controller@1c {
+ compatible = "kontron,sl28cpld-intc";
+ reg = <0x1c>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml
new file mode 100644
index 000000000000..02fe88c30233
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/kontron,sl28cpld-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PWM driver for the sl28cpld board management controller
+
+maintainers:
+ - Michael Walle <michael@walle.cc>
+
+description: |
+ This module is part of the sl28cpld multi-function device. For more
+ details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml.
+
+ The controller supports one PWM channel and supports only four distinct
+ frequencies (250Hz, 500Hz, 1kHz, 2kHz).
+
+allOf:
+ - $ref: pwm.yaml#
+
+properties:
+ compatible:
+ const: kontron,sl28cpld-pwm
+
+ reg:
+ maxItems: 1
+
+ "#pwm-cells":
+ const: 2
+
+required:
+ - compatible
+
+additionalProperties: false
diff --git a/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml
new file mode 100644
index 000000000000..dd6559f2973a
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/kontron,sl28cpld-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Watchdog driver for the sl28cpld board management controller
+
+maintainers:
+ - Michael Walle <michael@walle.cc>
+
+description: |
+ This module is part of the sl28cpld multi-function device. For more
+ details see Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml.
+
+allOf:
+ - $ref: watchdog.yaml#
+
+properties:
+ compatible:
+ const: kontron,sl28cpld-wdt
+
+ reg:
+ maxItems: 1
+
+ kontron,assert-wdt-timeout-pin:
+ description: The SMARC standard defines a WDT_TIME_OUT# pin. If this
+ property is set, this output will be pulsed when the watchdog bites
+ and the system resets.
+ type: boolean
+
+required:
+ - compatible
+
+additionalProperties: false
--
2.20.1
^ permalink raw reply related
* [PATCH v4 06/11] gpio: add support for the sl28cpld GPIO controller
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add support for the GPIO controller of the sl28 board management
controller. This driver is part of a multi-function device.
A controller has 8 lines. There are three different flavors:
full-featured GPIO with interrupt support, input-only and output-only.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/gpio/Kconfig | 11 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-sl28cpld.c | 180 +++++++++++++++++++++++++++++++++++
3 files changed, 192 insertions(+)
create mode 100644 drivers/gpio/gpio-sl28cpld.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index bcacd9c74aa8..a325d2d619a8 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -1215,6 +1215,17 @@ config GPIO_RC5T583
This driver provides the support for driving/reading the gpio pins
of RC5T583 device through standard gpio library.
+config GPIO_SL28CPLD
+ tristate "Kontron sl28 GPIO"
+ depends on MFD_SL28CPLD
+ select GPIO_REGMAP
+ select GPIOLIB_IRQCHIP
+ help
+ This enables support for the GPIOs found on the Kontron sl28 CPLD.
+
+ This driver can also be built as a module. If so, the module will be
+ called gpio-sl28cpld.
+
config GPIO_STMPE
bool "STMPE GPIOs"
depends on MFD_STMPE
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1e4894e0bf0f..152127a9b339 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -130,6 +130,7 @@ obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o
obj-$(CONFIG_GPIO_SCH) += gpio-sch.o
obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o
obj-$(CONFIG_GPIO_SIOX) += gpio-siox.o
+obj-$(CONFIG_GPIO_SL28CPLD) += gpio-sl28cpld.o
obj-$(CONFIG_GPIO_SODAVILLE) += gpio-sodaville.o
obj-$(CONFIG_GPIO_SPEAR_SPICS) += gpio-spear-spics.o
obj-$(CONFIG_GPIO_SPRD) += gpio-sprd.o
diff --git a/drivers/gpio/gpio-sl28cpld.c b/drivers/gpio/gpio-sl28cpld.c
new file mode 100644
index 000000000000..800e218ee624
--- /dev/null
+++ b/drivers/gpio/gpio-sl28cpld.c
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * sl28cpld GPIO driver.
+ *
+ * Copyright 2019 Michael Walle <michael@walle.cc>
+ */
+
+#include <linux/device.h>
+#include <linux/gpio/regmap.h>
+#include <linux/gpio/driver.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+/* GPIO flavor */
+#define GPIO_REG_DIR 0x00
+#define GPIO_REG_OUT 0x01
+#define GPIO_REG_IN 0x02
+#define GPIO_REG_IE 0x03
+#define GPIO_REG_IP 0x04
+
+/* input-only flavor */
+#define GPI_REG_IN 0x00
+
+/* output-only flavor */
+#define GPO_REG_OUT 0x00
+
+enum sl28cpld_gpio_type {
+ SL28CPLD_GPIO = 1,
+ SL28CPLD_GPI,
+ SL28CPLD_GPO,
+};
+
+struct sl28cpld_gpio {
+ struct regmap_irq_chip irq_chip;
+ struct regmap_irq_chip_data *irq_data;
+};
+
+static const struct regmap_irq sl28cpld_gpio_irqs[] = {
+ REGMAP_IRQ_REG_LINE(0, 8),
+ REGMAP_IRQ_REG_LINE(1, 8),
+ REGMAP_IRQ_REG_LINE(2, 8),
+ REGMAP_IRQ_REG_LINE(3, 8),
+ REGMAP_IRQ_REG_LINE(4, 8),
+ REGMAP_IRQ_REG_LINE(5, 8),
+ REGMAP_IRQ_REG_LINE(6, 8),
+ REGMAP_IRQ_REG_LINE(7, 8),
+};
+
+static int sl28cpld_gpio_irq_init(struct device *dev,
+ struct sl28cpld_gpio *gpio,
+ struct regmap *regmap, unsigned int base,
+ int irq)
+{
+ struct regmap_irq_chip *irq_chip = &gpio->irq_chip;
+
+ irq_chip->name = "sl28cpld-gpio-irq",
+ irq_chip->irqs = sl28cpld_gpio_irqs;
+ irq_chip->num_irqs = ARRAY_SIZE(sl28cpld_gpio_irqs);
+ irq_chip->num_regs = 1;
+ irq_chip->status_base = base + GPIO_REG_IP;
+ irq_chip->mask_base = base + GPIO_REG_IE;
+ irq_chip->mask_invert = true,
+ irq_chip->ack_base = base + GPIO_REG_IP;
+
+ return devm_regmap_add_irq_chip_np(dev, dev_of_node(dev), regmap,
+ irq, IRQF_SHARED | IRQF_ONESHOT, 0,
+ irq_chip, &gpio->irq_data);
+}
+
+static int sl28cpld_gpio_probe(struct platform_device *pdev)
+{
+ const struct platform_device_id *dev_id;
+ struct gpio_regmap_config config = {0};
+ enum sl28cpld_gpio_type type;
+ struct sl28cpld_gpio *gpio;
+ bool irq_support = false;
+ struct regmap *regmap;
+ int irq, ret;
+ u32 base;
+
+ if (!pdev->dev.parent)
+ return -ENODEV;
+
+ dev_id = platform_get_device_id(pdev);
+ if (dev_id)
+ type = dev_id->driver_data;
+ else
+ type = (uintptr_t)of_device_get_match_data(&pdev->dev);
+ if (!type)
+ return -ENODEV;
+
+ gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
+ if (!gpio)
+ return -ENOMEM;
+
+ ret = device_property_read_u32(&pdev->dev, "reg", &base);
+ if (ret)
+ return -EINVAL;
+
+ regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!regmap)
+ return -ENODEV;
+
+ config.regmap = regmap;
+ config.parent = &pdev->dev;
+ config.ngpio = 8;
+
+ switch (type) {
+ case SL28CPLD_GPIO:
+ config.reg_dat_base = base + GPIO_REG_IN;
+ config.reg_set_base = base + GPIO_REG_OUT;
+ /* reg_dir_out_base might be zero */
+ config.reg_dir_out_base = GPIO_REGMAP_ADDR(base +
+ GPIO_REG_DIR);
+ irq_support = true;
+ break;
+ case SL28CPLD_GPO:
+ config.reg_set_base = base + GPO_REG_OUT;
+ break;
+ case SL28CPLD_GPI:
+ config.reg_dat_base = base + GPI_REG_IN;
+ break;
+ default:
+ dev_err(&pdev->dev, "unknown type %d\n", type);
+ return -ENODEV;
+ }
+
+ if (irq_support &&
+ device_property_read_bool(&pdev->dev, "interrupt-controller")) {
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = sl28cpld_gpio_irq_init(&pdev->dev, gpio, regmap,
+ base, irq);
+ if (ret)
+ return ret;
+
+ config.irq_domain = regmap_irq_get_domain(gpio->irq_data);
+ }
+
+ return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config));
+}
+
+static const struct of_device_id sl28cpld_gpio_of_match[] = {
+ { .compatible = "kontron,sl28cpld-gpio",
+ .data = (void *)SL28CPLD_GPIO },
+ { .compatible = "kontron,sl28cpld-gpi",
+ .data = (void *)SL28CPLD_GPI },
+ { .compatible = "kontron,sl28cpld-gpo",
+ .data = (void *)SL28CPLD_GPO },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sl28cpld_gpio_of_match);
+
+static const struct platform_device_id sl28cpld_gpio_id_table[] = {
+ { "sl28cpld-gpio", SL28CPLD_GPIO },
+ { "sl28cpld-gpi", SL28CPLD_GPI },
+ { "sl28cpld-gpo", SL28CPLD_GPO },
+ {}
+};
+MODULE_DEVICE_TABLE(platform, sl28cpld_gpio_id_table);
+
+static struct platform_driver sl28cpld_gpio_driver = {
+ .probe = sl28cpld_gpio_probe,
+ .id_table = sl28cpld_gpio_id_table,
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .of_match_table = sl28cpld_gpio_of_match,
+ },
+};
+module_platform_driver(sl28cpld_gpio_driver);
+
+MODULE_DESCRIPTION("sl28cpld GPIO Driver");
+MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
+MODULE_LICENSE("GPL");
--
2.20.1
^ permalink raw reply related
* [PATCH v4 07/11] hwmon: add support for the sl28cpld hardware monitoring controller
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add support for the hardware monitoring controller of the sl28cpld board
management controller. This driver is part of a multi-function device.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Guenter Roeck <linux@roeck-us.net>
---
Documentation/hwmon/index.rst | 1 +
Documentation/hwmon/sl28cpld.rst | 36 ++++++++
drivers/hwmon/Kconfig | 10 +++
drivers/hwmon/Makefile | 1 +
drivers/hwmon/sl28cpld-hwmon.c | 150 +++++++++++++++++++++++++++++++
5 files changed, 198 insertions(+)
create mode 100644 Documentation/hwmon/sl28cpld.rst
create mode 100644 drivers/hwmon/sl28cpld-hwmon.c
diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst
index 55ff4b7c5349..1f4beb7449c7 100644
--- a/Documentation/hwmon/index.rst
+++ b/Documentation/hwmon/index.rst
@@ -153,6 +153,7 @@ Hardware Monitoring Kernel Drivers
sht3x
shtc1
sis5595
+ sl28cpld
smm665
smsc47b397
smsc47m192
diff --git a/Documentation/hwmon/sl28cpld.rst b/Documentation/hwmon/sl28cpld.rst
new file mode 100644
index 000000000000..7ed65f78250c
--- /dev/null
+++ b/Documentation/hwmon/sl28cpld.rst
@@ -0,0 +1,36 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+Kernel driver sl28cpld
+======================
+
+Supported chips:
+
+ * Kontron sl28cpld
+
+ Prefix: 'sl28cpld'
+
+ Datasheet: not available
+
+Authors: Michael Walle <michael@walle.cc>
+
+Description
+-----------
+
+The sl28cpld is a board management controller which also exposes a hardware
+monitoring controller. At the moment this controller supports a single fan
+supervisor. In the future there might be other flavours and additional
+hardware monitoring might be supported.
+
+The fan supervisor has a 7 bit counter register and a counter period of 1
+second. If the 7 bit counter overflows, the supervisor will automatically
+switch to x8 mode to support a wider input range at the loss of
+granularity.
+
+Sysfs entries
+-------------
+
+The following attributes are supported.
+
+======================= ========================================================
+fan1_input Fan RPM. Assuming 2 pulses per revolution.
+======================= ========================================================
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 288ae9f63588..e1cab08e80ce 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1459,6 +1459,16 @@ config SENSORS_RASPBERRYPI_HWMON
This driver can also be built as a module. If so, the module
will be called raspberrypi-hwmon.
+config SENSORS_SL28CPLD
+ tristate "Kontron sl28cpl hardware monitoring driver"
+ depends on MFD_SL28CPLD
+ help
+ If you say yes here you get support for the fan supervisor of the
+ sl28cpld board management controller.
+
+ This driver can also be built as a module. If so, the module
+ will be called sl28cpld-hwmon.
+
config SENSORS_SHT15
tristate "Sensiron humidity and temperature sensors. SHT15 and compat."
depends on GPIOLIB || COMPILE_TEST
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 3e32c21f5efe..03822f6bf970 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -158,6 +158,7 @@ obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o
obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o
obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o
obj-$(CONFIG_SENSORS_SCH5636) += sch5636.o
+obj-$(CONFIG_SENSORS_SL28CPLD) += sl28cpld-hwmon.o
obj-$(CONFIG_SENSORS_SHT15) += sht15.o
obj-$(CONFIG_SENSORS_SHT21) += sht21.o
obj-$(CONFIG_SENSORS_SHT3x) += sht3x.o
diff --git a/drivers/hwmon/sl28cpld-hwmon.c b/drivers/hwmon/sl28cpld-hwmon.c
new file mode 100644
index 000000000000..de24964a7322
--- /dev/null
+++ b/drivers/hwmon/sl28cpld-hwmon.c
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * sl28cpld hardware monitoring driver.
+ *
+ * Copyright 2019 Kontron Europe GmbH
+ */
+
+#include <linux/bitfield.h>
+#include <linux/hwmon.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+#define FAN_INPUT 0x00
+#define FAN_SCALE_X8 BIT(7)
+#define FAN_VALUE_MASK GENMASK(6, 0)
+
+struct sl28cpld_hwmon {
+ struct regmap *regmap;
+ u32 offset;
+};
+
+static umode_t sl28cpld_hwmon_is_visible(const void *data,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel)
+{
+ return 0444;
+}
+
+static int sl28cpld_hwmon_read(struct device *dev,
+ enum hwmon_sensor_types type, u32 attr,
+ int channel, long *input)
+{
+ struct sl28cpld_hwmon *hwmon = dev_get_drvdata(dev);
+ unsigned int value;
+ int ret;
+
+ switch (attr) {
+ case hwmon_fan_input:
+ ret = regmap_read(hwmon->regmap, hwmon->offset + FAN_INPUT,
+ &value);
+ if (ret)
+ return ret;
+ /*
+ * The register has a 7 bit value and 1 bit which indicates the
+ * scale. If the MSB is set, then the lower 7 bit has to be
+ * multiplied by 8, to get the correct reading.
+ */
+ if (value & FAN_SCALE_X8)
+ value = FIELD_GET(FAN_VALUE_MASK, value) << 3;
+
+ /*
+ * The counter period is 1000ms and the sysfs specification
+ * says we should asssume 2 pulses per revolution.
+ */
+ value *= 60 / 2;
+
+ break;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ *input = value;
+ return 0;
+}
+
+static const u32 sl28cpld_hwmon_fan_config[] = {
+ HWMON_F_INPUT,
+ 0
+};
+
+static const struct hwmon_channel_info sl28cpld_hwmon_fan = {
+ .type = hwmon_fan,
+ .config = sl28cpld_hwmon_fan_config,
+};
+
+static const struct hwmon_channel_info *sl28cpld_hwmon_info[] = {
+ &sl28cpld_hwmon_fan,
+ NULL
+};
+
+static const struct hwmon_ops sl28cpld_hwmon_ops = {
+ .is_visible = sl28cpld_hwmon_is_visible,
+ .read = sl28cpld_hwmon_read,
+};
+
+static const struct hwmon_chip_info sl28cpld_hwmon_chip_info = {
+ .ops = &sl28cpld_hwmon_ops,
+ .info = sl28cpld_hwmon_info,
+};
+
+static int sl28cpld_hwmon_probe(struct platform_device *pdev)
+{
+ struct sl28cpld_hwmon *hwmon;
+ struct device *hwmon_dev;
+ int ret;
+
+ if (!pdev->dev.parent)
+ return -ENODEV;
+
+ hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL);
+ if (!hwmon)
+ return -ENOMEM;
+
+ hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!hwmon->regmap)
+ return -ENODEV;
+
+ ret = device_property_read_u32(&pdev->dev, "reg", &hwmon->offset);
+ if (ret)
+ return -EINVAL;
+
+ hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
+ "sl28cpld_hwmon", hwmon,
+ &sl28cpld_hwmon_chip_info, NULL);
+ if (IS_ERR(hwmon_dev)) {
+ dev_err(&pdev->dev, "failed to register as hwmon device");
+ return PTR_ERR(hwmon_dev);
+ }
+
+ return 0;
+}
+
+static const struct of_device_id sl28cpld_hwmon_of_match[] = {
+ { .compatible = "kontron,sl28cpld-fan" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sl28cpld_hwmon_of_match);
+
+static const struct platform_device_id sl28cpld_hwmon_id_table[] = {
+ { "sl28cpld-fan" },
+ {}
+};
+MODULE_DEVICE_TABLE(platform, sl28cpld_hwmon_id_table);
+
+static struct platform_driver sl28cpld_hwmon_driver = {
+ .probe = sl28cpld_hwmon_probe,
+ .id_table = sl28cpld_hwmon_id_table,
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .of_match_table = sl28cpld_hwmon_of_match,
+ },
+};
+module_platform_driver(sl28cpld_hwmon_driver);
+
+MODULE_DESCRIPTION("sl28cpld Hardware Monitoring Driver");
+MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
+MODULE_LICENSE("GPL");
--
2.20.1
^ permalink raw reply related
* [PATCH v4 02/11] mfd: Add support for Kontron sl28cpld management controller
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add the core support for the board management controller found on the
SMARC-sAL28 board. It consists of the following functions:
- watchdog
- GPIO controller
- PWM controller
- fan sensor
- interrupt controller
At the moment, this controller is used on the Kontron SMARC-sAL28 board.
Please note that the MFD driver is defined as bool in the Kconfig
because the next patch will add interrupt support.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/mfd/Kconfig | 19 ++++++++++
drivers/mfd/Makefile | 2 ++
drivers/mfd/sl28cpld.c | 79 ++++++++++++++++++++++++++++++++++++++++++
3 files changed, 100 insertions(+)
create mode 100644 drivers/mfd/sl28cpld.c
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 4f8b73d92df3..5c0cd514d197 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2109,5 +2109,24 @@ config SGI_MFD_IOC3
If you have an SGI Origin, Octane, or a PCI IOC3 card,
then say Y. Otherwise say N.
+config MFD_SL28CPLD
+ bool "Kontron sl28 core driver"
+ depends on I2C=y
+ depends on OF
+ select REGMAP_I2C
+ select MFD_CORE
+ help
+ This option enables support for the board management controller
+ found on the Kontron sl28 CPLD. You have to select individual
+ functions, such as watchdog, GPIO, etc, under the corresponding menus
+ in order to enable them.
+
+ Currently supported boards are:
+
+ Kontron SMARC-sAL28
+
+ To compile this driver as a module, choose M here: the module will be
+ called sl28cpld.
+
endmenu
endif
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 9367a92f795a..be59fb40aa28 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -264,3 +264,5 @@ obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
obj-$(CONFIG_MFD_STMFX) += stmfx.o
obj-$(CONFIG_SGI_MFD_IOC3) += ioc3.o
+
+obj-$(CONFIG_MFD_SL28CPLD) += sl28cpld.o
diff --git a/drivers/mfd/sl28cpld.c b/drivers/mfd/sl28cpld.c
new file mode 100644
index 000000000000..a23194bb6efa
--- /dev/null
+++ b/drivers/mfd/sl28cpld.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * MFD core for the sl28cpld.
+ *
+ * Copyright 2019 Kontron Europe GmbH
+ */
+
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/mfd/core.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/regmap.h>
+
+#define SL28CPLD_VERSION 0x03
+#define SL28CPLD_MIN_REQ_VERSION 14
+
+struct sl28cpld {
+ struct device *dev;
+ struct regmap *regmap;
+};
+
+static const struct regmap_config sl28cpld_regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ .reg_stride = 1,
+};
+
+static int sl28cpld_probe(struct i2c_client *i2c)
+{
+ struct sl28cpld *sl28cpld;
+ struct device *dev = &i2c->dev;
+ unsigned int cpld_version;
+ int ret;
+
+ sl28cpld = devm_kzalloc(dev, sizeof(*sl28cpld), GFP_KERNEL);
+ if (!sl28cpld)
+ return -ENOMEM;
+
+ sl28cpld->regmap = devm_regmap_init_i2c(i2c, &sl28cpld_regmap_config);
+ if (IS_ERR(sl28cpld->regmap))
+ return PTR_ERR(sl28cpld->regmap);
+
+ ret = regmap_read(sl28cpld->regmap, SL28CPLD_VERSION, &cpld_version);
+ if (ret)
+ return ret;
+
+ if (cpld_version < SL28CPLD_MIN_REQ_VERSION) {
+ dev_err(dev, "unsupported CPLD version %d\n", cpld_version);
+ return -ENODEV;
+ }
+
+ sl28cpld->dev = dev;
+ i2c_set_clientdata(i2c, sl28cpld);
+
+ dev_info(dev, "successfully probed. CPLD version %d\n", cpld_version);
+
+ return devm_of_platform_populate(&i2c->dev);
+}
+
+static const struct of_device_id sl28cpld_of_match[] = {
+ { .compatible = "kontron,sl28cpld-r1", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, sl28cpld_of_match);
+
+static struct i2c_driver sl28cpld_driver = {
+ .probe_new = sl28cpld_probe,
+ .driver = {
+ .name = "sl28cpld",
+ .of_match_table = of_match_ptr(sl28cpld_of_match),
+ },
+};
+module_i2c_driver(sl28cpld_driver);
+
+MODULE_DESCRIPTION("sl28cpld MFD Core Driver");
+MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
+MODULE_LICENSE("GPL");
--
2.20.1
^ permalink raw reply related
* [PATCH v4 05/11] pwm: add support for sl28cpld PWM controller
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add support for the PWM controller of the sl28cpld board management
controller. This is part of a multi-function device driver.
The controller has one PWM channel and can just generate four distinct
frequencies.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/pwm/Kconfig | 10 ++
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-sl28cpld.c | 201 +++++++++++++++++++++++++++++++++++++
3 files changed, 212 insertions(+)
create mode 100644 drivers/pwm/pwm-sl28cpld.c
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index cb8d739067d2..a39371c11ff6 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -437,6 +437,16 @@ config PWM_SIFIVE
To compile this driver as a module, choose M here: the module
will be called pwm-sifive.
+config PWM_SL28CPLD
+ tristate "Kontron sl28 PWM support"
+ depends on MFD_SL28CPLD
+ help
+ Generic PWM framework driver for board management controller
+ found on the Kontron sl28 CPLD.
+
+ To compile this driver as a module, choose M here: the module
+ will be called pwm-sl28cpld.
+
config PWM_SPEAR
tristate "STMicroelectronics SPEAr PWM support"
depends on PLAT_SPEAR || COMPILE_TEST
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index a59c710e98c7..c479623724e8 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_PWM_RENESAS_TPU) += pwm-renesas-tpu.o
obj-$(CONFIG_PWM_ROCKCHIP) += pwm-rockchip.o
obj-$(CONFIG_PWM_SAMSUNG) += pwm-samsung.o
obj-$(CONFIG_PWM_SIFIVE) += pwm-sifive.o
+obj-$(CONFIG_PWM_SL28CPLD) += pwm-sl28cpld.o
obj-$(CONFIG_PWM_SPEAR) += pwm-spear.o
obj-$(CONFIG_PWM_SPRD) += pwm-sprd.o
obj-$(CONFIG_PWM_STI) += pwm-sti.o
diff --git a/drivers/pwm/pwm-sl28cpld.c b/drivers/pwm/pwm-sl28cpld.c
new file mode 100644
index 000000000000..d82303f509f5
--- /dev/null
+++ b/drivers/pwm/pwm-sl28cpld.c
@@ -0,0 +1,201 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * sl28cpld PWM driver.
+ *
+ * Copyright 2019 Kontron Europe GmbH
+ */
+
+#include <linux/bitfield.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pwm.h>
+#include <linux/regmap.h>
+
+/*
+ * PWM timer block registers.
+ */
+#define PWM_CTRL 0x00
+#define PWM_ENABLE BIT(7)
+#define PWM_MODE_250HZ 0
+#define PWM_MODE_500HZ 1
+#define PWM_MODE_1KHZ 2
+#define PWM_MODE_2KHZ 3
+#define PWM_MODE_MASK GENMASK(1, 0)
+#define PWM_CYCLE 0x01
+#define PWM_CYCLE_MAX 0x7f
+
+struct sl28cpld_pwm {
+ struct pwm_chip pwm_chip;
+ struct regmap *regmap;
+ u32 offset;
+};
+
+struct sl28cpld_pwm_periods {
+ u8 ctrl;
+ unsigned long duty_cycle;
+};
+
+struct sl28cpld_pwm_config {
+ unsigned long period_ns;
+ u8 max_duty_cycle;
+};
+
+static struct sl28cpld_pwm_config sl28cpld_pwm_config[] = {
+ [PWM_MODE_250HZ] = { .period_ns = 4000000, .max_duty_cycle = 0x80 },
+ [PWM_MODE_500HZ] = { .period_ns = 2000000, .max_duty_cycle = 0x40 },
+ [PWM_MODE_1KHZ] = { .period_ns = 1000000, .max_duty_cycle = 0x20 },
+ [PWM_MODE_2KHZ] = { .period_ns = 500000, .max_duty_cycle = 0x10 },
+};
+
+static inline struct sl28cpld_pwm *to_sl28cpld_pwm(struct pwm_chip *chip)
+{
+ return container_of(chip, struct sl28cpld_pwm, pwm_chip);
+}
+
+static void sl28cpld_pwm_get_state(struct pwm_chip *chip,
+ struct pwm_device *pwm,
+ struct pwm_state *state)
+{
+ struct sl28cpld_pwm *spc = to_sl28cpld_pwm(chip);
+ static struct sl28cpld_pwm_config *config;
+ unsigned int reg;
+ unsigned long cycle;
+ unsigned int mode;
+
+ regmap_read(spc->regmap, spc->offset + PWM_CTRL, ®);
+
+ state->enabled = reg & PWM_ENABLE;
+
+ mode = FIELD_GET(PWM_MODE_MASK, reg);
+ config = &sl28cpld_pwm_config[mode];
+ state->period = config->period_ns;
+
+ regmap_read(spc->regmap, spc->offset + PWM_CYCLE, ®);
+ cycle = reg * config->period_ns;
+ state->duty_cycle = DIV_ROUND_CLOSEST_ULL(cycle,
+ config->max_duty_cycle);
+}
+
+static int sl28cpld_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
+ const struct pwm_state *state)
+{
+ struct sl28cpld_pwm *spc = to_sl28cpld_pwm(chip);
+ struct sl28cpld_pwm_config *config;
+ unsigned long long cycle;
+ int ret;
+ int mode;
+ u8 ctrl;
+
+ /* update config, first search best matching period */
+ for (mode = 0; mode < ARRAY_SIZE(sl28cpld_pwm_config); mode++) {
+ config = &sl28cpld_pwm_config[mode];
+ if (state->period == config->period_ns)
+ break;
+ }
+
+ if (mode == ARRAY_SIZE(sl28cpld_pwm_config))
+ return -EINVAL;
+
+ ctrl = FIELD_PREP(PWM_MODE_MASK, mode);
+ if (state->enabled)
+ ctrl |= PWM_ENABLE;
+
+ cycle = state->duty_cycle * config->max_duty_cycle;
+ do_div(cycle, state->period);
+
+ /*
+ * The hardware doesn't allow to set max_duty_cycle if the
+ * 250Hz mode is enabled. But since this is "all-high" output
+ * just use the 500Hz mode with the duty cycle to max value.
+ */
+ if (cycle == config->max_duty_cycle) {
+ ctrl &= ~PWM_MODE_MASK;
+ ctrl |= FIELD_PREP(PWM_MODE_MASK, PWM_MODE_500HZ);
+ cycle = PWM_CYCLE_MAX;
+ }
+
+ ret = regmap_write(spc->regmap, spc->offset + PWM_CTRL, ctrl);
+ if (ret)
+ return ret;
+
+ return regmap_write(spc->regmap, spc->offset + PWM_CYCLE, (u8)cycle);
+}
+
+static const struct pwm_ops sl28cpld_pwm_ops = {
+ .apply = sl28cpld_pwm_apply,
+ .get_state = sl28cpld_pwm_get_state,
+ .owner = THIS_MODULE,
+};
+
+static int sl28cpld_pwm_probe(struct platform_device *pdev)
+{
+ struct sl28cpld_pwm *pwm;
+ struct pwm_chip *chip;
+ int ret;
+
+ if (!pdev->dev.parent)
+ return -ENODEV;
+
+ pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
+ if (!pwm)
+ return -ENOMEM;
+
+ pwm->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!pwm->regmap)
+ return -ENODEV;
+
+ ret = device_property_read_u32(&pdev->dev, "reg", &pwm->offset);
+ if (ret)
+ return -EINVAL;
+
+ /* initialize struct pwm_chip */
+ chip = &pwm->pwm_chip;
+ chip->dev = &pdev->dev;
+ chip->ops = &sl28cpld_pwm_ops;
+ chip->base = -1;
+ chip->npwm = 1;
+
+ ret = pwmchip_add(&pwm->pwm_chip);
+ if (ret < 0)
+ return ret;
+
+ platform_set_drvdata(pdev, pwm);
+
+ return 0;
+}
+
+static int sl28cpld_pwm_remove(struct platform_device *pdev)
+{
+ struct sl28cpld_pwm *pwm = platform_get_drvdata(pdev);
+
+ return pwmchip_remove(&pwm->pwm_chip);
+}
+
+static const struct of_device_id sl28cpld_pwm_of_match[] = {
+ { .compatible = "kontron,sl28cpld-pwm" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sl28cpld_pwm_of_match);
+
+static const struct platform_device_id sl28cpld_pwm_id_table[] = {
+ {"sl28cpld-pwm"},
+ {},
+};
+MODULE_DEVICE_TABLE(platform, sl28cpld_pwm_id_table);
+
+static struct platform_driver sl28cpld_pwm_driver = {
+ .probe = sl28cpld_pwm_probe,
+ .remove = sl28cpld_pwm_remove,
+ .id_table = sl28cpld_pwm_id_table,
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .of_match_table = sl28cpld_pwm_of_match,
+ },
+};
+module_platform_driver(sl28cpld_pwm_driver);
+
+MODULE_DESCRIPTION("sl28cpld PWM Driver");
+MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
+MODULE_LICENSE("GPL");
--
2.20.1
^ permalink raw reply related
* [PATCH v4 04/11] watchdog: add support for sl28cpld watchdog
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add support for the watchdog of the sl28cpld board management
controller. This is part of a multi-function device driver.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Guenter Roeck <linux@roeck-us.net>
---
drivers/watchdog/Kconfig | 11 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/sl28cpld_wdt.c | 231 ++++++++++++++++++++++++++++++++
3 files changed, 243 insertions(+)
create mode 100644 drivers/watchdog/sl28cpld_wdt.c
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 55b910c453da..2c7b0f10151e 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -340,6 +340,17 @@ config MLX_WDT
To compile this driver as a module, choose M here: the
module will be called mlx-wdt.
+config SL28CPLD_WATCHDOG
+ tristate "Kontron sl28 watchdog"
+ depends on MFD_SL28CPLD
+ select WATCHDOG_CORE
+ help
+ Say Y here to include support for the watchdog timer
+ on the Kontron sl28 CPLD.
+
+ To compile this driver as a module, choose M here: the
+ module will be called sl28cpld_wdt.
+
# ALPHA Architecture
# ARM Architecture
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 97bed1d3d97c..aa6e41126901 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -225,3 +225,4 @@ obj-$(CONFIG_MENF21BMC_WATCHDOG) += menf21bmc_wdt.o
obj-$(CONFIG_MENZ069_WATCHDOG) += menz69_wdt.o
obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o
obj-$(CONFIG_STPMIC1_WATCHDOG) += stpmic1_wdt.o
+obj-$(CONFIG_SL28CPLD_WATCHDOG) += sl28cpld_wdt.o
diff --git a/drivers/watchdog/sl28cpld_wdt.c b/drivers/watchdog/sl28cpld_wdt.c
new file mode 100644
index 000000000000..6c9518dc454a
--- /dev/null
+++ b/drivers/watchdog/sl28cpld_wdt.c
@@ -0,0 +1,231 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * sl28cpld watchdog driver.
+ *
+ * Copyright 2019 Kontron Europe GmbH
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/watchdog.h>
+
+/*
+ * Watchdog timer block registers.
+ */
+#define WDT_CTRL 0x00
+#define WDT_CTRL_EN BIT(0)
+#define WDT_CTRL_LOCK BIT(2)
+#define WDT_CTRL_ASSERT_SYS_RESET BIT(6)
+#define WDT_CTRL_ASSERT_WDT_TIMEOUT BIT(7)
+#define WDT_TIMEOUT 0x01
+#define WDT_KICK 0x02
+#define WDT_KICK_VALUE 0x6b
+#define WDT_COUNT 0x03
+
+#define WDT_DEFAULT_TIMEOUT 10
+
+static bool nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, bool, 0);
+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
+ __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+
+static int timeout;
+module_param(timeout, int, 0);
+MODULE_PARM_DESC(timeout, "Initial watchdog timeout in seconds");
+
+struct sl28cpld_wdt {
+ struct watchdog_device wdd;
+ struct regmap *regmap;
+ u32 offset;
+ bool assert_wdt_timeout;
+};
+
+static int sl28cpld_wdt_ping(struct watchdog_device *wdd)
+{
+ struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
+
+ return regmap_write(wdt->regmap, wdt->offset + WDT_KICK,
+ WDT_KICK_VALUE);
+}
+
+static int sl28cpld_wdt_start(struct watchdog_device *wdd)
+{
+ struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
+ unsigned int val;
+
+ val = WDT_CTRL_EN | WDT_CTRL_ASSERT_SYS_RESET;
+ if (wdt->assert_wdt_timeout)
+ val |= WDT_CTRL_ASSERT_WDT_TIMEOUT;
+ if (nowayout)
+ val |= WDT_CTRL_LOCK;
+
+ return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL,
+ val, val);
+}
+
+static int sl28cpld_wdt_stop(struct watchdog_device *wdd)
+{
+ struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
+
+ return regmap_update_bits(wdt->regmap, wdt->offset + WDT_CTRL,
+ WDT_CTRL_EN, 0);
+}
+
+static unsigned int sl28cpld_wdt_get_timeleft(struct watchdog_device *wdd)
+{
+ struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
+ unsigned int val;
+ int ret;
+
+ ret = regmap_read(wdt->regmap, wdt->offset + WDT_COUNT, &val);
+
+ return (ret < 0) ? 0 : val;
+}
+
+static int sl28cpld_wdt_set_timeout(struct watchdog_device *wdd,
+ unsigned int timeout)
+{
+ struct sl28cpld_wdt *wdt = watchdog_get_drvdata(wdd);
+ int ret;
+
+ ret = regmap_write(wdt->regmap, wdt->offset + WDT_TIMEOUT, timeout);
+ if (!ret)
+ wdd->timeout = timeout;
+
+ return ret;
+}
+
+static const struct watchdog_info sl28cpld_wdt_info = {
+ .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
+ .identity = "sl28cpld watchdog",
+};
+
+static struct watchdog_ops sl28cpld_wdt_ops = {
+ .owner = THIS_MODULE,
+ .start = sl28cpld_wdt_start,
+ .stop = sl28cpld_wdt_stop,
+ .ping = sl28cpld_wdt_ping,
+ .set_timeout = sl28cpld_wdt_set_timeout,
+ .get_timeleft = sl28cpld_wdt_get_timeleft,
+};
+
+static int sl28cpld_wdt_probe(struct platform_device *pdev)
+{
+ struct watchdog_device *wdd;
+ struct sl28cpld_wdt *wdt;
+ unsigned int status;
+ unsigned int val;
+ int ret;
+
+ if (!pdev->dev.parent)
+ return -ENODEV;
+
+ wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
+ if (!wdt)
+ return -ENOMEM;
+
+ wdt->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!wdt->regmap)
+ return -ENODEV;
+
+ ret = device_property_read_u32(&pdev->dev, "reg", &wdt->offset);
+ if (ret)
+ return -EINVAL;
+
+ wdt->assert_wdt_timeout = device_property_read_bool(&pdev->dev,
+ "kontron,assert-wdt-timeout-pin");
+
+ /* initialize struct watchdog_device */
+ wdd = &wdt->wdd;
+ wdd->parent = &pdev->dev;
+ wdd->info = &sl28cpld_wdt_info;
+ wdd->ops = &sl28cpld_wdt_ops;
+ wdd->min_timeout = 1;
+ wdd->max_timeout = 255;
+
+ watchdog_set_drvdata(wdd, wdt);
+ watchdog_stop_on_reboot(wdd);
+
+ /*
+ * Read the status early, in case of an error, we haven't modified the
+ * hardware.
+ */
+ ret = regmap_read(wdt->regmap, wdt->offset + WDT_CTRL, &status);
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Initial timeout value, may be overwritten by device tree or module
+ * parmeter in watchdog_init_timeout().
+ *
+ * Reading a zero here means that either the hardware has a default
+ * value of zero (which is very unlikely and definitely a hardware
+ * bug) or the bootloader set it to zero. In any case, we handle
+ * this case gracefully and set out own timeout.
+ */
+ ret = regmap_read(wdt->regmap, wdt->offset + WDT_TIMEOUT, &val);
+ if (ret < 0)
+ return ret;
+
+ if (val)
+ wdd->timeout = val;
+ else
+ wdd->timeout = WDT_DEFAULT_TIMEOUT;
+
+ watchdog_init_timeout(wdd, timeout, &pdev->dev);
+ sl28cpld_wdt_set_timeout(wdd, wdd->timeout);
+
+ /* if the watchdog is locked, we set nowayout */
+ if (status & WDT_CTRL_LOCK)
+ nowayout = true;
+ watchdog_set_nowayout(wdd, nowayout);
+
+ /*
+ * If watchdog is already running, keep it enabled, but make
+ * sure its mode is set correctly.
+ */
+ if (status & WDT_CTRL_EN) {
+ sl28cpld_wdt_start(wdd);
+ set_bit(WDOG_HW_RUNNING, &wdd->status);
+ }
+
+ ret = devm_watchdog_register_device(&pdev->dev, wdd);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to register watchdog device\n");
+ return ret;
+ }
+
+ dev_info(&pdev->dev, "initial timeout %d sec%s\n",
+ wdd->timeout, nowayout ? ", nowayout" : "");
+
+ return 0;
+}
+
+static const struct of_device_id sl28cpld_wdt_of_match[] = {
+ { .compatible = "kontron,sl28cpld-wdt" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sl28cpld_wdt_of_match);
+
+static const struct platform_device_id sl28cpld_wdt_id_table[] = {
+ { "sl28cpld-wdt" },
+ {},
+};
+MODULE_DEVICE_TABLE(platform, sl28cpld_wdt_id_table);
+
+static struct platform_driver sl28cpld_wdt_driver = {
+ .probe = sl28cpld_wdt_probe,
+ .id_table = sl28cpld_wdt_id_table,
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .of_match_table = sl28cpld_wdt_of_match,
+ },
+};
+module_platform_driver(sl28cpld_wdt_driver);
+
+MODULE_DESCRIPTION("sl28cpld Watchdog Driver");
+MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
+MODULE_LICENSE("GPL");
--
2.20.1
^ permalink raw reply related
* [PATCH v4 03/11] irqchip: add sl28cpld interrupt controller support
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add support for the interrupt controller inside the sl28 CPLD management
controller.
The interrupt controller can handle at most 8 interrupts and is really
simplistic and consists only of an interrupt mask and an interrupt
pending register.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/irqchip/Kconfig | 3 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-sl28cpld.c | 102 +++++++++++++++++++++++++++++++++
drivers/mfd/Kconfig | 2 +
4 files changed, 108 insertions(+)
create mode 100644 drivers/irqchip/irq-sl28cpld.c
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 3e473f4eb175..c4b840bc982e 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -246,6 +246,9 @@ config RENESAS_RZA1_IRQC
Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
to 8 external interrupts with configurable sense select.
+config SL28CPLD_INTC
+ bool
+
config ST_IRQCHIP
bool
select REGMAP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 3a4ce283189a..bcd9797a5aed 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -110,3 +110,4 @@ obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o
obj-$(CONFIG_LOONGSON_HTVEC) += irq-loongson-htvec.o
obj-$(CONFIG_LOONGSON_PCH_PIC) += irq-loongson-pch-pic.o
obj-$(CONFIG_LOONGSON_PCH_MSI) += irq-loongson-pch-msi.o
+obj-$(CONFIG_SL28CPLD_INTC) += irq-sl28cpld.o
diff --git a/drivers/irqchip/irq-sl28cpld.c b/drivers/irqchip/irq-sl28cpld.c
new file mode 100644
index 000000000000..2151f1b390d7
--- /dev/null
+++ b/drivers/irqchip/irq-sl28cpld.c
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * sl28cpld interrupt controller driver.
+ *
+ * Copyright 2019 Kontron Europe GmbH
+ */
+
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+
+#define INTC_IE 0x00
+#define INTC_IP 0x01
+
+static const struct regmap_irq sl28cpld_irqs[] = {
+ REGMAP_IRQ_REG_LINE(0, 8),
+ REGMAP_IRQ_REG_LINE(1, 8),
+ REGMAP_IRQ_REG_LINE(2, 8),
+ REGMAP_IRQ_REG_LINE(3, 8),
+ REGMAP_IRQ_REG_LINE(4, 8),
+ REGMAP_IRQ_REG_LINE(5, 8),
+ REGMAP_IRQ_REG_LINE(6, 8),
+ REGMAP_IRQ_REG_LINE(7, 8),
+};
+
+struct sl28cpld_intc {
+ struct regmap *regmap;
+ struct regmap_irq_chip chip;
+ struct regmap_irq_chip_data *irq_data;
+};
+
+static int sl28cpld_intc_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct sl28cpld_intc *irqchip;
+ unsigned int irq;
+ u32 base;
+ int ret;
+
+ if (!dev->parent)
+ return -ENODEV;
+
+ irqchip = devm_kzalloc(dev, sizeof(*irqchip), GFP_KERNEL);
+ if (!irqchip)
+ return -ENOMEM;
+
+ irqchip->regmap = dev_get_regmap(dev->parent, NULL);
+ if (!irqchip->regmap)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+
+ ret = device_property_read_u32(&pdev->dev, "reg", &base);
+ if (ret)
+ return -EINVAL;
+
+ irqchip->chip.name = "sl28cpld-intc";
+ irqchip->chip.irqs = sl28cpld_irqs;
+ irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs);
+ irqchip->chip.num_regs = 1;
+ irqchip->chip.status_base = base + INTC_IP;
+ irqchip->chip.mask_base = base + INTC_IE;
+ irqchip->chip.mask_invert = true,
+ irqchip->chip.ack_base = base + INTC_IP;
+
+ return devm_regmap_add_irq_chip_np(&pdev->dev, dev->of_node,
+ irqchip->regmap, irq,
+ IRQF_SHARED | IRQF_ONESHOT, 0,
+ &irqchip->chip, &irqchip->irq_data);
+}
+
+static const struct of_device_id sl28cpld_intc_of_match[] = {
+ { .compatible = "kontron,sl28cpld-intc" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sl28cpld_intc_of_match);
+
+static const struct platform_device_id sl28cpld_intc_id_table[] = {
+ { "sl28cpld-intc" },
+ {}
+};
+MODULE_DEVICE_TABLE(platform, sl28cpld_intc_id_table);
+
+static struct platform_driver sl28cpld_intc_driver = {
+ .probe = sl28cpld_intc_probe,
+ .id_table = sl28cpld_intc_id_table,
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .of_match_table = sl28cpld_intc_of_match,
+ }
+};
+module_platform_driver(sl28cpld_intc_driver);
+
+MODULE_DESCRIPTION("sl28cpld Interrupt Controller Driver");
+MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 5c0cd514d197..9c84c5746698 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2114,6 +2114,8 @@ config MFD_SL28CPLD
depends on I2C=y
depends on OF
select REGMAP_I2C
+ select REGMAP_IRQ
+ select SL28CPLD_INTC
select MFD_CORE
help
This option enables support for the board management controller
--
2.20.1
^ permalink raw reply related
* [PATCH v4 09/11] arm64: dts: freescale: sl28: map GPIOs to input events
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Now that we have support for GPIO lines of the SMARC connector, map the
sleep, power and lid switch signals to the corresponding keys using the
gpio-keys and gpio-keys-polled drivers. The power and sleep signals have
dedicated interrupts, thus we use these ones. The lid switch is just
mapped to a GPIO input and needs polling.
Signed-off-by: Michael Walle <michael@walle.cc>
---
.../freescale/fsl-ls1028a-kontron-sl28.dts | 32 +++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
index 8712fe82727b..c4fd99efdbba 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
@@ -9,6 +9,8 @@
/dts-v1/;
#include "fsl-ls1028a.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
/ {
model = "Kontron SMARC-sAL28";
@@ -23,6 +25,36 @@
spi1 = &dspi2;
};
+ buttons0 {
+ compatible = "gpio-keys";
+
+ power-button {
+ interrupts-extended = <&sl28cpld_intc
+ 4 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = <KEY_POWER>;
+ label = "Power";
+ };
+
+ sleep-button {
+ interrupts-extended = <&sl28cpld_intc
+ 5 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = <KEY_SLEEP>;
+ label = "Sleep";
+ };
+ };
+
+ buttons1 {
+ compatible = "gpio-keys-polled";
+ poll-interval = <200>;
+
+ lid-switch {
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>;
+ label = "Lid";
+ };
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
--
2.20.1
^ permalink raw reply related
* [PATCH v4 11/11] arm64: dts: freescale: sl28: enable fan support
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add a pwm-fan mapped to the PWM channel 0 which is connected to the
fan connector of the carrier.
Signed-off-by: Michael Walle <michael@walle.cc>
---
.../dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts
index 0973a6a45217..c45d7b40e374 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dts
@@ -15,6 +15,15 @@
compatible = "kontron,sl28-var3-ads2", "kontron,sl28-var3",
"kontron,sl28", "fsl,ls1028a";
+ pwm-fan {
+ compatible = "pwm-fan";
+ cooling-min-state = <0>;
+ cooling-max-state = <3>;
+ #cooling-cells = <2>;
+ pwms = <&sl28cpld_pwm0 0 4000000>;
+ cooling-levels = <1 128 192 255>;
+ };
+
sound {
#address-cells = <1>;
#size-cells = <0>;
--
2.20.1
^ permalink raw reply related
* [PATCH v4 08/11] arm64: dts: freescale: sl28: enable sl28cpld
From: Michael Walle @ 2020-06-04 21:10 UTC (permalink / raw)
To: linux-gpio, devicetree, linux-kernel, linux-hwmon, linux-pwm,
linux-watchdog, linux-arm-kernel
Cc: Linus Walleij, Bartosz Golaszewski, Rob Herring, Jean Delvare,
Guenter Roeck, Lee Jones, Thierry Reding, Uwe Kleine-König,
Wim Van Sebroeck, Shawn Guo, Li Yang, Thomas Gleixner,
Jason Cooper, Marc Zyngier, Mark Brown, Greg Kroah-Hartman,
Andy Shevchenko, Michael Walle
In-Reply-To: <20200604211039.12689-1-michael@walle.cc>
Add the board management controller node.
Signed-off-by: Michael Walle <michael@walle.cc>
---
.../freescale/fsl-ls1028a-kontron-sl28.dts | 102 ++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
index 360b3a168c10..8712fe82727b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "fsl-ls1028a.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Kontron SMARC-sAL28";
@@ -170,6 +171,107 @@
reg = <0x32>;
};
+ sl28cpld@4a {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "kontron,sl28cpld-r1";
+ reg = <0x4a>;
+
+ watchdog@4 {
+ compatible = "kontron,sl28cpld-wdt";
+ reg = <0x4>;
+ kontron,assert-wdt-timeout-pin;
+ };
+
+ hwmon@b {
+ compatible = "kontron,sl28cpld-fan";
+ reg = <0xb>;
+ };
+
+ sl28cpld_pwm0: pwm@c {
+ #pwm-cells = <2>;
+ compatible = "kontron,sl28cpld-pwm";
+ reg = <0xc>;
+ };
+
+ sl28cpld_pwm1: pwm@e {
+ #pwm-cells = <2>;
+ compatible = "kontron,sl28cpld-pwm";
+ reg = <0xe>;
+ };
+
+ sl28cpld_gpio0: gpio@10 {
+ compatible = "kontron,sl28cpld-gpio";
+ reg = <0x10>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N",
+ "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N",
+ "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT",
+ "GPIO6_TACHIN", "GPIO7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ sl28cpld_gpio1: gpio@15 {
+ compatible = "kontron,sl28cpld-gpio";
+ reg = <0x15>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "GPIO8", "GPIO9", "GPIO10", "GPIO11",
+ "", "", "", "";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ sl28cpld_gpio2: gpio@1a {
+ compatible = "kontron,sl28cpld-gpo";
+ reg = <0x1a>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "LCD0 voltage enable",
+ "LCD0 backlight enable",
+ "eMMC reset", "LVDS bridge reset",
+ "LVDS bridge power-down",
+ "SDIO power enable",
+ "", "";
+ };
+
+ sl28cpld_gpio3: gpio@1b {
+ compatible = "kontron,sl28cpld-gpi";
+ reg = <0x1b>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "Power button", "Force recovery", "Sleep",
+ "Battery low", "Lid state", "Charging",
+ "Charger present", "";
+ };
+
+ sl28cpld_intc: interrupt-controller@1c {
+ compatible = "kontron,sl28cpld-intc";
+ reg = <0x1c>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
--
2.20.1
^ permalink raw reply related
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