* [PATCH AUTOSEL 6.8 34/68] arm64: dts: sm8550: correct DMIC2 and DMIC3 pin config node names
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Krzysztof Kozlowski, Neil Armstrong, Bjorn Andersson, Sasha Levin,
konrad.dybcio, robh, krzysztof.kozlowski+dt, conor+dt,
linux-arm-msm, devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[ Upstream commit c6e5bf9278749eaa094dc944add747f10a15dceb ]
Correct the TLMM pin configuration and muxing node names used for DMIC2
and DMIC3 (dmic01 -> dmic23). This has no functional impact, but
improves code readability and avoids any confusion when reading the DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240212172335.124845-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index ee1ba5a8c8fc2..a6663eefd3a30 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2507,7 +2507,7 @@ data-pins {
};
};
- dmic02_default: dmic02-default-state {
+ dmic23_default: dmic23-default-state {
clk-pins {
pins = "gpio8";
function = "dmic2_clk";
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 33/68] arm64: dts: sm8450: correct DMIC2 and DMIC3 pin config node names
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Krzysztof Kozlowski, Bjorn Andersson, Sasha Levin, konrad.dybcio,
robh, krzysztof.kozlowski+dt, conor+dt, linux-arm-msm, devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[ Upstream commit 0d3eb7ff1f3a994a5b3e49a9bd48f0c2f3c80ef5 ]
Correct the TLMM pin configuration and muxing node names used for DMIC2
and DMIC3 (dmic01 -> dmic23). This has no functional impact, but
improves code readability and avoids any confusion when reading the DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240212172335.124845-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 2 +-
arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index a20d5d76af352..5a6e0b34934cb 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -1147,7 +1147,7 @@ &usb_1_qmpphy_usb_ss_in {
};
&vamacro {
- pinctrl-0 = <&dmic01_default>, <&dmic02_default>;
+ pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
pinctrl-names = "default";
vdd-micb-supply = <&vreg_s10b_1p8>;
qcom,dmic-sample-rate = <600000>;
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 01e4dfc4babd2..0a802c9a3c8f7 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3934,7 +3934,7 @@ data-pins {
};
};
- dmic02_default: dmic02-default-state {
+ dmic23_default: dmic23-default-state {
clk-pins {
pins = "gpio8";
function = "dmic2_clk";
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 32/68] arm64: dts: sc8280xp: correct DMIC2 and DMIC3 pin config node names
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Krzysztof Kozlowski, Bjorn Andersson, Sasha Levin, konrad.dybcio,
robh, krzysztof.kozlowski+dt, conor+dt, linux-arm-msm, devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[ Upstream commit 61474b18e762671a69b2df9665f3cec5c87a38af ]
Correct the TLMM pin configuration and muxing node names used for DMIC2
and DMIC3 (dmic01 -> dmic23). This has no functional impact, but
improves code readability and avoids any confusion when reading the DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240212172335.124845-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 2 +-
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index eb657e544961d..5fca27f668a5b 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -1204,7 +1204,7 @@ &usb_1_role_switch {
};
&vamacro {
- pinctrl-0 = <&dmic01_default>, <&dmic02_default>;
+ pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
pinctrl-names = "default";
vdd-micb-supply = <&vreg_s10b>;
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index febf28356ff8b..38351e8ea8b33 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2978,7 +2978,7 @@ data-pins {
};
};
- dmic02_default: dmic02-default-state {
+ dmic23_default: dmic23-default-state {
clk-pins {
pins = "gpio8";
function = "dmic2_clk";
@@ -2994,7 +2994,7 @@ data-pins {
};
};
- dmic02_sleep: dmic02-sleep-state {
+ dmic23_sleep: dmic23-sleep-state {
clk-pins {
pins = "gpio8";
function = "dmic2_clk";
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 29/68] arm64: dts: qcom: qcs6490-rb3gen2: Declare GCC clocks protected
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Bjorn Andersson, Dmitry Baryshkov, Luca Weiss, Konrad Dybcio,
Bjorn Andersson, Sasha Levin, robh, krzysztof.kozlowski+dt,
conor+dt, linux-arm-msm, devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Bjorn Andersson <quic_bjorande@quicinc.com>
[ Upstream commit 7c6bef576a8891abce08d448165b53328032aa5f ]
The SC7280 GCC binding describes clocks which, due to the difference in
security model, are not accessible on the RB3gen2 - in the same way seen
on QCM6490.
Mark these clocks as protected, to allow the board to boot. In contrast
to the present QCM6490 boards GCC_EDP_CLKREF_EN is left out, as this
does not need to be "protected" and is used on the RB3Gen2 board.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240209-qcm6490-gcc-protected-clocks-v2-1-11cd5fc13bd0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index 8bb7d13d85f66..ebbe2c1123f6e 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -413,6 +413,23 @@ vreg_bob_3p296: bob {
};
};
+&gcc {
+ protected-clocks = <GCC_CFG_NOC_LPASS_CLK>,
+ <GCC_MSS_CFG_AHB_CLK>,
+ <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>,
+ <GCC_MSS_OFFLINE_AXI_CLK>,
+ <GCC_MSS_Q6SS_BOOT_CLK_SRC>,
+ <GCC_MSS_Q6_MEMNOC_AXI_CLK>,
+ <GCC_MSS_SNOC_AXI_CLK>,
+ <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+ <GCC_QSPI_CORE_CLK>,
+ <GCC_QSPI_CORE_CLK_SRC>,
+ <GCC_SEC_CTRL_CLK_SRC>,
+ <GCC_WPSS_AHB_BDG_MST_CLK>,
+ <GCC_WPSS_AHB_CLK>,
+ <GCC_WPSS_RSCP_CLK>;
+};
+
&qupv3_id_0 {
status = "okay";
};
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 27/68] arm64: dts: rockchip: fix rk3399 hdmi ports node
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Johan Jonker, Heiko Stuebner, Sasha Levin, robh,
krzysztof.kozlowski+dt, conor+dt, dsimic, kmcopper,
rick.wertenbroek, chris.obbard, quentin.schulz, s.hauer,
knaerzche, devicetree, linux-arm-kernel, linux-rockchip
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Johan Jonker <jbx6244@gmail.com>
[ Upstream commit f051b6ace7ffcc48d6d1017191f167c0a85799f6 ]
Fix rk3399 hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/a6ab6f75-3b80-40b1-bd30-3113e14becdd@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 6e12c5a920cab..fe818a2700aa7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1956,6 +1956,7 @@ simple-audio-card,codec {
hdmi: hdmi@ff940000 {
compatible = "rockchip,rk3399-dw-hdmi";
reg = <0x0 0xff940000 0x0 0x20000>;
+ reg-io-width = <4>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_HDMI_CTRL>,
<&cru SCLK_HDMI_SFR>,
@@ -1964,13 +1965,16 @@ hdmi: hdmi@ff940000 {
<&cru PLL_VPLL>;
clock-names = "iahb", "isfr", "cec", "grf", "ref";
power-domains = <&power RK3399_PD_HDCP>;
- reg-io-width = <4>;
rockchip,grf = <&grf>;
#sound-dai-cells = <0>;
status = "disabled";
ports {
- hdmi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
@@ -1983,6 +1987,10 @@ hdmi_in_vopl: endpoint@1 {
remote-endpoint = <&vopl_out_hdmi>;
};
};
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
};
};
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 26/68] arm64: dts: rockchip: fix rk3328 hdmi ports node
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Johan Jonker, Heiko Stuebner, Sasha Levin, robh,
krzysztof.kozlowski+dt, conor+dt, dsimic, shironeko, jay.xu,
jonas, devicetree, linux-arm-kernel, linux-rockchip
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Johan Jonker <jbx6244@gmail.com>
[ Upstream commit 1d00ba4700d1e0f88ae70d028d2e17e39078fa1c ]
Fix rk3328 hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/e5dea3b7-bf84-4474-9530-cc2da3c41104@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 7b4c15c4a9c31..b6f045069ee2f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -744,11 +744,20 @@ hdmi: hdmi@ff3c0000 {
status = "disabled";
ports {
- hdmi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+
hdmi_in_vop: endpoint {
remote-endpoint = <&vop_out_hdmi>;
};
};
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
};
};
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 25/68] ARM: dts: rockchip: fix rk322x hdmi ports node
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Johan Jonker, Heiko Stuebner, Sasha Levin, robh,
krzysztof.kozlowski+dt, conor+dt, devicetree, linux-arm-kernel,
linux-rockchip
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Johan Jonker <jbx6244@gmail.com>
[ Upstream commit 15a5ed03000cf61daf87d14628085cb1bc8ae72c ]
Fix rk322x hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/9b84adf0-9312-47fd-becc-cadd06941f70@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm/boot/dts/rockchip/rk322x.dtsi | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip/rk322x.dtsi b/arch/arm/boot/dts/rockchip/rk322x.dtsi
index 831561fc18146..96421355c2746 100644
--- a/arch/arm/boot/dts/rockchip/rk322x.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk322x.dtsi
@@ -736,14 +736,20 @@ hdmi: hdmi@200a0000 {
status = "disabled";
ports {
- hdmi_in: port {
- #address-cells = <1>;
- #size-cells = <0>;
- hdmi_in_vop: endpoint@0 {
- reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+
+ hdmi_in_vop: endpoint {
remote-endpoint = <&vop_out_hdmi>;
};
};
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
};
};
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 24/68] ARM: dts: rockchip: fix rk3288 hdmi ports node
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Johan Jonker, Heiko Stuebner, Sasha Levin, robh,
krzysztof.kozlowski+dt, conor+dt, devicetree, linux-arm-kernel,
linux-rockchip
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Johan Jonker <jbx6244@gmail.com>
[ Upstream commit 585e4dc07100a6465b3da8d24e46188064c1c925 ]
Fix rk3288 hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding with some reordering
to align with the (new) documentation about
property ordering.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/cc3a9b4f-076d-4660-b464-615003b6a066@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm/boot/dts/rockchip/rk3288.dtsi | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index ead343dc3df10..3f1d640afafae 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -1240,27 +1240,37 @@ hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3288-dw-hdmi";
reg = <0x0 0xff980000 0x0 0x20000>;
reg-io-width = <4>;
- #sound-dai-cells = <0>;
- rockchip,grf = <&grf>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>;
clock-names = "iahb", "isfr", "cec";
power-domains = <&power RK3288_PD_VIO>;
+ rockchip,grf = <&grf>;
+ #sound-dai-cells = <0>;
status = "disabled";
ports {
- hdmi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
+
hdmi_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_hdmi>;
};
+
hdmi_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_hdmi>;
};
};
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
};
};
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 16/68] arm64: dts: qcom: qrb2210-rb1: disable cluster power domains
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Dmitry Baryshkov, Bjorn Andersson, Sasha Levin, konrad.dybcio,
robh, krzysztof.kozlowski+dt, conor+dt, linux-arm-msm, devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[ Upstream commit 7f492d48f08207e4ee23edc926b11de9f720aa61 ]
If cluster domain idle state is enabled on the RB1, the board becomes
significantly less responsive. Under certain circumstances (if some of
the devices are disabled in kernel config) the board can even lock up.
It seems this is caused by the MPM not updating wakeup timer during CPU
idle (in the same way the RPMh updates it when cluster idle state is
entered).
Disable cluster domain idle for the RB1 board until MPM driver is fixed
to cooperate with the CPU idle states.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240130-rb1-suspend-cluster-v2-1-5bc1109b0869@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/qrb2210-rb1.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
index aa53b6af6d9cb..9a0308ef8b0f8 100644
--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
+++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
@@ -177,6 +177,24 @@ vph_pwr: regulator-vph-pwr {
};
};
+&CPU_PD0 {
+ /delete-property/ power-domains;
+};
+
+&CPU_PD1 {
+ /delete-property/ power-domains;
+};
+
+&CPU_PD2 {
+ /delete-property/ power-domains;
+};
+
+&CPU_PD3 {
+ /delete-property/ power-domains;
+};
+
+/delete-node/ &CLUSTER_PD;
+
&gpi_dma0 {
status = "okay";
};
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 15/68] arm64: dts: ti: Makefile: Add HDMI audio check for AM62A7-SK
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Aradhya Bhatia, Vignesh Raghavendra, Sasha Levin, nm, kristo,
robh, krzysztof.kozlowski+dt, conor+dt, linux-arm-kernel,
devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Aradhya Bhatia <a-bhatia1@ti.com>
[ Upstream commit cff6dd01a68fe9a8aaab724ef4e21f37eff609e9 ]
HDMI audio can be enabled over AM62A-SK using the same DT overlay that
is used for AM625 / AM62-LP SK-EVMs.
Add the sk.dtb + hdmi-audio.dtbo combination for AM62A7-SK as well, to
check for overlay applicability during DTBS compile tests.
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20240201125452.1920623-4-a-bhatia1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/ti/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 52c1dc9103087..a0304fcd6b5ea 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -101,6 +101,7 @@ k3-am62a7-sk-csi2-ov5640-dtbs := k3-am62a7-sk.dtb \
k3-am62x-sk-csi2-ov5640.dtbo
k3-am62a7-sk-csi2-tevi-ov5640-dtbs := k3-am62a7-sk.dtb \
k3-am62x-sk-csi2-tevi-ov5640.dtbo
+k3-am62a7-sk-hdmi-audio-dtbs := k3-am62a7-sk.dtb k3-am62x-sk-hdmi-audio.dtbo
k3-am642-tqma64xxl-mbax4xxl-sdcard-dtbs := \
k3-am642-tqma64xxl-mbax4xxl.dtb k3-am64-tqma64xxl-mbax4xxl-sdcard.dtbo
k3-am642-tqma64xxl-mbax4xxl-wlan-dtbs := \
@@ -118,6 +119,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
k3-am62-lp-sk-hdmi-audio.dtb \
k3-am62a7-sk-csi2-imx219.dtb \
k3-am62a7-sk-csi2-ov5640.dtb \
+ k3-am62a7-sk-hdmi-audio.dtb \
k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb \
k3-am642-tqma64xxl-mbax4xxl-wlan.dtb \
k3-j721e-evm-pcie0-ep.dtb \
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 13/68] arm64: dts: qcom: qcm6490-idp: Add definition for three LEDs
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Hui Liu, Dmitry Baryshkov, Bjorn Andersson, Sasha Levin,
konrad.dybcio, robh, krzysztof.kozlowski+dt, conor+dt,
linux-arm-msm, devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Hui Liu <quic_huliu@quicinc.com>
[ Upstream commit 8385383cc2c2f7039ecc57864043112cdc7026c7 ]
Add definition for three LEDs to make sure they can
be enabled base on QCOM LPG LED driver.
Signed-off-by: Hui Liu <quic_huliu@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240126-lpg-v6-1-f879cecbce69@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 28 ++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
index 03e97e27d16d4..b3853fba5c3c5 100644
--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts
@@ -5,6 +5,7 @@
/dts-v1/;
+#include <dt-bindings/leds/common.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sc7280.dtsi"
#include "pm7325.dtsi"
@@ -415,6 +416,33 @@ vreg_bob_3p296: bob {
};
};
+&pm8350c_pwm {
+ status = "okay";
+
+ multi-led {
+ color = <LED_COLOR_ID_RGB>;
+ function = LED_FUNCTION_STATUS;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@1 {
+ reg = <1>;
+ color = <LED_COLOR_ID_RED>;
+ };
+
+ led@2 {
+ reg = <2>;
+ color = <LED_COLOR_ID_GREEN>;
+ };
+
+ led@3 {
+ reg = <3>;
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ };
+};
+
&qupv3_id_0 {
status = "okay";
};
--
2.43.0
^ permalink raw reply related
* [PATCH AUTOSEL 6.8 06/68] arm64: dts: qcom: Add support for Xiaomi Redmi Note 9S
From: Sasha Levin @ 2024-03-29 12:25 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Joe Mason, Konrad Dybcio, David Wronek, Bjorn Andersson,
Sasha Levin, robh, krzysztof.kozlowski+dt, conor+dt,
linux-arm-msm, devicetree
In-Reply-To: <20240329122652.3082296-1-sashal@kernel.org>
From: Joe Mason <buddyjojo06@outlook.com>
[ Upstream commit 6016fb7c91f72f4afbb4017e13cd91954d0f1a9b ]
Add a device tree for the Xiaomi Redmi Note 9S (curtana) phone, based on
sm7125-xiaomi-common.dtsi.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Joe Mason <buddyjojo06@outlook.com>
Signed-off-by: David Wronek <davidwronek@gmail.com>
Link: https://lore.kernel.org/r/20240121-sm7125-upstream-v4-8-f7d1212c8ebb@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/sm7125-xiaomi-curtana.dts | 16 ++++++++++++++++
2 files changed, 17 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sm7125-xiaomi-curtana.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 39889d5f8e123..2e6984bbbb836 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -210,6 +210,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-xiaomi-laurel-sprout.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sm7125-xiaomi-curtana.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm7125-xiaomi-joyeuse.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm7125-xiaomi-curtana.dts b/arch/arm64/boot/dts/qcom/sm7125-xiaomi-curtana.dts
new file mode 100644
index 0000000000000..12f517a8492c3
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm7125-xiaomi-curtana.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2023, Joe Mason <buddyjojo06@outlook.com>
+ */
+
+/dts-v1/;
+
+#include "sm7125-xiaomi-common.dtsi"
+
+/ {
+ model = "Xiaomi Redmi Note 9S";
+ compatible = "xiaomi,curtana", "qcom,sm7125";
+
+ /* required for bootloader to select correct board */
+ qcom,board-id = <0x20022 1>;
+};
--
2.43.0
^ permalink raw reply related
* [PATCH v2 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, devicetree,
linux-kernel, Luca Weiss
In-Reply-To: <20240329-fp4-tcpm-v2-0-d7f8cd165355@fairphone.com>
Configure the Type-C and VBUS regulator on PM7250B and wire it up to the
USB PHY, so that USB role and orientation switching works.
For now USB Power Delivery properties are skipped / disabled, so that
the (presumably) bootloader-configured charger doesn't get messed with
and we can charge the phone with at least some amount of power.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 47 ++++++++++++++++++
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 60 ++++++++++++++++++++++-
2 files changed, 106 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index b663c1b18f61..2e135989de8c 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1717,6 +1717,33 @@ usb_1_qmpphy: phy@88e8000 {
#phy-cells = <1>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_qmpphy_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_qmpphy_usb_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ usb_1_qmpphy_dp_in: endpoint {
+ };
+ };
+ };
};
dc_noc: interconnect@9160000 {
@@ -1892,6 +1919,26 @@ usb_1_dwc3: usb@a600000 {
snps,hird-threshold = /bits/ 8 <0x10>;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_dwc3_hs_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_dwc3_ss_out: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
+ };
+ };
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index bc67e8c1fe4d..5d7778c48413 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -19,6 +19,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/usb/pd.h>
#include "sm7225.dtsi"
#include "pm6150l.dtsi"
#include "pm6350.dtsi"
@@ -543,6 +544,53 @@ conn-therm@1 {
};
};
+&pm7250b_typec {
+ vdd-pdphy-supply = <&vreg_l3a>;
+
+ status = "okay";
+
+ connector {
+ compatible = "usb-c-connector";
+
+ power-role = "dual";
+ data-role = "dual";
+ self-powered;
+
+ /*
+ * Disable USB Power Delivery for now, seems to need extra work
+ * to support role switching while also letting the battery
+ * charge still - without charger driver
+ */
+ typec-power-opmode = "default";
+ pd-disable;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pm7250b_hs_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_hs_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pm7250b_ss_in: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_out>;
+ };
+ };
+ };
+ };
+};
+
+&pm7250b_vbus {
+ regulator-min-microamp = <500000>;
+ regulator-max-microamp = <1500000>;
+ status = "okay";
+};
+
&pmk8350_rtc {
status = "okay";
};
@@ -726,7 +774,12 @@ &usb_1 {
&usb_1_dwc3 {
maximum-speed = "super-speed";
- dr_mode = "peripheral";
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_dwc3_hs_out {
+ remote-endpoint = <&pm7250b_hs_in>;
};
&usb_1_hsphy {
@@ -740,10 +793,15 @@ &usb_1_hsphy {
&usb_1_qmpphy {
vdda-phy-supply = <&vreg_l22a>;
vdda-pll-supply = <&vreg_l16a>;
+ orientation-switch;
status = "okay";
};
+&usb_1_qmpphy_out {
+ remote-endpoint = <&pm7250b_ss_in>;
+};
+
&wifi {
vdd-0.8-cx-mx-supply = <&vreg_l4a>;
vdd-1.8-xo-supply = <&vreg_l7a>;
--
2.44.0
^ permalink raw reply related
* [PATCH v2 2/3] arm64: dts: qcom: pm7250b: Add a TCPM description
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, devicetree,
linux-kernel, Luca Weiss, Bryan O'Donoghue
In-Reply-To: <20240329-fp4-tcpm-v2-0-d7f8cd165355@fairphone.com>
Type-C port management functionality lives inside of the PMIC block on
pm7250b.
The Type-C port management logic controls orientation detection,
vbus/vconn sense and to send/receive Type-C Power Domain messages.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 39 +++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
index 4faed25a787f..0205c2669093 100644
--- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
@@ -51,6 +51,45 @@ pm7250b_vbus: usb-vbus-regulator@1100 {
status = "disabled";
};
+ pm7250b_typec: typec@1500 {
+ compatible = "qcom,pm7250b-typec", "qcom,pm8150b-typec";
+ reg = <0x1500>,
+ <0x1700>;
+ interrupts = <PM7250B_SID 0x15 0x00 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x01 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x02 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x03 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x04 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x05 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x15 0x06 IRQ_TYPE_EDGE_BOTH>,
+ <PM7250B_SID 0x15 0x07 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x00 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x01 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x02 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x03 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x04 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x05 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x06 IRQ_TYPE_EDGE_RISING>,
+ <PM7250B_SID 0x17 0x07 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "or-rid-detect-change",
+ "vpd-detect",
+ "cc-state-change",
+ "vconn-oc",
+ "vbus-change",
+ "attach-detach",
+ "legacy-cable-detect",
+ "try-snk-src-detect",
+ "sig-tx",
+ "sig-rx",
+ "msg-tx",
+ "msg-rx",
+ "msg-tx-failed",
+ "msg-tx-discarded",
+ "msg-rx-discarded",
+ "fr-swap";
+ vdd-vbus-supply = <&pm7250b_vbus>;
+ };
+
pm7250b_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
--
2.44.0
^ permalink raw reply related
* [PATCH v2 1/3] arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, devicetree,
linux-kernel, Luca Weiss, Bryan O'Donoghue
In-Reply-To: <20240329-fp4-tcpm-v2-0-d7f8cd165355@fairphone.com>
Add the required DTS node for the USB VBUS output regulator, which is
available on PM7250B. This will provide the VBUS source to connected
peripherals.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pm7250b.dtsi b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
index 3bf7cf5d1700..4faed25a787f 100644
--- a/arch/arm64/boot/dts/qcom/pm7250b.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm7250b.dtsi
@@ -45,6 +45,12 @@ pmic@PM7250B_SID {
#address-cells = <1>;
#size-cells = <0>;
+ pm7250b_vbus: usb-vbus-regulator@1100 {
+ compatible = "qcom,pm7250b-vbus-reg", "qcom,pm8150b-vbus-reg";
+ reg = <0x1100>;
+ status = "disabled";
+ };
+
pm7250b_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
--
2.44.0
^ permalink raw reply related
* [PATCH v2 0/3] Add TCPM support for PM7250B and Fairphone 4
From: Luca Weiss @ 2024-03-29 12:26 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: ~postmarketos/upstreaming, phone-devel, linux-arm-msm, devicetree,
linux-kernel, Luca Weiss, Bryan O'Donoghue
This series adds support for Type-C Port Management on the Fairphone 4
which enables USB role switching and orientation switching.
This enables a user for example to plug in a USB stick or a USB keyboard
to the Type-C port.
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
To: Conor Dooley <conor+dt@kernel.org>
Cc: ~postmarketos/upstreaming@lists.sr.ht
Cc: phone-devel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Changes in v2:
- Move disabled as last property for pm7250b_vbus
- Update USB graph to newer version, connect both HS and SS signals
- Update FP4 Type-C properties, try to keep phone charging intact by
disabling USB PD for now
- Pick up tags
- Drop patches that landed in linux-next already
- Link to v1: https://lore.kernel.org/r/20240322-fp4-tcpm-v1-0-c5644099d57b@fairphone.com
---
Luca Weiss (3):
arm64: dts: qcom: pm7250b: Add node for PMIC VBUS booster
arm64: dts: qcom: pm7250b: Add a TCPM description
arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching
arch/arm64/boot/dts/qcom/pm7250b.dtsi | 45 +++++++++++++++++
arch/arm64/boot/dts/qcom/sm6350.dtsi | 47 ++++++++++++++++++
arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 60 ++++++++++++++++++++++-
3 files changed, 151 insertions(+), 1 deletion(-)
---
base-commit: f3583a292140e0a2a2ca0ae0019108401b4c9158
change-id: 20240322-fp4-tcpm-2ad68ef55346
Best regards,
--
Luca Weiss <luca.weiss@fairphone.com>
^ permalink raw reply
* Re: [RFC PATCH v2 3/5] dt-bindings: clock: meson: document A1 SoC audio clock controller driver
From: Jerome Brunet @ 2024-03-29 12:24 UTC (permalink / raw)
To: Jan Dakinevich
Cc: Neil Armstrong, Jerome Brunet, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kevin Hilman,
Martin Blumenstingl, Philipp Zabel, linux-amlogic, linux-clk,
devicetree, linux-kernel, linux-arm-kernel
In-Reply-To: <20240328010831.884487-4-jan.dakinevich@salutedevices.com>
On Thu 28 Mar 2024 at 04:08, Jan Dakinevich <jan.dakinevich@salutedevices.com> wrote:
> Add device tree bindings for A1 SoC audio clock and reset controllers.
>
> Signed-off-by: Jan Dakinevich <jan.dakinevich@salutedevices.com>
> ---
> .../bindings/clock/amlogic,a1-audio-clkc.yaml | 141 ++++++++++++++++++
> .../dt-bindings/clock/amlogic,a1-audio-clkc.h | 122 +++++++++++++++
> .../reset/amlogic,meson-a1-audio-reset.h | 29 ++++
> 3 files changed, 292 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-audio-clkc.yaml
> create mode 100644 include/dt-bindings/clock/amlogic,a1-audio-clkc.h
> create mode 100644 include/dt-bindings/reset/amlogic,meson-a1-audio-reset.h
>
> diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-audio-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-audio-clkc.yaml
> new file mode 100644
> index 000000000000..1c9ef3292f3c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-audio-clkc.yaml
> @@ -0,0 +1,141 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/amlogic,a1-audio-clkc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Amlogic A1 Audio Clock Control Unit and Reset Controller
> +
> +maintainers:
> + - Neil Armstrong <neil.armstrong@linaro.org>
> + - Jerome Brunet <jbrunet@baylibre.com>
> + - Jan Dakinevich <jan.dakinevich@salutedevices.com>
> +
> +properties:
> + compatible:
> + enum:
> + - amlogic,a1-audio-clkc
> + - amlogic,a1-audio2-clkc
> +
> + '#clock-cells':
> + const: 1
> +
> + '#reset-cells':
> + const: 1
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 6
> + maxItems: 7
> +
> + clock-names:
> + minItems: 6
> + maxItems: 7
> +
> +required:
> + - compatible
> + - '#clock-cells'
> + - reg
> + - clocks
> + - clock-names
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - amlogic,a1-audio-clkc
> + then:
> + properties:
> + clocks:
> + items:
> + - description: input core clock
> + - description: input main peripheral bus clock
> + - description: input dds_in
> + - description: input fixed pll div2
> + - description: input fixed pll div3
> + - description: input hifi_pll
> + - description: input oscillator (usually at 24MHz)
> + clocks-names:
> + items:
> + - const: core
> + - const: pclk
> + - const: dds_in
> + - const: fclk_div2
> + - const: fclk_div3
> + - const: hifi_pll
> + - const: xtal
> + required:
> + - '#reset-cells'
> + else:
> + properties:
> + clocks:
> + items:
> + - description: input main peripheral bus clock
> + - description: input dds_in
> + - description: input fixed pll div2
> + - description: input fixed pll div3
> + - description: input hifi_pll
> + - description: input oscillator (usually at 24MHz)
> + clock-names:
> + items:
> + - const: pclk
> + - const: dds_in
> + - const: fclk_div2
> + - const: fclk_div3
> + - const: hifi_pll
> + - const: xtal
All the optional slave clock inputs are missing from this dcoumentation..
They need to be documentated as well
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/amlogic,a1-pll-clkc.h>
> + #include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>
> + #include <dt-bindings/clock/amlogic,a1-audio-clkc.h>
> + audio {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + clkc_audio: audio-clock-controller@fe050000 {
> + compatible = "amlogic,a1-audio-clkc";
> + reg = <0x0 0xfe050000 0x0 0xb0>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + clocks = <&clkc_audio2 AUD2_CLKID_AUDIOTOP>,
> + <&clkc_periphs CLKID_AUDIO>,
> + <&clkc_periphs CLKID_DDS_IN>,
> + <&clkc_pll CLKID_FCLK_DIV2>,
> + <&clkc_pll CLKID_FCLK_DIV3>,
> + <&clkc_pll CLKID_HIFI_PLL>,
> + <&xtal>;
> + clock-names = "core",
> + "pclk",
> + "dds_in",
> + "fclk_div2",
> + "fclk_div3",
> + "hifi_pll",
> + "xtal";
> + };
> +
> + clkc_audio2: audio-clock-controller@fe054800 {
> + compatible = "amlogic,a1-audio2-clkc";
> + reg = <0x0 0xfe054800 0x0 0x20>;
> + #clock-cells = <1>;
> + clocks = <&clkc_periphs CLKID_AUDIO>,
> + <&clkc_periphs CLKID_DDS_IN>,
> + <&clkc_pll CLKID_FCLK_DIV2>,
> + <&clkc_pll CLKID_FCLK_DIV3>,
> + <&clkc_pll CLKID_HIFI_PLL>,
> + <&xtal>;
> + clock-names = "pclk",
> + "dds_in",
> + "fclk_div2",
> + "fclk_div3",
> + "hifi_pll",
> + "xtal";
> + };
> + };
> diff --git a/include/dt-bindings/clock/amlogic,a1-audio-clkc.h b/include/dt-bindings/clock/amlogic,a1-audio-clkc.h
> new file mode 100644
> index 000000000000..b30df3b1ae08
> --- /dev/null
> +++ b/include/dt-bindings/clock/amlogic,a1-audio-clkc.h
> @@ -0,0 +1,122 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + * Copyright (c) 2024, SaluteDevices. All Rights Reserved.
> + *
> + * Author: Jan Dakinevich <jan.dakinevich@salutedevices.com>
> + */
> +
> +#ifndef __A1_AUDIO_CLKC_BINDINGS_H
> +#define __A1_AUDIO_CLKC_BINDINGS_H
> +
> +#define AUD_CLKID_DDR_ARB 1
> +#define AUD_CLKID_TDMIN_A 2
> +#define AUD_CLKID_TDMIN_B 3
> +#define AUD_CLKID_TDMIN_LB 4
> +#define AUD_CLKID_LOOPBACK 5
> +#define AUD_CLKID_TDMOUT_A 6
> +#define AUD_CLKID_TDMOUT_B 7
> +#define AUD_CLKID_FRDDR_A 8
> +#define AUD_CLKID_FRDDR_B 9
> +#define AUD_CLKID_TODDR_A 10
> +#define AUD_CLKID_TODDR_B 11
> +#define AUD_CLKID_SPDIFIN 12
> +#define AUD_CLKID_RESAMPLE 13
> +#define AUD_CLKID_EQDRC 14
> +#define AUD_CLKID_LOCKER 15
> +#define AUD_CLKID_MST_A_MCLK_SEL 16
> +#define AUD_CLKID_MST_A_MCLK_DIV 17
> +#define AUD_CLKID_MST_A_MCLK 18
> +#define AUD_CLKID_MST_B_MCLK_SEL 19
> +#define AUD_CLKID_MST_B_MCLK_DIV 20
> +#define AUD_CLKID_MST_B_MCLK 21
> +#define AUD_CLKID_MST_C_MCLK_SEL 22
> +#define AUD_CLKID_MST_C_MCLK_DIV 23
> +#define AUD_CLKID_MST_C_MCLK 24
> +#define AUD_CLKID_MST_D_MCLK_SEL 25
> +#define AUD_CLKID_MST_D_MCLK_DIV 26
> +#define AUD_CLKID_MST_D_MCLK 27
> +#define AUD_CLKID_SPDIFIN_CLK_SEL 28
> +#define AUD_CLKID_SPDIFIN_CLK_DIV 29
> +#define AUD_CLKID_SPDIFIN_CLK 30
> +#define AUD_CLKID_RESAMPLE_CLK_SEL 31
> +#define AUD_CLKID_RESAMPLE_CLK_DIV 32
> +#define AUD_CLKID_RESAMPLE_CLK 33
> +#define AUD_CLKID_LOCKER_IN_CLK_SEL 34
> +#define AUD_CLKID_LOCKER_IN_CLK_DIV 35
> +#define AUD_CLKID_LOCKER_IN_CLK 36
> +#define AUD_CLKID_LOCKER_OUT_CLK_SEL 37
> +#define AUD_CLKID_LOCKER_OUT_CLK_DIV 38
> +#define AUD_CLKID_LOCKER_OUT_CLK 39
> +#define AUD_CLKID_EQDRC_CLK_SEL 40
> +#define AUD_CLKID_EQDRC_CLK_DIV 41
> +#define AUD_CLKID_EQDRC_CLK 42
> +#define AUD_CLKID_MST_A_SCLK_PRE_EN 43
> +#define AUD_CLKID_MST_A_SCLK_DIV 44
> +#define AUD_CLKID_MST_A_SCLK_POST_EN 45
> +#define AUD_CLKID_MST_A_SCLK 46
> +#define AUD_CLKID_MST_B_SCLK_PRE_EN 47
> +#define AUD_CLKID_MST_B_SCLK_DIV 48
> +#define AUD_CLKID_MST_B_SCLK_POST_EN 49
> +#define AUD_CLKID_MST_B_SCLK 50
> +#define AUD_CLKID_MST_C_SCLK_PRE_EN 51
> +#define AUD_CLKID_MST_C_SCLK_DIV 52
> +#define AUD_CLKID_MST_C_SCLK_POST_EN 53
> +#define AUD_CLKID_MST_C_SCLK 54
> +#define AUD_CLKID_MST_D_SCLK_PRE_EN 55
> +#define AUD_CLKID_MST_D_SCLK_DIV 56
> +#define AUD_CLKID_MST_D_SCLK_POST_EN 57
> +#define AUD_CLKID_MST_D_SCLK 58
> +#define AUD_CLKID_MST_A_LRCLK_DIV 59
> +#define AUD_CLKID_MST_A_LRCLK 60
> +#define AUD_CLKID_MST_B_LRCLK_DIV 61
> +#define AUD_CLKID_MST_B_LRCLK 62
> +#define AUD_CLKID_MST_C_LRCLK_DIV 63
> +#define AUD_CLKID_MST_C_LRCLK 64
> +#define AUD_CLKID_MST_D_LRCLK_DIV 65
> +#define AUD_CLKID_MST_D_LRCLK 66
> +#define AUD_CLKID_TDMIN_A_SCLK_SEL 67
> +#define AUD_CLKID_TDMIN_A_SCLK_PRE_EN 68
> +#define AUD_CLKID_TDMIN_A_SCLK_POST_EN 69
> +#define AUD_CLKID_TDMIN_A_SCLK 70
> +#define AUD_CLKID_TDMIN_A_LRCLK 71
> +#define AUD_CLKID_TDMIN_B_SCLK_SEL 72
> +#define AUD_CLKID_TDMIN_B_SCLK_PRE_EN 73
> +#define AUD_CLKID_TDMIN_B_SCLK_POST_EN 74
> +#define AUD_CLKID_TDMIN_B_SCLK 75
> +#define AUD_CLKID_TDMIN_B_LRCLK 76
> +#define AUD_CLKID_TDMIN_LB_SCLK_SEL 77
> +#define AUD_CLKID_TDMIN_LB_SCLK_PRE_EN 78
> +#define AUD_CLKID_TDMIN_LB_SCLK_POST_EN 79
> +#define AUD_CLKID_TDMIN_LB_SCLK 80
> +#define AUD_CLKID_TDMIN_LB_LRCLK 81
> +#define AUD_CLKID_TDMOUT_A_SCLK_SEL 82
> +#define AUD_CLKID_TDMOUT_A_SCLK_PRE_EN 83
> +#define AUD_CLKID_TDMOUT_A_SCLK_POST_EN 84
> +#define AUD_CLKID_TDMOUT_A_SCLK 85
> +#define AUD_CLKID_TDMOUT_A_LRCLK 86
> +#define AUD_CLKID_TDMOUT_B_SCLK_SEL 87
> +#define AUD_CLKID_TDMOUT_B_SCLK_PRE_EN 88
> +#define AUD_CLKID_TDMOUT_B_SCLK_POST_EN 89
> +#define AUD_CLKID_TDMOUT_B_SCLK 90
> +#define AUD_CLKID_TDMOUT_B_LRCLK 91
> +
> +#define AUD2_CLKID_DDR_ARB 1
> +#define AUD2_CLKID_PDM 2
> +#define AUD2_CLKID_TDMIN_VAD 3
> +#define AUD2_CLKID_TODDR_VAD 4
> +#define AUD2_CLKID_VAD 5
> +#define AUD2_CLKID_AUDIOTOP 6
> +#define AUD2_CLKID_VAD_MCLK_SEL 7
> +#define AUD2_CLKID_VAD_MCLK_DIV 8
> +#define AUD2_CLKID_VAD_MCLK 9
> +#define AUD2_CLKID_VAD_CLK_SEL 10
> +#define AUD2_CLKID_VAD_CLK_DIV 11
> +#define AUD2_CLKID_VAD_CLK 12
> +#define AUD2_CLKID_PDM_DCLK_SEL 13
> +#define AUD2_CLKID_PDM_DCLK_DIV 14
> +#define AUD2_CLKID_PDM_DCLK 15
> +#define AUD2_CLKID_PDM_SYSCLK_SEL 16
> +#define AUD2_CLKID_PDM_SYSCLK_DIV 17
> +#define AUD2_CLKID_PDM_SYSCLK 18
> +
> +#endif /* __A1_AUDIO_CLKC_BINDINGS_H */
> diff --git a/include/dt-bindings/reset/amlogic,meson-a1-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-a1-audio-reset.h
> new file mode 100644
> index 000000000000..653fddba1d8f
> --- /dev/null
> +++ b/include/dt-bindings/reset/amlogic,meson-a1-audio-reset.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + * Copyright (c) 2024, SaluteDevices. All Rights Reserved.
> + *
> + * Author: Jan Dakinevich <jan.dakinevich@salutedevices.com>
> + */
> +
> +#ifndef _DT_BINDINGS_AMLOGIC_MESON_A1_AUDIO_RESET_H
> +#define _DT_BINDINGS_AMLOGIC_MESON_A1_AUDIO_RESET_H
> +
> +#define AUD_RESET_DDRARB 0
> +#define AUD_RESET_TDMIN_A 1
> +#define AUD_RESET_TDMIN_B 2
> +#define AUD_RESET_TDMIN_LB 3
> +#define AUD_RESET_LOOPBACK 4
> +#define AUD_RESET_TDMOUT_A 5
> +#define AUD_RESET_TDMOUT_B 6
> +#define AUD_RESET_FRDDR_A 7
> +#define AUD_RESET_FRDDR_B 8
> +#define AUD_RESET_TODDR_A 9
> +#define AUD_RESET_TODDR_B 10
> +#define AUD_RESET_SPDIFIN 11
> +#define AUD_RESET_RESAMPLE 12
> +#define AUD_RESET_EQDRC 13
> +#define AUD_RESET_LOCKER 14
> +#define AUD_RESET_TOACODEC 30
> +#define AUD_RESET_CLKTREE 31
> +
> +#endif /* _DT_BINDINGS_AMLOGIC_MESON_A1_AUDIO_RESET_H */
--
Jerome
^ permalink raw reply
* Re: [PATCH 0/5] i.MX8M add DSI output endpoint
From: Shawn Guo @ 2024-03-29 12:16 UTC (permalink / raw)
To: Alexander Stein
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
imx, linux-arm-kernel, linux-kernel, linux
In-Reply-To: <20240301091413.3050689-1-alexander.stein@ew.tq-group.com>
On Fri, Mar 01, 2024 at 10:14:08AM +0100, Alexander Stein wrote:
> Hi,
>
> this series was initially triggered by dtbs_check warnings. Despite [1]
> rendering them invalid, this series still simplifies the DSI OF graphs on all
> i.MX8M variants by adding an empty output endpoint.
> Each board enabling DSI connection can simply reference the label.
> Patch 5 uses applies this to MBa8Mx board.
>
> Best regards,
> Alexander
>
> [1] https://lore.kernel.org/linux-samsung-soc/20231122-dtc-warnings-v2-1-bd4087325392@kernel.org/
>
> Alexander Stein (5):
> arm64: dts: imx8mm: Add empty DSI output endpoint
> arm64: dts: imx8mn: Add empty DSI output endpoint
> arm64: dts: imx8mq: Add empty DSI output endpoint
> arm64: dts: imx8mp: Add empty DSI output endpoint
> arm64: dts: mba8mx: Simplify DSI connection
Applied all, thanks!
^ permalink raw reply
* Re: [PATCH 2/2] v2 arm64: dts: qcom: Add support for Samsung Galaxy Z Fold5
From: Krzysztof Kozlowski @ 2024-03-29 12:11 UTC (permalink / raw)
To: serdeliuk, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20240329-v2-dts-add-support-for-samsung-galaxy-zfold5-v1-2-9a91e635cacc@yahoo.com>
On 29/03/2024 00:08, Alexandru Marc Serdeliuc via B4 Relay wrote:
> From: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
>
> Add support for Samsung Galaxy Z Fold5 (q5q) foldable phone
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.
v2 is for sure wrong prefix. Other parts are also wrong, which above
command will tell you.
>
> Currently working features:
> - Framebuffer
> - UFS
> - i2c
> - Buttons
>
> Signed-off-by: Alexandru Marc Serdeliuc <serdeliuk@yahoo.com>
Please go back and read my response.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v5 4/5] clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks
From: Krzysztof Kozlowski @ 2024-03-29 12:10 UTC (permalink / raw)
To: Varadarajan Narayanan, Stephen Boyd
Cc: andersson, conor+dt, devicetree, djakov, dmitry.baryshkov,
konrad.dybcio, krzysztof.kozlowski+dt, linux-arm-msm, linux-clk,
linux-kernel, linux-pm, mturquette, quic_anusha, robh
In-Reply-To: <ZgaeGZL7QXh75aSA@hu-varada-blr.qualcomm.com>
On 29/03/2024 11:55, Varadarajan Narayanan wrote:
>>> +
>>> +enum {
>>> + ICC_ANOC_PCIE0,
>>> + ICC_SNOC_PCIE0,
>>> + ICC_ANOC_PCIE1,
>>> + ICC_SNOC_PCIE1,
>>> + ICC_ANOC_PCIE2,
>>> + ICC_SNOC_PCIE2,
>>> + ICC_ANOC_PCIE3,
>>> + ICC_SNOC_PCIE3,
>>> + ICC_SNOC_USB,
>>> + ICC_ANOC_USB_AXI,
>>> + ICC_NSSNOC_NSSCC,
>>> + ICC_NSSNOC_SNOC_0,
>>> + ICC_NSSNOC_SNOC_1,
>>> + ICC_NSSNOC_PCNOC_1,
>>> + ICC_NSSNOC_QOSGEN_REF,
>>> + ICC_NSSNOC_TIMEOUT_REF,
>>> + ICC_NSSNOC_XO_DCD,
>>> + ICC_NSSNOC_ATB,
>>> + ICC_MEM_NOC_NSSNOC,
>>> + ICC_NSSNOC_MEMNOC,
>>> + ICC_NSSNOC_MEM_NOC_1,
>>> +};
>>
>> Are these supposed to be in a dt-binding header?
>
> Since these don't directly relate to the ids in the dt-bindings
> not sure if they will be permitted there. Will move and post a
> new version and get feedback.
You can answer this by yourself by looking at your DTS. Do you use them
as well in the DTS?
It's a pity we see here only parts of DTS, instead of full interconnect
usage.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: arm: fsl: Add Seeed studio NPi based boards
From: Shawn Guo @ 2024-03-29 12:08 UTC (permalink / raw)
To: Parthiban Nallathambi
Cc: robh+dt, krzysztof.kozlowski+dt, conor+dt, shawnguo, s.hauer,
kernel, festevam, linux-imx, devicetree, linux-kernel,
linux-arm-kernel
In-Reply-To: <20240229082337.3090778-1-parthiban@linumiz.com>
On Thu, Feb 29, 2024 at 01:53:36PM +0530, Parthiban Nallathambi wrote:
> NPi i.MX6ULL eMMC/NAND is Seed Studios SoM using i.MX6ULL.
> Development baords can be either based on NAND or eMMC
> SoM.
>
> Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Applied both, thanks!
^ permalink raw reply
* Re: [PATCH v6 19/23] dt-bindings: crypto: meson: support new SoC's
From: Conor Dooley @ 2024-03-29 11:58 UTC (permalink / raw)
To: Alexey Romanov
Cc: Conor Dooley, neil.armstrong@linaro.org, clabbe@baylibre.com,
herbert@gondor.apana.org.au, davem@davemloft.net,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, khilman@baylibre.com, jbrunet@baylibre.com,
martin.blumenstingl@googlemail.com, vadim.fedorenko@linux.dev,
linux-crypto@vger.kernel.org, linux-amlogic@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel
In-Reply-To: <20240329111601.po33wqdaaqpc54mo@cab-wsm-0029881>
[-- Attachment #1: Type: text/plain, Size: 2243 bytes --]
On Fri, Mar 29, 2024 at 11:16:06AM +0000, Alexey Romanov wrote:
> Hello,
>
> On Tue, Mar 26, 2024 at 06:04:46PM +0000, Conor Dooley wrote:
> > On Tue, Mar 26, 2024 at 06:32:15PM +0300, Alexey Romanov wrote:
> > > Now crypto module available at G12A/G12B/S4/A1/SM1/AXG.
> > >
> > > 1. Add new compatibles:
> > > - amlogic,g12a-crypto
> > > - amlogic,axg-crypto
> > > - amlogic,a1-crypto
> > > - amlogic,s4-crypto (uses a1-crypto as fallback)
> > >
> > > 2. Add power-domains in schema.
> > >
> > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
> > > ---
> > > .../bindings/crypto/amlogic,gxl-crypto.yaml | 15 +++++++++++++--
> > > 1 file changed, 13 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > index d3af7b4d5f39..c92edde314aa 100644
> > > --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml
> > > @@ -11,8 +11,16 @@ maintainers:
> > >
> > > properties:
> > > compatible:
> > > - items:
> > > - - const: amlogic,gxl-crypto
> > > + oneOf:
> > > + - items:
> > > + - enum:
> > > + - amlogic,s4-crypto
> > > + - const: amlogic,a1-crypto
> > > + - enum:
> > > + - amlogic,gxl-crypto
> > > + - amlogic,axg-crypto
> > > + - amlogic,g12a-crypto
> > > + - amlogic,a1-crypto
> > >
> > > reg:
> > > maxItems: 1
> > > @@ -21,6 +29,9 @@ properties:
> > > items:
> > > - description: Interrupt for flow 0
> > >
> > > + power-domains:
> > > + maxItems: 1
> >
> > Is power-domains valid for the devices that existed prior to your patch?
>
> For existed devices (GXL) power domain doesn't required.
Required or not I'm not interested in, it's whether or not the hardware
has them. The GXL does for the VPU, so it might also have one for the
the crypto. If the crypto is not in a power domain on gxl, please make
power-domains only permitted for SoCs that do have power domains.
Cheers,
Conor.
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^ permalink raw reply
* Re: [PATCH v6 17/23] dt-bindings: crypto: meson: remove clk and second interrupt line for GXL
From: Conor Dooley @ 2024-03-29 11:55 UTC (permalink / raw)
To: Alexey Romanov
Cc: Conor Dooley, neil.armstrong@linaro.org, clabbe@baylibre.com,
herbert@gondor.apana.org.au, davem@davemloft.net,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, khilman@baylibre.com, jbrunet@baylibre.com,
martin.blumenstingl@googlemail.com, vadim.fedorenko@linux.dev,
linux-crypto@vger.kernel.org, linux-amlogic@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel
In-Reply-To: <20240329111424.i2zp2coznqpnibk4@cab-wsm-0029881>
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On Fri, Mar 29, 2024 at 11:14:29AM +0000, Alexey Romanov wrote:
> Hi Conor,
>
> On Tue, Mar 26, 2024 at 06:09:37PM +0000, Conor Dooley wrote:
> > On Tue, Mar 26, 2024 at 06:32:13PM +0300, Alexey Romanov wrote:
> > > GXL crypto IP uses DMA engine, which doesn't require clk input
> > > and second interrupt line.
> > >
> > > Fixes: c4a0457eb858 ("ARM64: dts: amlogic: adds crypto hardware node")
> >
> > How does this fix a commit that only modifies a dts? The commit cited
> > here should be a dt-bindings commit.
>
> Yep, my bad. Will fix it in next series.
>
> >
> > However, your commit message says "require" but you do more than remove
> > these as required, you remove them entirely. What am I missing?
>
> Crypto HW isn't connected to clk / 2nd interrput line, so we must remove
> them from dt. I will reformulate commit message.
Yeah, please do. Be clear about the hardware not actually having these
things. And hopefully Corentin can chime in as to why he thought it did.
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* Re: 回复: [PATCH v2 1/2] ASoC: dt-bindings: Add bindings for Cadence I2S-MC controller
From: Krzysztof Kozlowski @ 2024-03-29 11:42 UTC (permalink / raw)
To: Xingyu Wu, Liam Girdwood, Mark Brown, Claudiu Beznea,
Jaroslav Kysela, Takashi Iwai, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
alsa-devel@alsa-project.org, linux-sound@vger.kernel.org
In-Reply-To: <NTZPR01MB09563633F5C3B5FBC95D61289F3AA@NTZPR01MB0956.CHNPR01.prod.partner.outlook.cn>
On 29/03/2024 04:56, Xingyu Wu wrote:
>>> I want to keep the original IP compatible which can distinguish from the JH8100
>> SoC.
>>> Can I write it like this:
>>> compatible:
>>> enum:
>>> - starfive,jh8100-i2s
>>> const: cdns,i2s-mc
>>>
>>> and I write this in the DTS:
>>> compatible = "starfive,jh8100-i2s", "cdns,i2s-mc";
>>
>> Can you provide any rationale for this? I asked "unless you have other
>> arguments", so where are the arguments?
>>
>> Nothing was explained in patch changelog. Nothing was provided in this email
>> thread.
>
> I don't know if I understood what mark said[1]. Is it to keep the original IP and
> add other compatible?
>
> [1] https://lore.kernel.org/all/27155281-573c-493d-96fe-1f28ebb0ce5e@sirena.org.uk/
>
I stated and I keep my statement that such block is usually not usable
on its own and always needs some sort of quirks or SoC-specific
implementation. At least this is what I saw in other similar cases, but
not exactly I2S.
Therefore I think fallback is not usable here, thus please use only
starfive compatible. Drop the fallback. It could be added in the future
if I am proven wrong. If you think that fallback is usable alone, please
bring some real life case.
> Or should I only keep the compatible 'starfive,jh8110-i2s' and change the
> bindings name to same to this compatible?
Filename could be cdns,i2s-mc.yaml, assuming that's the name of original
IP block.
...
>>>>
>>>
>>> But this I2S can only use either DMA or interrupts.
>>
>> Just like many other components. DTS should reflect hardware. Hardware has
>> interrupts and DMA, right?
>
> Yes. The hardware can use interrupts and provide the handshake interface of
> DMA to DMA controller. In software, we can choose only one between them.
> Do I keep them both in the bindings and provide the selection in the driver?
Yes.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 0/4] Add USB Support on Qualcomm's QDU/QRU1000 Platform
From: Komal Bajaj @ 2024-03-29 11:28 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Bjorn Andersson, Konrad Dybcio, Vinod Koul,
Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, linux-arm-msm, linux-phy, devicetree,
linux-kernel, linux-usb
In-Reply-To: <2024032637-sessions-outcast-888a@gregkh>
On 3/26/2024 2:00 PM, Greg Kroah-Hartman wrote:
> On Tue, Mar 19, 2024 at 02:37:24PM +0530, Komal Bajaj wrote:
>> This series adds support of USB3 PHY support for Qualcomm's QDU/QRU1000 Platform.
>>
>> ---------
>> Changes in v2:
>> * Dropped extra lines
>> * Sorted the tables alphabetically
>> * Link to v1: https://lore.kernel.org/linux-arm-msm/20240311120215.16845-1-quic_kbajaj@quicinc.com/
>>
>> Komal Bajaj (4):
>> dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QDU1000
>> dt-bindings: phy: qcom,qmp-usb: Add QDU1000 USB3 PHY
>> dt-bindings: usb: dwc3: Add QDU1000 compatible
>> phy: qcpm-qmp-usb: Add support for QDU1000/QRU1000
>>
>> .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 2 +
>> .../bindings/phy/qcom,usb-snps-femto-v2.yaml | 1 +
>> .../devicetree/bindings/usb/qcom,dwc3.yaml | 3 ++
>> drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 49 +++++++++++++++++++
>> 4 files changed, 55 insertions(+)
>>
>> --
>> 2.42.0
>>
>>
>
> The subject line here does not say v2, so I'm confused as to which one
> is which :(
>
> Please fix up and send a v3.
Apologies, forgot to mark patches as v2.
Will soon send v3 series with proper marking.
Thanks
Komal
>
> thanks,
>
> greg k-h
^ permalink raw reply
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