* Re: [PATCH 1/2] dt-bindings: crypto: qcom-qce: Add Qualcomm Eliza QCE
From: Harshal Dev @ 2026-04-07 18:34 UTC (permalink / raw)
To: Krzysztof Kozlowski, Thara Gopinath, Herbert Xu, David S. Miller,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio
Cc: linux-arm-msm, linux-crypto, devicetree, linux-kernel
In-Reply-To: <20260407-crypto-qcom-eliza-v1-1-40f61a1454a2@oss.qualcomm.com>
On 4/7/2026 7:21 PM, Krzysztof Kozlowski wrote:
> Document the QCE crypto engine on Qualcomm Eliza SoC, fully compatible
> with earlier generations.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
Regards,
Harshal
^ permalink raw reply
* Re: [PATCH v4 01/27] media: dt-bindings: media: rockchip-rga: add rockchip,rk3588-rga3
From: Rob Herring (Arm) @ 2026-04-07 18:10 UTC (permalink / raw)
To: Sven Püschel
Cc: Jacob Chen, devicetree, sebastian.reichel, Ezequiel Garcia,
Krzysztof Kozlowski, Mauro Carvalho Chehab, Heiko Stuebner,
linux-rockchip, linux-kernel, Conor Dooley, linux-arm-kernel,
kernel, nicolas, linux-media
In-Reply-To: <20260325-spu-rga3-v4-1-e90ec1c61354@pengutronix.de>
On Wed, 25 Mar 2026 15:50:32 +0100, Sven Püschel wrote:
> Add a new compatible for the RGA3 (Raster Graphic Acceleration 3)
> peripheral found on the RK3588 SoC. Also specify an iommu property,
> as the RGA3 contains the generic rockchip iommu. While other versions
> also have an iommu, it's usually specific to them.
>
> The RK3588 contains one RGA2-Enhance core (also contained on the RK3399)
> and two RGA3 cores. Both feature a similar functionality of scaling,
> cropping and rotating of up to two input images into one output image.
> Key differences of the RGA3 are:
>
> - supports 10bit YUV output formats
> - supports 8x8 tiles and FBCD as inputs and outputs
> - supports BT2020 color space conversion
> - max output resolution of (8192-64)x(8192-64)
> - MMU can map up to 32G DDR RAM
> - fully planar formats (3 planes) are not supported
> - max scale up/down factor of 8 (RGA2 allows up to 16)
>
> Signed-off-by: Sven Püschel <s.pueschel@pengutronix.de>
>
> ---
>
> Changed in v3/v4:
> - Dropped Acked-by: Krzysztof Kozlowski due to the added iommus property
> and description adjustments.
> ---
> Documentation/devicetree/bindings/media/rockchip-rga.yaml | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v6 17/27] of: property: Allow fw_devlink device-tree on x86
From: Rob Herring (Arm) @ 2026-04-07 18:09 UTC (permalink / raw)
To: Herve Codina
Cc: Arnd Bergmann, linux-acpi, Daniel Scally, Charles Keepax,
Richard Fitzgerald, Andy Shevchenko, Jonathan Cameron,
Fabio Estevam, Dave Jiang, Thomas Petazzoni, Andi Shyti,
Ulf Hansson, Saravana Kannan, Ira Weiny, Dan Williams,
Steen Hegelund, Linus Walleij, imx, linux-gpio, patches,
Sakari Ailus, Andrew Lunn, devicetree, Geert Uytterhoeven,
linux-arm-kernel, Rafael J. Wysocki, Stephen Boyd,
Greg Kroah-Hartman, David Rhodes, Bjorn Helgaas, Conor Dooley,
linux-kernel, Luca Ceresoli, Shawn Guo, Vishal Verma, Mark Brown,
Davidlohr Bueso, linux-pm, Allan Nielsen, Pengutronix Kernel Team,
Wolfram Sang, Len Brown, Sascha Hauer, Danilo Krummrich,
Michael Turquette, Frank Li, Krzysztof Kozlowski, driver-core,
linux-i2c, linux-sound, Horatiu Vultur, Heikki Krogerus,
Kalle Niemi, linux-cxl, Alison Schofield, linux-clk, linux-pci,
Matti Vaittinen, Wolfram Sang, linux-spi, Peter Rosin
In-Reply-To: <20260325143555.451852-18-herve.codina@bootlin.com>
On Wed, 25 Mar 2026 15:35:44 +0100, Herve Codina wrote:
> PCI drivers can use a device-tree overlay to describe the hardware
> available on the PCI board. This is the case, for instance, of the
> LAN966x PCI device driver.
>
> Adding some more nodes in the device-tree overlay adds some more
> consumer/supplier relationship between devices instantiated from this
> overlay.
>
> Those fw_node consumer/supplier relationships are handled by fw_devlink
> and are created based on the device-tree parsing done by the
> of_fwnode_add_links() function.
>
> Those consumer/supplier links are needed in order to ensure a correct PM
> runtime management and a correct removal order between devices.
>
> For instance, without those links a supplier can be removed before its
> consumers is removed leading to all kind of issue if this consumer still
> want the use the already removed supplier.
>
> The support for the usage of an overlay from a PCI driver has been added
> on x86 systems in commit 1f340724419ed ("PCI: of: Create device tree PCI
> host bridge node").
>
> In the past, support for fw_devlink on x86 had been tried but this
> support has been removed in commit 4a48b66b3f52 ("of: property: Disable
> fw_devlink DT support for X86"). Indeed, this support was breaking some
> x86 systems such as OLPC system and the regression was reported in [0].
>
> Instead of disabling this support for all x86 system, use a finer grain
> and disable this support only for the possible problematic subset of x86
> systems (at least OLPC and CE4100).
>
> Those systems use a device-tree to describe their hardware. Identify
> those systems using key properties in the device-tree.
>
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> Link: https://lore.kernel.org/lkml/3c1f2473-92ad-bfc4-258e-a5a08ad73dd0@web.de/ [0]
> ---
> drivers/of/property.c | 26 +++++++++++++++++++++++++-
> 1 file changed, 25 insertions(+), 1 deletion(-)
>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH v6 02/27] of: dynamic: Fix overlayed devices not probing because of fw_devlink
From: Rob Herring (Arm) @ 2026-04-07 18:06 UTC (permalink / raw)
To: Herve Codina
Cc: Daniel Scally, Mark Brown, linux-i2c, Conor Dooley, Sascha Hauer,
David Rhodes, Michael Turquette, imx, Arnd Bergmann,
Linus Walleij, Thomas Petazzoni, Andy Shevchenko,
linux-arm-kernel, linux-sound, linux-acpi, Len Brown, Shawn Guo,
Bjorn Helgaas, Ira Weiny, Dave Jiang, Andrew Lunn, Ulf Hansson,
Danilo Krummrich, Alison Schofield, linux-pm, linux-clk,
linux-cxl, Stephen Boyd, Charles Keepax, linux-spi, patches,
Saravana Kannan, devicetree, Luca Ceresoli, Fabio Estevam,
Wolfram Sang, Pengutronix Kernel Team, Geert Uytterhoeven,
linux-kernel, Steen Hegelund, Rafael J. Wysocki, driver-core,
Jonathan Cameron, Greg Kroah-Hartman, Krzysztof Kozlowski,
Saravana Kannan, Heikki Krogerus, Frank Li, Wolfram Sang,
Vishal Verma, Sakari Ailus, Dan Williams, Horatiu Vultur,
Davidlohr Bueso, Andi Shyti, linux-gpio, Allan Nielsen,
Richard Fitzgerald, Kalle Niemi, Matti Vaittinen, Peter Rosin,
linux-pci
In-Reply-To: <20260325143555.451852-3-herve.codina@bootlin.com>
On Wed, 25 Mar 2026 15:35:29 +0100, Herve Codina wrote:
> From: Saravana Kannan <saravanak@google.com>
>
> When an overlay is applied, if the target device has already probed
> successfully and bound to a device, then some of the fw_devlink logic
> that ran when the device was probed needs to be rerun. This allows newly
> created dangling consumers of the overlayed device tree nodes to be
> moved to become consumers of the target device.
>
> Fixes: 1a50d9403fb9 ("treewide: Fix probing of devices in DT overlays")
> Reported-by: Herve Codina <herve.codina@bootlin.com>
> Closes: https://lore.kernel.org/lkml/CAMuHMdXEnSD4rRJ-o90x4OprUacN_rJgyo8x6=9F9rZ+-KzjOg@mail.gmail.com/
> Closes: https://lore.kernel.org/all/20240221095137.616d2aaa@bootlin.com/
> Closes: https://lore.kernel.org/lkml/20240312151835.29ef62a0@bootlin.com/
> Signed-off-by: Saravana Kannan <saravanak@google.com>
> Link: https://lore.kernel.org/lkml/20240411235623.1260061-3-saravanak@google.com/
> [Herve: Rebase on top of recent kernel]
> [Herve: Add the call to driver_deferred_probe_trigger()]
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> Tested-by: Kalle Niemi <kaleposti@gmail.com>
> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> drivers/base/core.c | 83 +++++++++++++++++++++++++++++++++++++-----
> drivers/of/overlay.c | 15 ++++++++
> include/linux/fwnode.h | 1 +
> 3 files changed, 90 insertions(+), 9 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v6 00/27] lan966x pci device: Add support for SFPs
From: Rob Herring @ 2026-04-07 18:05 UTC (permalink / raw)
To: Herve Codina
Cc: Andrew Lunn, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Kalle Niemi, Matti Vaittinen,
Greg Kroah-Hartman, Rafael J. Wysocki, Danilo Krummrich, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Michael Turquette, Stephen Boyd, Andi Shyti, Wolfram Sang,
Peter Rosin, Arnd Bergmann, Saravana Kannan, Bjorn Helgaas,
Charles Keepax, Richard Fitzgerald, David Rhodes, Linus Walleij,
Ulf Hansson, Mark Brown, Len Brown, Andy Shevchenko,
Daniel Scally, Heikki Krogerus, Sakari Ailus, Davidlohr Bueso,
Jonathan Cameron, Dave Jiang, Alison Schofield, Vishal Verma,
Ira Weiny, Dan Williams, Shawn Guo, Wolfram Sang, linux-kernel,
driver-core, imx, linux-arm-kernel, linux-clk, linux-i2c,
devicetree, linux-pci, linux-sound, patches, linux-gpio, linux-pm,
linux-spi, linux-acpi, linux-cxl, Allan Nielsen, Horatiu Vultur,
Steen Hegelund, Luca Ceresoli, Thomas Petazzoni
In-Reply-To: <20260407180315.GA3175985-robh@kernel.org>
On Tue, Apr 7, 2026 at 1:03 PM Rob Herring <robh@kernel.org> wrote:
>
> On Wed, Mar 25, 2026 at 03:35:27PM +0100, Herve Codina wrote:
> > Hi,
> >
> > This series add support for SFPs ports available on the LAN966x PCI
> > device. In order to have the SFPs supported, additional devices are
> > needed such as clock controller and I2C.
> >
> > As a reminder, the LAN966x PCI device driver use a device-tree overlay
> > to describe devices available on the PCI board. Adding support for SFPs
> > ports consists in adding more devices in the already existing
> > device-tree overlay.
> >
> > With those devices added, the device-tree overlay is more complex and
> > some consumer/supplier relationship are needed in order to remove
> > devices in correct order when the LAN966x PCI driver is removed.
> >
> > Those links are typically provided by fw_devlink and we faced some
> > issues with fw_devlink and overlays.
> >
> > This series gives the big picture related to the SFPs support from
> > fixing issues to adding new devices. Of course, it can be split if
> > needed.
> >
> > The first part of the series (patch 1 and 2 ) fixes fw_devlink when it
> > is used with overlay. Those patches were previously sent by Saravana
> > [0]. I rebased them on top of v7.0-rc1.
> >
> > Also I added a call to driver_deferred_probe_trigger() in Saravana's
> > patch (patch 2) to ensure that probes are retried after the modification
> > performed on the dangling consumers. This allows to fix issues reported
> > by Matti and Geert [2] with the previous iteration patches.
> >
> > Those modification were not sufficient in our case and so, on top of
> > that, patches 3 to 5 fix some more issues related to fw_devlink.
> >
> > Patches 6 to 11 introduce and use fw_devlink_set_device() in already
> > existing code.
> >
> > Patches 12 and 13 are related also to fw_devlink but specific to PCI and
> > the device-tree nodes created during enumeration.
> >
> > Patches 14, 15 and 16 are related fw_devlink too but specific to I2C
> > muxes. Patches purpose is to correctly set a link between an adapter
> > supplier and its consumer. Indeed, an i2c mux adapter's parent is not
> > the i2c mux supplier but the adapter the i2c mux is connected to. Adding
> > a new link between the adapter supplier involved when i2c muxes are used
> > avoid a freeze observed during device removal.
> >
> > Patch 17 adds support for fw_delink on x86. fw_devlink is needed to have
> > the consumer/supplier relationship between devices in order to ensure a
> > correct device removal order. Adding fw_devlink support for x86 has been
> > tried in the past but was reverted [1] because it broke some systems.
> > Instead of enabling fw_devlink on *all* x86 system, enable it on *all*
> > x86 except on those where it leads to issue.
> >
> > Patches 18 and 19 allow to build clock and i2c controller used by the
> > LAN966x PCI device when the LAN966x PCI device is enabled.
> >
> > Patches 20 to 24 are specific to the LAN966x. They touch the current
> > dtso, split it in dtsi/dtso files, rename the dtso and improve the
> > driver to allow easier support for other boards.
> >
> > The next patch (patch 25) update the LAN966x device-tree overlay itself
> > to have the SPF ports and devices they depends on described.
> >
> > The last two patches (patches 26 and 27) sort the existing drivers in
> > the needed driver list available in the Kconfig help and add new drivers
> > in this list keep the list up to date with the devices described in the
> > device-tree overlay.
> >
> > We believe some items from the above list can be merged separately, with
> > no build dependencies. We expect:
> >
> > - Patches 1 to 5 to be taken by driver core maintainers
>
> From a quick look, can't the first 2 DT patches be taken by me?
Err, I guess patch 2 is really more driver core than DT.
Rob
^ permalink raw reply
* Re: [PATCH v6 01/27] Revert "treewide: Fix probing of devices in DT overlays"
From: Rob Herring (Arm) @ 2026-04-07 18:05 UTC (permalink / raw)
To: Herve Codina
Cc: Conor Dooley, linux-pci, Ulf Hansson, Jonathan Cameron,
Danilo Krummrich, linux-gpio, Luca Ceresoli, linux-cxl,
Kalle Niemi, linux-spi, linux-i2c, Len Brown, Shawn Guo,
Dave Jiang, imx, linux-sound, Saravana Kannan, Vishal Verma,
Ira Weiny, Stephen Boyd, Sascha Hauer, Linus Walleij,
Charles Keepax, Peter Rosin, Geert Uytterhoeven, Davidlohr Bueso,
linux-kernel, linux-pm, linux-clk, Allan Nielsen, Frank Li,
Wolfram Sang, Andi Shyti, Andy Shevchenko, Rafael J. Wysocki,
Richard Fitzgerald, Alison Schofield, Wolfram Sang, Arnd Bergmann,
Steen Hegelund, David Rhodes, Pengutronix Kernel Team,
driver-core, Fabio Estevam, Krzysztof Kozlowski,
Michael Turquette, Heikki Krogerus, linux-arm-kernel,
Thomas Petazzoni, linux-acpi, Horatiu Vultur, patches,
Sakari Ailus, Andrew Lunn, Saravana Kannan, Bjorn Helgaas,
devicetree, Dan Williams, Mark Brown, Greg Kroah-Hartman,
Daniel Scally, Matti Vaittinen
In-Reply-To: <20260325143555.451852-2-herve.codina@bootlin.com>
On Wed, 25 Mar 2026 15:35:28 +0100, Herve Codina wrote:
> From: Saravana Kannan <saravanak@google.com>
>
> This reverts commit 1a50d9403fb90cbe4dea0ec9fd0351d2ecbd8924.
>
> While the commit fixed fw_devlink overlay handling for one case, it
> broke it for another case. So revert it and redo the fix in a separate
> patch.
>
> Fixes: 1a50d9403fb9 ("treewide: Fix probing of devices in DT overlays")
> Reported-by: Herve Codina <herve.codina@bootlin.com>
> Closes: https://lore.kernel.org/lkml/CAMuHMdXEnSD4rRJ-o90x4OprUacN_rJgyo8x6=9F9rZ+-KzjOg@mail.gmail.com/
> Closes: https://lore.kernel.org/all/20240221095137.616d2aaa@bootlin.com/
> Closes: https://lore.kernel.org/lkml/20240312151835.29ef62a0@bootlin.com/
> Signed-off-by: Saravana Kannan <saravanak@google.com>
> Link: https://lore.kernel.org/lkml/20240411235623.1260061-2-saravanak@google.com/
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> Acked-by: Mark Brown <broonie@kernel.org>
> ---
> drivers/bus/imx-weim.c | 6 ------
> drivers/i2c/i2c-core-of.c | 5 -----
> drivers/of/dynamic.c | 1 -
> drivers/of/platform.c | 5 -----
> drivers/spi/spi.c | 5 -----
> 5 files changed, 22 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH v6 00/27] lan966x pci device: Add support for SFPs
From: Rob Herring @ 2026-04-07 18:03 UTC (permalink / raw)
To: Herve Codina
Cc: Andrew Lunn, Krzysztof Kozlowski, Conor Dooley,
Geert Uytterhoeven, Kalle Niemi, Matti Vaittinen,
Greg Kroah-Hartman, Rafael J. Wysocki, Danilo Krummrich, Frank Li,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
Michael Turquette, Stephen Boyd, Andi Shyti, Wolfram Sang,
Peter Rosin, Arnd Bergmann, Saravana Kannan, Bjorn Helgaas,
Charles Keepax, Richard Fitzgerald, David Rhodes, Linus Walleij,
Ulf Hansson, Mark Brown, Len Brown, Andy Shevchenko,
Daniel Scally, Heikki Krogerus, Sakari Ailus, Davidlohr Bueso,
Jonathan Cameron, Dave Jiang, Alison Schofield, Vishal Verma,
Ira Weiny, Dan Williams, Shawn Guo, Wolfram Sang, linux-kernel,
driver-core, imx, linux-arm-kernel, linux-clk, linux-i2c,
devicetree, linux-pci, linux-sound, patches, linux-gpio, linux-pm,
linux-spi, linux-acpi, linux-cxl, Allan Nielsen, Horatiu Vultur,
Steen Hegelund, Luca Ceresoli, Thomas Petazzoni
In-Reply-To: <20260325143555.451852-1-herve.codina@bootlin.com>
On Wed, Mar 25, 2026 at 03:35:27PM +0100, Herve Codina wrote:
> Hi,
>
> This series add support for SFPs ports available on the LAN966x PCI
> device. In order to have the SFPs supported, additional devices are
> needed such as clock controller and I2C.
>
> As a reminder, the LAN966x PCI device driver use a device-tree overlay
> to describe devices available on the PCI board. Adding support for SFPs
> ports consists in adding more devices in the already existing
> device-tree overlay.
>
> With those devices added, the device-tree overlay is more complex and
> some consumer/supplier relationship are needed in order to remove
> devices in correct order when the LAN966x PCI driver is removed.
>
> Those links are typically provided by fw_devlink and we faced some
> issues with fw_devlink and overlays.
>
> This series gives the big picture related to the SFPs support from
> fixing issues to adding new devices. Of course, it can be split if
> needed.
>
> The first part of the series (patch 1 and 2 ) fixes fw_devlink when it
> is used with overlay. Those patches were previously sent by Saravana
> [0]. I rebased them on top of v7.0-rc1.
>
> Also I added a call to driver_deferred_probe_trigger() in Saravana's
> patch (patch 2) to ensure that probes are retried after the modification
> performed on the dangling consumers. This allows to fix issues reported
> by Matti and Geert [2] with the previous iteration patches.
>
> Those modification were not sufficient in our case and so, on top of
> that, patches 3 to 5 fix some more issues related to fw_devlink.
>
> Patches 6 to 11 introduce and use fw_devlink_set_device() in already
> existing code.
>
> Patches 12 and 13 are related also to fw_devlink but specific to PCI and
> the device-tree nodes created during enumeration.
>
> Patches 14, 15 and 16 are related fw_devlink too but specific to I2C
> muxes. Patches purpose is to correctly set a link between an adapter
> supplier and its consumer. Indeed, an i2c mux adapter's parent is not
> the i2c mux supplier but the adapter the i2c mux is connected to. Adding
> a new link between the adapter supplier involved when i2c muxes are used
> avoid a freeze observed during device removal.
>
> Patch 17 adds support for fw_delink on x86. fw_devlink is needed to have
> the consumer/supplier relationship between devices in order to ensure a
> correct device removal order. Adding fw_devlink support for x86 has been
> tried in the past but was reverted [1] because it broke some systems.
> Instead of enabling fw_devlink on *all* x86 system, enable it on *all*
> x86 except on those where it leads to issue.
>
> Patches 18 and 19 allow to build clock and i2c controller used by the
> LAN966x PCI device when the LAN966x PCI device is enabled.
>
> Patches 20 to 24 are specific to the LAN966x. They touch the current
> dtso, split it in dtsi/dtso files, rename the dtso and improve the
> driver to allow easier support for other boards.
>
> The next patch (patch 25) update the LAN966x device-tree overlay itself
> to have the SPF ports and devices they depends on described.
>
> The last two patches (patches 26 and 27) sort the existing drivers in
> the needed driver list available in the Kconfig help and add new drivers
> in this list keep the list up to date with the devices described in the
> device-tree overlay.
>
> We believe some items from the above list can be merged separately, with
> no build dependencies. We expect:
>
> - Patches 1 to 5 to be taken by driver core maintainers
From a quick look, can't the first 2 DT patches be taken by me?
Rob
^ permalink raw reply
* Re: [PATCH net-next v2 1/2] dt-bindings: net: document Microchip PIC64-HPSC/HX MDIO controller
From: Charles Perry @ 2026-04-07 18:01 UTC (permalink / raw)
To: Rob Herring
Cc: Charles Perry, netdev, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Krzysztof Kozlowski, Conor Dooley,
Heiner Kallweit, Russell King, devicetree, linux-kernel
In-Reply-To: <20260407170033.GA2954294-robh@kernel.org>
On Tue, Apr 07, 2026 at 12:00:33PM -0500, Rob Herring wrote:
> On Mon, Mar 23, 2026 at 03:02:53PM -0700, Charles Perry wrote:
> > This MDIO hardware is based on a Microsemi design supported in Linux by
> > mdio-mscc-miim.c. However, The register interface is completely different
> > with pic64hpsc, hence the need for separate documentation.
> >
> > The hardware supports C22 and C45.
> >
> > The documentation recommends an input clock of 156.25MHz and a prescaler
> > of 39, which yields an MDIO clock of 1.95MHz.
> >
> > The hardware supports an interrupt pin to signal transaction completion
> > which is not strictly needed as the software can also poll a "TRIGGER"
> > bit for this.
> >
> > Signed-off-by: Charles Perry <charles.perry@microchip.com>
> > ---
> >
> > Notes:
> > Changes in v2:
> > - Make "clocks" and "interrupts" required (Andrew)
> > - Add a default value to "clock-frequency" (Andrew)
> >
> > .../net/microchip,pic64hpsc-mdio.yaml | 68 +++++++++++++++++++
> > 1 file changed, 68 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml b/Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml
> > new file mode 100644
> > index 000000000000..d690afe3d3cf
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml
> > @@ -0,0 +1,68 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/microchip,pic64hpsc-mdio.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Microchip PIC64-HPSC/HX MDIO controller
> > +
> > +maintainers:
> > + - Charles Perry <charles.perry@microchip.com>
> > +
> > +description: |
>
> Don't need '|' if no formatting to preserve.
>
Ok
> > + Microchip PIC64-HPSC/HX SoCs have two MDIO bus controller. This MDIO bus
>
> s/controller/controllers/
>
> Though how many instances there are is not really applicable to the
> binding unless there is some difference.
There are no differences between the two instances. I'll remove the mention
about the SoC containing two instances.
>
> > + controller supports C22 and C45 register access. It is named "MDIO Initiator"
> > + in the documentation.
> > +
> > +allOf:
> > + - $ref: mdio.yaml#
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - const: microchip,pic64hpsc-mdio
> > + - items:
> > + - const: microchip,pic64hx-mdio
> > + - const: microchip,pic64hpsc-mdio
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + clock-frequency:
> > + default: 2500000
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - interrupts
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > + bus {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + mdio@4000C21E000 {
>
> Unit-addresses are lower case hex.
Ok
>
> > + compatible = "microchip,pic64hpsc-mdio";
> > + reg = <0x400 0x0C21E000 0x0 0x1000>;
>
> And generally we use lower case here too.
Ok
>
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clocks = <&svc_clk>;
> > + interrupt-parent = <&saplic0>;
> > + interrupts = <168 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + phy0: ethernet-phy@0 {
>
> Drop unused labels.
Ok
Thanks,
Charles
^ permalink raw reply
* Re: [PATCH 1/7] dt-bindings: sram: Document Allwinner H616 VE SRAM
From: Rob Herring (Arm) @ 2026-04-07 17:51 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: linux-kernel, linux-arm-kernel, Jernej Skrabec, devicetree,
linux-sunxi, Conor Dooley, Krzysztof Kozlowski, Samuel Holland
In-Reply-To: <20260324164357.1607247-2-wens@kernel.org>
On Wed, 25 Mar 2026 00:43:49 +0800, Chen-Yu Tsai wrote:
> The Allwinner H616 has two switchable peripheral SRAM regions:
>
> - The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
> to this region is enabled by default. CPU access can be disabled,
> after which reads will show the same stale value for all addresses,
> while writes are ignored.
>
> The mux value for this region is different from previous generations,
> and thus needs a completely new compatible.
>
> - The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
> KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
> CPU access is disabled, the whole region reads as zero, while writes
> are ignored.
>
> The mux value for this region is the same as on the A64 and H6. The
> existing compatible for the A64 already covers this.
>
> Add the compatible for the VE SRAM to the list of covered compatibles in
> the generic SRAM region binding.
>
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
> ---
> Documentation/devicetree/bindings/sram/sram.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
* Re: [PATCH 2/7] dt-bindings: sram: sunxi-sram: Add H616 SRAM regions
From: Rob Herring (Arm) @ 2026-04-07 17:49 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: linux-kernel, Conor Dooley, Jernej Skrabec, devicetree,
Krzysztof Kozlowski, linux-arm-kernel, Samuel Holland,
linux-sunxi
In-Reply-To: <20260324164357.1607247-3-wens@kernel.org>
On Wed, 25 Mar 2026 00:43:50 +0800, Chen-Yu Tsai wrote:
> The Allwinner H616 has two switchable peripheral SRAM regions:
>
> - The VE SRAM is a 2 MB dedicated SRAM for the Video Engine. CPU access
> to this region is enabled by default. CPU access can be disabled,
> after which reads will show the same stale value for all addresses,
> while writes are ignored.
>
> The mux value for this region is different from previous generations.
>
> - The SRAM C region is an alias of the first 128 KB of VE SRAM, plus 64
> KB of DE SRAM. The latter is otherwise unaccessible from the CPU. When
> CPU access is disabled, the whole region reads as zero, while writes
> are ignored.
>
> The mux value for this region is the same as on the A64 and H6.
>
> Add compatible strings for both of them.
>
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
> ---
> .../bindings/sram/allwinner,sun4i-a10-system-control.yaml | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
* [PATCH 2/2] fpga: ts73xx-fpga: add OF match table for device tree probing
From: Phil Pemberton @ 2026-04-07 17:27 UTC (permalink / raw)
To: Moritz Fischer, Xu Yilun, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Tom Rix, Florian Fainelli, linux-fpga, devicetree, linux-kernel,
Phil Pemberton
In-Reply-To: <20260407172730.1779804-1-philpem@philpem.me.uk>
The ts73xx-fpga driver currently only matches by platform device name,
which prevents it from being probed when the device is described in a
device tree. Add an of_device_id table so the driver can match against
the "technologic,ts73xx-fpga" compatible string.
Signed-off-by: Phil Pemberton <philpem@philpem.me.uk>
---
drivers/fpga/ts73xx-fpga.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/ts73xx-fpga.c
index 4e1d2a4d3df4..5c8a2008d5a2 100644
--- a/drivers/fpga/ts73xx-fpga.c
+++ b/drivers/fpga/ts73xx-fpga.c
@@ -11,6 +11,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/module.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/string.h>
#include <linux/iopoll.h>
@@ -119,9 +120,17 @@ static int ts73xx_fpga_probe(struct platform_device *pdev)
return PTR_ERR_OR_ZERO(mgr);
}
+static const struct of_device_id ts73xx_fpga_of_match[] = {
+ { .compatible = "technologic,ts73xx-fpga" },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, ts73xx_fpga_of_match);
+
static struct platform_driver ts73xx_fpga_driver = {
.driver = {
.name = "ts73xx-fpga-mgr",
+ .of_match_table = ts73xx_fpga_of_match,
},
.probe = ts73xx_fpga_probe,
};
--
2.43.0
^ permalink raw reply related
* [PATCH 1/2] dt-bindings: fpga: add binding for Technologic Systems TS-73xx FPGA
From: Phil Pemberton @ 2026-04-07 17:27 UTC (permalink / raw)
To: Moritz Fischer, Xu Yilun, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Tom Rix, Florian Fainelli, linux-fpga, devicetree, linux-kernel,
Phil Pemberton
In-Reply-To: <20260407172730.1779804-1-philpem@philpem.me.uk>
Add device tree binding documentation for the Altera Cyclone II FPGA
found on Technologic Systems TS-7300 series boards, programmed via a
CPLD memory-mapped interface.
Signed-off-by: Phil Pemberton <philpem@philpem.me.uk>
---
.../fpga/technologic,ts73xx-fpga.yaml | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/technologic,ts73xx-fpga.yaml
diff --git a/Documentation/devicetree/bindings/fpga/technologic,ts73xx-fpga.yaml b/Documentation/devicetree/bindings/fpga/technologic,ts73xx-fpga.yaml
new file mode 100644
index 000000000000..1f7a651e8f10
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/technologic,ts73xx-fpga.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/fpga/technologic,ts73xx-fpga.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Technologic Systems TS-73xx FPGA Manager
+
+maintainers:
+ - Florian Fainelli <f.fainelli@gmail.com>
+
+description:
+ FPGA manager for the Altera Cyclone II FPGA on Technologic Systems
+ TS-7300 series boards. The FPGA is programmed via a CPLD interface
+ at a memory-mapped register pair.
+
+properties:
+ compatible:
+ const: technologic,ts73xx-fpga
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ bus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ fpga-mgr@13c00000 {
+ compatible = "technologic,ts73xx-fpga";
+ reg = <0x13c00000 0x2>;
+ };
+ };
+...
--
2.43.0
^ permalink raw reply related
* [PATCH 0/2] Add device tree binding for ts73xx-fpga
From: Phil Pemberton @ 2026-04-07 17:27 UTC (permalink / raw)
To: Moritz Fischer, Xu Yilun, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Tom Rix, Florian Fainelli, linux-fpga, devicetree, linux-kernel,
Phil Pemberton
The driver for the Technologic Systems (EmbeddedTS) TS-7300 board's
onboard FPGA didn't have an OF match table. This prevented it from being
instantiated from a device tree. This is undesirable given EP93xx is
moving to device tree, and effectively prevents it from being used.
This patch series adds the OF match table and a device tree binding.
Phil Pemberton (2):
dt-bindings: fpga: add binding for Technologic Systems TS-73xx FPGA
fpga: ts73xx-fpga: add OF match table for device tree probing
.../fpga/technologic,ts73xx-fpga.yaml | 42 +++++++++++++++++++
drivers/fpga/ts73xx-fpga.c | 9 ++++
2 files changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/technologic,ts73xx-fpga.yaml
--
2.43.0
^ permalink raw reply
* Re: [PATCH v2 1/5] arm64: dts: qcom: sm8550: add PCIe MHI register regions
From: Neil Armstrong @ 2026-04-07 17:38 UTC (permalink / raw)
To: Joe Sandom, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260407-rb5gen2-dts-v2-1-d0c7f447ee73@axon.com>
On 4/7/26 17:46, Joe Sandom wrote:
> Add the MHI register regions to the pcie0 and pcie1 controller nodes
> so that the MHI bus layer can access controller registers directly.
Can you elaborate more on that ? Looking at the current implementation,
the pcie host driver only uses the mhi memory zone to show the transition
count in debugfs.
Neil
>
> Signed-off-by: Joe Sandom <jsandom@axon.com>
> ---
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 20 ++++++++++++++++----
> 1 file changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 912525e9bca6f5e1cbb8887ee0bf9e39650dc4ff..055ca931c04859f3a312eb9921aeb7a8cc676822 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -1964,8 +1964,14 @@ pcie0: pcie@1c00000 {
> <0 0x60000000 0 0xf1d>,
> <0 0x60000f20 0 0xa8>,
> <0 0x60001000 0 0x1000>,
> - <0 0x60100000 0 0x100000>;
> - reg-names = "parf", "dbi", "elbi", "atu", "config";
> + <0 0x60100000 0 0x100000>,
> + <0 0x01c03000 0 0x1000>;
> + reg-names = "parf",
> + "dbi",
> + "elbi",
> + "atu",
> + "config",
> + "mhi";
> #address-cells = <3>;
> #size-cells = <2>;
> ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
> @@ -2138,8 +2144,14 @@ pcie1: pcie@1c08000 {
> <0x0 0x40000000 0x0 0xf1d>,
> <0x0 0x40000f20 0x0 0xa8>,
> <0x0 0x40001000 0x0 0x1000>,
> - <0x0 0x40100000 0x0 0x100000>;
> - reg-names = "parf", "dbi", "elbi", "atu", "config";
> + <0x0 0x40100000 0x0 0x100000>,
> + <0x0 0x01c0b000 0x0 0x1000>;
> + reg-names = "parf",
> + "dbi",
> + "elbi",
> + "atu",
> + "config",
> + "mhi";
> #address-cells = <3>;
> #size-cells = <2>;
> ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
>
^ permalink raw reply
* Re: [PATCH 1/2] dt-bindings: fpga: add binding for Technologic Systems TS-73xx FPGA
From: Florian Fainelli @ 2026-04-07 17:32 UTC (permalink / raw)
To: Phil Pemberton, Moritz Fischer, Xu Yilun, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Tom Rix, linux-fpga, devicetree, linux-kernel
In-Reply-To: <20260407172730.1779804-2-philpem@philpem.me.uk>
On 4/7/26 10:27, Phil Pemberton wrote:
> Add device tree binding documentation for the Altera Cyclone II FPGA
> found on Technologic Systems TS-7300 series boards, programmed via a
> CPLD memory-mapped interface.
>
> Signed-off-by: Phil Pemberton <philpem@philpem.me.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply
* Re: [PATCH v2 2/5] arm64: dts: qcom: sm8550: add PCIe port labels
From: Neil Armstrong @ 2026-04-07 17:32 UTC (permalink / raw)
To: Joe Sandom, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260407-rb5gen2-dts-v2-2-d0c7f447ee73@axon.com>
On 4/7/26 17:46, Joe Sandom wrote:
> Add labels to the root port nodes (pcie0_port0, pcie1_port0) to
> allow board DTS files to reference them for adding endpoint devices
> to each pcie root port.
>
> Update the pcieport0 reference to pcie0_port0 in sm8550-hdk.dts and
> sm8550-qrd.dts to match the label rename in sm8550.dtsi.
>
> Signed-off-by: Joe Sandom <jsandom@axon.com>
> ---
> arch/arm64/boot/dts/qcom/sm8550-hdk.dts | 2 +-
> arch/arm64/boot/dts/qcom/sm8550-qrd.dts | 2 +-
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 4 ++--
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
> index ee13e6136a8259d28540e718851e094f74ead278..e821b731bdc496c872703723df02ae9b9b0233b5 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-hdk.dts
> @@ -1012,7 +1012,7 @@ &pcie0 {
> status = "okay";
> };
>
> -&pcieport0 {
> +&pcie0_port0 {
> wifi@0 {
> compatible = "pci17cb,1107";
> reg = <0x10000 0x0 0x0 0x0 0x0>;
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> index 2fb2e0be5e4c6b597f20f332cdf063daa2664205..cf63109ff7bf7b6fc827f108e22e82b8b04273c1 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
> @@ -912,7 +912,7 @@ &pcie0 {
> status = "okay";
> };
>
> -&pcieport0 {
> +&pcie0_port0 {
> wifi@0 {
> compatible = "pci17cb,1107";
> reg = <0x10000 0x0 0x0 0x0 0x0>;
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index 055ca931c04859f3a312eb9921aeb7a8cc676822..54308cbde40732da072177eab533582c155df590 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -2098,7 +2098,7 @@ opp-16000000-3 {
> };
> };
>
> - pcieport0: pcie@0 {
> + pcie0_port0: pcie@0 {
> device_type = "pci";
> reg = <0x0 0x0 0x0 0x0 0x0>;
> bus-range = <0x01 0xff>;
> @@ -2300,7 +2300,7 @@ opp-32000000-4 {
> };
> };
>
> - pcie@0 {
> + pcie1_port0: pcie@0 {
> device_type = "pci";
> reg = <0x0 0x0 0x0 0x0 0x0>;
> bus-range = <0x01 0xff>;
>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Thanks,
Neil
^ permalink raw reply
* Re: [PATCH 2/2] fpga: ts73xx-fpga: add OF match table for device tree probing
From: Florian Fainelli @ 2026-04-07 17:32 UTC (permalink / raw)
To: Phil Pemberton, Moritz Fischer, Xu Yilun, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Tom Rix, linux-fpga, devicetree, linux-kernel
In-Reply-To: <20260407172730.1779804-3-philpem@philpem.me.uk>
On 4/7/26 10:27, Phil Pemberton wrote:
> The ts73xx-fpga driver currently only matches by platform device name,
> which prevents it from being probed when the device is described in a
> device tree. Add an of_device_id table so the driver can match against
> the "technologic,ts73xx-fpga" compatible string.
>
> Signed-off-by: Phil Pemberton <philpem@philpem.me.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply
* Re: [PATCH v5 1/3] dt-bindings: dma: arm-dma350: document combined and per-channel IRQ topologies
From: Rob Herring @ 2026-04-07 17:20 UTC (permalink / raw)
To: Jun Guo
Cc: peter.chen, fugang.duan, krzk+dt, conor+dt, vkoul, ychuang3,
schung, robin.murphy, Frank.Li, dmaengine, devicetree,
linux-kernel, cix-kernel-upstream, linux-arm-kernel
In-Reply-To: <20260324120113.3681830-2-jun.guo@cixtech.com>
On Tue, Mar 24, 2026 at 08:01:11PM +0800, Jun Guo wrote:
> Document the interrupt topologies supported by DMA-350 integration:
> - one combined interrupt for all channels, or
> - one interrupt per channel (up to 8 channels).
>
> Assisted-by: Cursor:GPT-5.3-Codex
> Signed-off-by: Jun Guo <jun.guo@cixtech.com>
> ---
> .../devicetree/bindings/dma/arm,dma-350.yaml | 25 ++++++++++++-------
> 1 file changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
> index 429f682f15d8..bec9dc32541b 100644
> --- a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
> +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
> @@ -22,15 +22,22 @@ properties:
>
> interrupts:
> minItems: 1
> - items:
> - - description: Channel 0 interrupt
> - - description: Channel 1 interrupt
> - - description: Channel 2 interrupt
> - - description: Channel 3 interrupt
> - - description: Channel 4 interrupt
> - - description: Channel 5 interrupt
> - - description: Channel 6 interrupt
> - - description: Channel 7 interrupt
> + maxItems: 8
Don't need maxItems
> + description:
> + Either one interrupt per channel (8 interrupts), or one
> + combined interrupt for all channels.
> + oneOf:
> + - items:
> + - description: Channel 0 interrupt
> + - description: Channel 1 interrupt
> + - description: Channel 2 interrupt
> + - description: Channel 3 interrupt
> + - description: Channel 4 interrupt
> + - description: Channel 5 interrupt
> + - description: Channel 6 interrupt
> + - description: Channel 7 interrupt
> + - items:
> + - description: Combined interrupt shared by all channels
>
> "#dma-cells":
> const: 1
> --
> 2.34.1
>
^ permalink raw reply
* Re: [PATCH net-next v2 2/9] dt-bindings: net: lan9645x: add LAN9645X switch bindings
From: Rob Herring @ 2026-04-07 17:18 UTC (permalink / raw)
To: Jens Emil Schulz Østergaard
Cc: UNGLinuxDriver, Andrew Lunn, Vladimir Oltean, David S. Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Simon Horman,
Krzysztof Kozlowski, Conor Dooley, Woojung Huh, Russell King,
Steen Hegelund, Daniel Machon, linux-kernel, netdev, devicetree
In-Reply-To: <20260324-dsa_lan9645x_switch_driver_base-v2-2-f7504e3b0681@microchip.com>
On Tue, Mar 24, 2026 at 11:46:45AM +0100, Jens Emil Schulz Østergaard wrote:
> Add bindings for LAN9645X switch. We use a fallback compatible for the
> smallest SKU microchip,lan96455s-switch.
>
> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
> Signed-off-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com>
> ---
> Changes in v2:
> - rename file to microchip,lan96455s-switch.yaml
> - remove led vendor property
> - add {rx,tx}-internal-delay-ps for rgmii delay
> - remove labels from example
> - remove container node from example
> ---
> .../net/dsa/microchip,lan96455s-switch.yaml | 119 +++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 120 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.yaml
> new file mode 100644
> index 000000000000..0282e25c05d4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.yaml
> @@ -0,0 +1,119 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/dsa/microchip,lan96455s-switch.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip LAN9645x Ethernet switch
> +
> +maintainers:
> + - Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com>
> +
> +description: |
Don't need '|'
> + The LAN9645x switch is a multi-port Gigabit AVB/TSN Ethernet switch with
> + five integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
> + it supports up to 2 RGMII/RMII, up to 2 BASE-X/SERDES/2.5GBASE-X and one
> + Quad-SGMII interfaces.
> +
> +properties:
> + compatible:
> + oneOf:
> + - enum:
> + - microchip,lan96455s-switch
> + - items:
> + - enum:
> + - microchip,lan96455f-switch
> + - microchip,lan96457f-switch
> + - microchip,lan96459f-switch
> + - microchip,lan96457s-switch
> + - microchip,lan96459s-switch
> + - const: microchip,lan96455s-switch
> +
> + reg:
> + maxItems: 1
> +
> +$ref: dsa.yaml#
Since you don't have any custom properties (just constraints), this ref
should be "dsa.yaml#/$defs/ethernet-ports".
> +
> +patternProperties:
> + "^(ethernet-)?ports$":
For a new binding, use the preferred name which is ethernet-ports. ports
and port collide with the graph binding.
> + type: object
> + additionalProperties: true
> + patternProperties:
> + "^(ethernet-)?port@[0-8]$":
And 'ethernet-port'
> + type: object
> + description: Ethernet switch ports
> +
> + $ref: dsa-port.yaml#
> +
> + properties:
> + rx-internal-delay-ps:
> + const: 2000
> +
> + tx-internal-delay-ps:
> + const: 2000
> +
> + unevaluatedProperties: false
Place this after the $ref.
> +
> +oneOf:
> + - required:
> + - ports
> + - required:
> + - ethernet-ports
> +
> +required:
> + - compatible
> + - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + ethernet-switch@4000 {
> + compatible = "microchip,lan96459f-switch", "microchip,lan96455s-switch";
> + reg = <0x4000 0x244>;
> +
> + ethernet-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + phy-mode = "gmii";
> + phy-handle = <&cuphy0>;
> + };
> +
> + port@1 {
> + reg = <1>;
> + phy-mode = "gmii";
> + phy-handle = <&cuphy1>;
> + };
> +
> + port@2 {
> + reg = <2>;
> + phy-mode = "gmii";
> + phy-handle = <&cuphy2>;
> + };
> +
> + port@3 {
> + reg = <3>;
> + phy-mode = "gmii";
> + phy-handle = <&cuphy3>;
> + };
> +
> + port@7 {
> + reg = <7>;
> + phy-mode = "rgmii";
> + ethernet = <&cpu_host_port>;
> + rx-internal-delay-ps = <2000>;
> + tx-internal-delay-ps = <2000>;
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + pause;
> + };
> + };
> + };
> + };
> +...
> +
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 7ae698067c41..8232da1b3951 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -17278,6 +17278,7 @@ M: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com>
> M: UNGLinuxDriver@microchip.com
> L: netdev@vger.kernel.org
> S: Maintained
> +F: Documentation/devicetree/bindings/net/dsa/microchip,lan96455s-switch.yaml
> F: include/linux/dsa/lan9645x.h
> F: net/dsa/tag_lan9645x.c
>
>
> --
> 2.52.0
>
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: arm-smmu: qcom: Add compatible for Hawi SoC
From: Will Deacon @ 2026-04-07 17:03 UTC (permalink / raw)
To: Joerg Roedel, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Robin Murphy, Mukesh Ojha
Cc: catalin.marinas, kernel-team, Will Deacon, Robin Murphy,
linux-arm-kernel, iommu, devicetree, linux-kernel
In-Reply-To: <20260403080956.2714415-1-mukesh.ojha@oss.qualcomm.com>
On Fri, 03 Apr 2026 13:39:56 +0530, Mukesh Ojha wrote:
> Qualcomm Hawi SoC include apps smmu that implements arm,mmu-500, which
> is used to translate device-visible virtual addresses to physical
> addresses. Add compatible for these items.
>
>
Applied to iommu (arm/smmu/bindings), thanks!
[1/1] dt-bindings: arm-smmu: qcom: Add compatible for Hawi SoC
https://git.kernel.org/iommu/c/5e8323c3d528
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
^ permalink raw reply
* Re: [PATCH net-next v2 1/2] dt-bindings: net: document Microchip PIC64-HPSC/HX MDIO controller
From: Rob Herring @ 2026-04-07 17:00 UTC (permalink / raw)
To: Charles Perry
Cc: netdev, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Krzysztof Kozlowski, Conor Dooley,
Heiner Kallweit, Russell King, devicetree, linux-kernel
In-Reply-To: <20260323220254.3822444-2-charles.perry@microchip.com>
On Mon, Mar 23, 2026 at 03:02:53PM -0700, Charles Perry wrote:
> This MDIO hardware is based on a Microsemi design supported in Linux by
> mdio-mscc-miim.c. However, The register interface is completely different
> with pic64hpsc, hence the need for separate documentation.
>
> The hardware supports C22 and C45.
>
> The documentation recommends an input clock of 156.25MHz and a prescaler
> of 39, which yields an MDIO clock of 1.95MHz.
>
> The hardware supports an interrupt pin to signal transaction completion
> which is not strictly needed as the software can also poll a "TRIGGER"
> bit for this.
>
> Signed-off-by: Charles Perry <charles.perry@microchip.com>
> ---
>
> Notes:
> Changes in v2:
> - Make "clocks" and "interrupts" required (Andrew)
> - Add a default value to "clock-frequency" (Andrew)
>
> .../net/microchip,pic64hpsc-mdio.yaml | 68 +++++++++++++++++++
> 1 file changed, 68 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml b/Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml
> new file mode 100644
> index 000000000000..d690afe3d3cf
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml
> @@ -0,0 +1,68 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/microchip,pic64hpsc-mdio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip PIC64-HPSC/HX MDIO controller
> +
> +maintainers:
> + - Charles Perry <charles.perry@microchip.com>
> +
> +description: |
Don't need '|' if no formatting to preserve.
> + Microchip PIC64-HPSC/HX SoCs have two MDIO bus controller. This MDIO bus
s/controller/controllers/
Though how many instances there are is not really applicable to the
binding unless there is some difference.
> + controller supports C22 and C45 register access. It is named "MDIO Initiator"
> + in the documentation.
> +
> +allOf:
> + - $ref: mdio.yaml#
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: microchip,pic64hpsc-mdio
> + - items:
> + - const: microchip,pic64hx-mdio
> + - const: microchip,pic64hpsc-mdio
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-frequency:
> + default: 2500000
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - interrupts
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + mdio@4000C21E000 {
Unit-addresses are lower case hex.
> + compatible = "microchip,pic64hpsc-mdio";
> + reg = <0x400 0x0C21E000 0x0 0x1000>;
And generally we use lower case here too.
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&svc_clk>;
> + interrupt-parent = <&saplic0>;
> + interrupts = <168 IRQ_TYPE_LEVEL_HIGH>;
> +
> + phy0: ethernet-phy@0 {
Drop unused labels.
> + reg = <0>;
> + };
> + };
> + };
> --
> 2.47.3
>
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: gpio: cavium,thunder-8890: Convert to DT schema
From: Rob Herring @ 2026-04-07 16:48 UTC (permalink / raw)
To: ShiHao
Cc: Krzysztof Kozlowski, brgl, krzk+dt, conor+dt, rric, linux-gpio,
devicetree, linux-kernel
In-Reply-To: <adDRQbpl1lBinbij@fedora>
On Sat, Apr 4, 2026 at 3:52 AM ShiHao <i.shihao.999@gmail.com> wrote:
>
> On Tue, Mar 31, 2026 at 09:30:56AM +0200, Krzysztof Kozlowski wrote:
> >
> > This binding is odd and not used, so you should follow guidelines I gave
> > more than a year ago and updated recently and NOT convert it.
> >
> > Or rather answer - why this cannot be removed instead? What is the
> > benefit of this binding? Is any other project using it?
> >
> >
> > Best regards,
> > Krzysztof
> >
>
> Indeed this binding has no active user and i think it is good to be removed
> entirely because no driver no dts sources are using it , it seems abandoned.
> Please let me know if I need to resend it if it needs to be removed.Thanks
> for your time.
Please send a patch removing it. Thanks.
Rob
^ permalink raw reply
* Re: [PATCH] Update my email address
From: Sean Anderson @ 2026-04-07 16:48 UTC (permalink / raw)
To: Andrew Morton, linux-kernel
Cc: Rob Herring, devicetree, Krzysztof Kozlowski, Conor Dooley
In-Reply-To: <20260407164722.211610-1-sean.anderson@linux.dev>
On 4/7/26 12:47, Sean Anderson wrote:
> Soon I will no longer be working at SECO. Update the mailmap to redirect
> to my linux.dev address which I still have access to.
>
> Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
> ---
>
> .mailmap | 1 +
> Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml | 2 +-
> MAINTAINERS | 4 ++--
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/.mailmap b/.mailmap
> index 2d04aeba68b40..b9b5b1cd81608 100644
> --- a/.mailmap
> +++ b/.mailmap
> @@ -738,6 +738,7 @@ Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
> Satya Priya <quic_skakitap@quicinc.com> <quic_c_skakit@quicinc.com> <skakit@codeaurora.org>
> S.Çağlar Onur <caglar@pardus.org.tr>
> Sayali Lokhande <quic_sayalil@quicinc.com> <sayalil@codeaurora.org>
> +Sean Anderson <sean.anderson@linux.dev> <sean.anderson@seco.com>
> Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com>
> Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
> Sean Tranchetti <quic_stranche@quicinc.com> <stranche@codeaurora.org>
> diff --git a/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml b/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml
> index b1597db042635..3538eafff6b13 100644
> --- a/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml
> +++ b/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml
> @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
> title: Xilinx LogiCORE IP AXI Timer
>
> maintainers:
> - - Sean Anderson <sean.anderson@seco.com>
> + - Sean Anderson <sean.anderson@linux.dev>
>
> properties:
> compatible:
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c3fe46d7c4bc4..bc4b38eab832c 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -10248,7 +10248,7 @@ F: drivers/net/ethernet/freescale/dpaa
>
> FREESCALE QORIQ DPAA FMAN DRIVER
> M: Madalin Bucur <madalin.bucur@nxp.com>
> -R: Sean Anderson <sean.anderson@seco.com>
> +R: Sean Anderson <sean.anderson@linux.dev>
> L: netdev@vger.kernel.org
> S: Maintained
> F: Documentation/devicetree/bindings/net/fsl,fman*.yaml
> @@ -28907,7 +28907,7 @@ S: Orphan
> F: drivers/net/ethernet/xilinx/ll_temac*
>
> XILINX PWM DRIVER
> -M: Sean Anderson <sean.anderson@seco.com>
> +M: Sean Anderson <sean.anderson@linux.dev>
> S: Maintained
> F: drivers/pwm/pwm-xilinx.c
> F: include/clocksource/timer-xilinx.h
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
^ permalink raw reply
* [PATCH] Update my email address
From: Sean Anderson @ 2026-04-07 16:47 UTC (permalink / raw)
To: Andrew Morton, linux-kernel
Cc: Rob Herring, devicetree, Krzysztof Kozlowski, Conor Dooley,
Sean Anderson
Soon I will no longer be working at SECO. Update the mailmap to redirect
to my linux.dev address which I still have access to.
Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
---
.mailmap | 1 +
Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml | 2 +-
MAINTAINERS | 4 ++--
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/.mailmap b/.mailmap
index 2d04aeba68b40..b9b5b1cd81608 100644
--- a/.mailmap
+++ b/.mailmap
@@ -738,6 +738,7 @@ Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
Satya Priya <quic_skakitap@quicinc.com> <quic_c_skakit@quicinc.com> <skakit@codeaurora.org>
S.Çağlar Onur <caglar@pardus.org.tr>
Sayali Lokhande <quic_sayalil@quicinc.com> <sayalil@codeaurora.org>
+Sean Anderson <sean.anderson@linux.dev> <sean.anderson@seco.com>
Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com>
Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
Sean Tranchetti <quic_stranche@quicinc.com> <stranche@codeaurora.org>
diff --git a/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml b/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml
index b1597db042635..3538eafff6b13 100644
--- a/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml
+++ b/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx LogiCORE IP AXI Timer
maintainers:
- - Sean Anderson <sean.anderson@seco.com>
+ - Sean Anderson <sean.anderson@linux.dev>
properties:
compatible:
diff --git a/MAINTAINERS b/MAINTAINERS
index c3fe46d7c4bc4..bc4b38eab832c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10248,7 +10248,7 @@ F: drivers/net/ethernet/freescale/dpaa
FREESCALE QORIQ DPAA FMAN DRIVER
M: Madalin Bucur <madalin.bucur@nxp.com>
-R: Sean Anderson <sean.anderson@seco.com>
+R: Sean Anderson <sean.anderson@linux.dev>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/net/fsl,fman*.yaml
@@ -28907,7 +28907,7 @@ S: Orphan
F: drivers/net/ethernet/xilinx/ll_temac*
XILINX PWM DRIVER
-M: Sean Anderson <sean.anderson@seco.com>
+M: Sean Anderson <sean.anderson@linux.dev>
S: Maintained
F: drivers/pwm/pwm-xilinx.c
F: include/clocksource/timer-xilinx.h
--
2.35.1.1320.gc452695387.dirty
base-commit: bfe62a454542cfad3379f6ef5680b125f41e20f4
branch: email
^ permalink raw reply related
* Re: [PATCH] dt-bindings: i2c: cnxt,cx92755-i2c: Convert to DT schema
From: Rob Herring @ 2026-04-07 16:46 UTC (permalink / raw)
To: Shi Hao
Cc: krzk+dt, andi.shyti, conor+dt, linux-i2c, devicetree,
linux-kernel, daniel.baluta, simona.toaca, d-gole, m-chawdhry
In-Reply-To: <20260323174236.147507-1-i.shihao.999@gmail.com>
On Mon, Mar 23, 2026 at 11:12:36PM +0530, Shi Hao wrote:
> Convert the Conexant Digicolor I2C bindings to DT schema.
>
> Signed-off-by: Shi Hao <i.shihao.999@gmail.com>
> ---
>
> Note:
> This patch is part of the GSoC2026 application process for device tree
> bindings conversions https://github.com/LinuxFoundationGSoC/ProjectIde
> as/wiki/GSoC-2026-Device-Tree-Bindings
> ---
> .../bindings/i2c/cnxt,cx92755-i2c.yaml | 51 +++++++++++++++++++
> .../devicetree/bindings/i2c/i2c-digicolor.txt | 25 ---------
> 2 files changed, 51 insertions(+), 25 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/i2c/cnxt,cx92755-i2c.yaml
> delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-digicolor.txt
>
> diff --git a/Documentation/devicetree/bindings/i2c/cnxt,cx92755-i2c.yaml b/Documentation/devicetree/bindings/i2c/cnxt,cx92755-i2c.yaml
> new file mode 100644
> index 000000000000..669397bbc571
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/cnxt,cx92755-i2c.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/i2c/cnxt,cx92755-i2c.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Conexant Digicolor I2C controller
> +
> +allOf:
> + - $ref: /schemas/i2c/i2c-controller.yaml#
> +
> +maintainers:
> + - Baruch Siach <baruch@tkos.co.il>
> +
> +properties:
> + compatible:
> + const: cnxt,cx92755-i2c
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-frequency:
> + default: 100000
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - '#address-cells'
> + - '#size-cells'
These 2 are required by i2c-controller.yaml already, so you can drop
them. Otherwise, I don't know what issue Krzysztof sees either.
With that,
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply
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