* Re: [PATCH RFC v3 06/11] RISC-V: QoS: add resctrl setup and domain management
From: Drew Fustini @ 2026-04-18 22:01 UTC (permalink / raw)
To: guo.wenjia23
Cc: pjw, palmer, aou, alex, rkrcmar, samuel.holland, aricciardi,
npitre, mindal, atish.patra, atishp, vasu, ved, conor.dooley,
cuiyunhui, cp0613, zhiwei_liu, liwei1518, gong.shuai, gsh517,
liu.qingtao2, reinette.chatre, tony.luck, babu.moger, peternewman,
fenghua.yu, james.morse, ben.horgan, Dave.Martin, robh, conor+dt,
krzk+dt, rafael, lenb, robert.moore, sunilvl, linux-kernel,
linux-riscv, x86, linux-acpi, acpica-devel, devicetree,
paul.walmsley
In-Reply-To: <202604180028.63I0Svo8029922@mse-fl1.zte.com.cn>
On Fri, Apr 17, 2026 at 06:52:27PM +0800, guo.wenjia23@zte.com.cn wrote:
> Hi Drew,
>
> On Wed, Apr 15, 2026 at 9:57 AM Drew Fustini <fustini@kernel.org> wrote:
>
> > Add the setup and domain management layer: domain allocation
> > (qos_new_domain), controller value initialization
> > (qos_init_domain_ctrlval), resource struct initialization for cache and
> > bandwidth resources, domain registration with the resctrl filesystem
> > (qos_resctrl_add_controller_domain), and the top-level setup function
> > (qos_resctrl_setup) that probes all controllers and calls resctrl_init().
> >
> > Also add qos_resctrl_online_cpu() and qos_resctrl_offline_cpu() for CPU
> > hotplug integration.
> >
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > arch/riscv/kernel/qos/qos_resctrl.c | 295 +++++++++++++++++++++++++++++++++++-
> > 1 file changed, 294 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kernel/qos/qos_resctrl.c b/arch/riscv/kernel/qos/qos_resctrl.c
> > index a4a120f89840..8d7e3b0abb75 100644
> > --- a/arch/riscv/kernel/qos/qos_resctrl.c
> > +++ b/arch/riscv/kernel/qos/qos_resctrl.c
> > @@ -675,7 +675,23 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domai
> >
> > void resctrl_arch_reset_all_ctrls(struct rdt_resource *r)
> > {
> > - /* not implemented for the RISC-V resctrl implementation */
> > + struct cbqri_resctrl_res *hw_res;
> > + struct rdt_ctrl_domain *d;
> > + enum resctrl_conf_type t;
> > + u32 default_ctrl;
> > + int i;
> > +
> > + lockdep_assert_cpus_held();
> > +
> > + hw_res = container_of(r, struct cbqri_resctrl_res, resctrl_res);
> > + default_ctrl = resctrl_get_default_ctrl(r);
> > +
> > + list_for_each_entry(d, &r->ctrl_domains, hdr.list) {
> > + for (i = 0; i < hw_res->max_rcid; i++) {
> > + for (t = 0; t < CDP_NUM_TYPES; t++)
> > + resctrl_arch_update_one(r, d, i, t, default_ctrl);
>
> For the bw controller, default_ctrl = max_bw, and
> resctrl_arch_update_one will set the rbwb of all RCIDs to max_bw.
> According to the spec: The sum of Rbwb allocated across all rcids must
> not exceed MRBWB value.
>
> Does this conflict with the spec?
Good point. Yeah, this is not being done correctly. I had been doing
similar to what is done on x86 but the big difference is that CBQRI is
reservation based.
Each RCID must have at least 1 Rbwb, and the remainder should be
assigned to default group, RCID 0. It'll update the implementation.
Thanks,
Drew
^ permalink raw reply
* Re: [PATCH v1 1/2] dt-bindings: iio: adc: avia-hx711: add avia,hx710b compatible
From: David Lechner @ 2026-04-18 21:46 UTC (permalink / raw)
To: Piyush Patle, jic23, ak, robh, krzk+dt, conor+dt
Cc: nuno.sa, andy, linux-iio, devicetree, linux-kernel
In-Reply-To: <20260418170549.312446-1-piyushpatle228@gmail.com>
On 4/18/26 12:05 PM, Piyush Patle wrote:
> Add the HX710B compatible to the binding and describe the variant-specific
> channel and gain model.
>
> Also add an example node for HX710B so the schema covers both supported
> parts.
>
> Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
> ---
> .../bindings/iio/adc/avia-hx711.yaml | 36 +++++++++++++++----
> 1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
> index 9c57eb13f892..19318c4dd994 100644
> --- a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
> @@ -4,7 +4,7 @@
> $id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: AVIA HX711 ADC chip for weight cells
> +title: AVIA HX711 and HX710B ADCs
>
> maintainers:
> - Andreas Klinger <ak@it-klinger.de>
> @@ -12,9 +12,19 @@ maintainers:
> description: |
> Bit-banging driver using two GPIOs:
> - sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
> - and up to 3 cycles for selection of the input channel and gain for the
> - next measurement
> - - dout-gpio is the sensor data the sensor responds to the clock
> + and 1 to 3 additional cycles for selection of the input channel and gain
> + for the next measurement
> + - dout-gpio is the sensor data output the sensor drives in response to
> + the clock
> +
> + HX711: 24-bit ADC with selectable gain (32/64/128) and two differential
> + input channels. Channel A supports gain 64 and 128; channel B supports
> + gain 32.
> +
> + HX710B: 24-bit ADC with fixed gain of 128. Channel 0 is the differential
> + input and channel 1 measures the DVDD-AVDD supply voltage difference.
> + Channel selection for the next conversion is controlled by the number of
> + trailing PD_SCK pulses.
The bits about "bit-banging" and "channel selection" sound like driver
implementation details that don't belong in the DT bindings.
>
> Specifications about the driver can be found at:
> http://www.aviaic.com/ENProducts.aspx
> @@ -23,11 +33,12 @@ properties:
> compatible:
> enum:
> - avia,hx711
> + - avia,hx710b
>
> sck-gpios:
> description:
> Definition of the GPIO for the clock (output). In the datasheet it is
> - named PD_SCK
> + named PD_SCK.
Save the cleanups for a separate patch to keep the adding HX710B changes clear.
I'm guessing the existing binding for HX711 is quite old because it is quite
incomplete.
It has avdd-supply, but is missing vsup-supply and dvdd-supply.
It should probably also have a way to describe how the rate pin is wired.
And it should have a clocks property instead of clock-frequency.
It would make sense to have two clocks, on for XI/XO and one for PD_SCK.
The second one being optional because of sck-gpios.
HX710B has many fewer pins, so we will need an:
allOf:
- if:
properties:
compatible:
const: avia,hx710b
section that sets anything for pins that chip doesn't have to false, like
vsup-supply.
HX710B also has a vref-supply that HX711 doesn't have. (Unless these are the
same thing by a different name?)
> maxItems: 1
>
> dout-gpios:
> @@ -43,6 +54,9 @@ properties:
> Definition of the regulator used as analog supply
>
> clock-frequency:
> + description:
> + Bit-bang clock frequency on PD_SCK. Keep the PD_SCK high time below
> + the chip power-down threshold.
I suspect that this was meant to be the crystal frequency (XI/XO), not PD_SCK
since sck-gpios already exists for PD_SCK
> minimum: 20000
> maximum: 2500000
> default: 400000
> @@ -58,10 +72,20 @@ additionalProperties: false
> examples:
> - |
> #include <dt-bindings/gpio/gpio.h>
> - weight {
> + /* HX711 example */
The compatible string already has the part number, so this comment
doesn't really and any new info.
> + weight0 {
> compatible = "avia,hx711";
> sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
> dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
> avdd-supply = <&avdd>;
> clock-frequency = <100000>;
> };
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> + /* HX710B example */
> + weight1 {
> + compatible = "avia,hx710b";
> + sck-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
> + dout-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
> + avdd-supply = <&avdd>;
> + };
There is nothing significantly different about this example, so it
isn't particularly useful.
^ permalink raw reply
* Re: [PATCH 2/2] pinctrl: qcom: Introduce IPQ9650 TLMM driver
From: Dmitry Baryshkov @ 2026-04-18 20:22 UTC (permalink / raw)
To: Kathiravan Thirumoorthy
Cc: Bjorn Andersson, Linus Walleij, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, linux-gpio, devicetree, linux-kernel
In-Reply-To: <20260415-ipq9650_tlmm-v1-2-bd16ccb06332@oss.qualcomm.com>
On Wed, Apr 15, 2026 at 04:59:25PM +0530, Kathiravan Thirumoorthy wrote:
> Qualcomm's IPQ9650 comes with a TLMM block, like all other platforms,
> so add a driver for it.
>
> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
> ---
> drivers/pinctrl/qcom/Kconfig.msm | 9 +
> drivers/pinctrl/qcom/Makefile | 1 +
> drivers/pinctrl/qcom/pinctrl-ipq9650.c | 762 +++++++++++++++++++++++++++++++++
> 3 files changed, 772 insertions(+)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v1 0/5] Update APDS990x ALS to support device trees
From: Arnd Bergmann @ 2026-04-18 20:18 UTC (permalink / raw)
To: David Lechner, Svyatoslav Ryhel, Jonathan Cameron, Nuno Sá,
Andy Shevchenko, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Randy Dunlap
Cc: linux-iio, devicetree, linux-kernel
In-Reply-To: <36e3611d-642e-42de-9a56-cf81c3e06832@baylibre.com>
On Sat, Apr 18, 2026, at 18:24, David Lechner wrote:
> On 4/18/26 9:47 AM, Svyatoslav Ryhel wrote:
>> Document Avago APDS9900/9901 ALS/Proximity sensor in schema and modernize
>> its driver to support OF bindings.
>>
>> Svyatoslav Ryhel (5):
>> dt-bindings: iio: light: Document Avago APDS9900/9901 ALS/Proximity
>> sensor
>> misc: apds990x: Use more device managed approach in the probe
>> misc: apds990x: Drop Vled supply
>> misc: apds990x: Convert to use OF bindings
>> misc: apds990x: Drop IRQF_TRIGGER_LOW trigger
>>
>> .../bindings/iio/light/avago,apds9900.yaml | 83 ++++++++
>> drivers/misc/apds990x.c | 197 +++++++++---------
>
> As mentioned in my reply to the dt-bindings patch, there is already an
> IIO driver that looks like it could be compatible. I'm guessing that
> this misc driver pre-dates the IIO subsystem. I would have a look at it
> instead (drivers/iio/light/tsl2772.c).
I see that we have a number of ALS drivers like this one in drivers/misc:
drivers/misc/apds9802als.c
drivers/misc/apds990x.c
drivers/misc/bh1770glc.c
drivers/misc/isl29020.c
drivers/misc/isl29003.c
As far as I can tell, all of these are entirely unused, with nothing
in the kernel creating the platform devices. The drivers that used
instead have all been converted to drivers/iio a long time ago.
Is it time to remove all of the above?
The notable exception is drivers/misc/tsl2550.c, which is instantiated
from both arch/arm/boot/dts/ti/omap/am335x-evm.dts and
drivers/i2c/busses/i2c-taos-evm.c. There is a similarly named
drivers/iio/light/tsl2563.c driver, but unfortunately that uses
a completely different register level interface.
Arnd
^ permalink raw reply
* Re: [PATCH v2 1/3] MAINTAINERS: Move Peter De Schrijver to CREDITS
From: Aaro Koskinen @ 2026-04-18 20:07 UTC (permalink / raw)
To: Thierry Reding
Cc: Geert Uytterhoeven, linux-tegra, linux-arm-kernel, linux-pm,
linux-omap, linux-m68k, devicetree, linux-kernel, Paul Walmsley
In-Reply-To: <20260417131549.3154534-1-thierry.reding@kernel.org>
Hi,
On Fri, Apr 17, 2026 at 03:15:46PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> Peter sadly passed away a while back. Paul did a much better job at
> finding the right words to mourn this loss than I ever could, so I will
> leave this link here:
>
> https://lore.kernel.org/lkml/alpine.DEB.2.21.999.2407240345480.11116@utopia.booyaka.com/T/#u
>
> Co-developed-by: Paul Walmsley <pjw@kernel.org>
> Co-developed-by: Aaro Koskinen <aaro.koskinen@iki.fi>
> Co-developed-by: Geert Uytterhoeven <geert@linux-m68k.org>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Aaro Koskinen <aaro.koskinen@iki.fi>
A.
> ---
> Changes in v2:
> - add more missing entries
>
> CREDITS | 10 ++++++++++
> MAINTAINERS | 1 -
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/CREDITS b/CREDITS
> index 885fb05d8816..afd1f70b41cf 100644
> --- a/CREDITS
> +++ b/CREDITS
> @@ -3645,7 +3645,17 @@ D: Macintosh IDE Driver
>
> N: Peter De Schrijver
> E: stud11@cc4.kuleuven.ac.be
> +E: p2@mind.be
> +E: peter.de-schrijver@nokia.com
> +E: pdeschrijver@nvidia.com
> +E: p2@psychaos.be
> +D: Apollo Domain workstations
> +D: Ariadne and Hydra Amiga Ethernet drivers
> +D: IBM PS/2, Microchannel, and Token Ring support
> D: Mitsumi CD-ROM driver patches March version
> +D: TWL4030 power management and audio codec driver
> +D: OMAP power management
> +D: NVIDIA Tegra clock and BPMP drivers, among many other things
> S: Molenbaan 29
> S: B2240 Zandhoven
> S: Belgium
> diff --git a/MAINTAINERS b/MAINTAINERS
> index ef978bfca514..ffe20d770249 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -26145,7 +26145,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux.git
> N: [^a-z]tegra
>
> TEGRA CLOCK DRIVER
> -M: Peter De Schrijver <pdeschrijver@nvidia.com>
> M: Prashant Gaikwad <pgaikwad@nvidia.com>
> S: Supported
> F: drivers/clk/tegra/
> --
> 2.52.0
>
>
^ permalink raw reply
* Re: [PATCH v1 0/5] Update APDS990x ALS to support device trees
From: Svyatoslav Ryhel @ 2026-04-18 19:48 UTC (permalink / raw)
To: David Lechner
Cc: Jonathan Cameron, Nuno Sá, Andy Shevchenko, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Arnd Bergmann,
Greg Kroah-Hartman, Randy Dunlap, linux-iio, devicetree,
linux-kernel
In-Reply-To: <36e3611d-642e-42de-9a56-cf81c3e06832@baylibre.com>
сб, 18 квіт. 2026 р. о 19:24 David Lechner <dlechner@baylibre.com> пише:
>
> On 4/18/26 9:47 AM, Svyatoslav Ryhel wrote:
> > Document Avago APDS9900/9901 ALS/Proximity sensor in schema and modernize
> > its driver to support OF bindings.
> >
> > Svyatoslav Ryhel (5):
> > dt-bindings: iio: light: Document Avago APDS9900/9901 ALS/Proximity
> > sensor
> > misc: apds990x: Use more device managed approach in the probe
> > misc: apds990x: Drop Vled supply
> > misc: apds990x: Convert to use OF bindings
> > misc: apds990x: Drop IRQF_TRIGGER_LOW trigger
> >
> > .../bindings/iio/light/avago,apds9900.yaml | 83 ++++++++
> > drivers/misc/apds990x.c | 197 +++++++++---------
>
> As mentioned in my reply to the dt-bindings patch, there is already an
> IIO driver that looks like it could be compatible. I'm guessing that
> this misc driver pre-dates the IIO subsystem. I would have a look at it
> instead (drivers/iio/light/tsl2772.c).
>
tsl2772 driver fits, thanks for pointing out. Maybe you know how
apds9930 lux table was calculated? It is quite obscure to me.
Obviously this patchset is obsolete and different set of changes is required.
> > include/linux/platform_data/apds990x.h | 65 ------
> > 3 files changed, 187 insertions(+), 158 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/iio/light/avago,apds9900.yaml
> > delete mode 100644 include/linux/platform_data/apds990x.h
> >
>
^ permalink raw reply
* Re: [PATCH v3 3/8] wifi: ath10k: snoc: support powering on the device via pwrseq
From: Dmitry Baryshkov @ 2026-04-18 19:38 UTC (permalink / raw)
To: Luca Weiss
Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bartosz Golaszewski, Marcel Holtmann,
Luiz Augusto von Dentz, Jeff Johnson, Bjorn Andersson,
Konrad Dybcio, Manivannan Sadhasivam, Vinod Koul,
Balakrishna Godavarthi, Matthias Kaehlcke, linux-arm-msm,
linux-kernel, devicetree, linux-bluetooth, linux-wireless, ath10k,
linux-pm, Krzysztof Kozlowski, Bartosz Golaszewski
In-Reply-To: <DHUHU7UIT487.139L3KIVRVREU@fairphone.com>
On Thu, Apr 16, 2026 at 12:06:09PM +0200, Luca Weiss wrote:
> Hi Dmitry,
>
> On Mon Jan 19, 2026 at 6:07 PM CET, Dmitry Baryshkov wrote:
> > The WCN39xx family of WiFi/BT chips incorporates a simple PMU, spreading
> > voltages over internal rails. Implement support for using powersequencer
> > for this family of ATH10k devices in addition to using regulators.
> >
> > Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> > ---
> > drivers/net/wireless/ath/ath10k/snoc.c | 53 ++++++++++++++++++++++++++++++++--
> > drivers/net/wireless/ath/ath10k/snoc.h | 3 ++
> > 2 files changed, 53 insertions(+), 3 deletions(-)
> >
> > + ar_snoc->pwrseq = devm_pwrseq_get(&pdev->dev, "wlan");
> > + if (IS_ERR(ar_snoc->pwrseq)) {
> > + ret = PTR_ERR(ar_snoc->pwrseq);
> > + ar_snoc->pwrseq = NULL;
> > + if (ret != -EPROBE_DEFER)
> > + goto err_free_irq;
>
> I'm fairly sure this is now broken with CONFIG_POWER_SEQUENCING=n since
> then pwrseq_get() is returning ERR_PTR(-ENOSYS) which is not handled
> here.
>
> I'm observing my ath10k_snoc is now failing to probe "with error -38"
> which definitely seems to be related, but I haven't debugged it further
> yet.
Posted https://patch.msgid.link/20260418-ath10k-snoc-pwrseq-v1-1-832594ba3294@oss.qualcomm.com
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH] arm64: dts: qcom: purwa-iot-evk: Update TSENS thermal zone
From: Dmitry Baryshkov @ 2026-04-18 17:56 UTC (permalink / raw)
To: Gaurav Kohli
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, linux-arm-msm, devicetree, linux-kernel,
manaf.pallikunhi
In-Reply-To: <20260416-purwa_high_tj-v1-1-b538f98d42da@oss.qualcomm.com>
On Thu, Apr 16, 2026 at 05:04:48PM +0530, Gaurav Kohli wrote:
> Purwa IOT boards support a different thermal junction temperature
> specification compared to the base Purwa platform due to package
> level differences.
>
> Update the passive trip thresholds to 105°C to align with the higher
> temperature specification.
>
> Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/purwa-iot-evk.dts | 32 ++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts b/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts
> index ad503beec1d3..261d1e85651d 100644
> --- a/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts
> +++ b/arch/arm64/boot/dts/qcom/purwa-iot-evk.dts
Is it a property of the SKU used in the EVK or a property of the overall
form factor, cooling, etc.? In the former case it should go to
purwa-iot-som.dtsi.
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH RFC v4 7/7] arm64: dts: qcom: milos: Add Adreno 810 GPU and GMU nodes
From: Dmitry Baryshkov @ 2026-04-18 17:53 UTC (permalink / raw)
To: Alexander Koskovich
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Konrad Dybcio, Akhil P Oommen,
Bjorn Andersson, Luca Weiss, linux-arm-msm, dri-devel, freedreno,
devicetree, linux-kernel
In-Reply-To: <20260416-adreno-810-v4-7-61676e073f8a@pm.me>
On Thu, Apr 16, 2026 at 11:05:57AM +0000, Alexander Koskovich wrote:
> Add GPU and GMU devicetree nodes for the Adreno 810 GPU found on
> Qualcomm SM7635 (Milos) based devices.
>
> The qcom,kaanapali-gxclkctl.h header can be reused here because
> Milos uses the same driver and the GX_CLKCTL_GX_GDSC definition
> is identical.
>
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---
> arch/arm64/boot/dts/qcom/milos.dtsi | 166 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 166 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH 09/10] ARM: dts: qcom: msm8960: add Riva
From: Dmitry Baryshkov @ 2026-04-18 17:46 UTC (permalink / raw)
To: linux
Cc: Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Lee Jones, Konrad Dybcio,
Krzysztof Kozlowski, linux-arm-msm, linux-clk, devicetree,
linux-kernel, phone-devel, Rudraksha Gupta
In-Reply-To: <20260414-msm8960-wifi-v1-9-007fda9d6134@smankusors.com>
On Tue, Apr 14, 2026 at 01:55:36AM +0700, Antony Kurniawan Soemardi via B4 Relay wrote:
> From: Antony Kurniawan Soemardi <linux@smankusors.com>
>
> Add the Riva Peripheral Image Loader node to support the Wireless
> Connectivity and Networking Subsystem on MSM8960. This includes:
>
> - Reserved memory region for WCNSS firmware
> - WCN3660 iris radio controller
> - Bluetooth and Wi-Fi sub-devices exposed via the SMD edge
> - Pinctrl states for Bluetooth and Wi-Fi power management
>
> Tested-by: Rudraksha Gupta <guptarud@gmail.com>
> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
> ---
> arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 78 ++++++++++++++++++++++++++++++++
> 1 file changed, 78 insertions(+)
>
> @@ -456,6 +489,51 @@ saw1_vreg: regulator {
> };
> };
>
> + riva: riva-pil@3200800 {
> + compatible = "qcom,riva-pil";
> + reg = <0x03200800 0x1000>, <0x03202000 0x2000>, <0x03204000 0x100>;
> + reg-names = "ccu", "dxe", "pmu";
If this is going to be resent, one item per line, please (for both reg
and reg-names). Align to '<' or '"'.
> + interrupts-extended = <&intc GIC_SPI 199 IRQ_TYPE_EDGE_RISING>,
> + <&wcnss_smsm 6 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog", "fatal";
> + memory-region = <&wcnss_mem>;
> +
> + status = "disabled";
> +
> + iris {
> + compatible = "qcom,wcn3660";
> + clocks = <&cxo_board>;
> + clock-names = "xo";
> + };
> +
> + smd-edge {
> + interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
> + label = "riva";
> + qcom,ipc = <&l2cc 8 25>;
> + qcom,smd-edge = <6>;
> +
> + wcnss {
> + compatible = "qcom,wcnss";
> + qcom,smd-channels = "WCNSS_CTRL";
> + qcom,mmio = <&riva>;
> +
> + bluetooth {
> + compatible = "qcom,wcnss-bt";
> + };
> +
> + wifi {
> + compatible = "qcom,wcnss-wlan";
> + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx", "rx";
> + qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
The same for interrupt-names and smem-states.
Other than that:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> + qcom,smem-state-names = "tx-enable",
> + "tx-rings-empty";
> + };
> + };
> + };
> + };
> +
> clock-controller@4000000 {
> compatible = "qcom,mmcc-msm8960";
> reg = <0x4000000 0x1000>;
>
> --
> 2.34.1
>
>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v1 0/2] iio: adc: hx711: add HX710B support
From: Piyush Patle @ 2026-04-18 17:14 UTC (permalink / raw)
To: jic23, ak, robh, krzk+dt, conor+dt; +Cc: linux-iio, devicetree, linux-kernel
In-Reply-To: <20260418170519.312360-1-piyushpatle228@gmail.com>
On Sat, Apr 18, 2026 at 10:35 PM Piyush Patle <piyushpatle228@gmail.com> wrote:
>
> Add support for the HX710B ADC, a variant of the HX711 with the same
> GPIO interface but a different channel and gain model.
>
> The first patch updates the devicetree binding to add the
> `avia,hx710b` compatible and document the variant-specific behavior.
> The second patch extends the driver with per-chip configuration, HX710B
> channel selection through trailing pulse counts, and fixed-scale
> handling for the variant.
>
> Tested on PocketBeagle2 with an HX710B breakout module. The device
> probed successfully and raw readings were stable.
>
> Piyush Patle (2):
> dt-bindings: iio: adc: avia-hx711: add avia,hx710b compatible
> iio: adc: hx711: add support for HX710B
>
> .../bindings/iio/adc/avia-hx711.yaml | 36 ++-
> drivers/iio/adc/Kconfig | 9 +-
> drivers/iio/adc/hx711.c | 222 ++++++++++++++----
> 3 files changed, 214 insertions(+), 53 deletions(-)
>
> --
> 2.43.0
The two patches in this series were sent without proper In-Reply-To
threading by mistake.
Patch 1/2:
[PATCH v1 1/2] dt-bindings: iio: adc: avia-hx711: add avia,hx710b compatible
Patch 2/2:
[PATCH v1 2/2] iio: adc: hx711: add support for HX710B
Apologies!
^ permalink raw reply
* [PATCH v1 1/2] dt-bindings: iio: adc: avia-hx711: add avia,hx710b compatible
From: Piyush Patle @ 2026-04-18 17:05 UTC (permalink / raw)
To: jic23, ak, robh, krzk+dt, conor+dt
Cc: dlechner, nuno.sa, andy, linux-iio, devicetree, linux-kernel
Add the HX710B compatible to the binding and describe the variant-specific
channel and gain model.
Also add an example node for HX710B so the schema covers both supported
parts.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
---
.../bindings/iio/adc/avia-hx711.yaml | 36 +++++++++++++++----
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
index 9c57eb13f892..19318c4dd994 100644
--- a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: AVIA HX711 ADC chip for weight cells
+title: AVIA HX711 and HX710B ADCs
maintainers:
- Andreas Klinger <ak@it-klinger.de>
@@ -12,9 +12,19 @@ maintainers:
description: |
Bit-banging driver using two GPIOs:
- sck-gpio gives a clock to the sensor with 24 cycles for data retrieval
- and up to 3 cycles for selection of the input channel and gain for the
- next measurement
- - dout-gpio is the sensor data the sensor responds to the clock
+ and 1 to 3 additional cycles for selection of the input channel and gain
+ for the next measurement
+ - dout-gpio is the sensor data output the sensor drives in response to
+ the clock
+
+ HX711: 24-bit ADC with selectable gain (32/64/128) and two differential
+ input channels. Channel A supports gain 64 and 128; channel B supports
+ gain 32.
+
+ HX710B: 24-bit ADC with fixed gain of 128. Channel 0 is the differential
+ input and channel 1 measures the DVDD-AVDD supply voltage difference.
+ Channel selection for the next conversion is controlled by the number of
+ trailing PD_SCK pulses.
Specifications about the driver can be found at:
http://www.aviaic.com/ENProducts.aspx
@@ -23,11 +33,12 @@ properties:
compatible:
enum:
- avia,hx711
+ - avia,hx710b
sck-gpios:
description:
Definition of the GPIO for the clock (output). In the datasheet it is
- named PD_SCK
+ named PD_SCK.
maxItems: 1
dout-gpios:
@@ -43,6 +54,9 @@ properties:
Definition of the regulator used as analog supply
clock-frequency:
+ description:
+ Bit-bang clock frequency on PD_SCK. Keep the PD_SCK high time below
+ the chip power-down threshold.
minimum: 20000
maximum: 2500000
default: 400000
@@ -58,10 +72,20 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
- weight {
+ /* HX711 example */
+ weight0 {
compatible = "avia,hx711";
sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
avdd-supply = <&avdd>;
clock-frequency = <100000>;
};
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ /* HX710B example */
+ weight1 {
+ compatible = "avia,hx710b";
+ sck-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
+ dout-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
+ avdd-supply = <&avdd>;
+ };
--
2.43.0
^ permalink raw reply related
* [PATCH v1 0/2] iio: adc: hx711: add HX710B support
From: Piyush Patle @ 2026-04-18 17:05 UTC (permalink / raw)
To: jic23, ak, robh, krzk+dt, conor+dt; +Cc: linux-iio, devicetree, linux-kernel
Add support for the HX710B ADC, a variant of the HX711 with the same
GPIO interface but a different channel and gain model.
The first patch updates the devicetree binding to add the
`avia,hx710b` compatible and document the variant-specific behavior.
The second patch extends the driver with per-chip configuration, HX710B
channel selection through trailing pulse counts, and fixed-scale
handling for the variant.
Tested on PocketBeagle2 with an HX710B breakout module. The device
probed successfully and raw readings were stable.
Piyush Patle (2):
dt-bindings: iio: adc: avia-hx711: add avia,hx710b compatible
iio: adc: hx711: add support for HX710B
.../bindings/iio/adc/avia-hx711.yaml | 36 ++-
drivers/iio/adc/Kconfig | 9 +-
drivers/iio/adc/hx711.c | 222 ++++++++++++++----
3 files changed, 214 insertions(+), 53 deletions(-)
--
2.43.0
^ permalink raw reply
* Re: [PATCH 08/10] ARM: dts: qcom: msm8960: add SMSM & SPS
From: Dmitry Baryshkov @ 2026-04-18 16:53 UTC (permalink / raw)
To: linux
Cc: Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Lee Jones, Konrad Dybcio,
Krzysztof Kozlowski, linux-arm-msm, linux-clk, devicetree,
linux-kernel, phone-devel, Rudraksha Gupta
In-Reply-To: <20260414-msm8960-wifi-v1-8-007fda9d6134@smankusors.com>
On Tue, Apr 14, 2026 at 01:55:35AM +0700, Antony Kurniawan Soemardi via B4 Relay wrote:
> From: Antony Kurniawan Soemardi <linux@smankusors.com>
>
> Add the Shared Memory State Machine node to coordinate state transitions
> between the Applications processor and the Riva subsystem.
>
> Tested-by: Rudraksha Gupta <guptarud@gmail.com>
> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
> ---
> arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> index 218cf3158dfb..107c5613aa4a 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> @@ -109,6 +109,31 @@ smem {
> hwlocks = <&sfpb_mutex 3>;
> };
>
> + smsm {
> + compatible = "qcom,smsm";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + qcom,ipc-1 = <&l2cc 8 4>;
> + qcom,ipc-2 = <&l2cc 8 14>;
> + qcom,ipc-3 = <&l2cc 8 23>;
> + qcom,ipc-4 = <&sps_sic_non_secure 0x4094 0>;
> +
> + apps_smsm: apps@0 {
> + reg = <0>;
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + wcnss_smsm: wcnss@3 {
> + reg = <3>;
> + interrupts = <GIC_SPI 204 IRQ_TYPE_EDGE_RISING>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
Are there other SMSMs (modem, Q6, DSPS)? If so and if you are going to
send another revision, could you please add those?
Anyway,
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> + };
> +
> soc: soc {
> compatible = "simple-bus";
> ranges;
> @@ -455,6 +480,11 @@ clock-controller@4000000 {
> "hdmipll";
> };
>
> + sps_sic_non_secure: interrupt-controller@12100000 {
> + compatible = "qcom,msm8960-sps-sic", "syscon";
This one is exactly the same as the block on APQ8064.
> + reg = <0x12100000 0x10000>;
> + };
> +
> sdcc3: mmc@12180000 {
> compatible = "arm,pl18x", "arm,primecell";
> reg = <0x12180000 0x2000>;
>
> --
> 2.34.1
>
>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH 07/10] ARM: dts: qcom: msm8960: add SMEM & hwmutex
From: Dmitry Baryshkov @ 2026-04-18 16:46 UTC (permalink / raw)
To: linux
Cc: Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Lee Jones, Konrad Dybcio,
Krzysztof Kozlowski, linux-arm-msm, linux-clk, devicetree,
linux-kernel, phone-devel, Rudraksha Gupta
In-Reply-To: <20260414-msm8960-wifi-v1-7-007fda9d6134@smankusors.com>
On Tue, Apr 14, 2026 at 01:55:34AM +0700, Antony Kurniawan Soemardi via B4 Relay wrote:
> From: Antony Kurniawan Soemardi <linux@smankusors.com>
>
> Enable shared memory communication and add the SFPB mutex for MSM8960.
> These provide the foundation for inter-processor communication with the
> Riva (BT + Wi-Fi) subsystem.
>
> Tested-by: Rudraksha Gupta <guptarud@gmail.com>
> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
> ---
> arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH 06/10] ARM: dts: qcom: msm8960: add SCM
From: Dmitry Baryshkov @ 2026-04-18 16:45 UTC (permalink / raw)
To: Konrad Dybcio
Cc: linux, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Lee Jones,
Konrad Dybcio, Krzysztof Kozlowski, linux-arm-msm, linux-clk,
devicetree, linux-kernel, phone-devel, Rudraksha Gupta
In-Reply-To: <d53f1499-0afc-43e5-bee9-ae76df3c6910@oss.qualcomm.com>
On Tue, Apr 14, 2026 at 11:46:18AM +0200, Konrad Dybcio wrote:
> On 4/13/26 8:55 PM, Antony Kurniawan Soemardi via B4 Relay wrote:
> > From: Antony Kurniawan Soemardi <linux@smankusors.com>
> >
> > Add the Secure Channel Manager firmware device node to the MSM8960
> > device tree. The SCM is required for secure communication between the
> > application processor and other subsystems.
> >
> > Tested-by: Rudraksha Gupta <guptarud@gmail.com>
> > Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
> > ---
> > arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> > index 1d5e97b6aa4b..bc3fd55e524a 100644
> > --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> > +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> > @@ -77,6 +77,15 @@ l2: l2-cache {
> > };
> > };
> >
> > + firmware {
> > + scm {
> > + compatible = "qcom,scm-msm8960", "qcom,scm";
> > +
> > + clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>;
>
> I'm wondering if this should be an interconnect resource, but from a
> quick grepping, I think this is always supposed to be @ 64 MHz so
> perhaps not really
I'd say, this matches APQ8064. Let's keep the platform enablement
separate from refactorings, especially for those musem-grade platforms.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>
> (please tell me if you know more)
>
> Konrad
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH 05/10] ARM: dts: qcom: msm8960: add RPM clock controller and fix USB clocks
From: Dmitry Baryshkov @ 2026-04-18 16:44 UTC (permalink / raw)
To: Konrad Dybcio
Cc: linux, Bjorn Andersson, Michael Turquette, Stephen Boyd,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Lee Jones,
Konrad Dybcio, Krzysztof Kozlowski, linux-arm-msm, linux-clk,
devicetree, linux-kernel, phone-devel, Rudraksha Gupta
In-Reply-To: <7d25970d-c2e8-432e-b69f-0da99271b581@oss.qualcomm.com>
On Wed, Apr 15, 2026 at 11:28:40AM +0200, Konrad Dybcio wrote:
> On 4/13/26 8:55 PM, Antony Kurniawan Soemardi via B4 Relay wrote:
> > From: Antony Kurniawan Soemardi <linux@smankusors.com>
> >
> > The RPM clock controller manages clocks shared between the application
> > processor and the RPM firmware, including fabric and bus clocks required
> > by several peripherals.
> >
> > With the RPM clock controller now available in the device tree, the USB
> > controller must explicitly declare its dependency on
> > RPM_DAYTONA_FABRIC_CLK. Without this declaration, the clock framework
> > would consider it unused and disable it, breaking USB functionality.
> >
> > This also corrects the previous misuse of USB_HS1_XCVR_CLK as the core
> > clock. The XCVR clock is in fact used for PHY/reset handling rather than
> > as the main core clock.
> >
> > A similar issue has been observed on APQ8064, where missing the RPM
> > fabric clock dependency leads to broken USB.
> >
> > Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
> > ---
> > arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 16 ++++++++++++++--
> > 1 file changed, 14 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> > index fd28401cebb5..1d5e97b6aa4b 100644
> > --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> > +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> > @@ -5,6 +5,7 @@
> > #include <dt-bindings/clock/qcom,gcc-msm8960.h>
> > #include <dt-bindings/reset/qcom,gcc-msm8960.h>
> > #include <dt-bindings/clock/qcom,lcc-msm8960.h>
> > +#include <dt-bindings/clock/qcom,rpmcc.h>
> > #include <dt-bindings/mfd/qcom-rpm.h>
> > #include <dt-bindings/soc/qcom,gsbi.h>
> >
> > @@ -98,6 +99,13 @@ rpm: rpm@108000 {
> > interrupt-names = "ack",
> > "err",
> > "wakeup";
> > +
> > + rpmcc: clock-controller {
> > + compatible = "qcom,rpmcc-msm8960", "qcom,rpmcc";
> > + #clock-cells = <1>;
> > + clocks = <&pxo_board>, <&cxo_board>;
> > + clock-names = "pxo", "cxo";
>
> nit: one a line would be preferred
>
> > + };
> > };
> >
> > ssbi: ssbi@500000 {
> > @@ -507,8 +515,12 @@ usb1: usb@12500000 {
> > reg = <0x12500000 0x200>,
> > <0x12500200 0x200>;
> > interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> > - clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>;
> > - clock-names = "core", "iface";
> > + clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>,
>
> I still have mixed feelings whether this should be a clock or an
> interconnect resource..
>
> Some internal data tells me this is used by:
>
> * USB
> * SDCC
> * GSBI
> * INTC
> * APSS?
> * BAM DMA
>
> or anything that is adjacent to SPS. I think any/all clients vote either
> zero/off or 64 MHz, on MSM8960. It seems to be an IP that wasn't really
> used for a long time (and a long time ago, at that), so it's difficult to
> judge.
>
> I see that the list above is roughy in line with where msm-3.x attaches
> the votes (also for QSEECOM and friends)..
>
> +Dmitry, would you know more?
As per my understadning, those chips had several fixed-speed buses. So,
you are right, these are interconnects, but they are not scalable. When
it comes to such buses (AHB, AXI), we quite frequently model them as
clocks rather than interconnects. For example the same ChipIdea USB core
on MSM8916 or MSM8974 uses "iface" clock for the GCC_USB_HS_AHB_CLK.
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v1 0/5] Update APDS990x ALS to support device trees
From: David Lechner @ 2026-04-18 16:24 UTC (permalink / raw)
To: Svyatoslav Ryhel, Jonathan Cameron, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Arnd Bergmann,
Greg Kroah-Hartman, Randy Dunlap
Cc: linux-iio, devicetree, linux-kernel
In-Reply-To: <20260418144716.132936-1-clamor95@gmail.com>
On 4/18/26 9:47 AM, Svyatoslav Ryhel wrote:
> Document Avago APDS9900/9901 ALS/Proximity sensor in schema and modernize
> its driver to support OF bindings.
>
> Svyatoslav Ryhel (5):
> dt-bindings: iio: light: Document Avago APDS9900/9901 ALS/Proximity
> sensor
> misc: apds990x: Use more device managed approach in the probe
> misc: apds990x: Drop Vled supply
> misc: apds990x: Convert to use OF bindings
> misc: apds990x: Drop IRQF_TRIGGER_LOW trigger
>
> .../bindings/iio/light/avago,apds9900.yaml | 83 ++++++++
> drivers/misc/apds990x.c | 197 +++++++++---------
As mentioned in my reply to the dt-bindings patch, there is already an
IIO driver that looks like it could be compatible. I'm guessing that
this misc driver pre-dates the IIO subsystem. I would have a look at it
instead (drivers/iio/light/tsl2772.c).
> include/linux/platform_data/apds990x.h | 65 ------
> 3 files changed, 187 insertions(+), 158 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/iio/light/avago,apds9900.yaml
> delete mode 100644 include/linux/platform_data/apds990x.h
>
^ permalink raw reply
* Re: [PATCH v1 1/5] dt-bindings: iio: light: Document Avago APDS9900/9901 ALS/Proximity sensor
From: David Lechner @ 2026-04-18 16:21 UTC (permalink / raw)
To: Svyatoslav Ryhel, Jonathan Cameron, Nuno Sá, Andy Shevchenko,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Arnd Bergmann,
Greg Kroah-Hartman, Randy Dunlap
Cc: linux-iio, devicetree, linux-kernel
In-Reply-To: <20260418144716.132936-2-clamor95@gmail.com>
On 4/18/26 9:47 AM, Svyatoslav Ryhel wrote:
> Document Avago APDS-9900/9901 combined ALS/IR-LED/Proximity sensor.
I think we can just add this to iio/light/tsl2772.yaml. It already has
avago,apds9930 which looks similar.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> .../bindings/iio/light/avago,apds9900.yaml | 83 +++++++++++++++++++
> 1 file changed, 83 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/light/avago,apds9900.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/light/avago,apds9900.yaml b/Documentation/devicetree/bindings/iio/light/avago,apds9900.yaml
> new file mode 100644
> index 000000000000..f5fb79439e56
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/light/avago,apds9900.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/light/avago,apds9900.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Avago APDS-9900/9901 combined ALS/IR-LED/Proximity sensor
> +
> +maintainers:
> + - Svyatoslav Ryhel <clamor95@gmail.com>
> +
> +description: |
> + The APDS-9900/9901 provides digital ambient light sensing (ALS),
> + IR LED and a complete proximity detection system in a single
> + 8 pin package over I2C interface.
> + Datasheet at https://docs.broadcom.com/doc/AV02-2867EN
> +
> +properties:
> + compatible:
> + enum:
> + - avago,apds9900
> + - avago,apds9901
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + vdd-supply: true
> +
> + avago,pdrive-microamp:
In tsl2772, this is called led-max-microamp.
> + description:
> + The LED drive current is controlled by a regulated current
> + sink on the LDR pin. This feature eliminates the need to use
> + a current limiting resistor to control LED current. The LED
> + drive current can be configured for 12.5 mA, 25 mA, 50 mA
> + or 100 mA. For higher LED drive requirements, an external
> + P type transistor can be used to control the LED current.
> + enum: [12500, 25000, 50000, 100000]
> + default: 100000
> +
> + avago,ppcount:
This sounds like something that should be programmed at runtime, not
fixed to a single value in the devicetree. One can easily imaging an
application where the sensitivity needs to be changed as the environment
changes.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + The number of LED pulses can be programmed to a value of 1 to
> + 255 pulses as needed. Increasing the number of LED pulses at a
> + given current will increase the sensor sensitivity. Sensitivity
> + grows by the square root of the number of pulses. Each pulse
> + has a 16 mS period.
> + minimum: 1
> + maximum: 255
> + default: 1
> +
^ permalink raw reply
* Re: [PATCH 03/10] mfd: qcom_rpm: add msm8960 QDSS clock resource
From: Dmitry Baryshkov @ 2026-04-18 16:14 UTC (permalink / raw)
To: linux
Cc: Bjorn Andersson, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Lee Jones, Konrad Dybcio,
Krzysztof Kozlowski, linux-arm-msm, linux-clk, devicetree,
linux-kernel, phone-devel, Rudraksha Gupta
In-Reply-To: <20260414-msm8960-wifi-v1-3-007fda9d6134@smankusors.com>
On Tue, Apr 14, 2026 at 01:55:30AM +0700, Antony Kurniawan Soemardi via B4 Relay wrote:
> From: Antony Kurniawan Soemardi <linux@smankusors.com>
>
> msm8960 uses the same clock descriptor as apq8064 but lacked the
> corresponding QDSS resource definition in its resource table. Add
> resource ID 209 to msm8960_rpm_resource_table to match apq8064's
> implementation.
I'd rather drop APQ8064 mentions from the commit message and just state
that you are adding the QDSS clock to match msm-3.0 code.
>
> Without this entry, RPM clock initialization fails on msm8960,
> preventing Bluetooth/Wi-Fi/USB from being enabled.
>
> Tested-by: Rudraksha Gupta <guptarud@gmail.com>
> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
> ---
> drivers/mfd/qcom_rpm.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/mfd/qcom_rpm.c b/drivers/mfd/qcom_rpm.c
> index 27446f43e3f3..0defb3279af1 100644
> --- a/drivers/mfd/qcom_rpm.c
> +++ b/drivers/mfd/qcom_rpm.c
> @@ -324,6 +324,7 @@ static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
> [QCOM_RPM_USB_OTG_SWITCH] = { 205, 119, 82, 1 },
> [QCOM_RPM_HDMI_SWITCH] = { 206, 120, 83, 1 },
> [QCOM_RPM_DDR_DMM] = { 207, 121, 84, 2 },
> + [QCOM_RPM_QDSS_CLK] = { 209, ~0, 7, 1 },
> };
>
> static const struct qcom_rpm_data msm8960_template = {
>
> --
> 2.34.1
>
>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH 03/10] mfd: qcom_rpm: add msm8960 QDSS clock resource
From: Dmitry Baryshkov @ 2026-04-18 16:11 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Antony Kurniawan Soemardi, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Lee Jones, Konrad Dybcio, Krzysztof Kozlowski, linux-arm-msm,
linux-clk, devicetree, linux-kernel, phone-devel, Rudraksha Gupta
In-Reply-To: <00e40481-9e62-437e-ac75-a04594ef6879@oss.qualcomm.com>
On Thu, Apr 16, 2026 at 03:49:33PM +0200, Konrad Dybcio wrote:
> On 4/15/26 5:20 PM, Antony Kurniawan Soemardi wrote:
> > On 4/14/2026 3:07 PM, Konrad Dybcio wrote:
> >> On 4/14/26 10:06 AM, Konrad Dybcio wrote:
> >>> On 4/13/26 8:55 PM, Antony Kurniawan Soemardi via B4 Relay wrote:
> >>>> From: Antony Kurniawan Soemardi <linux@smankusors.com>
> >>>>
> >>>> msm8960 uses the same clock descriptor as apq8064 but lacked the
> >>>
> >>> This doesn't quite seem to be the case, some fields differ and
> >>> apq8064 additionally has:
> >>>
> >>> QCOM_RPM_PM8821_SMPS1
> >>> QCOM_RPM_PM8821_SMPS2
> >>> QCOM_RPM_PM8821_LDO1
> >>> QCOM_RPM_VDDMIN_GPIO
> >>
> >> Ah hmm, the MFD driver seems to provide *all* RPM resources..
> >
> > What I meant by "clock descriptor" in the commit message was
> > specifically the subset corresponding to RPM managed clocks. From what I
> > can tell based on downstream code, msm8960 and apq8064 seem to share the
> > same set of RPM clocks, even though the overall resource lists differ.
> >
> > Is that understanding correct?
>
> If that's struct msm_rpm_map_data on msm-3.x, then I see that 8x60 has:
>
> +MSM_RPM_MAP(PLL_4, PLL_4, 1),
> +MSM_RPM_MAP(SMI_CLK, SMI_CLK, 1),
>
> While 8960 has:
> -MSM_RPM_MAP(QDSS_CLK, QDSS_CLK, 1),
You are comparing 8x60 to 8960, while it should be 8960 to 8064.
I see that there are differences, but the QDSS is the same.
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH RFC 04/10] arm64: dts: qcom: msm8939: Add venus node
From: Erikas Bitovtas @ 2026-04-18 15:34 UTC (permalink / raw)
To: Bryan O'Donoghue, Vikash Garodia, Dikshita Agarwal,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Bjorn Andersson, Konrad Dybcio,
Michael Turquette, Stephen Boyd
Cc: linux-media, linux-arm-msm, devicetree, linux-kernel, linux-clk,
~postmarketos/upstreaming, phone-devel
In-Reply-To: <ac54d018-78e2-4f8d-97f5-3cfdb5151aa0@kernel.org>
On 4/16/26 5:31 PM, Bryan O'Donoghue wrote:
> On 16/04/2026 14:43, Erikas Bitovtas wrote:
>> + video-decoder {
>> + compatible = "venus-decoder";
>> + clocks = <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>,
>> + <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
>> + clock-names = "core0", "core1";
>> + power-domains = <&gcc VENUS_CORE0_GDSC>,
>> + <&gcc VENUS_CORE1_GDSC>;
>
> This doesn't make sense.
>
> You have two cores => assign one to encoder and the other to decoder.
>
This way during decode only one of the cores gets powered up instead of
both, resulting in power collapse fails.
Core clocks and power domains can be moved into Venus node instead of
sub-nodes, like this:
venus: video-codec@1d00000 {
compatible = "qcom,msm8939-venus";
reg = <0x01d00000 0xff000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
<&gcc GCC_VENUS0_AHB_CLK>,
<&gcc GCC_VENUS0_AXI_CLK>,
<&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>,
<&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
clock-names = "core",
"iface",
"bus",
"core0",
"core1";
power-domains = <&gcc VENUS_GDSC>,
<&gcc VENUS_C0RE0_GDSC>,
<&gcc VENUS_CORE1_GDSC>;
power-domain-names = "venus", "core0", "core1";
};
And then they can be powered up regardless if the session is for
encoding or decoding.
My first question was actually about this - whether these cores should
be powered up only decoding or for encoding as well. Bus configs
downstream signify they are only for decoding:
https://github.com/msm8916-mainline/linux-downstream/blob/b20608408caff817ec874f325127b07609fbaeb8/arch/arm/boot/dts/qcom/msm8939-common.dtsi#L1589
https://github.com/msm8916-mainline/linux-downstream/blob/b20608408caff817ec874f325127b07609fbaeb8/Documentation/devicetree/bindings/media/video/msm-vidc.txt#L35
Unfortunately, I couldn't test encoding on my device. It appears to be
broken.
^ permalink raw reply
* Re: [PATCH] arm64: dts: qcom: talos: Add memory-region for audio PD
From: Dmitry Baryshkov @ 2026-04-18 15:15 UTC (permalink / raw)
To: Ekansh Gupta
Cc: konrad.dybcio, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, quic_bkumar, quic_chennak,
linux-arm-msm, devicetree, linux-kernel
In-Reply-To: <20260418-talosaudio-v1-1-585ab22faaf4@oss.qualcomm.com>
On Sat, Apr 18, 2026 at 11:18:01AM +0530, Ekansh Gupta wrote:
> Reserve memory region for audio PD dynamic loading and remote heap
> requirements. Add the required VMID list for memory ownership
> transfers.
>
> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/talos.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
> index ff5afbfce2a4..c36917d6e0a9 100644
> --- a/arch/arm64/boot/dts/qcom/talos.dtsi
> +++ b/arch/arm64/boot/dts/qcom/talos.dtsi
> @@ -11,6 +11,7 @@
> #include <dt-bindings/clock/qcom,qcs615-videocc.h>
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/dma/qcom-gpi.h>
> +#include <dt-bindings/firmware/qcom,scm.h>
> #include <dt-bindings/interconnect/qcom,icc.h>
> #include <dt-bindings/interconnect/qcom,osm-l3.h>
> #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h>
> @@ -657,6 +658,11 @@ pil_gpu_mem: pil-gpu@97715000 {
> reg = <0x0 0x97715000 0x0 0x2000>;
> no-map;
> };
> +
> + adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap@97717000 {
> + reg = <0x0 0x97717000 0x0 0x800000>;
> + no-map;
> + };
> };
>
> soc: soc@0 {
> @@ -5100,6 +5106,9 @@ fastrpc {
> compatible = "qcom,fastrpc";
> qcom,glink-channels = "fastrpcglink-apps-dsp";
> label = "adsp";
> + memory-region = <&adsp_rpc_remote_heap_mem>;
> + qcom,vmids = <QCOM_SCM_VMID_LPASS
> + QCOM_SCM_VMID_ADSP_HEAP>;
Align on '<' symbol.
> #address-cells = <1>;
> #size-cells = <0>;
>
>
> ---
> base-commit: c7275b05bc428c7373d97aa2da02d3a7fa6b9f66
> change-id: 20260418-talosaudio-b8ecf8b9a1b3
>
> Best regards,
> --
> Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH] arm64: dts: qcom: hamoa: add audio PD remote heap region
From: Dmitry Baryshkov @ 2026-04-18 15:14 UTC (permalink / raw)
To: ekansh.gupta
Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Bharath Kumar, Chenna Kesava Raju, linux-arm-msm,
devicetree, linux-kernel
In-Reply-To: <20260418-hamoaaudio-v1-1-a92866f744a6@oss.qualcomm.com>
On Sat, Apr 18, 2026 at 11:38:15AM +0530, Ekansh Gupta via B4 Relay wrote:
> From: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
>
> Reference the reserved memory region for audio PD dynamic loading
> and remote heap requirements. Add the required VMID list for memory
> ownership transfers.
>
> Signed-off-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/hamoa.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>
--
With best wishes
Dmitry
^ permalink raw reply
* Re: [PATCH v3 3/3] arm64: dts: qcom: eliza: Add IMEM node
From: Dmitry Baryshkov @ 2026-04-18 15:14 UTC (permalink / raw)
To: Alexander Koskovich
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, devicetree, linux-kernel, linux-arm-msm,
Konrad Dybcio
In-Reply-To: <20260418-eliza-imem-v3-3-bfbd499b6e77@pm.me>
On Sat, Apr 18, 2026 at 10:40:00AM +0000, Alexander Koskovich wrote:
> Add a node for the IMEM found on Eliza, which contains pil-reloc-info
> and the modem tables for IPA, among others.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---
> arch/arm64/boot/dts/qcom/eliza.dtsi | 20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
--
With best wishes
Dmitry
^ permalink raw reply
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