* [PATCH v5 5/8] arm64: dts: rockchip: add vicap node to rk3588
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
Add the device tree node for the RK3588 Video Capture (VICAP) unit.
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 91 +++++++++++++++++++++++++++
1 file changed, 91 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 4d80e5e1f0339b6e91adf40da6cc8389ffd4ddc9..87b0ac0893a9fe404a6274067bc142d782e3366e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -1430,6 +1430,89 @@ av1d: video-codec@fdc70000 {
resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>;
};
+ vicap: video-capture@fdce0000 {
+ compatible = "rockchip,rk3588-vicap";
+ reg = <0x0 0xfdce0000 0x0 0x800>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>,
+ <&cru DCLK_VICAP>, <&cru ICLK_CSIHOST0>,
+ <&cru ICLK_CSIHOST1>;
+ clock-names = "aclk", "hclk", "dclk", "iclk", "iclk1";
+ iommus = <&vicap_mmu>;
+ power-domains = <&power RK3588_PD_VI>;
+ resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>,
+ <&cru SRST_D_VICAP>, <&cru SRST_CSIHOST0_VICAP>,
+ <&cru SRST_CSIHOST1_VICAP>,
+ <&cru SRST_CSIHOST2_VICAP>,
+ <&cru SRST_CSIHOST3_VICAP>,
+ <&cru SRST_CSIHOST4_VICAP>,
+ <&cru SRST_CSIHOST5_VICAP>;
+ reset-names = "arst", "hrst", "drst", "irst0", "irst1",
+ "irst2", "irst3", "irst4", "irst5";
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vicap_dvp: port@0 {
+ reg = <0>;
+ };
+
+ vicap_mipi0: port@1 {
+ reg = <1>;
+ };
+
+ vicap_mipi1: port@2 {
+ reg = <2>;
+ };
+
+ vicap_mipi2: port@3 {
+ reg = <3>;
+
+ vicap_mipi2_input: endpoint {
+ remote-endpoint = <&csi2_output>;
+ };
+ };
+
+ vicap_mipi3: port@4 {
+ reg = <4>;
+ };
+
+ vicap_mipi4: port@5 {
+ reg = <5>;
+
+ vicap_mipi4_input: endpoint {
+ remote-endpoint = <&csi4_output>;
+ };
+ };
+
+ vicap_mipi5: port@6 {
+ reg = <6>;
+ };
+
+ vicap_toisp0: port@10 {
+ reg = <16>;
+ };
+
+ vicap_toisp1: port@11 {
+ reg = <17>;
+ };
+ };
+ };
+
+ vicap_mmu: iommu@fdce0800 {
+ compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
+ reg = <0x0 0xfdce0800 0x0 0x40>, <0x0 0xfdce0900 0x0 0x40>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>;
+ clock-names = "aclk", "iface";
+ #iommu-cells = <0>;
+ power-domains = <&power RK3588_PD_VI>;
+ rockchip,disable-mmu-reset;
+ status = "disabled";
+ };
+
csi2: csi@fdd30000 {
compatible = "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2";
reg = <0x0 0xfdd30000 0x0 0x10000>;
@@ -1452,6 +1535,10 @@ csi2_in: port@0 {
csi2_out: port@1 {
reg = <1>;
+
+ csi2_output: endpoint {
+ remote-endpoint = <&vicap_mipi2_input>;
+ };
};
};
};
@@ -1478,6 +1565,10 @@ csi4_in: port@0 {
csi4_out: port@1 {
reg = <1>;
+
+ csi4_output: endpoint {
+ remote-endpoint = <&vicap_mipi4_input>;
+ };
};
};
};
--
2.47.3
^ permalink raw reply related
* [PATCH v5 8/8] arm64: defconfig: enable designware mipi csi-2 receiver
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
The Synopsys DesignWare MIPI CSI-2 Receiver is integrated into recent
Rockchip SoCs, such as the RK3568 and the RK3588. As a consequence, they
are used on a lot of Rockchip-based single board computers and/or
corresponding camera modules, such as the Radxa Camera 4K. Enable the
driver for it in the default configuration.
Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index d905a0777f939c51cc39df6230591a31058b765f..9171f750337e540f0feec998c7aa33d3444b806e 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -918,6 +918,7 @@ CONFIG_SDR_PLATFORM_DRIVERS=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_AMPHION_VPU=m
CONFIG_VIDEO_CADENCE_CSI2RX=m
+CONFIG_VIDEO_DW_MIPI_CSI2RX=m
CONFIG_VIDEO_MEDIATEK_JPEG=m
CONFIG_VIDEO_MEDIATEK_VCODEC=m
CONFIG_VIDEO_WAVE_VPU=m
--
2.47.3
^ permalink raw reply related
* [PATCH v5 7/8] arm64: dts: rockchip: add radxa camera 4k on rock 5b+ cam1
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415
image sensor) to applied on the Radxa ROCK 5B+ CAM1 port.
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 4 +-
.../rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso | 99 ++++++++++++++++++++++
2 files changed, 102 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index d4ff476fb9814b18c74c6d59d73cf5d8e6ee9ca7..761d82b4f4f2ac7f0f4ba5e1f94f495b2160a059 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -207,6 +207,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5t.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-video-demo.dtbo
@@ -324,7 +325,8 @@ rk3588-rock-5b-pcie-srns-dtbs := rk3588-rock-5b.dtb \
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus-radxa-4k-cam.dtb
rk3588-rock-5b-plus-radxa-4k-cam-dtbs := rk3588-rock-5b-plus.dtb \
- rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo
+ rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo \
+ rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-haikou-video-demo.dtb
rk3588-tiger-haikou-haikou-video-demo-dtbs := rk3588-tiger-haikou.dtb \
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso
new file mode 100644
index 0000000000000000000000000000000000000000..8a4cf3fdbf8ebde8b2939c6126d169074431588a
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device tree overlay for the Radxa Camera 4K attached to the CAM1 port of
+ * the Radxa ROCK 5B+.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rockchip,rk3588-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ savdd_cam1: regulator-savdd-cam1 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-name = "savdd_cam1";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ sdvdd_cam1: regulator-sdvdd-cam1 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "sdvdd_cam1";
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ siovdd_cam1: regulator-siovdd-cam1 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "siovdd_cam1";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+};
+
+&i2c4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ cam1_imx415: camera-sensor@1a {
+ compatible = "sony,imx415";
+ reg = <0x1a>;
+ assigned-clocks = <&cru CLK_MIPI_CAMARAOUT_M4>;
+ assigned-clock-rates = <37125000>;
+ avdd-supply = <&savdd_cam1>;
+ clocks = <&cru CLK_MIPI_CAMARAOUT_M4>;
+ dvdd-supply = <&sdvdd_cam1>;
+ orientation = <2>; /* External */
+ ovdd-supply = <&siovdd_cam1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam1_rstn &mipim0_camera4_clk>;
+ reset-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>;
+
+ port {
+ cam1_imx415_output: endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <445500000>;
+ remote-endpoint = <&csi4_input>;
+ };
+ };
+ };
+};
+
+&pinctrl {
+ cam1 {
+ cam1_rstn: cam1-rstn-pinctrl {
+ rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&csi4 {
+ status = "okay";
+};
+
+&csi4_in {
+ csi4_input: endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <445500000>;
+ remote-endpoint = <&cam1_imx415_output>;
+ };
+};
+
+&csi_dphy1 {
+ status = "okay";
+};
+
+&vicap {
+ status = "okay";
+};
+
+&vicap_mmu {
+ status = "okay";
+};
--
2.47.3
^ permalink raw reply related
* [PATCH v5 6/8] arm64: dts: rockchip: add radxa camera 4k on rock 5b+ cam0
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415
image sensor) to applied on the Radxa ROCK 5B+ CAM0 port.
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
arch/arm64/boot/dts/rockchip/Makefile | 5 ++
.../rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso | 99 ++++++++++++++++++++++
2 files changed, 104 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index cb55c6b70d0e569abd9efc4e88ff908b6a682cf1..d4ff476fb9814b18c74c6d59d73cf5d8e6ee9ca7 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -206,6 +206,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5t.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-video-demo.dtbo
@@ -321,6 +322,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtb
rk3588-rock-5b-pcie-srns-dtbs := rk3588-rock-5b.dtb \
rk3588-rock-5b-pcie-srns.dtbo
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-plus-radxa-4k-cam.dtb
+rk3588-rock-5b-plus-radxa-4k-cam-dtbs := rk3588-rock-5b-plus.dtb \
+ rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo
+
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou-haikou-video-demo.dtb
rk3588-tiger-haikou-haikou-video-demo-dtbs := rk3588-tiger-haikou.dtb \
rk3588-tiger-haikou-video-demo.dtbo
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso
new file mode 100644
index 0000000000000000000000000000000000000000..ee9ecf68a88663a04e1c33a718894490ef475203
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device tree overlay for the Radxa Camera 4K attached to the CAM0 port of
+ * the Radxa ROCK 5B+.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rockchip,rk3588-cru.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&{/} {
+ savdd_cam0: regulator-savdd-cam0 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-name = "savdd_cam0";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ sdvdd_cam0: regulator-sdvdd-cam0 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "sdvdd_cam0";
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ siovdd_cam0: regulator-siovdd-cam0 {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "siovdd_cam0";
+ vin-supply = <&vcc_3v3_s3>;
+ };
+};
+
+&i2c3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ imx415: camera-sensor@1a {
+ compatible = "sony,imx415";
+ reg = <0x1a>;
+ assigned-clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
+ assigned-clock-rates = <37125000>;
+ avdd-supply = <&savdd_cam0>;
+ clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
+ dvdd-supply = <&sdvdd_cam0>;
+ orientation = <2>; /* External */
+ ovdd-supply = <&siovdd_cam0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_rstn &mipim0_camera3_clk>;
+ reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
+
+ port {
+ imx415_output: endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <445500000>;
+ remote-endpoint = <&csi2_input>;
+ };
+ };
+ };
+};
+
+&pinctrl {
+ cam0 {
+ cam0_rstn: cam0-rstn-pinctrl {
+ rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&csi2 {
+ status = "okay";
+};
+
+&csi2_in {
+ csi2_input: endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <445500000>;
+ remote-endpoint = <&imx415_output>;
+ };
+};
+
+&csi_dphy0 {
+ status = "okay";
+};
+
+&vicap {
+ status = "okay";
+};
+
+&vicap_mmu {
+ status = "okay";
+};
--
2.47.3
^ permalink raw reply related
* [PATCH v5 1/8] Documentation: admin-guide: media: add rk3588 vicap
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
Add a section that describes the Rockchip RK3588 VICAP.
Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
.../admin-guide/media/rkcif-rk3588-vicap.dot | 29 ++++++++++++++++++++
Documentation/admin-guide/media/rkcif.rst | 32 ++++++++++++++++++++++
2 files changed, 61 insertions(+)
diff --git a/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot b/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot
new file mode 100644
index 0000000000000000000000000000000000000000..f6d3404920b544f921987d3240f89987b340e138
--- /dev/null
+++ b/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot
@@ -0,0 +1,29 @@
+digraph board {
+ rankdir=TB
+ n00000007 [label="{{<port0> 0} | rkcif-mipi2\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+ n00000007:port1 -> n0000000a
+ n00000007:port1 -> n00000010 [style=dashed]
+ n00000007:port1 -> n00000016 [style=dashed]
+ n00000007:port1 -> n0000001c [style=dashed]
+ n0000000a [label="rkcif-mipi2-id0\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
+ n00000010 [label="rkcif-mipi2-id1\n/dev/video1", shape=box, style=filled, fillcolor=yellow]
+ n00000016 [label="rkcif-mipi2-id2\n/dev/video2", shape=box, style=filled, fillcolor=yellow]
+ n0000001c [label="rkcif-mipi2-id3\n/dev/video3", shape=box, style=filled, fillcolor=yellow]
+ n00000025 [label="{{<port0> 0} | rkcif-mipi4\n/dev/v4l-subdev1 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+ n00000025:port1 -> n00000028
+ n00000025:port1 -> n0000002e [style=dashed]
+ n00000025:port1 -> n00000034 [style=dashed]
+ n00000025:port1 -> n0000003a [style=dashed]
+ n00000028 [label="rkcif-mipi4-id0\n/dev/video4", shape=box, style=filled, fillcolor=yellow]
+ n0000002e [label="rkcif-mipi4-id1\n/dev/video5", shape=box, style=filled, fillcolor=yellow]
+ n00000034 [label="rkcif-mipi4-id2\n/dev/video6", shape=box, style=filled, fillcolor=yellow]
+ n0000003a [label="rkcif-mipi4-id3\n/dev/video7", shape=box, style=filled, fillcolor=yellow]
+ n00000043 [label="{{<port0> 0} | dw-mipi-csi2rx fdd30000.csi\n/dev/v4l-subdev2 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+ n00000043:port1 -> n00000007:port0
+ n00000048 [label="{{<port0> 0} | dw-mipi-csi2rx fdd50000.csi\n/dev/v4l-subdev3 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+ n00000048:port1 -> n00000025:port0
+ n0000004d [label="{{} | imx415 3-001a\n/dev/v4l-subdev4 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+ n0000004d:port0 -> n00000043:port0
+ n00000051 [label="{{} | imx415 4-001a\n/dev/v4l-subdev5 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+ n00000051:port0 -> n00000048:port0
+}
diff --git a/Documentation/admin-guide/media/rkcif.rst b/Documentation/admin-guide/media/rkcif.rst
index 2558c121abc466393b4a132e0d9abd2d37f2d25b..313a0ea45d16fe9bbb79d0798e8f8b1dbe1cb83f 100644
--- a/Documentation/admin-guide/media/rkcif.rst
+++ b/Documentation/admin-guide/media/rkcif.rst
@@ -77,3 +77,35 @@ and the following video devices:
.. kernel-figure:: rkcif-rk3568-vicap.dot
:alt: Topology of the RK3568 Video Capture (VICAP) unit
:align: center
+
+Rockchip RK3588 Video Capture (VICAP)
+-------------------------------------
+
+The RK3588 Video Capture (VICAP) unit features a digital video port and six
+MIPI CSI-2 capture interfaces that can receive video data independently.
+The DVP accepts parallel video data, BT.656 and BT.1120.
+Since the BT.1120 protocol may feature more than one stream, the RK3588 VICAP
+DVP features four DMA engines that can capture different streams.
+Similarly, the RK3588 VICAP MIPI CSI-2 receivers feature four DMA engines each
+to handle different Virtual Channels (VCs).
+
+The rkcif driver represents this hardware variant by exposing the following
+V4L2 subdevices:
+
+* dw-mipi-csi2rx fdd30000.csi: MIPI CSI-2 receiver connected to MIPI DPHY0
+* dw-mipi-csi2rx fdd50000.csi: MIPI CSI-2 receiver connected to MIPI DPHY1
+* rkcif-mipi2: INTERFACE/CROP block for the MIPI CSI-2 receiver connected to
+ MIPI DPHY0
+* rkcif-mipi4: INTERFACE/CROP block for the MIPI CSI-2 receiver connected to
+ MIPI DPHY1
+
+and the following video devices:
+
+* rkcif-mipi2-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi2
+ INTERFACE/CROP block.
+* rkcif-mipi4-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi4
+ INTERFACE/CROP block.
+
+.. kernel-figure:: rkcif-rk3588-vicap.dot
+ :alt: Topology of the RK3588 Video Capture (VICAP) unit
+ :align: center
--
2.47.3
^ permalink raw reply related
* [PATCH v5 2/8] media: dt-bindings: add rockchip rk3588 vicap
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch, Conor Dooley
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
Add documentation for the Rockchip RK3588 Video Capture (VICAP) unit. To
that end, make the existing rockchip,rk3568-vicap documentation more
general and introduce variant specific constraints.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
.../bindings/media/rockchip,rk3568-vicap.yaml | 173 ++++++++++++++++++---
1 file changed, 154 insertions(+), 19 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml
index 18cd0a5a5318174910e04f6ef7558c92cbfec899..080b64503b1bc44d0cfa796db8ec0eb369ed4c52 100644
--- a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml
@@ -15,9 +15,15 @@ description:
the data from camera sensors, video decoders, or other companion ICs and
transfers it into system main memory by AXI bus.
+ The Rockchip RK3588 Video Capture (VICAP) is similar to its RK3568
+ counterpart, but features six MIPI CSI-2 ports and additional connections
+ to the image signal processor (ISP) blocks.
+
properties:
compatible:
- const: rockchip,rk3568-vicap
+ enum:
+ - rockchip,rk3568-vicap
+ - rockchip,rk3588-vicap
reg:
maxItems: 1
@@ -26,11 +32,8 @@ properties:
maxItems: 1
clocks:
- items:
- - description: ACLK
- - description: HCLK
- - description: DCLK
- - description: ICLK
+ minItems: 4
+ maxItems: 5
clock-names:
items:
@@ -38,25 +41,19 @@ properties:
- const: hclk
- const: dclk
- const: iclk
+ - const: iclk1
+ minItems: 4
iommus:
maxItems: 1
resets:
- items:
- - description: ARST
- - description: HRST
- - description: DRST
- - description: PRST
- - description: IRST
+ minItems: 5
+ maxItems: 9
reset-names:
- items:
- - const: arst
- - const: hrst
- - const: drst
- - const: prst
- - const: irst
+ minItems: 5
+ maxItems: 9
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
@@ -67,8 +64,15 @@ properties:
ports:
$ref: /schemas/graph.yaml#/properties/ports
+ additionalProperties: false
properties:
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
@@ -100,13 +104,75 @@ properties:
port@1:
$ref: /schemas/graph.yaml#/properties/port
- description: Port connected to the MIPI CSI-2 receiver output.
+ description: Port connected to the MIPI CSI-2 receiver 0 output.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Port connected to the MIPI CSI-2 receiver 1 output.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
+ port@3:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Port connected to the MIPI CSI-2 receiver 2 output.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ port@4:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Port connected to the MIPI CSI-2 receiver 3 output.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ port@5:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Port connected to the MIPI CSI-2 receiver 4 output.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ port@6:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Port connected to the MIPI CSI-2 receiver 5 output.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ port@10:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Port connected to the ISP0 input.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ port@11:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Port connected to the ISP1 input.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
required:
- compatible
- reg
@@ -114,6 +180,75 @@ required:
- clocks
- ports
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3568-vicap
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+
+ clock-names:
+ maxItems: 4
+
+ resets:
+ maxItems: 5
+
+ reset-names:
+ items:
+ - const: arst
+ - const: hrst
+ - const: drst
+ - const: prst
+ - const: irst
+
+ ports:
+ properties:
+ port@2: false
+
+ port@3: false
+
+ port@4: false
+
+ port@5: false
+
+ port@6: false
+
+ port@10: false
+
+ port@11: false
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: rockchip,rk3588-vicap
+ then:
+ properties:
+ clocks:
+ minItems: 5
+
+ clock-names:
+ minItems: 5
+
+ resets:
+ minItems: 9
+
+ reset-names:
+ items:
+ - const: arst
+ - const: hrst
+ - const: drst
+ - const: irst0
+ - const: irst1
+ - const: irst2
+ - const: irst3
+ - const: irst4
+ - const: irst5
+
additionalProperties: false
examples:
--
2.47.3
^ permalink raw reply related
* [PATCH DONOTMERGE v5 4/8] arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3588
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
This patch is discussed over at
https://lore.kernel.org/all/20260305-rk3588-csi2rx-v2-0-79d01b615486@collabora.com
included here for testing purposes only.
The Rockchip RK3588 features six MIPI CSI-2 receiver units:
- MIPI0: connected to MIPI DCPHY0 (not supported)
- MIPI1: connected to MIPI DCPHY1 (not supported)
- MIPI2: connected to MIPI DPHY0
- MIPI3: connected to MIPI DPHY0-1 (not supported)
- MIPI4: connected to MIPI DPHY1
- MIPI5: connected to MIPI DPHY1-1 (not supported)
As the MIPI DCPHYs as well as the split DPHY mode of the DPHYs
are not yet supported, add only the device tree nodes for the
MIPI2 and MIPI4 units.
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 52 +++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 4fb8888c281c8c7ce31e90e91abe1fd703804dd2..4d80e5e1f0339b6e91adf40da6cc8389ffd4ddc9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -1430,6 +1430,58 @@ av1d: video-codec@fdc70000 {
resets = <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, <&cru SRST_P_AV1_BIU>;
};
+ csi2: csi@fdd30000 {
+ compatible = "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2";
+ reg = <0x0 0xfdd30000 0x0 0x10000>;
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "err1", "err2";
+ clocks = <&cru PCLK_CSI_HOST_2>;
+ phys = <&csi_dphy0>;
+ power-domains = <&power RK3588_PD_VI>;
+ resets = <&cru SRST_P_CSI_HOST_2>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi2_in: port@0 {
+ reg = <0>;
+ };
+
+ csi2_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
+ csi4: csi@fdd50000 {
+ compatible = "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2";
+ reg = <0x0 0xfdd50000 0x0 0x10000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "err1", "err2";
+ clocks = <&cru PCLK_CSI_HOST_4>;
+ phys = <&csi_dphy1>;
+ power-domains = <&power RK3588_PD_VI>;
+ resets = <&cru SRST_P_CSI_HOST_4>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ csi4_in: port@0 {
+ reg = <0>;
+ };
+
+ csi4_out: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
vop: vop@fdd90000 {
compatible = "rockchip,rk3588-vop";
reg = <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>;
--
2.47.3
^ permalink raw reply related
* [PATCH v5 0/8] media: rockchip: rkcif: add support for rk3588 vicap
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch, Conor Dooley
Habidere,
The RK3588 Video Capture (VICAP) constitutes an essential piece of the
RK3588 camera interface with one DVP, six MIPI CSI-2 receivers, scale/crop
units, and a data path multiplexer (to scaler units, to ISP, ...). This
series introduces basic support for the RK3588 VICAP unit to the rkcif
driver, thus paving the way for video capture in general and for camera
sensor image processing in particular.
The changes have been tested successfully on a Radxa ROCK 5B+ with two
Radxa 4K cameras attached to it. The raw images from the sensors can be
streamed after configuring the hardware pipeline with
media-ctl -d 0 --set-v4l2 '"dw-mipi-csi2rx fdd30000.csi":0
[fmt:SGBRG10_1X10/3864x2192 field:none colorspace:raw xfer:none]'
media-ctl -d 0 --set-v4l2 '"rkcif-mipi2":0
[fmt:SGBRG10_1X10/3864x2192 field:none colorspace:raw xfer:none]'
media-ctl -d 0 --set-v4l2 '"dw-mipi-csi2rx fdd50000.csi":0
[fmt:SGBRG10_1X10/3864x2192 field:none colorspace:raw xfer:none]'
media-ctl -d 0 --set-v4l2 '"rkcif-mipi4":0
[fmt:SGBRG10_1X10/3864x2192 field:none colorspace:raw xfer:none]'
and using e.g., GStreamer
gst-launch-1.0 v4l2src \
device=/dev/v4l/by-path/platform-fdce0000.video-capture-video-index0 \
! video/x-bayer,format=gbrg10le,width=3864,height=2192 ! bayer2rgb \
! ...
(or -index4 for the other camera sensor).
Note that this series requires the RK3588 MIPI CSI-2 receiver patches [0].
The dt-bindings patch is already included in media-committers/next and the
DT patch is already in Heiko's tree. I included the DT patch here to avoid
nasty merge conflicts.
Looking forward to your comments!
[0] https://lore.kernel.org/all/20260305-rk3588-csi2rx-v2-0-79d01b615486@collabora.com
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
Changes in v5:
- renamed "iclk0" -> "iclk" to simplify dt-binding (Rob)
- fixed power supply name in cam1 overlay (Sashiko)
- simplified ctrl0 assignment (Sakari)
- Link to v4: https://lore.kernel.org/r/20260508-rk3588-vicap-v4-0-6a6cd6f7c90b@collabora.com
Changes in v4:
- rebased onto latest media-committers/next
- applied Conor's A-b and Mehdi's R-b
- reflowed commit messages
- Link to v3: https://lore.kernel.org/r/20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com
Changes in v3:
- fixed copy-paste mistake "RK3568" -> "RK3588" in docs (Charalampos)
- fixed reg properties of ports in dtsi (port@10 <=> <16>, ...)
- added comment w.r.t. RKCIF_MIPI_CTRL_CAP_EN bit (Mehdi)
- removed redundant minItems and maxItems from dt-binding (Conor)
- revised device tree overlays for the Radxa CAMs according to the
schematics that I recently received
- Link to v2: https://lore.kernel.org/r/20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com
Changes in v2:
- modified rockchip,rk3568-vicap binding instead of creating a new one
(Conor)
- aligned clock names and reset names with rockchip,rk3568-vicap
- Link to v1: https://lore.kernel.org/r/20250430-rk3588-vicap-v1-0-b3bddf749914@collabora.com
---
Michael Riesch (8):
Documentation: admin-guide: media: add rk3588 vicap
media: dt-bindings: add rockchip rk3588 vicap
media: rockchip: rkcif: add support for rk3588 vicap mipi capture
[DONOTMERGE] arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3588
arm64: dts: rockchip: add vicap node to rk3588
arm64: dts: rockchip: add radxa camera 4k on rock 5b+ cam0
arm64: dts: rockchip: add radxa camera 4k on rock 5b+ cam1
arm64: defconfig: enable designware mipi csi-2 receiver
.../admin-guide/media/rkcif-rk3588-vicap.dot | 29 ++++
Documentation/admin-guide/media/rkcif.rst | 32 ++++
.../bindings/media/rockchip,rk3568-vicap.yaml | 173 ++++++++++++++++++---
arch/arm64/boot/dts/rockchip/Makefile | 7 +
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 143 +++++++++++++++++
.../rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso | 99 ++++++++++++
.../rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso | 99 ++++++++++++
arch/arm64/configs/defconfig | 1 +
.../platform/rockchip/rkcif/rkcif-capture-mipi.c | 148 +++++++++++++++++-
.../platform/rockchip/rkcif/rkcif-capture-mipi.h | 1 +
.../media/platform/rockchip/rkcif/rkcif-common.h | 2 +-
drivers/media/platform/rockchip/rkcif/rkcif-dev.c | 18 +++
12 files changed, 727 insertions(+), 25 deletions(-)
---
base-commit: a3d78e74dd3ed04797ea351edb7f0a19b961c063
change-id: 20250430-rk3588-vicap-9d164c8528a7
prerequisite-change-id: 20240220-rk3568-vicap-b9b3f9925f44:v8
prerequisite-patch-id: 150941d095374b150cd42fb7fc80af6d8dbb8c86
prerequisite-patch-id: 30d5217a4407e6ace34fd4be24a4641648713a13
prerequisite-patch-id: 466779634f7b55d70ac7046915ef5ef506d77976
prerequisite-patch-id: 5df54cf4ca76e8de8537513f8bc7f6c31a5106d8
prerequisite-patch-id: 693172b2bb630bd6e6390c55503cb5860d162124
prerequisite-patch-id: baf24b164ddd829d69ec6a50a870a0d6d281b561
prerequisite-patch-id: eb8ab8365c9772b8329199944c6f9821eef162b3
prerequisite-patch-id: fcc8cbab463cb4350c2b660d27d235d17484eb4f
prerequisite-patch-id: 91f6289b43121946f8e0dbfad3851a30be4b693e
prerequisite-patch-id: 594a59bef892e49482d8d2ed8db02d5ff7375c06
prerequisite-patch-id: da8e3b4a4d7a035e101b9921daa64a3f8e231983
prerequisite-patch-id: c8b88c860169b2c36865935c2624e91b1241888f
prerequisite-patch-id: 39bd0d207bd5edd18e54864c6123871f71f103e0
prerequisite-change-id: 20250616-rk3588-csi-dphy-c9ed2ad4cd9f:v1
prerequisite-patch-id: 8fb47b87efb5bb9a818fc5743e4d0b2d859614b7
prerequisite-patch-id: f0c121481b08b70e32e5d03b166d87e0c0e051e8
prerequisite-patch-id: aa2c6542eaaf49350681ce4d0f124d4b1cc9b9f5
prerequisite-patch-id: 66a77411c75b2acde23a199a4521493949d14a14
prerequisite-patch-id: e1d4bea12bf7688d6dacb9d724ff5dd9078c5975
Best regards,
--
Michael Riesch <michael.riesch@collabora.com>
^ permalink raw reply
* [PATCH v5 3/8] media: rockchip: rkcif: add support for rk3588 vicap mipi capture
From: Michael Riesch via B4 Relay @ 2026-05-22 21:23 UTC (permalink / raw)
To: Mehdi Djait, Laurent Pinchart, Mauro Carvalho Chehab, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Kever Yang,
Jagan Teki,
Кузнецов Михаил,
Charalampos Mitrodimas, Sebastian Reichel, Nicolas Dufresne,
Collabora Kernel Team, Sakari Ailus
Cc: linux-media, devicetree, linux-arm-kernel, linux-rockchip,
linux-kernel, Michael Riesch
In-Reply-To: <20260522-rk3588-vicap-v5-0-d1d1f5265c56@collabora.com>
From: Michael Riesch <michael.riesch@collabora.com>
The RK3588 Video Capture (VICAP) unit features a Digital Video Port (DVP)
and six MIPI CSI-2 capture interfaces. Add initial support for this variant
to the rkcif driver and enable the MIPI CSI-2 capture interfaces.
Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
---
.../platform/rockchip/rkcif/rkcif-capture-mipi.c | 148 ++++++++++++++++++++-
.../platform/rockchip/rkcif/rkcif-capture-mipi.h | 1 +
.../media/platform/rockchip/rkcif/rkcif-common.h | 2 +-
drivers/media/platform/rockchip/rkcif/rkcif-dev.c | 18 +++
4 files changed, 163 insertions(+), 6 deletions(-)
diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
index 9e67160a16e468401af32ed5672da8b6a0d86ef2..bc9518f8db50757390c917f433ae35bdd330927b 100644
--- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
+++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c
@@ -30,6 +30,14 @@
#define RK3568_MIPI_CTRL0_CROP_EN BIT(5)
#define RK3568_MIPI_CTRL0_WRDDR(type) ((type) << 1)
+#define RK3588_MIPI_CTRL0_DMA_EN BIT(28)
+#define RK3588_MIPI_CTRL0_HIGH_ALIGN BIT(27)
+#define RK3588_MIPI_CTRL0_WRDDR(type) ((type) << 5)
+#define RK3588_MIPI_CTRL0_CROP_EN BIT(4)
+#define RK3588_MIPI_CTRL0_PARSE(type) ((type) << 1)
+
+#define RK3588_MIPI_CTRL_CAP_EN BIT(0)
+
#define RKCIF_MIPI_CTRL0_DT_ID(id) ((id) << 10)
#define RKCIF_MIPI_CTRL0_VC_ID(id) ((id) << 8)
#define RKCIF_MIPI_CTRL0_CAP_EN BIT(0)
@@ -375,11 +383,8 @@ static u32
rkcif_rk3568_mipi_ctrl0(struct rkcif_stream *stream,
const struct rkcif_output_fmt *active_out_fmt)
{
- u32 ctrl0 = 0;
-
- ctrl0 |= RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt);
- ctrl0 |= RKCIF_MIPI_CTRL0_CAP_EN;
- ctrl0 |= RK3568_MIPI_CTRL0_CROP_EN;
+ u32 ctrl0 = RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt) |
+ RKCIF_MIPI_CTRL0_CAP_EN | RK3568_MIPI_CTRL0_CROP_EN;
if (active_out_fmt->mipi.compact)
ctrl0 |= RK3568_MIPI_CTRL0_COMPACT_EN;
@@ -481,6 +486,132 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data = {
},
};
+static u32
+rkcif_rk3588_mipi_ctrl0(struct rkcif_stream *stream,
+ const struct rkcif_output_fmt *active_out_fmt)
+{
+ u32 ctrl0 = 0;
+
+ ctrl0 |= RK3588_MIPI_CTRL0_DMA_EN;
+ ctrl0 |= RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt);
+ ctrl0 |= RK3588_MIPI_CTRL0_CROP_EN;
+ ctrl0 |= RKCIF_MIPI_CTRL0_CAP_EN;
+
+ switch (active_out_fmt->mipi.type) {
+ case RKCIF_MIPI_TYPE_RAW8:
+ break;
+ case RKCIF_MIPI_TYPE_RAW10:
+ ctrl0 |= RK3588_MIPI_CTRL0_PARSE(0x1);
+ if (!active_out_fmt->mipi.compact)
+ ctrl0 |= RK3588_MIPI_CTRL0_WRDDR(0x1);
+ break;
+ case RKCIF_MIPI_TYPE_RAW12:
+ ctrl0 |= RK3588_MIPI_CTRL0_PARSE(0x2);
+ if (!active_out_fmt->mipi.compact)
+ ctrl0 |= RK3588_MIPI_CTRL0_WRDDR(0x1);
+ break;
+ case RKCIF_MIPI_TYPE_RGB888:
+ break;
+ case RKCIF_MIPI_TYPE_YUV422SP:
+ ctrl0 |= RK3588_MIPI_CTRL0_WRDDR(0x4);
+ break;
+ case RKCIF_MIPI_TYPE_YUV420SP:
+ ctrl0 |= RK3588_MIPI_CTRL0_WRDDR(0x5);
+ break;
+ case RKCIF_MIPI_TYPE_YUV400:
+ ctrl0 |= RK3588_MIPI_CTRL0_WRDDR(0x3);
+ break;
+ default:
+ break;
+ }
+
+ return ctrl0;
+}
+
+const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data = {
+ .mipi_num = 6,
+ .mipi_ctrl0 = rkcif_rk3588_mipi_ctrl0,
+ .regs = {
+ [RKCIF_MIPI_CTRL] = 0x20,
+ [RKCIF_MIPI_INTEN] = 0x74,
+ [RKCIF_MIPI_INTSTAT] = 0x78,
+ },
+ .regs_id = {
+ [RKCIF_ID0] = {
+ [RKCIF_MIPI_CTRL0] = 0x00,
+ [RKCIF_MIPI_CTRL1] = 0x04,
+ [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x24,
+ [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x2c,
+ [RKCIF_MIPI_FRAME0_VLW_Y] = 0x34,
+ [RKCIF_MIPI_FRAME0_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x28,
+ [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x30,
+ [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_CROP_START] = 0x8c,
+ },
+ [RKCIF_ID1] = {
+ [RKCIF_MIPI_CTRL0] = 0x08,
+ [RKCIF_MIPI_CTRL1] = 0x0c,
+ [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x38,
+ [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x40,
+ [RKCIF_MIPI_FRAME0_VLW_Y] = 0x48,
+ [RKCIF_MIPI_FRAME0_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x3c,
+ [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x44,
+ [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_CROP_START] = 0x90,
+ },
+ [RKCIF_ID2] = {
+ [RKCIF_MIPI_CTRL0] = 0x10,
+ [RKCIF_MIPI_CTRL1] = 0x14,
+ [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x4c,
+ [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x54,
+ [RKCIF_MIPI_FRAME0_VLW_Y] = 0x5c,
+ [RKCIF_MIPI_FRAME0_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x50,
+ [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x58,
+ [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_CROP_START] = 0x94,
+ },
+ [RKCIF_ID3] = {
+ [RKCIF_MIPI_CTRL0] = 0x18,
+ [RKCIF_MIPI_CTRL1] = 0x1c,
+ [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x60,
+ [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x68,
+ [RKCIF_MIPI_FRAME0_VLW_Y] = 0x70,
+ [RKCIF_MIPI_FRAME0_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x64,
+ [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x6c,
+ [RKCIF_MIPI_FRAME1_VLW_Y] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_FRAME1_VLW_UV] = RKCIF_REGISTER_NOTSUPPORTED,
+ [RKCIF_MIPI_CROP_START] = 0x98,
+ },
+ },
+ .blocks = {
+ {
+ .offset = 0x100,
+ },
+ {
+ .offset = 0x200,
+ },
+ {
+ .offset = 0x300,
+ },
+ {
+ .offset = 0x400,
+ },
+ {
+ .offset = 0x500,
+ },
+ {
+ .offset = 0x600,
+ },
+ },
+};
+
static inline unsigned int rkcif_mipi_get_reg(struct rkcif_interface *interface,
unsigned int index)
{
@@ -631,6 +762,13 @@ static int rkcif_mipi_start_streaming(struct rkcif_stream *stream)
rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL1, ctrl1);
rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, ctrl0);
+ /*
+ * TODO: This bit has a different meaning on the RK3568, but it is
+ * set there by default anyway. While correct, this is not exactly
+ * nice and shall be reworked during the next refactoring.
+ */
+ rkcif_mipi_write(interface, RKCIF_MIPI_CTRL, RK3588_MIPI_CTRL_CAP_EN);
+
ret = 0;
out:
diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h
index 7f16eadc474c3b40078b8e9074dbfbd13ce95317..7edaca44f653ca405562ac1d91d0fea721eff3ce 100644
--- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h
+++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h
@@ -13,6 +13,7 @@
#include "rkcif-common.h"
extern const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data;
+extern const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data;
int rkcif_mipi_register(struct rkcif_device *rkcif);
diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers/media/platform/rockchip/rkcif/rkcif-common.h
index dd92cfbc879f01fec0983cc722c86c8da239a987..4d9211ba9bda8d8018c99fa3595ff7cac70be3c7 100644
--- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h
+++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h
@@ -27,7 +27,7 @@
#include "rkcif-regs.h"
#define RKCIF_DRIVER_NAME "rockchip-cif"
-#define RKCIF_CLK_MAX 4
+#define RKCIF_CLK_MAX 5
enum rkcif_format_type {
RKCIF_FMT_TYPE_INVALID,
diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c
index b4cf1146f13118ef77a49005af1edad96b793c41..be3a174b9aab021c81cf98a01c0599b71492149c 100644
--- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c
+++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c
@@ -53,6 +53,20 @@ static const struct rkcif_match_data rk3568_vicap_match_data = {
.mipi = &rkcif_rk3568_vicap_mipi_match_data,
};
+static const char *const rk3588_vicap_clks[] = {
+ "aclk",
+ "hclk",
+ "dclk",
+ "iclk",
+ "iclk1",
+};
+
+static const struct rkcif_match_data rk3588_vicap_match_data = {
+ .clks = rk3588_vicap_clks,
+ .clks_num = ARRAY_SIZE(rk3588_vicap_clks),
+ .mipi = &rkcif_rk3588_vicap_mipi_match_data,
+};
+
static const struct of_device_id rkcif_plat_of_match[] = {
{
.compatible = "rockchip,px30-vip",
@@ -62,6 +76,10 @@ static const struct of_device_id rkcif_plat_of_match[] = {
.compatible = "rockchip,rk3568-vicap",
.data = &rk3568_vicap_match_data,
},
+ {
+ .compatible = "rockchip,rk3588-vicap",
+ .data = &rk3588_vicap_match_data,
+ },
{}
};
MODULE_DEVICE_TABLE(of, rkcif_plat_of_match);
--
2.47.3
^ permalink raw reply related
* Re: [PATCH v3 1/1] dt-bindings: trivial-devices: add fsl,mc1323
From: sashiko-bot @ 2026-05-22 20:48 UTC (permalink / raw)
To: Frank.Li; +Cc: imx, robh, devicetree, Frank.Li, conor+dt
In-Reply-To: <20260522203810.832631-1-Frank.Li@oss.nxp.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The complex 802.15.4/ZigBee transceiver (Freescale MC1323) is being incorrectly added to trivial-devices.yaml.
--
commit b0a89da340a37ac000b2095bf76877af3c762c6f
Author: Frank Li <Frank.Li@nxp.com>
dt-bindings: trivial-devices: add fsl,mc1323
This commit adds the Freescale MC1323 2.4 GHz IEEE 802.15.4/ZigBee
transceiver to the trivial-devices binding. This change is intended to
resolve dtbs_check warnings on the legacy i.MX53 SMD platform where the
device was used.
> diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
> index 23fd4513933a4..28b059c858dd1 100644
> --- a/Documentation/devicetree/bindings/trivial-devices.yaml
> +++ b/Documentation/devicetree/bindings/trivial-devices.yaml
> @@ -127,6 +127,8 @@ properties:
> - domintech,dmard09
> # DMARD10: 3-axis Accelerometer
> - domintech,dmard10
> + # Freescale 2.4 GHz IEEE® 802.15.4/ZigBee
> + - fsl,mc1323
[Severity: Low]
Is it appropriate to add the Freescale MC1323 to trivial-devices.yaml?
The trivial-devices schema is strictly intended for simple I2C/SPI components
that genuinely require no hardware properties other than a compatible string,
reg, and optionally a single interrupt.
Since the MC1323 is a complex IEEE 802.15.4 MAC/PHY SoC, does using
trivial-devices.yaml as a workaround for sparse legacy device tree nodes
create a regression in binding purity?
Would it be better to create a dedicated minimal schema in
Documentation/devicetree/bindings/net/ieee802154/ instead, even if it
initially only lists the minimal properties needed to validate the legacy
i.MX53 SMD device tree?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260522203810.832631-1-Frank.Li@oss.nxp.com?part=1
^ permalink raw reply
* Re: [PATCH] clk: canaan: k230: Fix sparse warnings reported by LKP
From: Conor Dooley @ 2026-05-22 20:39 UTC (permalink / raw)
To: Xukai Wang
Cc: Conor Dooley, Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Paul Walmsley, Palmer Dabbelt,
Albert Ou, linux-clk, devicetree, linux-kernel, linux-riscv,
Samuel Holland, Troy Mitchell, Krzysztof Kozlowski,
kernel test robot
In-Reply-To: <dee4605ca30f9bbd55ccb4fcce9590ceee1fa10b.1779453284.git.kingxukai@zohomail.com>
[-- Attachment #1: Type: text/plain, Size: 499 bytes --]
On Fri, May 22, 2026 at 08:59:12PM +0800, Xukai Wang wrote:
> Fix all sparse warnings detected during LKP randconfig testing:
> - Replace plain integer 0 with NULL.
> - Add static modifier to k230_plls and k230_pll_divs.
>
> Reported-by: kernel test robot <lkp@intel.com>
> Closes: https://lore.kernel.org/oe-kbuild-all/202605220724.j4ZeM3KI-lkp@intel.com/
> Signed-off-by: Xukai Wang <kingxukai@zohomail.com>
Forgot to reply earlier, but I went and squashed this in.
Cheers,
Conor.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply
* [PATCH v3 1/1] dt-bindings: trivial-devices: add fsl,mc1323
From: Frank.Li @ 2026-05-22 20:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Guenter Roeck,
Frank Li, Wensheng Wang, Brian Chiang, Cosmo Chou, Dixit Parmar,
Eddie James, Antoni Pokusinski, Nuno Sá,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
Cc: imx
From: Frank Li <Frank.Li@nxp.com>
Add freescale 2.4 GHz IEEE® 802.15.4/ZigBee mc1323 to fix the below
CHECK_DTBS warnings.
arch/arm/boot/dts/nxp/imx/imx53-smd.dtb: /soc/bus@50000000/spba-bus@50000000/spi@50010000/mc1323@0: failed to match any schema with compatible: ['fsl,mc1323']
Since the i.MX53 platform is more than 20 years old, it is difficult to
find detailed information about how the MC1323 was used on the i.MX53 SMD
board, as the functionality depended on firmware.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
chagne in v3
- fix warning message
change in v2
- add descript about reason in commit message
---
Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
index 46a4dca50c485..6ff96e10d0785 100644
--- a/Documentation/devicetree/bindings/trivial-devices.yaml
+++ b/Documentation/devicetree/bindings/trivial-devices.yaml
@@ -127,6 +127,8 @@ properties:
- domintech,dmard09
# DMARD10: 3-axis Accelerometer
- domintech,dmard10
+ # Freescale 2.4 GHz IEEE® 802.15.4/ZigBee
+ - fsl,mc1323
# MMA7660FC: 3-Axis Orientation/Motion Detection Sensor
- fsl,mma7660
# MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer
--
2.43.0
^ permalink raw reply related
* Re: [PATCH v3 04/18] firmware: qcom: scm: Add minidump SRAM support
From: sashiko-bot @ 2026-05-22 20:21 UTC (permalink / raw)
To: Mukesh Ojha; +Cc: conor+dt, devicetree, robh
In-Reply-To: <20260522195009.2961022-5-mukesh.ojha@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
Pre-existing issues:
- [High] Missing smp_load_acquire() when reading the global __scm pointer in set_download_mode() risks a race condition and stale reads.
--
commit de197846d8ecb70e3382c65171f1e37949d3d114
Author: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
firmware: qcom: scm: Add minidump SRAM support
On most Qualcomm SoCs where minidump is supported, a word in always-on
SRAM is shared between the kernel and boot firmware. This commit adds
minidump SRAM support and exposes a minidump_dest module parameter so
the user can select the destination.
> diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c
> --- a/drivers/firmware/qcom/qcom_scm.c
> +++ b/drivers/firmware/qcom/qcom_scm.c
[ ... ]
> @@ -568,6 +583,14 @@ static void qcom_scm_set_download_mode(u32 dload_mode)
>
> if (ret)
> dev_err(__scm->dev, "failed to set download mode: %d\n", ret);
> +
> + /*
> + * Write the destination into the always-on SRAM so boot firmware
> + * can read it before DDR is initialised on the next warm reset.
> + * Only written when minidump is active;
> + */
> + if (__scm->minidump_sram && (dload_mode & QCOM_DLOAD_MINIDUMP))
> + writel_relaxed(minidump_dest, __scm->minidump_sram);
> }
[Severity: High]
This is a pre-existing issue, but is it safe to read the global __scm
pointer here without using smp_load_acquire()?
The driver publishes the global __scm pointer at the end of qcom_scm_probe()
using smp_store_release(&__scm, scm). Module parameters are exposed via
sysfs before probe completes, allowing userspace to concurrently trigger the
set_download_mode() callback.
This callback reads __scm using a plain, lockless memory access. Without a
matching smp_load_acquire(), the CPU can observe a non-NULL __scm pointer
while still seeing stale or uninitialized values for its members, including
the newly added __scm->minidump_sram.
Could this lead to an unaligned access or page fault if writel_relaxed()
is passed an uninitialized pointer?
Note that the newly added set_minidump_dest() correctly uses
smp_load_acquire() to prevent this exact issue, but
qcom_scm_set_download_mode() remains unprotected.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com?part=4
^ permalink raw reply
* Re: [PATCH v4 07/12] rvtrace: Add trace ramsink driver
From: Sergey Matyukevich @ 2026-05-22 20:04 UTC (permalink / raw)
To: Anup Patel
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Palmer Dabbelt,
Paul Walmsley, Greg KH, Alexander Shishkin, Ian Rogers,
Alexandre Ghiti, Peter Zijlstra, Ingo Molnar, Namhyung Kim,
Mark Rutland, Jiri Olsa, Adrian Hunter, Mayuresh Chitale,
Anup Patel, Atish Patra, Andrew Jones, Sunil V L, linux-riscv,
devicetree, linux-kernel, Mayuresh Chitale
In-Reply-To: <20260429125135.1983498-8-anup.patel@oss.qualcomm.com>
On Wed, Apr 29, 2026 at 06:21:30PM +0530, Anup Patel wrote:
> From: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>
>
> Add initial implementation of RISC-V trace ramsink driver. The ramsink
> is defined in the RISC-V Trace Control Interface specification.
>
> Co-developed-by: Anup Patel <anup.patel@oss.qualcomm.com>
> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>
> ---
> drivers/hwtracing/rvtrace/Kconfig | 9 +
> drivers/hwtracing/rvtrace/Makefile | 1 +
> drivers/hwtracing/rvtrace/rvtrace-ramsink.c | 338 ++++++++++++++++++++
> 3 files changed, 348 insertions(+)
> create mode 100644 drivers/hwtracing/rvtrace/rvtrace-ramsink.c
...
> +static int rvtrace_ramsink_probe(struct rvtrace_component *comp)
> +{
> + int ret;
> +
> + ret = rvtrace_ramsink_setup(comp);
> + if (ret)
> + return dev_err_probe(&comp->dev, ret, "failed to setup ramsink.\n");
> +
> + ret = rvtrace_enable_component(comp->pdata);
Does it make sense to enable such components (ramsink and encoder) on probe ?
IIUC they will be enabled/disabled later in start/stop operations when
rvtrace graph is activated e.g. during perf tool work. It looks like
reset (primary activation) should be sufficient, and it is already done
by the core framework on probing.
> + if (ret)
> + return dev_err_probe(&comp->dev, ret, "failed to enable ramsink.\n");
> +
> + return ret;
> +}
Regards,
Sergey
^ permalink raw reply
* [PATCH v2 2/2] arm64: dts: glymur-crd: Add reset GPIO to touchscreen node
From: Pradyot Kumar Nayak @ 2026-05-22 19:55 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Abel Vesa, Dmitry Baryshkov, Benjamin Tissoires,
Jiri Kosina
Cc: linux-arm-msm, linux-input, Konrad Dybcio, devicetree,
linux-kernel,
20260519-glymur-mahua-common-nodes-v2-1-9f1b89a3f398,
Pradyot Kumar Nayak
In-Reply-To: <20260523-arm64-dts-glymur-crd-add-reset-gpio-to-touchscreen-v2-0-5c333051e5bb@oss.qualcomm.com>
The touchscreen module on Glymur/Mahua CRDs is different from the one
used on Hamoa CRDs and requires the reset-gpios to be wired to the device.
Without this in place the reset line will remain permanently asserted
during resume leaving the device offline and causing all I2C transactions
to fail with -ENXIO.
Error Logs:
i2c_hid_of 3-0038: failed to change power setting.
i2c_hid_of 3-0038: PM: dpm_run_callback(): i2c_hid_core_pm_resume [i2c_hid] returns -6
i2c_hid_of 3-0038: PM: failed to resume async: error -6
Add the reset GPIO so the driver can deassert the line on resume,
restoring I2C communication with the device.
Fixes: e6bf559f7eb9 ("arm64: dts: qcom: glymur-crd: Enable keyboard, trackpad and touchscreen")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Pradyot Kumar Nayak <pradyot.nayak@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/glymur-crd.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
index 1de3a49f49e4..2259577b9ae1 100644
--- a/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur-crd.dtsi
@@ -623,6 +623,8 @@ touchscreen@38 {
vdd-supply = <&vreg_misc_3p3>;
vddl-supply = <&vreg_l15b_e0_1p8>;
+ reset-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
+
pinctrl-0 = <&ts0_default>;
pinctrl-names = "default";
};
--
2.43.0
^ permalink raw reply related
* [PATCH v2 1/2] dt-bindings: input: hid-over-i2c: Add reset-gpios property
From: Pradyot Kumar Nayak @ 2026-05-22 19:55 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Abel Vesa, Dmitry Baryshkov, Benjamin Tissoires,
Jiri Kosina
Cc: linux-arm-msm, linux-input, Konrad Dybcio, devicetree,
linux-kernel,
20260519-glymur-mahua-common-nodes-v2-1-9f1b89a3f398,
Pradyot Kumar Nayak
In-Reply-To: <20260523-arm64-dts-glymur-crd-add-reset-gpio-to-touchscreen-v2-0-5c333051e5bb@oss.qualcomm.com>
Document reset-gpios property for devices that explicitly require
the reset line to be de-asserted during power up.
Signed-off-by: Pradyot Kumar Nayak <pradyot.nayak@oss.qualcomm.com>
---
Documentation/devicetree/bindings/input/hid-over-i2c.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/input/hid-over-i2c.yaml b/Documentation/devicetree/bindings/input/hid-over-i2c.yaml
index 138caad96a29..fe0ec4fce673 100644
--- a/Documentation/devicetree/bindings/input/hid-over-i2c.yaml
+++ b/Documentation/devicetree/bindings/input/hid-over-i2c.yaml
@@ -50,6 +50,10 @@ properties:
description: Time required by the device after enabling its regulators
or powering it on, before it is ready for communication.
+ reset-gpios:
+ maxItems: 1
+ description: GPIO line used to reset the device.
+
touchscreen-inverted-x: true
touchscreen-inverted-y: true
--
2.43.0
^ permalink raw reply related
* [PATCH v2 0/2] arm64: dts: glymur-crd: Add reset GPIO to touchscreen
From: Pradyot Kumar Nayak @ 2026-05-22 19:55 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Abel Vesa, Dmitry Baryshkov, Benjamin Tissoires,
Jiri Kosina
Cc: linux-arm-msm, linux-input, Konrad Dybcio, devicetree,
linux-kernel,
20260519-glymur-mahua-common-nodes-v2-1-9f1b89a3f398,
Pradyot Kumar Nayak
The touchscreen on Glymur/Mahua CRDs has a dedicated GPIO reset line that must
be explicitly modeled in DT so the i2c-hid driver can deassert it on resume.
Without this, the device stays offline after suspend/resume and all I2C
transactions fail with -ENXIO.
Patch 1 adds reset-gpios to the hid-over-i2c binding.
Patch 2 wires the GPIO in the Glymur CRD DTSI.
prerequisite-message-id: 20260519-glymur-mahua-common-nodes-v2-1-9f1b89a3f398@oss.qualcomm.com
Signed-off-by: Pradyot Kumar Nayak <pradyot.nayak@oss.qualcomm.com>
---
Changes in v2:
- Add dt-bindings patch to document reset-gpios in hid-over-i2c schema
(flagged by dtbs_check on v1)
- No change to the DTS patch itself
- Link to v1: https://lore.kernel.org/r/20260522-arm64-dts-glymur-crd-add-reset-gpio-to-touchscreen-v1-1-c7653924acdc@oss.qualcomm.com
---
Pradyot Kumar Nayak (2):
dt-bindings: input: hid-over-i2c: Add reset-gpios property
arm64: dts: glymur-crd: Add reset GPIO to touchscreen node
Documentation/devicetree/bindings/input/hid-over-i2c.yaml | 4 ++++
arch/arm64/boot/dts/qcom/glymur-crd.dtsi | 2 ++
2 files changed, 6 insertions(+)
---
base-commit: 1d376e58cb4a94f89de0fa9195d583ad6b86eb89
change-id: 20260522-arm64-dts-glymur-crd-add-reset-gpio-to-touchscreen-5892beded29b
Best regards,
--
Pradyot Kumar Nayak <pradyot.nayak@oss.qualcomm.com>
^ permalink raw reply
* Re: [PATCH v4 03/12] rvtrace: Add functions to create/destroy a trace component path
From: Sergey Matyukevich @ 2026-05-22 19:55 UTC (permalink / raw)
To: Anup Patel
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Palmer Dabbelt,
Paul Walmsley, Greg KH, Alexander Shishkin, Ian Rogers,
Alexandre Ghiti, Peter Zijlstra, Ingo Molnar, Namhyung Kim,
Mark Rutland, Jiri Olsa, Adrian Hunter, Mayuresh Chitale,
Anup Patel, Atish Patra, Andrew Jones, Sunil V L, linux-riscv,
devicetree, linux-kernel, Mayuresh Chitale
In-Reply-To: <20260429125135.1983498-4-anup.patel@oss.qualcomm.com>
> Trace needs to be configured on a chain of trace components which are
> connected to each other. These chain of components is also referred
> to as trace component path. Add functions to create/destroy a trace
> component path which will be later used by RISC-V trace perf support.
>
> Co-developed-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>
> Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>
> Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
> ---
> drivers/hwtracing/rvtrace/rvtrace-core.c | 223 +++++++++++++++++++++++
> include/linux/rvtrace.h | 43 ++++-
> 2 files changed, 264 insertions(+), 2 deletions(-)
...
I have been playing with a bit more complicated rvtrace graph with one
source (encoder) and two sinks (ramsink and simple test atb bridge sink)
with the following encoder output ports:
: trace@c000000 {
: compatible = "qemu,trace-component", "riscv,trace-component";
: reg = <0xc000000 0x1000>;
: cpus = <&CPU0>;
:
: out-ports {
: port@0 {
: reg = <0>;
: CPU0_ENCODER_RAMSINK_OUTPUT: endpoint {
: remote-endpoint = <&CPU0_RAMSINK_INPUT>;
: };
: };
: port@1 {
: reg = <1>;
: CPU0_ENCODER_TEST_OUTPUT: endpoint {
: remote-endpoint = <&CPU0_TEST_INPUT>;
: };
: };
: };
: };
In this case the first output port is enabled, but the second one is
not.
> +static int build_path_walk_fn(struct rvtrace_component *comp, bool *stop,
> + struct rvtrace_connection *stop_conn,
> + void *priv)
> +{
> + struct build_path_walk_priv *ppriv = priv;
> + struct rvtrace_path *path = ppriv->path;
> + struct rvtrace_path_node *node;
> +
> + if ((!ppriv->sink && rvtrace_is_sink(comp->pdata)) ||
> + (ppriv->sink && ppriv->sink == comp))
> + *stop = true;
> +
IIUC the root cause is that rvtrace_create_path from rvtrace-perf.c,
where the second argument is NULL, selects the first reachable sink.
The function __rvtrace_walk_output_components() walks pdata->outconns[]
in order and stops at the first component where rvtrace_is_sink() is true.
In the example with two sinks we stop at ramsink. As a result, the second
sink is not added to the list and never enabled later on.
> + if (*stop) {
> + node = kzalloc_obj(*node);
> + if (!path)
> + return -ENOMEM;
> + INIT_LIST_HEAD(&node->head);
> + rvtrace_get_component(comp);
> + node->comp = comp;
> + node->conn = stop_conn;
> + list_add(&node->head, &path->comp_list);
> + }
> +
> + return 0;
> +}
Regards,
Sergey
^ permalink raw reply
* [PATCH v3 18/18] arm64: dts: qcom: sdm845: Add minidump SRAM config to SCM node
From: Mukesh Ojha @ 2026-05-22 19:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Marko, Guru Das Srinagesh
Cc: cros-qcom-dts-watchers, linux-arm-msm, devicetree, linux-kernel,
Mukesh Ojha
In-Reply-To: <20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com>
Point the SCM node at the minidump config slot in the always-on SRAM.
Boot firmware reads this word before DDR is initialised on a warm reset
to decide where to deliver the minidump.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 4ae8627d6dbc..2179988dbaaf 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -363,6 +363,7 @@ cluster_sleep_0: cluster-sleep-0 {
firmware {
scm {
compatible = "qcom,scm-sdm845", "qcom,scm";
+ sram = <&minidump_config>;
};
};
@@ -5192,6 +5193,10 @@ sram@14680000 {
ranges = <0 0 0x14680000 0x40000>;
+ minidump_config: minidump-sram@1c {
+ reg = <0x1c 0x4>;
+ };
+
ipa_modem_tables: modem-tables@3d000 {
reg = <0x3d000 0x2000>;
};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 17/18] arm64: dts: qcom: qcs615: Add minidump SRAM config to SCM node
From: Mukesh Ojha @ 2026-05-22 19:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Marko, Guru Das Srinagesh
Cc: cros-qcom-dts-watchers, linux-arm-msm, devicetree, linux-kernel,
Mukesh Ojha
In-Reply-To: <20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com>
Point the SCM node at the minidump config slot in the always-on SRAM.
Boot firmware reads this word before DDR is initialised on a warm reset
to decide where to deliver the minidump.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/talos.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index fb1bbc51bb8a..a358d5441fa9 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -473,6 +473,7 @@ firmware {
scm {
compatible = "qcom,scm-qcs615", "qcom,scm";
qcom,dload-mode = <&tcsr 0x13000>;
+ sram = <&minidump_config>;
};
};
@@ -4654,6 +4655,10 @@ sram@14680000 {
#address-cells = <1>;
#size-cells = <1>;
+ minidump_config: minidump-sram@1c {
+ reg = <0x1c 0x4>;
+ };
+
pil-reloc@2a94c {
compatible = "qcom,pil-reloc-info";
reg = <0x2a94c 0xc8>;
--
2.53.0
^ permalink raw reply related
* [PATCH v3 16/18] arm64: dts: qcom: sm6375: Add minidump SRAM config to SCM node
From: Mukesh Ojha @ 2026-05-22 19:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Marko, Guru Das Srinagesh
Cc: cros-qcom-dts-watchers, linux-arm-msm, devicetree, linux-kernel,
Mukesh Ojha
In-Reply-To: <20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com>
Point the SCM node at the minidump config slot in the always-on SRAM.
Boot firmware reads this word before DDR is initialised on a warm reset
to decide where to deliver the minidump.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm6375.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi
index ccf572bb1549..71a228597093 100644
--- a/arch/arm64/boot/dts/qcom/sm6375.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi
@@ -307,6 +307,7 @@ scm {
compatible = "qcom,scm-sm6375", "qcom,scm";
clocks = <&rpmcc RPM_SMD_CE1_CLK>;
clock-names = "core";
+ sram = <&minidump_config>;
#reset-cells = <1>;
};
};
@@ -1645,6 +1646,10 @@ sram@c125000 {
#address-cells = <1>;
#size-cells = <1>;
+ minidump_config: minidump-sram@1c {
+ reg = <0x1c 0x4>;
+ };
+
pil-reloc@94c {
compatible = "qcom,pil-reloc-info";
reg = <0x94c 0xc8>;
--
2.53.0
^ permalink raw reply related
* [PATCH v3 15/18] arm64: dts: qcom: sm6350: Add minidump SRAM config to SCM node
From: Mukesh Ojha @ 2026-05-22 19:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Marko, Guru Das Srinagesh
Cc: cros-qcom-dts-watchers, linux-arm-msm, devicetree, linux-kernel,
Mukesh Ojha
In-Reply-To: <20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com>
Point the SCM node at the minidump config slot in the always-on SRAM.
Boot firmware reads this word before DDR is initialised on a warm reset
to decide where to deliver the minidump.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index d6adf68563cb..06892ba22875 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -363,6 +363,7 @@ big_cpu_sleep_1: cpu-sleep-1-1 {
firmware {
scm: scm {
compatible = "qcom,scm-sm6350", "qcom,scm";
+ sram = <&minidump_config>;
#reset-cells = <1>;
};
};
@@ -2808,6 +2809,10 @@ sram@14680000 {
ranges = <0 0 0x14680000 0x2e000>;
+ minidump_config: minidump-sram@1c {
+ reg = <0x1c 0x4>;
+ };
+
ipa_modem_tables: modem-tables@28000 {
reg = <0x28000 0x2000>;
};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 14/18] arm64: dts: qcom: sc7180: Add minidump SRAM config to SCM node
From: Mukesh Ojha @ 2026-05-22 19:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Marko, Guru Das Srinagesh
Cc: cros-qcom-dts-watchers, linux-arm-msm, devicetree, linux-kernel,
Mukesh Ojha
In-Reply-To: <20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com>
Point the SCM node at the minidump config slot in the always-on SRAM.
Boot firmware reads this word before DDR is initialised on a warm reset
to decide where to deliver the minidump.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 8341a7c4a4c6..308a14339b3d 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -385,6 +385,7 @@ cluster_aoss_sleep: cluster-sleep-2 {
firmware {
scm: scm {
compatible = "qcom,scm-sc7180", "qcom,scm";
+ sram = <&minidump_config>;
};
};
@@ -3592,6 +3593,10 @@ sram@14680000 {
ranges = <0 0 0x14680000 0x2e000>;
+ minidump_config: minidump-sram@1c {
+ reg = <0x1c 0x4>;
+ };
+
ipa_modem_tables: modem-tables@28000 {
reg = <0x28000 0x2000>;
};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 13/18] arm64: dts: qcom: sm8350: Add minidump SRAM config to SCM node
From: Mukesh Ojha @ 2026-05-22 19:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Marko, Guru Das Srinagesh
Cc: cros-qcom-dts-watchers, linux-arm-msm, devicetree, linux-kernel,
Mukesh Ojha
In-Reply-To: <20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com>
Point the SCM node at the minidump config slot in the always-on SRAM.
Boot firmware reads this word before DDR is initialised on a warm reset
to decide where to deliver the minidump.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index c830953156ec..dea97330da49 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -293,6 +293,7 @@ firmware {
scm: scm {
compatible = "qcom,scm-sm8350", "qcom,scm";
qcom,dload-mode = <&tcsr 0x13000>;
+ sram = <&minidump_config>;
#reset-cells = <1>;
};
};
@@ -3451,6 +3452,10 @@ sram@14680000 {
ranges = <0 0 0x14680000 0x40000>;
+ minidump_config: minidump-sram@1c {
+ reg = <0x1c 0x4>;
+ };
+
ipa_modem_tables: modem-tables@3d000 {
reg = <0x3d000 0x2000>;
};
--
2.53.0
^ permalink raw reply related
* [PATCH v3 12/18] arm64: dts: qcom: sc7280: Add minidump SRAM config to SCM node
From: Mukesh Ojha @ 2026-05-22 19:50 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Robert Marko, Guru Das Srinagesh
Cc: cros-qcom-dts-watchers, linux-arm-msm, devicetree, linux-kernel,
Mukesh Ojha
In-Reply-To: <20260522195009.2961022-1-mukesh.ojha@oss.qualcomm.com>
Point the SCM node at the minidump config slot in the always-on SRAM.
Boot firmware reads this word before DDR is initialised on a warm reset
to decide where to deliver the minidump.
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/kodiak.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi
index c51beada8c7d..6a6560a3758a 100644
--- a/arch/arm64/boot/dts/qcom/kodiak.dtsi
+++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi
@@ -720,6 +720,7 @@ firmware {
scm: scm {
compatible = "qcom,scm-sc7280", "qcom,scm";
qcom,dload-mode = <&tcsr_2 0x13000>;
+ sram = <&minidump_config>;
};
};
@@ -6694,6 +6695,10 @@ sram@146a5000 {
ranges = <0 0 0x146a5000 0x6000>;
+ minidump_config: minidump-sram@1c {
+ reg = <0x1c 0x4>;
+ };
+
ipa_modem_tables: modem-tables@3000 {
reg = <0x3000 0x2000>;
};
--
2.53.0
^ permalink raw reply related
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