* [PATCH 1/4] dt-bindings: phy: qcom,qusb2: Straighten out SM6125 and MSM8996
From: Konrad Dybcio @ 2026-06-10 12:04 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Iskren Chernev, Greg Kroah-Hartman,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-8996_61x5_qusb2phy-v1-0-d7135980e78f@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
SM6125 DT currently uses just the MSM8996 compatible (without a primary
SM6125-specific one). This is not only wrong for the reasons of
violating guidelines, but also happens to not be valid.
The MSM8996 PHY is quite similar, although it requies a different init
sequence (for arch reasons). MSM8996 also needs different power
plumbing, as the VDD supply is fed through VDD_MX (which we define as
a power domain rather than a regulator), unlike on SM6125.
The init sequence seems to have been "good enough", but now that the
bindings clearly diverge, add a new compatible for SM6125 with a SM6115
fallback (as they seem to be an exact match from the SW interface POV).
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
.../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 31 ++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
index 39851ba9de43..807d64aee547 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
@@ -30,6 +30,9 @@ properties:
- qcom,sdm660-qusb2-phy
- qcom,sm4250-qusb2-phy
- qcom,sm6115-qusb2-phy
+ - items:
+ - const: qcom,sm6125-qusb2-phy
+ - const: qcom,sm6115-qusb2-phy
- items:
- enum:
- qcom,sc7180-qusb2-phy
@@ -57,6 +60,12 @@ properties:
- const: ref
- const: iface
+ power-domains:
+ maxItems: 1
+
+ required-opps:
+ maxItems: 1
+
vdd-supply:
description:
Phandle to 0.9V regulator supply to PHY digital circuit.
@@ -160,7 +169,6 @@ required:
- "#phy-cells"
- clocks
- clock-names
- - vdd-supply
- vdda-pll-supply
- vdda-phy-dpdm-supply
- resets
@@ -182,6 +190,22 @@ allOf:
qcom,preemphasis-width: false
qcom,hsdisc-trim-value: false
+ # On MSM8996, VDD is supplied via the MX power domain
+ - if:
+ properties:
+ compatible:
+ const: qcom,msm8996-qusb2-phy
+ then:
+ required:
+ - power-domains
+ - required-opps
+ else:
+ properties:
+ power-domains: false
+ required-opps: false
+ required:
+ - vdd-supply
+
additionalProperties: false
examples:
@@ -196,10 +220,13 @@ examples:
<&gcc GCC_RX1_USB2_CLKREF_CLK>;
clock-names = "cfg_ahb", "ref";
- vdd-supply = <&pm8994_l28>;
vdda-pll-supply = <&pm8994_l12>;
vdda-phy-dpdm-supply = <&pm8994_l24>;
resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+
+ power-domains = <&rpmpd_mx>;
+ required-opps = <&rpmpd_opp4>;
+
nvmem-cells = <&qusb2p_hstx_trim>;
};
--
2.54.0
^ permalink raw reply related
* [PATCH 0/4] Fix up QUSB2 PHY description for MSM8996/SM61[12]5
From: Konrad Dybcio @ 2026-06-10 12:04 UTC (permalink / raw)
To: Vinod Koul, Neil Armstrong, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Wesley Cheng, Iskren Chernev, Greg Kroah-Hartman,
Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, linux-phy, devicetree, linux-kernel, Konrad Dybcio
The MSM8996 QUSB2PHY was not being guaranteed a power source.
The SM6125's QUSB2PHY was believed to be idential as the 96 one. It
wasn't. This series tackles that, freeing us of some dt checker
errors about vdd-supply not found on MSM8996 boards.
Compile-tested only, but docs confirm my findings..
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
Konrad Dybcio (4):
dt-bindings: phy: qcom,qusb2: Straighten out SM6125 and MSM8996
phy: qcom-qusb2: Fix SM6115 init sequence
arm64: dts: qcom: msm8996: Add VDD_MX to QUSB2 PHYs
arm64: dts: qcom: sm6125: Fix QUSB2 compatible
.../devicetree/bindings/phy/qcom,qusb2-phy.yaml | 31 ++++++++++++++++++++--
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +++++++
arch/arm64/boot/dts/qcom/sm6125.dtsi | 3 ++-
drivers/phy/qualcomm/phy-qcom-qusb2.c | 4 +--
4 files changed, 43 insertions(+), 5 deletions(-)
---
base-commit: 49e02880ec0a8c378e811bc9d85da188d7c6204c
change-id: 20260610-topic-8996_61x5_qusb2phy-ad052b99e9de
Best regards,
--
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
^ permalink raw reply
* Re: [PATCH 4/5] arm64: dts: qcom: qcs8300-ride: Fix BT RFA supply name
From: Krzysztof Kozlowski @ 2026-06-10 12:03 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-4-2e0c953a6c08@oss.qualcomm.com>
On 10/06/2026 13:43, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> Fix up the supply name to align with bindings.
... with qcom,wcn6855-bt bindings, because vddrfa1p8-supply is only in
ATH11K part.
or something similar, because your change is non-obvious and requires a
bit of grepping.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v3 1/8] dt-bindings: remoteproc: qcom,pas: add thermal mitigation properties
From: Gaurav Kohli @ 2026-06-10 12:02 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Bjorn Andersson, Mathieu Poirier, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Daniel Lezcano, Amit Kucheria,
Manivannan Sadhasivam, Konrad Dybcio, Kees Cook,
Gustavo A. R. Silva, cros-qcom-dts-watchers, linux-arm-msm,
linux-remoteproc, devicetree, linux-kernel, linux-pm,
linux-hardening, Manaf Meethalavalappu Pallikunhi
In-Reply-To: <ujf53zya6hes3hkddhsmgu4wyabodnyg3zdwarxmcsoy6p5h3c@ild34ppiyvre>
On 6/9/2026 4:17 PM, Dmitry Baryshkov wrote:
> On Tue, Jun 09, 2026 at 03:52:56PM +0530, Gaurav Kohli wrote:
>> Document Qualcomm PAS remoteproc thermal mitigation properties used for
>> QMI-based throttling.
>>
>> Add:
>> - #cooling-cells (2 or 3)
>> - tmd-names (thermal mitigation device names)
>
> Describe _why_ you are performing these changes. For example. why do we
> need to handle two different cases for the #cooling-cells?
>
Thanks Dmitry for review, Ack.
>>
>> Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
>> ---
>> .../devicetree/bindings/remoteproc/qcom,pas-common.yaml | 14 ++++++++++++++
>> 1 file changed, 14 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
>> index 4607b459131b..0d07a0750762 100644
>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml
>> @@ -79,6 +79,20 @@ properties:
>> channels and devices related to the ADSP.
>> unevaluatedProperties: false
>>
>> + '#cooling-cells':
>> + description:
>> + Number of cooling cells; 2 for min/max cooling state and 3 when
>> + selecting a thermal mitigation device index.
>> + enum: [2, 3]
>> +
>> + tmd-names:
>> + $ref: /schemas/types.yaml#/definitions/string-array
>> + description:
>> + Names of the thermal mitigation devices available in remote processor
>> + subsystem.
>> + minItems: 1
>> + maxItems: 5
>
> Missing example with these properties.
>
Thanks, will add example.
>> +
>> glink-edge:
>> $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
>> description:
>>
>> --
>> 2.34.1
>>
>
^ permalink raw reply
* Re: [PATCH 2/5] arm64: dts: qcom: msm8976-longcheer-l9360: Fix accidental node override
From: Krzysztof Kozlowski @ 2026-06-10 12:01 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-2-2e0c953a6c08@oss.qualcomm.com>
On 10/06/2026 13:43, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> The active and sleep pinctrl states for the touchscreen interrupt pin
> shared the same node name, creating a single node, accidentally
> overridden immediately after the definition. Alter the names to make
> them distinct and to silence DT checker warnings.
>
> Fixes: 79b896e7da7e ("arm64: dts: qcom: msm8976-longcheer-l9360: Add initial device tree")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 1/5] arm64: dts: qcom: msm8998-sony-yoshino: Drop extra bias-disable
From: Krzysztof Kozlowski @ 2026-06-10 12:00 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-1-2e0c953a6c08@oss.qualcomm.com>
On 10/06/2026 13:43, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> The msm8998-common i2c5 pin sleep state is defined with a pull-up. The
> Sony Yoshino DTSI attempts to override that to bias-disable without
> removing the existing bias-pull-up. Remove the override and use the
> common definition to resolve a dt checker warning.
Maybe the bias-pull-up should be simply removed? At least you should
document here why you chosen that way to fix the warning.
>
> The change itself shouldn't have any functional effect, maybe except
> a miniscule increase in power usage. The defaults may need revisiting
> at a later date either way.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi | 4 ----
> 1 file changed, 4 deletions(-)
>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 3/5] arm64: dts: qcom: sdm632-motorola-ocean: Fix LED default trigger property
From: Krzysztof Kozlowski @ 2026-06-10 11:58 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-3-2e0c953a6c08@oss.qualcomm.com>
On 10/06/2026 13:43, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> The correct property name is "linux,default-trigger", not
> "default-trigger". Fix it to avoid DT checker warnings and let the OSes
> consume the intended information.
>
> Fixes: 3176c4d6b9be ("arm64: dts: qcom: sdm632: Add device tree for Motorola G7 Power")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v4 2/3] arm: dts: nuvoton: npcm7xx: Drop redundant FIU clock-names
From: Andrew Jeffery @ 2026-06-10 11:58 UTC (permalink / raw)
To: Tomer Maimon
Cc: broonie, robh, krzk+dt, conor+dt, openbmc, linux-spi, devicetree,
linux-kernel, avifishman70, tali.perry1, venture, yuenn,
benjaminfair
In-Reply-To: <CAP6Zq1gBcSEQznnQ+awrqacBXjTOWELQsMLDXL1yw8_daCzMOQ@mail.gmail.com>
On Wed, 2026-06-10 at 14:56 +0300, Tomer Maimon wrote:
> On Wed, 10 Jun 2026 at 13:49, Andrew Jeffery
> <andrew@codeconstruct.com.au> wrote:
> >
> > On Tue, 2026-06-09 at 19:39 +0300, Tomer Maimon wrote:
> > > The NPCM7xx FIU controller driver gets its single clock with
> > > devm_clk_get_enabled(dev, NULL) and does not perform a named
> > > clock lookup. Drop the redundant clock-names properties from the
> > > FIU controller nodes so the DTS describes only the resources the
> > > driver actually uses.
> >
> > The devicetree is a description of the hardware in the form documented
> > by the bindings. Generally it's not right to discuss Linux drivers
> > here: they're only relevant in the context of Linux, but the devicetree
> > binding governs devicetrees over multiple projects.
> >
> > From a quick look it seems that these names are not described in the
> > corresponding binding, therefore no drivers should be using them and as
> > such they can (and should) be dropped. A driver would only be worth
> > mentioning if it did use the undocumented names (as that would be a
> > complication).
> >
> > Can you please rework the description?
> do you mean change the description as follows
> "
> The NPCM7xx FIU controller nodes reference a single clock,
> but the FIU binding does not describe their clock-names properties.
> Drop the undocumented names so the DTS matches the binding.
> "
That sounds reasonable to me.
Thanks,
Andrew
^ permalink raw reply
* Re: [PATCH v4 2/3] arm: dts: nuvoton: npcm7xx: Drop redundant FIU clock-names
From: Tomer Maimon @ 2026-06-10 11:56 UTC (permalink / raw)
To: Andrew Jeffery
Cc: broonie, robh, krzk+dt, conor+dt, openbmc, linux-spi, devicetree,
linux-kernel, avifishman70, tali.perry1, venture, yuenn,
benjaminfair
In-Reply-To: <ff53862950a6075c43bb8f1e47c14389d6fc7575.camel@codeconstruct.com.au>
On Wed, 10 Jun 2026 at 13:49, Andrew Jeffery
<andrew@codeconstruct.com.au> wrote:
>
> On Tue, 2026-06-09 at 19:39 +0300, Tomer Maimon wrote:
> > The NPCM7xx FIU controller driver gets its single clock with
> > devm_clk_get_enabled(dev, NULL) and does not perform a named
> > clock lookup. Drop the redundant clock-names properties from the
> > FIU controller nodes so the DTS describes only the resources the
> > driver actually uses.
>
> The devicetree is a description of the hardware in the form documented
> by the bindings. Generally it's not right to discuss Linux drivers
> here: they're only relevant in the context of Linux, but the devicetree
> binding governs devicetrees over multiple projects.
>
> From a quick look it seems that these names are not described in the
> corresponding binding, therefore no drivers should be using them and as
> such they can (and should) be dropped. A driver would only be worth
> mentioning if it did use the undocumented names (as that would be a
> complication).
>
> Can you please rework the description?
do you mean change the description as follows
"
The NPCM7xx FIU controller nodes reference a single clock,
but the FIU binding does not describe their clock-names properties.
Drop the undocumented names so the DTS matches the binding.
"
>
> Andrew
>
> >
> > Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> > ---
> > arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi | 3 ---
> > 1 file changed, 3 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
> > index a16450abea0e..83cd10b47273 100644
> > --- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
> > +++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
> > @@ -193,7 +193,6 @@ fiu0: spi@fb000000 {
> > reg = <0xfb000000 0x1000>;
> > reg-names = "control";
> > clocks = <&clk NPCM7XX_CLK_SPI0>;
> > - clock-names = "clk_spi0";
> > status = "disabled";
> > };
> >
> > @@ -204,7 +203,6 @@ fiu3: spi@c0000000 {
> > reg = <0xc0000000 0x1000>;
> > reg-names = "control";
> > clocks = <&clk NPCM7XX_CLK_SPI3>;
> > - clock-names = "clk_spi3";
> > pinctrl-names = "default";
> > pinctrl-0 = <&spi3_pins>;
> > status = "disabled";
> > @@ -217,7 +215,6 @@ fiux: spi@fb001000 {
> > reg = <0xfb001000 0x1000>;
> > reg-names = "control";
> > clocks = <&clk NPCM7XX_CLK_SPIX>;
> > - clock-names = "clk_spix";
> > status = "disabled";
> > };
> >
Thanks,
Tomer
^ permalink raw reply
* Re: [PATCH v5 3/5] iio: adc: versal-sysmon: add I2C driver
From: Erim, Salih @ 2026-06-10 11:56 UTC (permalink / raw)
To: Andy Shevchenko
Cc: jic23, andy, dlechner, nuno.sa, robh, krzk+dt, conor+dt,
conall.ogriofa, michal.simek, linux, erimsalih, linux-iio,
devicetree, linux-kernel
In-Reply-To: <aihPvR0u5Lo3xELX@ashevche-desk.local>
Hi Andy,
On 09/06/2026 18:39, Andy Shevchenko wrote:
> On Mon, Jun 08, 2026 at 07:37:59PM +0100, Salih Erim wrote:
>> Add an I2C transport driver for the Versal SysMon block. The SysMon
>> provides an I2C slave interface that allows an external master to
>> read voltage and temperature measurements through the same register
>> map used by the MMIO path.
>>
>> The I2C command frame is an 8-byte structure containing a 4-byte data
>> payload, a 2-byte register offset, and a 1-byte instruction field.
>> Read operations send the frame with a read instruction, then receive
>> a 4-byte response containing the register value.
>>
>> Events are not supported on the I2C path because there is no
>> interrupt line and the I2C regmap backend cannot be called from
>> atomic context.
>
> ...
>
>> +#include <linux/bits.h>
>> +#include <linux/err.h>
>> +#include <linux/i2c.h>
>> +#include <linux/mod_devicetable.h>
>> +#include <linux/module.h>
>> +#include <linux/regmap.h>
>
> + types.h // uXX
Accepted. Needed for u8/u16/u32.
>
>> +#include <linux/unaligned.h>
>> +
>> +#include "versal-sysmon.h"
>
> ...
>
>> +static int sysmon_i2c_probe(struct i2c_client *client)
>> +{
>
> struct device *dev = &client->dev;
>
>> + struct regmap *regmap;
>> +
>> + regmap = devm_regmap_init(&client->dev, NULL, client,
>> + &sysmon_i2c_regmap_config);
>
> regmap = devm_regmap_init(dev, NULL, client, &sysmon_i2c_regmap_config);
>
> (exactly 80 characters, so inside the limit).
Accepted.
Thanks,
Salih
>
>> + if (IS_ERR(regmap))
>> + return PTR_ERR(regmap);
>> +
>> + /* I2C has no IRQ connection; events are not supported */
>> + return sysmon_core_probe(&client->dev, regmap);
>> +}
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
^ permalink raw reply
* Re: [PATCH v2 0/7] arm64: dts: qcom: enable WiFi/BT on SM8350 HDK
From: Konrad Dybcio @ 2026-06-10 11:56 UTC (permalink / raw)
To: Rob Herring, Dmitry Baryshkov
Cc: Manivannan Sadhasivam, Lorenzo Pieralisi,
Krzysztof Wilczyński, Bjorn Helgaas, Qiang Yu, Jeff Johnson,
Liam Girdwood, Mark Brown, Krzysztof Kozlowski, Conor Dooley,
Bartosz Golaszewski, Marcel Holtmann, Luiz Augusto von Dentz,
Balakrishna Godavarthi, Rocky Liao, Bjorn Andersson,
Konrad Dybcio, linux-arm-msm, linux-pci, linux-kernel,
linux-wireless, ath11k, devicetree, Bartosz Golaszewski,
linux-bluetooth, Bartosz Golaszewski
In-Reply-To: <20260608151835.GA2707238-robh@kernel.org>
On 6/8/26 5:18 PM, Rob Herring wrote:
> On Mon, Jun 08, 2026 at 09:59:18AM +0300, Dmitry Baryshkov wrote:
>> The SM8350 HDK has an onboard WCN6851 WiFi/BT chip, which for a long
>> time was not supported. Bring up different pieces required to enable
>> this SoC.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>> ---
>> Changes in v2:
>> - Bumped num_vdevs to 4 to follow other similar devices (Jeff)
>> - Link to v1: https://patch.msgid.link/20260601-sm8350-wifi-v1-0-242917d88031@oss.qualcomm.com
>>
>> ---
>> Dmitry Baryshkov (7):
>> PCI: qcom: fix parsing of PERST# in the legacy case
>> wifi: ath11k: enable support for WCN6851
>> regulator: dt-bindings: qcom,qca6390-pmu: document WCN6851
>> dt-bindings: bluetooth: qcom,wcn6855-bt: document WCN6851
>> arm64: dts: qcom: sm8350: expand UART18 to 4 pins config
>> arm64: dts: qcom: sm8350: modernize PCIe entries
>> arm64: dts: qcom: sm8350-hdk: describe WiFi/BT chip
>
> Before adding new devices, can you (Qcom) fix the all the existing DT
> warnings related to QCom WiFi/BT:
>
> 6 (qcom,wcn6855-bt): 'vddrfa1p7-supply' is a required property
> 6 (qcom,wcn6855-bt): Unevaluated properties are not allowed ('vddrfa1p8-supply' was unexpected)
> 2 (qcom,wcn6855-bt): 'vddwlmx-supply' is a required property
> 2 (qcom,wcn6855-bt): 'vddwlcx-supply' is a required property
> 2 (qcom,wcn6855-bt): 'vddbtcmx-supply' is a required property
> 2 (qcom,wcn6855-bt): 'vddaon-supply' is a required property
> 2 (pci17cb,1103): 'vddwlmx-supply' is a required property
> 2 (pci17cb,1103): 'vddwlcx-supply' is a required property
> 2 (pci17cb,1103): 'vddrfacmn-supply' is a required property
> 2 (pci17cb,1103): 'vddrfa1p8-supply' is a required property
> 2 (pci17cb,1103): 'vddrfa1p2-supply' is a required property
> 2 (pci17cb,1103): 'vddrfa0p8-supply' is a required property
> 2 (pci17cb,1103): 'vddpcie1p8-supply' is a required property
> 2 (pci17cb,1103): 'vddpcie0p9-supply' is a required property
> 2 (pci17cb,1103): 'vddaon-supply' is a required property
Most of them will be gone with
https://lore.kernel.org/linux-arm-msm/20260522-surface-sp9-5g-for-next-v2-8-dd9d477407f5@gmail.com/
a single dt generates 2 DTBs (one overlayed) that throw almost all of
these errors.. we should be able to tackle the rest that remain shortly
Konrad
^ permalink raw reply
* Re: [PATCH v5 2/5] iio: adc: add Versal SysMon driver
From: Erim, Salih @ 2026-06-10 11:53 UTC (permalink / raw)
To: Andy Shevchenko
Cc: jic23, andy, dlechner, nuno.sa, robh, krzk+dt, conor+dt,
conall.ogriofa, michal.simek, linux, erimsalih, linux-iio,
devicetree, linux-kernel
In-Reply-To: <aigsBk5pj0w8rfFZ@ashevche-desk.local>
Hi Andy,
Thanks for all reviews.
On 09/06/2026 16:06, Andy Shevchenko wrote:
> On Mon, Jun 08, 2026 at 07:37:58PM +0100, Salih Erim wrote:
>> Add the core driver and MMIO platform driver for the AMD/Xilinx Versal
>> System Monitor (SysMon) block.
>>
>> The SysMon block resides in the platform management controller (PMC) and
>> provides on-chip voltage and temperature monitoring through a 10-bit,
>> 200 kSPS ADC. It can monitor up to 160 voltage channels and 64
>> temperature satellites distributed across the SoC, with a consistent
>> sample rate of 8 kSPS per channel regardless of how many channels are
>> enabled.
>>
>> The driver is split into three compilation units:
>> - versal-sysmon-core: Channel parsing, IIO registration, read_raw
>> - versal-sysmon: MMIO platform driver with custom regmap accessors
>>
>> Voltage results are stored in a 19-bit modified floating-point format
>> and converted to millivolts. Temperature results are stored in Q8.7
>> signed fixed-point Celsius format and converted to millicelsius.
>>
>> The MMIO regmap backend uses a custom reg_write accessor that
>> automatically unlocks the NPI (NoC programming interface) lock
>> register before each write, as required by the hardware. The regmap
>> is configured with fast_io since the underlying MMIO accessors are
>> safe to call from atomic context.
>
> Almost there.
>
> ...
>
>> +static int sysmon_parse_fw(struct iio_dev *indio_dev, struct device *dev)
>> +{
>> + unsigned int num_supply = 0, num_temp = 0;
>
> Unneeded assignments.
Accepted.
>
>> + unsigned int idx, temp_chan_idx, volt_chan_idx;
>> + struct iio_chan_spec *sysmon_channels;
>> + const char *label;
>> + u32 reg;
>> + int ret;
>> +
>> + struct fwnode_handle *supply_node __free(fwnode_handle) =
>> + device_get_named_child_node(dev, "voltage-channels");
>> + num_supply = fwnode_get_child_node_count(supply_node);
>> +
>> + struct fwnode_handle *temp_node __free(fwnode_handle) =
>> + device_get_named_child_node(dev, "temperature-channels");
>> + num_temp = fwnode_get_child_node_count(temp_node);
>> +
>> + sysmon_channels = devm_kcalloc(dev,
>> + size_add(size_add(ARRAY_SIZE(temp_channels),
>> + num_supply), num_temp),
>> + sizeof(*sysmon_channels), GFP_KERNEL);
>
> Something happened to indentation of the third line (out of four). Taking into
> account nested size_add(), I would rewrite the whole thing as
Accepted. Will use a temporary variable for the channel count.
>
> sysmon_channels = devm_kcalloc(dev,
> size_add(num_temp,
> size_add(ARRAY_SIZE(temp_channels), num_supply)),
> sizeof(*sysmon_channels), GFP_KERNEL);
>
> Or even use temporary variable
>
> unsigned int num_chan;
>
> num_chan = size_add(num_temp, size_add(ARRAY_SIZE(temp_channels), num_supply)),
> sysmon_channels = devm_kcalloc(dev, num_chan, sizeof(*sysmon_channels), GFP_KERNEL);
>
> still over 80, but a bit shorter.
>
>> + if (!sysmon_channels)
>> + return -ENOMEM;
>> +
>> + /* Static temperature channels first (fixed indices) */
>
>> + idx = 0;
>
> Why?
>
>> + memcpy(sysmon_channels, temp_channels, sizeof(temp_channels));
>> + idx += ARRAY_SIZE(temp_channels);
>
> Just
Accepted. Will initialize idx directly.
>
> idx = ARRAY_SIZE(temp_channels);
>
>> + /* Supply channels from DT */
>> + fwnode_for_each_child_node_scoped(supply_node, child) {
>> + ret = fwnode_property_read_u32(child, "reg", ®);
>> + if (ret)
>> + return dev_err_probe(dev, ret,
>> + "missing reg for supply channel\n");
>> +
>> + if (reg > SYSMON_SUPPLY_IDX_MAX)
>> + return dev_err_probe(dev, -EINVAL,
>> + "supply reg %u exceeds max %u\n",
>> + reg, SYSMON_SUPPLY_IDX_MAX);
>> +
>> + ret = fwnode_property_read_string(child, "label", &label);
>> + if (ret)
>> + return dev_err_probe(dev, ret,
>> + "missing label for supply channel\n");
>> +
>> + sysmon_channels[idx++] = (struct iio_chan_spec) {
>> + .type = IIO_VOLTAGE,
>> + .indexed = 1,
>> + .address = reg,
>
>> + .info_mask_separate =
>> + BIT(IIO_CHAN_INFO_PROCESSED),
>
> Perfectly one line. Is it going to be expanded in the next changes?
> If not, join.
Not expanded. Will join on one line.
>
>> + .datasheet_name = label,
>> + };
>> + }
>> +
>> + /* Temperature satellite channels from DT */
>> + fwnode_for_each_child_node_scoped(temp_node, child) {
>> + ret = fwnode_property_read_u32(child, "reg", ®);
>> + if (ret)
>> + return dev_err_probe(dev, ret,
>> + "missing reg for temp channel\n");
>> +
>> + if (reg < 1 || reg > SYSMON_TEMP_SAT_MAX)
>> + return dev_err_probe(dev, -EINVAL,
>> + "temp reg %u out of range [1..%u]\n",
>> + reg, SYSMON_TEMP_SAT_MAX);
>> +
>> + ret = fwnode_property_read_string(child, "label", &label);
>> + if (ret)
>> + return dev_err_probe(dev, ret,
>> + "missing label for temp channel\n");
>> +
>> + sysmon_channels[idx++] = (struct iio_chan_spec) {
>> + .type = IIO_TEMP,
>> + .indexed = 1,
>> + .address = SYSMON_TEMP_SAT_BASE +
>> + (reg - 1) * SYSMON_REG_STRIDE,
>> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
>> + .info_mask_shared_by_type =
>> + BIT(IIO_CHAN_INFO_SCALE),
>
> Ditto.
Not expanded. Will join on one line.
Regards,
Salih
>
>> + .datasheet_name = label,
>> + };
>> + }
>> +
>> + indio_dev->num_channels = idx;
>> + indio_dev->info = &sysmon_iio_info;
>> +
>> + /*
>> + * Assign per-type sequential channel numbers.
>> + * IIO sysfs uses type prefix (in_tempN, in_voltageN)
>> + * so numbers only need to be unique within each type.
>> + */
>> + temp_chan_idx = 0;
>> + volt_chan_idx = 0;
>> + for (unsigned int idx = 0; idx < indio_dev->num_channels; idx++) {
>> + if (sysmon_channels[idx].type == IIO_TEMP)
>> + sysmon_channels[idx].channel = temp_chan_idx++;
>> + else
>> + sysmon_channels[idx].channel = volt_chan_idx++;
>> + }
>> +
>> + indio_dev->channels = sysmon_channels;
>> +
>> + return 0;
>> +}
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
^ permalink raw reply
* Re: [PATCH 0/4] sound: qcom: audioreach: support WSA speakers only on WSA2
From: Neil Armstrong @ 2026-06-10 11:52 UTC (permalink / raw)
To: Mark Brown
Cc: Srinivas Kandagatla, Liam Girdwood, Jaroslav Kysela, Takashi Iwai,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, kancy2333, linux-sound, linux-arm-msm, linux-kernel,
devicetree, Srinivas Kandagatla
In-Reply-To: <aik4dCUlumE1A-_v@sirena.co.uk>
On 6/10/26 12:12, Mark Brown wrote:
> On Wed, Jun 10, 2026 at 09:41:44AM +0200, Neil Armstrong wrote:
>
>> ---
>> base-commit: 1ed783a6906ab62a54d631ff3e8c5cba0f4f4b54
>
> I don't seem to have this, it doesn't seem to be anything from my tree
> or -next.
Sorry I forgot to add the dependency, it's based on v7.1-rc7 and depends on [1] for the sc8280xp card data.
[1] https://lore.kernel.org/all/20260608023011.942228-1-mohammad.rafi.shaik@oss.qualcomm.com/
Neil
^ permalink raw reply
* Re: [PATCH] arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap
From: Arnd Bergmann @ 2026-06-10 11:51 UTC (permalink / raw)
To: Josua Mayer, Frank Li, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel
In-Reply-To: <20260610-lx2160-pcie-fix-ranges-32bit-v1-1-98086fc5fb6b@solid-run.com>
On Wed, Jun 10, 2026, at 13:45, Josua Mayer wrote:
> A 3GB non-prefetchable PCIe bus window can overlap with inbound DMA
> addresses for low system RAM, so DMA transactions may be routed to a BAR
> on the same host bridge instead of memory.
>
> Change the 32-bit non-prefetchable PCIe window back from 3GB to 1GB on all
> controllers, avoiding that overlap while keeping the added 64-bit
> prefetchable region.
>
> This partially reverts commit 9ed301397090 ("arm64: dts: lx2160a-rev2:
> extend 32-bit and add 64-bit pci regions").
>
> Fixes: 9ed301397090 ("arm64: dts: lx2160a-rev2: extend 32-bit and add
> 64-bit pci regions")
> Reported-by: Arnd Bergmann <arnd@arndb.de>
> Closes:
> https://lore.kernel.org/r/9e6326f6-dad1-4169-a63c-e62ee5b341f2@app.fastmail.com
> Signed-off-by: Josua Mayer <josua@solid-run.com>
Looks good to me, thanks for the fix!
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: serial: Add binding for Cortina-Access UART
From: Krzysztof Kozlowski @ 2026-06-10 11:51 UTC (permalink / raw)
To: Jason Li, jason.li, Greg Kroah-Hartman, Jiri Slaby
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Catalin Marinas,
Will Deacon, Arnd Bergmann, linux-serial, linux-arm-kernel,
devicetree, linux-kernel
In-Reply-To: <20260610112821.3030099-3-jason.li@cortina-access.com>
On 10/06/2026 13:28, Jason Li wrote:
> +
> +allOf:
> + - $ref: serial.yaml#
> +
> +properties:
> + compatible:
> + const: cortina-access,serial
Aren't writing bindings very clear about that? Please, take your time to
read through the docs, so we will not need to repeat basic guidance. It
is documented there on purpose.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH 3/3] arm64: dts: cortina-access: Add DTS for CA8289 SoC and Venus board
From: Krzysztof Kozlowski @ 2026-06-10 11:49 UTC (permalink / raw)
To: Jason Li, jason.li, Greg Kroah-Hartman, Jiri Slaby
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Catalin Marinas,
Will Deacon, Arnd Bergmann, linux-serial, linux-arm-kernel,
devicetree, linux-kernel
In-Reply-To: <20260610112821.3030099-5-jason.li@cortina-access.com>
On 10/06/2026 13:28, Jason Li wrote:
> Add SoC DTSI for the Cortina-Access CA8289 (Venus) and a board DTS for
> the Venus engineering board. The description covers the minimum set of
> hardware nodes needed to boot a kernel with an INITRD rootfs: CPUs,
> GIC, timer, PSCI, fixed clock and UART.
>
> Signed-off-by: Jason Li <jason.li@cortina-access.com>
> Assisted-by: Claude:claude-opus-4-8
SoB should be the last tag.
Also, it does not match From field.
> ---
> MAINTAINERS | 1 +
> arch/arm64/Kconfig.platforms | 10 ++
> arch/arm64/boot/dts/Makefile | 1 +
> arch/arm64/boot/dts/cortina-access/Makefile | 2 +
> .../dts/cortina-access/ca8289-engboard.dts | 31 +++++
> .../boot/dts/cortina-access/ca8289-soc.dtsi | 118 ++++++++++++++++++
> 6 files changed, 163 insertions(+)
> create mode 100644 arch/arm64/boot/dts/cortina-access/Makefile
> create mode 100644 arch/arm64/boot/dts/cortina-access/ca8289-engboard.dts
> create mode 100644 arch/arm64/boot/dts/cortina-access/ca8289-soc.dtsi
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 515d89d96472..ebfdb9c267cc 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2826,6 +2826,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
> S: Maintained
> F: Documentation/devicetree/bindings/arm/cortina-access.yaml
> F: Documentation/devicetree/bindings/serial/cortina-access,serial.yaml
> +F: arch/arm64/boot/dts/cortina-access/
>
> ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
> M: Hans Ulli Kroll <ulli.kroll@googlemail.com>
> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
> index dc995a732117..ba6dda0660c3 100644
> --- a/arch/arm64/Kconfig.platforms
> +++ b/arch/arm64/Kconfig.platforms
> @@ -134,6 +134,16 @@ config ARCH_CIX
> This enables support for the Cixtech SoC family,
> like P1(sky1).
>
> +config ARCH_CORTINA_ACCESS
> + bool "Cortina-Access SoC Family"
> + select GPIOLIB
> + select PINCTRL
> + help
> + This enables support for Cortina-Access SoCs. The family
> + includes ARMv8-based devices targeting networking and access
> + applications.
> + If you have a Cortina-Access board, say Y here.
> +
> config ARCH_EXYNOS
> bool "Samsung Exynos SoC family"
> select COMMON_CLK_SAMSUNG
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 98ec8f1b76e4..a599f525fb9a 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -16,6 +16,7 @@ subdir-y += broadcom
> subdir-y += bst
> subdir-y += cavium
> subdir-y += cix
> +subdir-y += cortina-access
> subdir-y += exynos
> subdir-y += freescale
> subdir-y += hisilicon
> diff --git a/arch/arm64/boot/dts/cortina-access/Makefile b/arch/arm64/boot/dts/cortina-access/Makefile
> new file mode 100644
> index 000000000000..554893f381fe
> --- /dev/null
> +++ b/arch/arm64/boot/dts/cortina-access/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_CORTINA_ACCESS) += ca8289-engboard.dtb
> diff --git a/arch/arm64/boot/dts/cortina-access/ca8289-engboard.dts b/arch/arm64/boot/dts/cortina-access/ca8289-engboard.dts
> new file mode 100644
> index 000000000000..c8289a0f8269
> --- /dev/null
> +++ b/arch/arm64/boot/dts/cortina-access/ca8289-engboard.dts
> @@ -0,0 +1,31 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Cortina Access Venus Engineering Board
> + *
> + * Copyright (C) 2026, Cortina Access Inc.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "ca8289-soc.dtsi"
> +
> +/ {
> + model = "Cortina Access Venus Engineering Board";
> + compatible = "cortina-access,ca8289-engboard";
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@0 { /* 512MB */
> + device_type = "memory";
> + reg = <0x00000000 0x00000000 0x0 0x20000000>;
> + };
> +};
> diff --git a/arch/arm64/boot/dts/cortina-access/ca8289-soc.dtsi b/arch/arm64/boot/dts/cortina-access/ca8289-soc.dtsi
> new file mode 100644
> index 000000000000..8e7ffcf4ccab
> --- /dev/null
> +++ b/arch/arm64/boot/dts/cortina-access/ca8289-soc.dtsi
> @@ -0,0 +1,118 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for Cortina Access CA8289 SoC
> + *
> + * Copyright (C) 2026, Cortina Access Inc.
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + compatible = "arm,cortex-a55", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
Missing blank lines. Look at existing code how this is supposed to look
like.
> + cpu1: cpu@100 {
> + compatible = "arm,cortex-a55", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x100>;
> + enable-method = "psci";
> + };
> + cpu2: cpu@200 {
> + compatible = "arm,cortex-a55", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x200>;
> + enable-method = "psci";
> + };
> + cpu3: cpu@300 {
> + compatible = "arm,cortex-a55", "arm,armv8";
> + device_type = "cpu";
> + reg = <0x0 0x300>;
> + enable-method = "psci";
> + };
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> + core1 {
> + cpu = <&cpu1>;
> + };
> + core2 {
> + cpu = <&cpu2>;
> + };
> + core3 {
> + cpu = <&cpu3>;
> + };
> + };
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + gic: interrupt-controller@4f8000000 {
And now you repeat basic mistakes:
1. Pointed out by W=1 dtbs_check build
2. Fixed long time in every source
3. Explicitly documented in writing bindings and DTS coding style
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + #redistributor-regions = <1>;
> + reg = <0x00000004 0xF8000000 0 0x10000>,
> + <0x00000004 0xF8040000 0 0x80000>;
Read DTS coding style.
> + };
> +
> + apb_pclk: apb-pclk {
Nope, drop entire node.
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <125000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + /* TrustZone reserved region; must not be mapped by the kernel */
> + tz_pool: tz-buffer@f000000 {
> + reg = <0x0 0x0F000000 0x0 0x1000000>;
> + no-map;
> + };
> + };
> +
> + /* See Documentation/devicetree/bindings/timer/arm,arch_timer.yaml */
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> + clock-frequency = <25000000>;
> + };
> +
> + uart0: serial@f4329188 {
> + device_type = "serial";
> + compatible = "cortina-access,serial";
> + reg = <0x00000000 0xf4329188 0x0 0x30>;
This is AI slop. Whatever Claude convinced you to do, it is nothing like
upstream kernel source.
Best regards,
Krzysztof
^ permalink raw reply
* Re: [PATCH v4 4/5] iio: adc: versal-sysmon: add threshold event support
From: Erim, Salih @ 2026-06-10 11:46 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Jonathan Cameron, Andy Shevchenko, David Lechner, Nuno Sá,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Conall O'Griofa, Michal Simek, Guenter Roeck, Salih Erim,
linux-iio, devicetree, linux-kernel
In-Reply-To: <aihN7O9noqEa5PlA@ashevche-desk.local>
Hi Andy,
On 09/06/2026 18:31, Andy Shevchenko wrote:
> On Sun, Jun 07, 2026 at 10:02:47PM +0100, Erim, Salih wrote:
>> On 07/06/2026 08:31, Andy Shevchenko wrote:
>>> On Sat, Jun 06, 2026 at 06:17:06AM +0100, Salih Erim wrote:
>
> ...
>
>>>> + ret = regmap_read(sysmon->regmap, upper_off, &upper_reg);
>>>> + if (ret)
>>>> + return ret;
>>>> +
>>>> + ret = regmap_read(sysmon->regmap, lower_off, &lower_reg);
>>>> + if (ret)
>>>> + return ret;
>>>
>>> Half of the IO accessors have no error checks, these do.
>>> Why is this inconsistency?
>>
>> The regmap calls in sysmon_unmask_worker and sysmon_iio_irq
>> have no error checks because they run in contexts where errors
>> cannot be propagated (workqueue, hardirq). The init path checks
>> errors because it can return them to the caller. Will add a
>> comment explaining this.
>
> But the error checks may be used to modify flow inside the respective functions.
Accepted. Will add error checks in sysmon_unmask_worker and
sysmon_iio_irq to bail out early on regmap failure instead of
operating on undefined data.
Thanks,
Salih
>
> --
> With Best Regards,
> Andy Shevchenko
>
>
^ permalink raw reply
* Re: [PATCH 1/3] dt-bindings: serial: Add binding for Cortina-Access UART
From: Krzysztof Kozlowski @ 2026-06-10 11:46 UTC (permalink / raw)
To: Jason Li, jason.li, Greg Kroah-Hartman, Jiri Slaby
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Catalin Marinas,
Will Deacon, Arnd Bergmann, linux-serial, linux-arm-kernel,
devicetree, linux-kernel
In-Reply-To: <20260610112821.3030099-3-jason.li@cortina-access.com>
On 10/06/2026 13:28, Jason Li wrote:
> Add DT binding schema for the Cortina-Access UART controller.
> This IP is integrated into most CAXXXX SoC family members.
>
> Also add the vendor prefix for Cortina Access, Inc. and the
> top-level ARM board binding document for the CA8289 (Venus) SoC.
>
> Signed-off-by: Jason Li <jason.li@cortina-access.com>
> Assisted-by: Claude:claude-opus-4-8
> ---
> .../bindings/arm/cortina-access.yaml | 29 ++++++++++++
> .../serial/cortina-access,serial.yaml | 46 +++++++++++++++++++
> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
> MAINTAINERS | 7 +++
This is somehow complete mess. serial and arm together?
Please carefully read submitting patches (both documents!) and don't
send AI-assisted slop.
You must not combine independent works together.
> 4 files changed, 84 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/cortina-access.yaml
> create mode 100644 Documentation/devicetree/bindings/serial/cortina-access,serial.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/cortina-access.yaml b/Documentation/devicetree/bindings/arm/cortina-access.yaml
> new file mode 100644
> index 000000000000..ec0320ed0c0b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/cortina-access.yaml
> @@ -0,0 +1,29 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/cortina-access.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cortina-Access SoC boards
> +
> +maintainers:
> + - Jason Li <jason.li@cortina-access.com>
> +
> +description:
> + Boards based on Cortina-Access ARMv8 SoCs targeting networking and
> + access applications.
> +
> +properties:
> + $nodename:
> + const: /
> + compatible:
> + oneOf:
> + - description: Cortina-Access CA8289 (Venus) engineering board
> + const: cortina-access,ca8289-engboard
> +
> + - description: Cortina-Access CA8289 (Venus) reference board
> + const: cortina-access,ca8289-refboard
Where is the SoC? This looks like very poor contribution. If you opened
any existing recent board binding you would see it is done differently.
Best regards,
Krzysztof
^ permalink raw reply
* [PATCH] arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap
From: Josua Mayer @ 2026-06-10 11:45 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Arnd Bergmann,
Josua Mayer
A 3GB non-prefetchable PCIe bus window can overlap with inbound DMA
addresses for low system RAM, so DMA transactions may be routed to a BAR
on the same host bridge instead of memory.
Change the 32-bit non-prefetchable PCIe window back from 3GB to 1GB on all
controllers, avoiding that overlap while keeping the added 64-bit
prefetchable region.
This partially reverts commit 9ed301397090 ("arm64: dts: lx2160a-rev2:
extend 32-bit and add 64-bit pci regions").
Fixes: 9ed301397090 ("arm64: dts: lx2160a-rev2: extend 32-bit and add 64-bit pci regions")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Closes: https://lore.kernel.org/r/9e6326f6-dad1-4169-a63c-e62ee5b341f2@app.fastmail.com
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi
index 3570399f9b21c..3d2637fee2d35 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi
@@ -17,7 +17,7 @@ &pcie1 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x80 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
- <0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0xc0000000>,
+ <0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x84 0x00000000 0x84 0x00000000 0x04 0x00000000>;
@@ -37,7 +37,7 @@ &pcie2 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x88 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
- <0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0xc0000000>,
+ <0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x8c 0x00000000 0x8c 0x00000000 0x04 0x00000000>;
@@ -57,7 +57,7 @@ &pcie3 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x90 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
- <0x82000000 0x00 0x40000000 0x90 0x40000000 0x00 0xc0000000>,
+ <0x82000000 0x00 0x40000000 0x90 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>;
@@ -78,7 +78,7 @@ &pcie4 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0x98 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
- <0x82000000 0x00 0x40000000 0x98 0x40000000 0x00 0xc0000000>,
+ <0x82000000 0x00 0x40000000 0x98 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0x9c 0x00000000 0x9c 0x00000000 0x04 0x00000000>;
@@ -98,7 +98,7 @@ &pcie5 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0xa0 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
- <0x82000000 0x00 0x40000000 0xa0 0x40000000 0x00 0xc0000000>,
+ <0x82000000 0x00 0x40000000 0xa0 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0xa4 0x00000000 0xa4 0x00000000 0x04 0x00000000>;
@@ -118,7 +118,7 @@ &pcie6 {
ranges = /* 16-Bit IO Window */
<0x81000000 0x00 0x00000000 0xa8 0x00010000 0x00 0x00010000>,
/* 32-Bit - non-prefetchable */
- <0x82000000 0x00 0x40000000 0xa8 0x40000000 0x00 0xc0000000>,
+ <0x82000000 0x00 0x40000000 0xa8 0x40000000 0x00 0x40000000>,
/* 64-Bit - prefetchable - 16GB */
<0xC3000000 0xac 0x00000000 0xac 0x00000000 0x04 0x00000000>;
---
base-commit: c10cfc952215644956284a42fa7b7860dfbcb5f5
change-id: 20260610-lx2160-pcie-fix-ranges-32bit-0868570e495f
Best regards,
--
Josua Mayer <josua@solid-run.com>
^ permalink raw reply related
* [PATCH 5/5] arm64: dts: qcom: talos-evk-som: Fix BT RFA supply name
From: Konrad Dybcio @ 2026-06-10 11:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-0-2e0c953a6c08@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Fix up the supply name to align with bindings.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/talos-evk-som.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
index 294354c034c3..93e08e141dfb 100644
--- a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
@@ -527,7 +527,7 @@ bluetooth {
vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
- vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
+ vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
};
};
--
2.54.0
^ permalink raw reply related
* [PATCH 4/5] arm64: dts: qcom: qcs8300-ride: Fix BT RFA supply name
From: Konrad Dybcio @ 2026-06-10 11:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-0-2e0c953a6c08@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Fix up the supply name to align with bindings.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
index e9a8553a8d82..1ff39530ea3d 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -837,7 +837,7 @@ bluetooth: bluetooth {
vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
- vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
+ vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
};
};
--
2.54.0
^ permalink raw reply related
* [PATCH 3/5] arm64: dts: qcom: sdm632-motorola-ocean: Fix LED default trigger property
From: Konrad Dybcio @ 2026-06-10 11:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-0-2e0c953a6c08@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
The correct property name is "linux,default-trigger", not
"default-trigger". Fix it to avoid DT checker warnings and let the OSes
consume the intended information.
Fixes: 3176c4d6b9be ("arm64: dts: qcom: sdm632: Add device tree for Motorola G7 Power")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts b/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts
index 2f55db0c8ce3..9ea3e5e76bf9 100644
--- a/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts
+++ b/arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts
@@ -130,7 +130,7 @@ led-controller@36 {
led: led@1 {
reg = <1>;
- default-trigger = "backlight";
+ linux,default-trigger = "backlight";
function = LED_FUNCTION_BACKLIGHT;
led-sources = <0 1 2>;
};
--
2.54.0
^ permalink raw reply related
* [PATCH 2/5] arm64: dts: qcom: msm8976-longcheer-l9360: Fix accidental node override
From: Konrad Dybcio @ 2026-06-10 11:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-0-2e0c953a6c08@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
The active and sleep pinctrl states for the touchscreen interrupt pin
shared the same node name, creating a single node, accidentally
overridden immediately after the definition. Alter the names to make
them distinct and to silence DT checker warnings.
Fixes: 79b896e7da7e ("arm64: dts: qcom: msm8976-longcheer-l9360: Add initial device tree")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts b/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts
index 18832a3b9a1c..57f549f06f73 100644
--- a/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts
+++ b/arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts
@@ -455,14 +455,14 @@ sdc2_cd_sleep: sdc2-cd-sleep-state {
bias-disable;
};
- ts_int_default: ts-int-state {
+ ts_int_default: ts-int-default-state {
pins = "gpio65";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- ts_int_sleep: ts-int-state {
+ ts_int_sleep: ts-int-sleep-state {
pins = "gpio65";
function = "gpio";
drive-strength = <2>;
--
2.54.0
^ permalink raw reply related
* [PATCH 1/5] arm64: dts: qcom: msm8998-sony-yoshino: Drop extra bias-disable
From: Konrad Dybcio @ 2026-06-10 11:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
In-Reply-To: <20260610-topic-june26_dts_fixes-v1-0-2e0c953a6c08@oss.qualcomm.com>
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
The msm8998-common i2c5 pin sleep state is defined with a pull-up. The
Sony Yoshino DTSI attempts to override that to bias-disable without
removing the existing bias-pull-up. Remove the override and use the
common definition to resolve a dt checker warning.
The change itself shouldn't have any functional effect, maybe except
a miniscule increase in power usage. The defaults may need revisiting
at a later date either way.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi b/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
index 3650f2501886..04d4741cdb5f 100644
--- a/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
@@ -229,10 +229,6 @@ rmi4-f11@11 {
};
};
-&blsp1_i2c5_sleep {
- bias-disable;
-};
-
&blsp1_uart3 {
status = "okay";
--
2.54.0
^ permalink raw reply related
* [PATCH 0/5] Minor dt warnings fixes
From: Konrad Dybcio @ 2026-06-10 11:43 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, André Apitzsch, Luca Weiss, Gabriela David
Cc: linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
Nothing particularly of note, mechanical fixes
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
Konrad Dybcio (5):
arm64: dts: qcom: msm8998-sony-yoshino: Drop extra bias-disable
arm64: dts: qcom: msm8976-longcheer-l9360: Fix accidental node override
arm64: dts: qcom: sdm632-motorola-ocean: Fix LED default trigger property
arm64: dts: qcom: qcs8300-ride: Fix BT RFA supply name
arm64: dts: qcom: talos-evk-som: Fix BT RFA supply name
arch/arm64/boot/dts/qcom/msm8976-longcheer-l9360.dts | 4 ++--
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi | 4 ----
arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 2 +-
arch/arm64/boot/dts/qcom/sdm632-motorola-ocean.dts | 2 +-
arch/arm64/boot/dts/qcom/talos-evk-som.dtsi | 2 +-
5 files changed, 5 insertions(+), 9 deletions(-)
---
base-commit: 49e02880ec0a8c378e811bc9d85da188d7c6204c
change-id: 20260610-topic-june26_dts_fixes-c32e3cf85fdf
Best regards,
--
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
^ permalink raw reply
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