* Re: [PATCH V17 3/9] iio: imu: inv_icm42607: Add inv_icm42607 Core Driver
From: Chris Morgan @ 2026-07-20 17:15 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Chris Morgan, linux-iio, andy, nuno.sa, dlechner,
jean-baptiste.maneyrol, linux-rockchip, devicetree, heiko,
conor+dt, krzk+dt, robh, andriy.shevchenko
In-Reply-To: <20260719000530.62bad145@jic23-huawei>
On Sun, Jul 19, 2026 at 12:05:30AM +0100, Jonathan Cameron wrote:
> On Thu, 16 Jul 2026 13:26:30 -0500
> Chris Morgan <macroalpha82@gmail.com> wrote:
>
> > From: Chris Morgan <macromorgan@hotmail.com>
> >
> > Add the core component of a new inv_icm42607 driver. This includes
> > a few setup functions and the full register definition in the
> > header file, as well as the bits necessary to compile and probe the
> > device when used on an i2c bus.
> >
> > Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
>
> Hi Chris,
>
> Just one small thing below given you are probably going to do
> a v18. If it had just been this I might have tweaked it whilst
> applying
>
> Thanks,
>
> Jonathan
>
>
> > diff --git a/drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c b/drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c
> > new file mode 100644
> > index 000000000000..8f74bf38aad1
> > --- /dev/null
> > +++ b/drivers/iio/imu/inv_icm42607/inv_icm42607_i2c.c
>
> ...
>
> > +static int inv_icm42607_probe(struct i2c_client *client)
> > +{
> > + struct device *dev = &client->dev;
> > + const struct inv_icm42607_hw *hw;
> > + struct regmap *regmap;
> > +
> > + hw = i2c_get_match_data(client);
> > + if (!hw)
> > + return dev_err_probe(dev, -ENODEV, "Failed to get i2c data\n");
> > +
> > + regmap = devm_regmap_init_i2c(client, &inv_icm42607_regmap_config);
> > + if (IS_ERR(regmap))
> > + return dev_err_probe(dev, PTR_ERR(regmap),
> > + "Failed to register i2c regmap\n");
> > +
> > + return inv_icm42607_core_probe(regmap, hw, inv_icm42607_i2c_bus_setup);
> > +}
> > +
> > +static const struct i2c_device_id inv_icm42607_id[] = {
> > + {
> > + .name = "icm42607",
> > + .driver_data = (kernel_ulong_t)&inv_icm42607_hw_data,
> > + }, {
> > + .name = "icm42607p",
> > + .driver_data = (kernel_ulong_t)&inv_icm42607p_hw_data,
> > + },
> > + { }
> > +};
> > +MODULE_DEVICE_TABLE(i2c, inv_icm42607_id);
> > +
> > +static const struct of_device_id inv_icm42607_of_matches[] = {
> > + {
> > + .compatible = "invensense,icm42607",
>
> I'd expect to see the data here as well. Look at implementation of i2c_get_match_data()
> and consider what would happen if there was a slightly mismatch between which devices
> were listed in each table. To avoid that fragility we normally just put
> the data pointers in both places.
I was advised in the notes for patch v16 that it could be removed. Should I go back and
undo the remove?
Thank you,
Chris
>
> > + }, {
> > + .compatible = "invensense,icm42607p",
> > + },
> > + { }
> > +};
> > +MODULE_DEVICE_TABLE(of, inv_icm42607_of_matches);
>
>
^ permalink raw reply
* Re: [External] [PATCH v5 4/8] riscv_cbqri: Add capacity controller probe and allocation device ops
From: Drew Fustini @ 2026-07-20 17:12 UTC (permalink / raw)
To: yunhui cui
Cc: Adrien Ricciardi, Alexandre Ghiti, Atish Kumar Patra, Atish Patra,
Babu Moger, Ben Horgan, Borislav Petkov, Chen Pei, Conor Dooley,
Conor Dooley, Dave Hansen, Dave Martin, Fenghua Yu, Gong Shuai,
Gong Shuai, guo.wenjia23, James Morse, Kornel Dulęba,
Krzysztof Kozlowski, liu.qingtao2, Liu Zhiwei, Palmer Dabbelt,
Paul Walmsley, Peter Newman, Radim Krčmář,
Reinette Chatre, Rob Herring, Samuel Holland,
Sebastian Andrzej Siewior, Tony Luck, Vasudevan Srinivasan,
Ved Shanbhogue, Weiwei Li, Zhanpeng Zhang, linux-kernel,
linux-riscv, x86, devicetree, linux-rt-devel, linux-doc
In-Reply-To: <CAEEQ3w=9JKswTz9BcxXRvLh-kyN_Rdu3=YUR5Rey2J9UNyd0AA@mail.gmail.com>
On Mon, Jul 20, 2026 at 08:12:28PM +0800, yunhui cui wrote:
> Hi Drew,
>
> On Wed, Jul 15, 2026 at 8:24 AM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Add support for the RISC-V CBQRI capacity controller. A platform driver
> > passes a cbqri_controller_info descriptor together with the cache level
> > to riscv_cbqri_register_cc_dt(), which probes the controller and adds it
> > to the controller list.
> >
> > Assisted-by: Claude:claude-opus-4-8
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > MAINTAINERS | 3 +
> > drivers/resctrl/Kconfig | 13 +
> > drivers/resctrl/Makefile | 3 +
> > drivers/resctrl/cbqri_devices.c | 563 +++++++++++++++++++++++++++++++++++++++
> > drivers/resctrl/cbqri_internal.h | 122 +++++++++
> > include/linux/riscv_cbqri.h | 45 ++++
> > 6 files changed, 749 insertions(+)
[..]
> > +static int cbqri_probe_cc(struct cbqri_controller *ctrl)
> > +{
> > + int err, status;
> > + int ver_major, ver_minor;
> > + u64 reg;
> > +
> > + reg = cbqri_readq(ctrl->base + CBQRI_CC_CAPABILITIES_OFF);
> > + if (reg == 0)
> > + return -ENODEV;
> > +
> > + ver_minor = FIELD_GET(CBQRI_CC_CAPABILITIES_VER_MINOR_MASK, reg);
> > + ver_major = FIELD_GET(CBQRI_CC_CAPABILITIES_VER_MAJOR_MASK, reg);
> > + ctrl->cc.ncblks = FIELD_GET(CBQRI_CC_CAPABILITIES_NCBLKS_MASK, reg);
> > +
> > + pr_debug("version=%d.%d ncblks=%d cache_level=%d\n",
> > + ver_major, ver_minor,
> > + ctrl->cc.ncblks, ctrl->cache.cache_level);
> > +
> > + /*
> > + * NCBLKS == 0 would divide-by-zero in the schemata math while
> > + * ctrl->lock is held.
> > + */
> > + if (!ctrl->cc.ncblks) {
> > + pr_warn("CC at %pa has 0 capacity blocks, skipping\n",
> > + &ctrl->addr);
> > + return -ENODEV;
> > + }
> > +
> > + if (ctrl->cc.ncblks > 32) {
> > + pr_warn("CC at %pa has ncblks=%u > 32 (resctrl CBM is u32), skipping\n",
> > + &ctrl->addr, ctrl->cc.ncblks);
> > + return -ENODEV;
> > + }
>
> Could you add a short comment here, like MPAM does, to note that the
> NCBLKS <= 32 limit comes from resctrl using u32 bitmap configs?
Sure, I will add a comment that the limit comes from resctrl
representing the CBM as a u32.
Thanks,
Drew
^ permalink raw reply
* Re: [External] [PATCH v5 4/8] riscv_cbqri: Add capacity controller probe and allocation device ops
From: Drew Fustini @ 2026-07-20 17:10 UTC (permalink / raw)
To: yunhui cui
Cc: Adrien Ricciardi, Alexandre Ghiti, Atish Kumar Patra, Atish Patra,
Babu Moger, Ben Horgan, Borislav Petkov, Chen Pei, Conor Dooley,
Conor Dooley, Dave Hansen, Dave Martin, Fenghua Yu, Gong Shuai,
Gong Shuai, guo.wenjia23, James Morse, Kornel Dulęba,
Krzysztof Kozlowski, liu.qingtao2, Liu Zhiwei, Palmer Dabbelt,
Paul Walmsley, Peter Newman, Radim Krčmář,
Reinette Chatre, Rob Herring, Samuel Holland,
Sebastian Andrzej Siewior, Tony Luck, Vasudevan Srinivasan,
Ved Shanbhogue, Weiwei Li, Zhanpeng Zhang, linux-kernel,
linux-riscv, x86, devicetree, linux-rt-devel, linux-doc
In-Reply-To: <CAEEQ3w=kVgMnQ8mu=X+d3xYbANT6dNfv7w71BUwmYxP6qcUhgg@mail.gmail.com>
On Mon, Jul 20, 2026 at 05:56:29PM +0800, yunhui cui wrote:
> Hi Drew,
>
> On Wed, Jul 15, 2026 at 8:24 AM Drew Fustini <fustini@kernel.org> wrote:
> >
> > Add support for the RISC-V CBQRI capacity controller. A platform driver
> > passes a cbqri_controller_info descriptor together with the cache level
> > to riscv_cbqri_register_cc_dt(), which probes the controller and adds it
> > to the controller list.
> >
> > Assisted-by: Claude:claude-opus-4-8
> > Co-developed-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Adrien Ricciardi <aricciardi@baylibre.com>
> > Signed-off-by: Drew Fustini <fustini@kernel.org>
> > ---
> > MAINTAINERS | 3 +
> > drivers/resctrl/Kconfig | 13 +
> > drivers/resctrl/Makefile | 3 +
> > drivers/resctrl/cbqri_devices.c | 563 +++++++++++++++++++++++++++++++++++++++
> > drivers/resctrl/cbqri_internal.h | 122 +++++++++
> > include/linux/riscv_cbqri.h | 45 ++++
> > 6 files changed, 749 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index a0a4b41f02c5..064a6ae2823e 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -23365,6 +23365,9 @@ L: linux-riscv@lists.infradead.org
> > S: Supported
> > F: arch/riscv/include/asm/qos.h
> > F: arch/riscv/kernel/qos.c
> > +F: drivers/resctrl/cbqri_devices.c
> > +F: drivers/resctrl/cbqri_internal.h
> > +F: include/linux/riscv_cbqri.h
> >
> > RISC-V RPMI AND MPXY DRIVERS
> > M: Rahul Pathak <rahul@summations.net>
> > diff --git a/drivers/resctrl/Kconfig b/drivers/resctrl/Kconfig
> > index 672abea3b03c..92b9c82cf9f3 100644
> > --- a/drivers/resctrl/Kconfig
> > +++ b/drivers/resctrl/Kconfig
> > @@ -29,3 +29,16 @@ config ARM64_MPAM_RESCTRL_FS
> > default y if ARM64_MPAM_DRIVER && RESCTRL_FS
> > select RESCTRL_RMID_DEPENDS_ON_CLOSID
> > select RESCTRL_ASSIGN_FIXED
> > +
> > +menuconfig RISCV_CBQRI
> > + bool "RISC-V CBQRI support"
> > + depends on RISCV && RISCV_ISA_SSQOSID
> > + help
> > + Capacity and Bandwidth QoS Register Interface (CBQRI) support for
> > + RISC-V cache QoS resources. CBQRI exposes cache capacity
> > + allocation through the resctrl filesystem at /sys/fs/resctrl when
> > + RESCTRL_FS is also enabled.
> > +
> > +if RISCV_CBQRI
> > +
> > +endif
>
> Should this empty if/endif block go in patch [8/8] instead?
Good point. I'll move it to patch 8.
Thanks,
Drew
^ permalink raw reply
* Re: [PATCH v2 0/2] Support for TQMa91xx on MBa93xxCA
From: Frank.Li @ 2026-07-20 17:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Shawn Guo,
Alexander Stein
Cc: Frank Li, devicetree, linux-kernel, imx, linux-arm-kernel, linux
In-Reply-To: <20260713091924.2319674-1-alexander.stein@ew.tq-group.com>
From: Frank Li <Frank.Li@nxp.com>
On Mon, 13 Jul 2026 11:19:20 +0200, Alexander Stein wrote:
> this small series adds support for TQMa91xx, i.MX91 based module, on
> MBa93xxCA. It supports most interfaces similar to TQMa93xx, but LVDS is not
> supported at all. Wake-on-LAN works on both interfaces.
>
> Best regards,
> Alexander
>
> [...]
Applied, thanks!
[1/2] dt-bindings: arm: add MBa93xxCA as mainboard for TQMa91xxCA and TQMa91xxLA SOM
commit: 174b7dfb7dce9017e482c1fb2aa04ed28a141936
[2/2] arm64: dts: add devicetree for TQMa91xx on MBa93xxCA
commit: 4d0d3a3d1993a41b2bf8d28aa6c6071fa1a3bff7
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: (subset) [PATCH v3 4/8] dt-bindings: i3c: cdns: add Axiado AX3005 I3C variant
From: Alexandre Belloni @ 2026-07-20 17:00 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Harshit Shah,
Linus Walleij, Bartosz Golaszewski, Jan Kotas, Michal Simek,
Andi Shyti, Przemysław Gaj, Frank Li, Boris Brezillon,
Greg Kroah-Hartman, Jiri Slaby, Mark Brown, Mathias Nyman,
Swark Yang
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-gpio, linux-i2c,
linux-i3c, linux-serial, linux-spi, linux-usb
In-Reply-To: <20260716-upstream-axiado-ax3005-upstream-v3-4-c429095143ec@axiado.com>
On Thu, 16 Jul 2026 20:51:11 -0700, Swark Yang wrote:
> Add binding for Axiado AX3005 I3C master. So far, no changes
> are known, so it can fall back to the cdns,i3c-master compatible.
Applied, thanks!
[4/8] dt-bindings: i3c: cdns: add Axiado AX3005 I3C variant
https://git.kernel.org/i3c/c/0dbcbd4c0b7a
Best regards,
^ permalink raw reply
* Re: [PATCH v2 4/5] riscv: dts: thead: Add IO labels for the IO expansion on I2C1
From: Drew Fustini @ 2026-07-20 16:56 UTC (permalink / raw)
To: Icenowy Zheng
Cc: Icenowy Zheng, Guo Ren, Fu Wei, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, MoeLeak, Paul Walmsley, Palmer Dabbelt, Albert Ou,
linux-riscv, devicetree, linux-kernel, Emil Renner Berthing
In-Reply-To: <1E3154C2-B5BE-46FD-BBFC-87E56FAE3AFE@icenowy.me>
On Fri, Jul 17, 2026 at 12:11:23PM +0800, Icenowy Zheng wrote:
>
>
> 于 2026年7月17日 GMT+08:00 04:52:19,Drew Fustini <fustini@kernel.org> 写道:
> >On Tue, Jul 14, 2026 at 03:45:14PM +0800, Icenowy Zheng wrote:
> >> From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> >>
> >> Add labels for GPIOs on the IO expansion chip on the I2C1 bus.
> >>
> >> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
> >> [Icenowy: Splitted off the patch adding all 3 IO expansions]
> >> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
> >> ---
> >> arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 8 ++++++++
> >> 1 file changed, 8 insertions(+)
> >>
> >> diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
> >> index 74b120c6b063a..78f5979a56c14 100644
> >> --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
> >> +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
> >> @@ -128,6 +128,14 @@ ioexp2: gpio@18 {
> >> reg = <0x18>;
> >> gpio-controller;
> >> #gpio-cells = <2>;
> >> + gpio-line-names = "",
> >> + "cam0_reset",
> >> + "cam1_reset",
> >> + "cam2_reset",
> >> + "wl_host_wake",
> >
> >I am not sure the line name really matters all that, but it seems that
> >pin 4 is also used as a reset gpio:
>
> The "host" here is subject, which means "this pins is used by the host to wake the wl".
>
> Maybe I should take the schematics name, "wl_host_wake_dev"? Or use another name on the page for Wi-Fi, "wl_reg_on"?
I thnk "wl_host_wake_dev" is slightly better in terms of searching the
PDF [1] and finding the "IO Expansion 2" section. This is minor change
so I can just fix up when applying if you are okay with that.
Thanks,
Drew
[1] https://dl.sipeed.com/shareURL/LICHEE/licheepi4a/02_Schematic
^ permalink raw reply
* Re: [PATCH v1] arm64: dts: imx943-evk: Remove 'supports-clkreq' from PCIe1
From: Frank.Li @ 2026-07-20 16:53 UTC (permalink / raw)
To: robh, krzk+dt, conor+dt, frank.li, s.hauer, festevam,
hongxing.zhu
Cc: Frank Li, kernel, devicetree, imx, linux-arm-kernel, linux-kernel,
Richard Zhu
In-Reply-To: <20260714040518.241871-1-hongxing.zhu@oss.nxp.com>
From: Frank Li <Frank.Li@nxp.com>
On Tue, 14 Jul 2026 12:05:18 +0800, hongxing.zhu@oss.nxp.com wrote:
> Remove the 'supports-clkreq' property from PCIe1 as the standard PCIe
> slot on i.MX943 EVK may not have CLKREQ# signal wired, causing
> compatibility issues with some PCIe cards.
Applied, thanks!
[1/1] arm64: dts: imx943-evk: Remove 'supports-clkreq' from PCIe1
commit: e0e1a9712fb1767dcf5ab69ae47dac2d1a080c3c
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: [PATCH v2 0/4] arm64: dts: imx8qm: collect some small update and fixes
From: Frank.Li @ 2026-07-20 16:53 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Shawn Guo, Frank.Li
Cc: Frank Li, devicetree, imx, linux-arm-kernel, linux-kernel
In-Reply-To: <20260709-qm_dts-v2-0-3ebcce82bb79@nxp.com>
From: Frank Li <Frank.Li@nxp.com>
On Thu, 09 Jul 2026 16:29:42 -0400, Frank.Li@oss.nxp.com wrote:
> Collect some small update and fixes.
Applied, thanks!
[1/4] arm64: dts: imx8qm-ss-dma: add lpuart4 node
commit: d879cc948e6f7046af65c867a496bc9cde1da8ef
[2/4] arm64: dts: imx8qm-ss-audio: add spdif1 node
commit: f57bf4c11d7fa95afaea45a14d91b067406c60f0
[3/4] arm64: dts: imx8qm-ss-lsio: add lsio mu8 and mu8b
commit: 617bcacbf0905d2ac25c1fe6d2ab45afc4f9fc3c
[4/4] arm64: dts: imx8-ss-audio: Fix LPCG clock indices for ASRC0
commit: 8563591f76ca02c1a6fd70ce986df1d0dde8d249
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: [PATCH v10 0/2] Add AMD I3C master controller driver and bindings
From: Alexandre Belloni @ 2026-07-20 16:50 UTC (permalink / raw)
To: git, michal.simek, Frank.Li, robh, krzk+dt, conor+dt, pgaj,
wsa+renesas, tommaso.merciai.xr, arnd, quic_msavaliy,
Shyam-sundar.S-k, sakari.ailus, billy_tsai, kees, gustavoars,
jarkko.nikula, jorge.marques, linux-i3c, devicetree, linux-kernel,
linux-arch, linux-hardening, Shubham Patil
Cc: radhey.shyam.pandey, srinivas.goud, shubhrajyoti.datta
In-Reply-To: <20260709064233.1451482-1-shubhamsanjay.patil@amd.com>
On Thu, 09 Jul 2026 12:12:31 +0530, Shubham Patil wrote:
> This patch series introduces support for the AMD I3C master controller,
> including the device tree binding and driver implementation.
Applied, thanks!
[1/2] dt-bindings: i3c: Add AMD I3C master controller support
https://git.kernel.org/i3c/c/56cffc20a329
[2/2] i3c: master: Add driver for AMD AXI I3C master controller
https://git.kernel.org/i3c/c/7e05871da7ac
Best regards,
^ permalink raw reply
* Re: [PATCH RFC] arm64: dts: allwinner: a523: Add SPDIF to x96qproplus device
From: Per Larsson @ 2026-07-20 16:46 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Jernej Skrabec,
Samuel Holland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/Allwinner sunXi SoC support,
open list:ARM/Allwinner sunXi SoC support, open list
In-Reply-To: <CAGb2v64rRipC9VV5QyHC0nR4rAho8q=wX0ngVVxRND3xMOnofA@mail.gmail.com>
On Mon, 20 Jul 2026 22:59:57 +0800
Chen-Yu Tsai <wens@kernel.org> wrote:
> On Sun, Jul 19, 2026 at 11:10 AM Per Larsson <per@palvencia.se> wrote:
> >
> >
> > Signed-off-by: Per Larsson <per@palvencia.se>
> > ---
> > Marking this as RFC for a few reasons
> > 1. This is my first submission, hoping everything is properly
> > organized.
>
> This is pretty good. The commit message is also well written. I would
> like to see the patch split into two patches though. The first adds
> the pinmux (and you can mention in the commit message that a
> subsequent patch will reference it). The second patch enables SPDIF
> on the device you have.
>
Ok, will split into two patches.
> > 2. My testing setup is not the best: I get sound with this patch,
> > but the pulseaudio daemon needs to be restarted far too often.
> > Hopefully it's just something on this minirootfs. Testing
> > welcome. 3. Not sure where to get the hash for a fixes tag or if
> > that's even OK
>
> This is a new addition, not a fix, so no fixes tag is warranted.
>
Understood.
Also saw that issue #2 in the list above was indeed because of issues in
my rootfs and not because of anything related to the patch, so no more
RFC-markings for next version.
>
> Thanks
> ChenYu
>
> > ---
^ permalink raw reply
* Re: [PATCH 0/4] ARM: dts: imx: small change to fix CHECK_DTBS warnings
From: Frank.Li @ 2026-07-20 16:36 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, Frank.Li
Cc: Frank Li, devicetree, imx, linux-arm-kernel, linux-kernel
In-Reply-To: <20260708-arm_dts_mini-v1-0-11b88825fd1c@nxp.com>
From: Frank Li <Frank.Li@nxp.com>
On Wed, 08 Jul 2026 16:08:29 -0400, Frank.Li@oss.nxp.com wrote:
>
Applied, thanks!
[1/4] ARM: dts: imx6dl-plym2m: change #io-channel-cells to 1 of voltage divider
commit: b8d669c5805736a7664524ec625425111863eec0
[2/4] ARM: dts: imx53-smd: remove undocument property clock-names of ovti,ov5642
commit: aa5c8f1b5ee936661058455480e6e843fdf1d5b7
[3/4] ARM: dts: imx6ul-isiot: remove undocument property clock-names of fsl,sgtl5000
commit: 5af3e703f2604f7a3bc44422c1d30b128aa49f7c
[4/4] ARM: dts: imx6ull-engicam-microgea: remove nand-ecc-strength and nand-ecc-step-size
commit: 12ed4b9ab36a84a5082e13004d799c0d70200382
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: [PATCH v3 phy-next 8/8] phy: lynx-10g: use RCW override procedure for dynamic protocol change
From: Vinod Koul @ 2026-07-20 16:34 UTC (permalink / raw)
To: Vladimir Oltean
Cc: linux-phy, devicetree, linuxppc-dev, linux-arm-kernel,
Ioana Ciornei, Neil Armstrong, Tanjeff Moos,
Christophe Leroy (CS GROUP), Michael Walle, Shawn Guo, Frank Li,
linux-kernel
In-Reply-To: <20260720133642.136324-9-vladimir.oltean@nxp.com>
On 20-07-26, 16:36, Vladimir Oltean wrote:
> Up until this patch, the only protocol change supported was between
> 1000Base-X/SGMII and 2500Base-X. The others require an RCW override
> procedure which was lacking.
>
> Since now the guts driver provides the means of applying this procedure,
> make use of it and remove any comment which mentioned the limitation.
lgtm, is there any dependency. If not I can pick it
--
~Vinod
^ permalink raw reply
* Re: [PATCH 0/5] ARM: dts: ls1021a: dts CHECK_DTBS warning cleanup
From: Frank.Li @ 2026-07-20 16:33 UTC (permalink / raw)
To: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Frank.Li
Cc: Frank Li, linux-arm-kernel, imx, devicetree, linux-kernel,
ioana.ciornei, vladimir.oltean, SZ Lin
In-Reply-To: <20260708-ls-dts-warning-v1-0-5daa24061c31@nxp.com>
From: Frank Li <Frank.Li@nxp.com>
On Wed, 08 Jul 2026 15:26:08 -0400, Frank.Li@oss.nxp.com wrote:
> Collect dts changes to clean up CHECK_DTBS warning.
Applied, thanks!
[1/5] ARM: dts: ls1021a-moxa-uc-8410a: add led suffix to fix CHECK_DTBS warnings
commit: 8381098761d85ec09a838c02827df3b1dca8db6b
[2/5] ARM: dts: ls1021a-twr: add power-supply for lcd panel
commit: 5bd40da5afd7a09a0dfe655b26189197935eb493
[3/5] ARM: dts: ls1021a-moxa-uc-8410a: use compatible string ethernet-phy-ieee802.3-c22
commit: 09ea402c1c2c5f6bf6ef7b0f00045f91b5e8e926
[4/5] ARM: dts: ls1021a-moxa-uc-8410a: replace spansion,s25fl164k with jedec,spi-nor
commit: b5a62376f6f0a3dbf585c9007aa1b196022435f9
[5/5] ARM: dts: ls1021a-moxa-uc-8410a: remove undocument property default-state of gpio-keys
commit: b022b074d615aa04abf3d73ec497c88d7ce09a9d
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: [PATCH v6 1/3] ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode
From: Mohammad Rafi Shaik @ 2026-07-20 16:32 UTC (permalink / raw)
To: sashiko-reviews; +Cc: conor+dt, devicetree, robh
In-Reply-To: <20260720161033.5277A1F000E9@smtp.kernel.org>
On 7/20/2026 9:40 PM, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [Medium] Contradictory array lengths and definitions between `clocks` and `clock-names`, making valid hardware clock combinations fail validation.
> --
>
> --- Patch [1]: [PATCH v6 1/3] ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode ---
> commit cca2bfa9278ee0dba4fe02f999f9bda9ec6f258f
> Author: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
> ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode
>
> This commit extends the qcom,q6apm-lpass-dais device tree binding to explicitly
> describe Digital Audio Interface (DAI) child nodes. It adds address and size
> cells to allow multiple DAI instances and defines a pattern to document per-DAI
> properties like interface IDs and clocks.
>
>> diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml
>> --- a/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml
>> +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml
> [ ... ]
>> + clocks:
>> + minItems: 1
>> + items:
>> + - description: MI2S bit clock
>> + - description: MI2S external bit clock
>> + - description: MI2S master clock
>> +
>> + clock-names:
>> + minItems: 1
>> + items:
>> + - enum: [bclk, eclk, mclk]
>> + - const: mclk
>
> [Severity: Medium]
> Will this cause device tree validation to fail for valid hardware clock
> combinations?
>
> The clocks list defines 3 items, but clock-names defines only 2 items.
> Because dt-schema limits arrays to the size of the items list when defined
> in this way, providing 3 clocks in a device tree will trigger a "too long"
> array error for clock-names.
>
> Additionally, do the array index descriptions mismatch? The clocks array
> defines index 1 as the external bit clock, but clock-names index 1 strictly
> requires "mclk". This would prevent configuring "bclk" and "eclk" together
> if "mclk" is not present.
The sashiko review assumes that bclk and eclk may be used together.
However, the hardware supports either bclk or eclk, optionally with
mclk. A bclk + eclk configuration is not valid hardware usage,so the
reported issue is not applicable to the valid clock configurations.
Thanks & regards,
Rafi
>
^ permalink raw reply
* Re: [PATCH] ARM: dts: aspeed-g6: add pcie-lpc and pcie-kcs4
From: Grégoire Layet @ 2026-07-20 16:31 UTC (permalink / raw)
To: Tan Siewert
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Joel Stanley,
Andrew Jeffery, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
In-Reply-To: <178412588365.243141.16731478852761544781.b4-review@b4>
> > diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > index 56bb3b0444f7..ac351f01048f 100644
> > --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> > @@ -658,6 +658,21 @@ ibt: ibt@140 {
> > };
> > };
> >
> > + pcie_lpc: pcie-lpc@1e789800 {
>
> lpc@1e789000 already maps 0x1e789000-0x1e78a000 and 0x1e789914 falls inside it,
I agree that there is an overlap in address space in my patch.
I will fix this in a new revision.
> so you're describing a second `ast2600-lpc-v2` node which is unnecessary.
>
> Suggestion: Merge pcie_kcs4 into lpc@1e789000 and use 914 as offset. That way
> you don't accidentally cause an overlap for the devices if you describe more in
> the future.
The 'kcs_bmc_aspeed' driver has the kcs channels address hard-coded.
If the 'reg' property does not contain the three addresses used by one
of the four channels, the driver returns -EINVAL.
So having a pcie-kcs4 with regs 0x914, 0x918 and 0x91c doesn't work.
This is why a second LPC node was added, for the pcie-kcs4 to have
regs 0x114, 0x118 and 0x11c;
I know we should write device tree sources based on hardware rather
than around driver limitations.
Changing how the driver behaves seems excessive for supporting KCS over PCIe.
I think a point can be made that the LPC over PCIe is a different LPC bus.
Regards,
Grégoire
^ permalink raw reply
* Re: [PATCH 0/2] ARM: dts: imx: clean up fsl,emi-bus related CHECK_DTBS warnings
From: Frank.Li @ 2026-07-20 16:31 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Frank.Li
Cc: Frank Li, devicetree, linux-kernel, imx, linux-arm-kernel
In-Reply-To: <20260708-imx53-eim-v1-0-913b4559e5b5@nxp.com>
From: Frank Li <Frank.Li@nxp.com>
On Wed, 08 Jul 2026 16:00:43 -0400, Frank.Li@oss.nxp.com wrote:
> i.MX2 use fsl,emi-bus. i.MX5 use fsl,eim-bus. Since it is very very old
> chips. Just leave compatible string as it and allow two kinds name.
Applied, thanks!
[1/2] dt-bindings: soc: imx: Add fsl,eim-bus
commit: b68333c76738be779876f0c619dddd4b0a7ddd50
[2/2] ARM: dts: imx53-ard: change node name eim-cs1 to eim-cs1-bus
commit: 9d40f2a740fd64991919d6f58d741a44f736535e
Best regards,
--
Frank Li <Frank.Li@nxp.com>
^ permalink raw reply
* Re: [PATCH v13 3/3] media: nxp: Add i.MX95 CSI pixel formatter v4l2 driver
From: Laurent Pinchart @ 2026-07-20 16:25 UTC (permalink / raw)
To: guoniu.zhou
Cc: Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
Fabio Estevam, Frank Li, Loic Poulain, Bryan O'Donoghue,
Abel Vesa, Peng Fan, Michael Turquette, Stephen Boyd, imx,
linux-media, devicetree, linux-arm-kernel, linux-kernel,
linux-clk, Guoniu Zhou
In-Reply-To: <20260720-csi_formatter-v13-3-4dc9a80e4cfd@oss.nxp.com>
Hi Guoniu,
On Mon, Jul 20, 2026 at 05:59:48PM +0800, guoniu.zhou@oss.nxp.com wrote:
> From: Guoniu Zhou <guoniu.zhou@nxp.com>
>
> The CSI pixel formatter is a module found on i.MX95 used to reformat
> packet info, pixel and non-pixel data from CSI-2 host controller to
> match Pixel Link(PL) definition.
>
> Add data formatting support.
>
> Signed-off-by: Guoniu Zhou <guoniu.zhou@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> Changes in v13:
> - Replace pr_warn_once() with dev_warn() in csi_formatter_get_index_by_dt()
> to provide device context and warn on every occurrence (Loic)
> - Add WARN_ON() check for csi_formatter_find_format() return value in
> start/stop_stream functions to catch unexpected NULL (Loic)
> - Use regmap_set_bits()/regmap_clear_bits() instead of read-modify-write
> pattern and remove unused csi_formatter_read/write helper functions (Loic)
> - Add Reviewed-by tag from Frank Li
>
> Changes in v12:
> - Fix stream ID handling: iterate routing table instead of assuming
> stream ID equals loop index (0-7)
> - Remove stream_to_vc[] array: derive VC from routing table and frame
> descriptor on each start/stop operation
> - Remove V4L2_SUBDEV_FL_HAS_EVENTS flag since driver does not generate events
> - Support stream IDs 0-63 by using BIT_ULL() for stream masks
> - Add get_frame_desc call in stop_stream with proper error handling
> - Add csi_formatter_read() helper function for register reads
> - Use read-modify-write for CSI_VC_PIXEL_DATA_TYPE register to support
> multiplexed streams sharing the same virtual channel
> - Use route->sink_pad instead of hardcoded CSI_FORMATTER_PAD_SINK
> - Write back coerced format in set_fmt before propagating to source stream
> - Drop Frank's Reviewed-by tag due to significant changes, requesting re-review
>
> Changes in v10:
> - Use u8 for vc in csi_formatter_get_vc() and drop vc < 0 check
> - Add MFD_SYSCON dependency to Kconfig
> - Fix stream/VC mapping potential mismatch in start/stop_stream functions
>
> Changes in v8:
> - Remove fmt field and look up format from subdev state instead
> - Unify function and structure naming to use csi_formatter_ prefix
> - Remove misleading alignment comment from set_fmt function
> - Optimize get_frame_desc to call once per start_stream
> - Replace V4L2_FRAME_DESC_ENTRY_MAX with CSI_FORMATTER_VC_NUM in loops
> - Remove redundant debug message in enable_streams
> - Use MEDIA_PAD_FL_MUST_CONNECT flag instead of manual link check
> - Fix typo: Formater -> Formatter in Kconfig help text
> - Improve grammar in data type index mapping comment
>
> Changes in v7:
> - Update references from imx9 to imx95 for consistency with dt-bindings
> - Enable PM runtime before async registration
>
> Changes in v6:
> - Remove unused header includes
> - Unify macro naming: VCx/VCX -> VC and parameter x -> vc
> - Remove unused format field from csi_formatter struct
> - Use compact initialization for formats array
> - Make find_csi_format() return NULL instead of default format
> - Use unsigned int for array index in find_csi_format()
> - Add err_ prefix to error handling labels
> - Add v4l2_subdev_cleanup() and reorder cleanup sequence
> - Update enable_streams debug output format
> - Rename VC_MAX to VC_NUM and fix boundary check
> - Update CSI formatter Kconfig description
> - Use v4l2_subdev_get_frame_desc_passthrough() helper
> - Fix error paths in async registration and probe
> - Add mutex to protect enabled_streams
> - Switch to devm_pm_runtime_enable()
> - Remove redundant num_routes check in set_routing
> - Optimize get_index_by_dt() and add warning for unsupported type
> - csi_formatter_start/stop_stream: Process all streams in mask
> ---
> MAINTAINERS | 8 +
> drivers/media/platform/nxp/Kconfig | 15 +
> drivers/media/platform/nxp/Makefile | 1 +
> drivers/media/platform/nxp/imx95-csi-formatter.c | 808 +++++++++++++++++++++++
> 4 files changed, 832 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index efbf808063e5..05009228b162 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19275,6 +19275,14 @@ S: Maintained
> F: Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
> F: drivers/media/platform/nxp/imx-jpeg
>
> +NXP i.MX 95 CSI PIXEL FORMATTER V4L2 DRIVER
> +M: Guoniu Zhou <guoniu.zhou@nxp.com>
> +L: imx@lists.linux.dev
> +L: linux-media@vger.kernel.org
> +S: Maintained
> +F: Documentation/devicetree/bindings/media/fsl,imx95-csi-formatter.yaml
> +F: drivers/media/platform/nxp/imx95-csi-formatter.c
> +
> NXP i.MX CLOCK DRIVERS
> M: Abel Vesa <abelvesa@kernel.org>
> R: Peng Fan <peng.fan@nxp.com>
> diff --git a/drivers/media/platform/nxp/Kconfig b/drivers/media/platform/nxp/Kconfig
> index 40e3436669e2..8f49908b0022 100644
> --- a/drivers/media/platform/nxp/Kconfig
> +++ b/drivers/media/platform/nxp/Kconfig
> @@ -28,6 +28,21 @@ config VIDEO_IMX8MQ_MIPI_CSI2
> Video4Linux2 driver for the MIPI CSI-2 receiver found on the i.MX8MQ
> SoC.
>
> +config VIDEO_IMX95_CSI_FORMATTER
> + tristate "NXP i.MX95 CSI Pixel Formatter driver"
> + depends on ARCH_MXC || COMPILE_TEST
> + depends on MFD_SYSCON
Shouldn't this be
select MFD_SYSCON
? There are 40 occurences of "depends on" and 167 of "select".
> + depends on VIDEO_DEV
> + select MEDIA_CONTROLLER
> + select V4L2_FWNODE
> + select VIDEO_V4L2_SUBDEV_API
> + help
> + This driver provides support for the CSI Pixel Formatter found on
> + i.MX95 series SoCs. This module unpacks the pixels received from the
> + CSI-2 interface and reformats them to meet pixel link requirements.
> +
> + Say Y here to enable CSI Pixel Formatter module for i.MX95 SoC.
> +
> config VIDEO_IMX_MIPI_CSIS
> tristate "NXP MIPI CSI-2 CSIS receiver found on i.MX7 and i.MX8 models"
> depends on ARCH_MXC || COMPILE_TEST
> diff --git a/drivers/media/platform/nxp/Makefile b/drivers/media/platform/nxp/Makefile
> index 4d90eb713652..6410115d870e 100644
> --- a/drivers/media/platform/nxp/Makefile
> +++ b/drivers/media/platform/nxp/Makefile
> @@ -6,6 +6,7 @@ obj-y += imx8-isi/
>
> obj-$(CONFIG_VIDEO_IMX7_CSI) += imx7-media-csi.o
> obj-$(CONFIG_VIDEO_IMX8MQ_MIPI_CSI2) += imx8mq-mipi-csi2.o
> +obj-$(CONFIG_VIDEO_IMX95_CSI_FORMATTER) += imx95-csi-formatter.o
> obj-$(CONFIG_VIDEO_IMX_MIPI_CSIS) += imx-mipi-csis.o
> obj-$(CONFIG_VIDEO_IMX_PXP) += imx-pxp.o
> obj-$(CONFIG_VIDEO_MX2_EMMAPRP) += mx2_emmaprp.o
> diff --git a/drivers/media/platform/nxp/imx95-csi-formatter.c b/drivers/media/platform/nxp/imx95-csi-formatter.c
> new file mode 100644
> index 000000000000..b0e8e753e94a
> --- /dev/null
> +++ b/drivers/media/platform/nxp/imx95-csi-formatter.c
> @@ -0,0 +1,808 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2025 NXP
> + */
> +
> +#include <linux/bits.h>
> +#include <linux/clk.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/regmap.h>
> +
> +#include <media/mipi-csi2.h>
> +#include <media/v4l2-ctrls.h>
> +#include <media/v4l2-event.h>
You can drop those two headers.
> +#include <media/v4l2-fwnode.h>
> +#include <media/v4l2-mc.h>
> +#include <media/v4l2-subdev.h>
> +
> +/* CSI Pixel Formatter registers map */
> +
> +#define CSI_VC_INTERLACED_LINE_CNT(vc) (0x00 + (vc) * 0x04)
> +#define INTERLACED_ODD_LINE_CNT_SET(x) FIELD_PREP(GENMASK(13, 0), (x))
> +#define INTERLACED_EVEN_LINE_CNT_SET(x) FIELD_PREP(GENMASK(29, 16), (x))
> +
> +#define CSI_VC_INTERLACED_CTRL 0x20
> +
> +#define CSI_VC_INTERLACED_ERR 0x24
> +#define CSI_VC_ERR_MASK GENMASK(7, 0)
> +#define CSI_VC_ERR(vc) BIT((vc))
> +
> +#define CSI_VC_YUV420_FIRST_LINE_EVEN 0x28
> +#define YUV420_FIRST_LINE_EVEN(vc) BIT((vc))
> +
> +#define CSI_RAW32_CTRL 0x30
> +#define CSI_VC_RAW32_MODE(vc) BIT((vc))
> +#define CSI_VC_RAW32_SWAP_MODE(vc) BIT((vc) + 8)
> +
> +#define CSI_STREAM_FENCING_CTRL 0x34
> +#define CSI_VC_STREAM_FENCING(vc) BIT((vc))
> +#define CSI_VC_STREAM_FENCING_RST(vc) BIT((vc) + 8)
> +
> +#define CSI_STREAM_FENCING_STS 0x38
> +#define CSI_STREAM_FENCING_STS_MASK GENMASK(7, 0)
> +
> +#define CSI_VC_NON_PIXEL_DATA_TYPE(vc) (0x40 + (vc) * 0x04)
> +
> +#define CSI_VC_PIXEL_DATA_CTRL(vc) (0x60 + (vc) * 0x04)
> +#define NEW_VC(vc) FIELD_PREP(GENMASK(3, 1), vc)
> +#define REROUTE_VC_ENABLE BIT(0)
> +
> +#define CSI_VC_ROUTE_PIXEL_DATA_TYPE(vc) (0x80 + (vc) * 0x04)
> +
> +#define CSI_VC_NON_PIXEL_DATA_CTRL(vc) (0xa0 + (vc) * 0x04)
> +
> +#define CSI_VC_PIXEL_DATA_TYPE(vc) (0xc0 + (vc) * 0x04)
> +
> +#define CSI_VC_PIXEL_DATA_TYPE_ERR(vc) (0xe0 + (vc) * 0x04)
> +
> +#define CSI_FORMATTER_PAD_SINK 0
> +#define CSI_FORMATTER_PAD_SOURCE 1
> +#define CSI_FORMATTER_PAD_NUM 2
> +
> +#define CSI_FORMATTER_VC_NUM 8 /* Number of virtual channels */
> +
> +struct csi_formatter_pix_format {
> + u32 code;
> + u32 data_type;
> +};
> +
> +struct csi_formatter {
> + struct device *dev;
> + struct regmap *regs;
> + struct clk *clk;
> +
> + struct v4l2_subdev sd;
> + struct v4l2_subdev *csi_sd;
I would have called this remote_sd to match remote_pad. Up to you. I
would also move the field just before remote_pad to group them.
> + struct v4l2_async_notifier notifier;
> + struct media_pad pads[CSI_FORMATTER_PAD_NUM];
> +
> + u32 remote_pad;
> + u32 reg_offset;
reg_offset is a generic resource, I'd move it just after clk.
> +
> + /* Protects enabled_streams */
The lock and the enabled_streams fields are only used in the
.enable_streams() and .disable_streams(). Both functions are called with
the active state lock taken. You can drop this lock.
> + struct mutex lock;
> + u64 enabled_streams;
> +};
> +
> +struct csi_formatter_dt_index {
> + u8 dtype;
> + u8 index;
> +};
> +
> +/*
> + * The index corresponds to the bit index in the register that enables
> + * the data type of pixel data transported by the Formatter.
> + */
> +static const struct csi_formatter_dt_index formatter_dt_to_index_map[] = {
Let's use the csi_formatter_* prefix consistently everywhere.
> + { .dtype = MIPI_CSI2_DT_YUV420_8B, .index = 0 },
> + { .dtype = MIPI_CSI2_DT_YUV420_8B_LEGACY, .index = 2 },
> + { .dtype = MIPI_CSI2_DT_YUV422_8B, .index = 6 },
> + { .dtype = MIPI_CSI2_DT_RGB444, .index = 8 },
> + { .dtype = MIPI_CSI2_DT_RGB555, .index = 9 },
> + { .dtype = MIPI_CSI2_DT_RGB565, .index = 10 },
> + { .dtype = MIPI_CSI2_DT_RGB666, .index = 11 },
> + { .dtype = MIPI_CSI2_DT_RGB888, .index = 12 },
> + { .dtype = MIPI_CSI2_DT_RAW6, .index = 16 },
> + { .dtype = MIPI_CSI2_DT_RAW7, .index = 17 },
> + { .dtype = MIPI_CSI2_DT_RAW8, .index = 18 },
> + { .dtype = MIPI_CSI2_DT_RAW10, .index = 19 },
> + { .dtype = MIPI_CSI2_DT_RAW12, .index = 20 },
> + { .dtype = MIPI_CSI2_DT_RAW14, .index = 21 },
> + { .dtype = MIPI_CSI2_DT_RAW16, .index = 22 },
> +};
> +
> +static const struct csi_formatter_pix_format formats[] = {
And especially here, the name "formats" is very generic.
> + /* YUV formats */
> + { MEDIA_BUS_FMT_UYVY8_1X16, MIPI_CSI2_DT_YUV422_8B },
> + /* RGB formats */
> + { MEDIA_BUS_FMT_RGB565_1X16, MIPI_CSI2_DT_RGB565 },
> + { MEDIA_BUS_FMT_RGB888_1X24, MIPI_CSI2_DT_RGB888 },
> + /* RAW (Bayer and greyscale) formats */
> + { MEDIA_BUS_FMT_SBGGR8_1X8, MIPI_CSI2_DT_RAW8 },
> + { MEDIA_BUS_FMT_SGBRG8_1X8, MIPI_CSI2_DT_RAW8 },
> + { MEDIA_BUS_FMT_SGRBG8_1X8, MIPI_CSI2_DT_RAW8 },
> + { MEDIA_BUS_FMT_SRGGB8_1X8, MIPI_CSI2_DT_RAW8 },
> + { MEDIA_BUS_FMT_Y8_1X8, MIPI_CSI2_DT_RAW8 },
> + { MEDIA_BUS_FMT_SBGGR10_1X10, MIPI_CSI2_DT_RAW10 },
> + { MEDIA_BUS_FMT_SGBRG10_1X10, MIPI_CSI2_DT_RAW10 },
> + { MEDIA_BUS_FMT_SGRBG10_1X10, MIPI_CSI2_DT_RAW10 },
> + { MEDIA_BUS_FMT_SRGGB10_1X10, MIPI_CSI2_DT_RAW10 },
> + { MEDIA_BUS_FMT_Y10_1X10, MIPI_CSI2_DT_RAW10 },
> + { MEDIA_BUS_FMT_SBGGR12_1X12, MIPI_CSI2_DT_RAW12 },
> + { MEDIA_BUS_FMT_SGBRG12_1X12, MIPI_CSI2_DT_RAW12 },
> + { MEDIA_BUS_FMT_SGRBG12_1X12, MIPI_CSI2_DT_RAW12 },
> + { MEDIA_BUS_FMT_SRGGB12_1X12, MIPI_CSI2_DT_RAW12 },
> + { MEDIA_BUS_FMT_Y12_1X12, MIPI_CSI2_DT_RAW12 },
> + { MEDIA_BUS_FMT_SBGGR14_1X14, MIPI_CSI2_DT_RAW14 },
> + { MEDIA_BUS_FMT_SGBRG14_1X14, MIPI_CSI2_DT_RAW14 },
> + { MEDIA_BUS_FMT_SGRBG14_1X14, MIPI_CSI2_DT_RAW14 },
> + { MEDIA_BUS_FMT_SRGGB14_1X14, MIPI_CSI2_DT_RAW14 },
> + { MEDIA_BUS_FMT_SBGGR16_1X16, MIPI_CSI2_DT_RAW16 },
> + { MEDIA_BUS_FMT_SGBRG16_1X16, MIPI_CSI2_DT_RAW16 },
> + { MEDIA_BUS_FMT_SGRBG16_1X16, MIPI_CSI2_DT_RAW16 },
> + { MEDIA_BUS_FMT_SRGGB16_1X16, MIPI_CSI2_DT_RAW16 },
> +};
> +
> +static const struct v4l2_mbus_framefmt formatter_default_fmt = {
> + .code = MEDIA_BUS_FMT_UYVY8_1X16,
> + .width = 1920U,
> + .height = 1080U,
> + .field = V4L2_FIELD_NONE,
> + .colorspace = V4L2_COLORSPACE_SMPTE170M,
> + .xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SMPTE170M),
> + .ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SMPTE170M),
> + .quantization = V4L2_QUANTIZATION_LIM_RANGE,
> +};
> +
> +static const struct csi_formatter_pix_format *csi_formatter_find_format(u32 code)
> +{
> + unsigned int i;
> +
> + for (i = 0; i < ARRAY_SIZE(formats); i++)
for (i = 0; i < ARRAY_SIZE(formats); i++) {
or possibly even
for (unsigned int i = 0; i < ARRAY_SIZE(formats); i++) {
The local i variables can also be declared in the loop in
csi_formatter_get_index_by_dt() and csi_formatter_get_vc().
> + if (code == formats[i].code)
> + return &formats[i];
}
> +
> + return NULL;
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * V4L2 subdev operations
> + */
> +
> +static inline struct csi_formatter *sd_to_formatter(struct v4l2_subdev *sdev)
> +{
> + return container_of(sdev, struct csi_formatter, sd);
> +}
> +
> +static int __csi_formatter_subdev_set_routing(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *state,
> + struct v4l2_subdev_krouting *routing)
> +{
> + int ret;
> +
> + ret = v4l2_subdev_routing_validate(sd, routing,
> + V4L2_SUBDEV_ROUTING_ONLY_1_TO_1);
> + if (ret)
> + return ret;
> +
> + return v4l2_subdev_set_routing_with_fmt(sd, state, routing,
> + &formatter_default_fmt);
> +}
> +
> +static int csi_formatter_subdev_init_state(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *sd_state)
> +{
> + struct v4l2_subdev_route routes[] = {
> + {
> + .sink_pad = CSI_FORMATTER_PAD_SINK,
> + .sink_stream = 0,
> + .source_pad = CSI_FORMATTER_PAD_SOURCE,
> + .source_stream = 0,
> + .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE,
> + },
> + };
> +
> + struct v4l2_subdev_krouting routing = {
> + .num_routes = ARRAY_SIZE(routes),
> + .routes = routes,
> + };
> +
> + return __csi_formatter_subdev_set_routing(sd, sd_state, &routing);
> +}
> +
> +static int csi_formatter_subdev_enum_mbus_code(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *sd_state,
> + struct v4l2_subdev_mbus_code_enum *code)
> +{
> + if (code->pad == CSI_FORMATTER_PAD_SOURCE) {
> + struct v4l2_mbus_framefmt *fmt;
> +
> + if (code->index > 0)
> + return -EINVAL;
> +
> + fmt = v4l2_subdev_state_get_format(sd_state, code->pad,
> + code->stream);
> + code->code = fmt->code;
> + return 0;
> + }
> +
> + if (code->index >= ARRAY_SIZE(formats))
> + return -EINVAL;
> +
> + code->code = formats[code->index].code;
> +
> + return 0;
> +}
> +
> +static int csi_formatter_subdev_set_fmt(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *sd_state,
> + struct v4l2_subdev_format *sdformat)
> +{
> + struct csi_formatter_pix_format const *format;
> + struct v4l2_mbus_framefmt *fmt;
> +
> + if (sdformat->pad == CSI_FORMATTER_PAD_SOURCE)
> + return v4l2_subdev_get_fmt(sd, sd_state, sdformat);
> +
> + format = csi_formatter_find_format(sdformat->format.code);
> + if (!format)
> + format = &formats[0];
You can write
if (!csi_formatter_find_format(sdformat->format.code))
sdformat->format.code = formats[0].code;
... (*)
> +
> + v4l_bound_align_image(&sdformat->format.width, 1, 0xffff, 2,
> + &sdformat->format.height, 1, 0xffff, 0, 0);
Does the pixel formatter support interlaced formats ? If not I would add
sdformat->format.field = V4L2_FIELD_NONE;
> +
> + fmt = v4l2_subdev_state_get_format(sd_state, sdformat->pad,
> + sdformat->stream);
> + *fmt = sdformat->format;
> +
> + /* Set default code if user set an invalid value */
> + fmt->code = format->code;
> + sdformat->format = *fmt;
(*) ... and drop this, as well as the local format variable. The
sdformat parameter could then be renamed to just format.
> +
> + /* Propagate the format from sink stream to source stream */
> + fmt = v4l2_subdev_state_get_opposite_stream_format(sd_state, sdformat->pad,
> + sdformat->stream);
> + if (!fmt)
> + return -EINVAL;
Can this happen ? If so I'd return -EPIPE, otherwise I would drop the
check.
> +
> + *fmt = sdformat->format;
> +
> + return 0;
> +}
> +
> +static int csi_formatter_subdev_set_routing(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *state,
> + enum v4l2_subdev_format_whence which,
> + struct v4l2_subdev_krouting *routing)
> +{
> + if (which == V4L2_SUBDEV_FORMAT_ACTIVE &&
> + media_entity_is_streaming(&sd->entity))
> + return -EBUSY;
csi_formatter_subdev_set_fmt() needs the same check.
> +
> + return __csi_formatter_subdev_set_routing(sd, state, routing);
> +}
> +
> +static u8 csi_formatter_get_index_by_dt(struct csi_formatter *formatter,
> + u8 data_type)
> +{
> + unsigned int i;
> +
> + for (i = 0; i < ARRAY_SIZE(formatter_dt_to_index_map); ++i) {
> + const struct csi_formatter_dt_index *entry =
> + &formatter_dt_to_index_map[i];
> +
> + if (data_type == entry->dtype)
> + return entry->index;
> + }
> +
> + dev_warn(formatter->dev, "Unsupported data type 0x%x, using default\n",
> + data_type);
As this would be a driver bug (caused by a data type used in formats and
not listed in formatter_dt_to_index_map), I would even use a WARN_ON().
> +
> + return formatter_dt_to_index_map[0].index;
> +}
> +
> +static int csi_formatter_get_vc(struct csi_formatter *formatter,
> + struct v4l2_mbus_frame_desc *fd,
> + unsigned int stream)
> +{
> + struct v4l2_mbus_frame_desc_entry *entry = NULL;
> + unsigned int i;
> + u8 vc;
> +
> + for (i = 0; i < fd->num_entries; ++i) {
> + if (fd->entry[i].stream == stream) {
> + entry = &fd->entry[i];
> + break;
> + }
> + }
> +
> + if (!entry) {
> + dev_err(formatter->dev,
> + "No frame desc entry for stream %u\n", stream);
> + return -EPIPE;
> + }
> +
> + vc = entry->bus.csi2.vc;
> +
> + if (vc >= CSI_FORMATTER_VC_NUM) {
> + dev_err(formatter->dev, "Invalid virtual channel %u\n", vc);
> + return -EINVAL;
I'd go for EPIPE here too to signal something is broken in the pipeline.
EINVAL is used to indicate an invalid parameter passed by userspace.
> + }
> +
> + return vc;
> +}
> +
> +static void csi_formatter_stop_stream(struct csi_formatter *formatter,
> + struct v4l2_subdev_state *state,
> + u64 stream_mask)
> +{
> + const struct csi_formatter_pix_format *pix_fmt;
> + struct v4l2_mbus_frame_desc fd = {};
> + struct v4l2_subdev_route *route;
> + struct v4l2_mbus_framefmt *fmt;
> + unsigned int reg;
> + unsigned int mask;
> + int vc;
> + int ret;
> +
> + ret = v4l2_subdev_call(formatter->csi_sd, pad, get_frame_desc,
> + formatter->remote_pad, &fd);
> + if (ret < 0 && ret != -ENOIOCTLCMD) {
> + dev_err(formatter->dev, "Failed to get frame desc: %d\n", ret);
> + return;
> + }
If you add
/*
* If the source doesn't implement .get_frame_desc(), assume a single
* stream on VC 0. fd is zero-initialized, only set the fields that have
* a non-zero value.
*/
if (ret == -ENOIOCTLCMD) {
fd.type = V4L2_MBUS_FRAME_DESC_TYPE_CSI2;
fd.num_entries = 1;
}
here, ... (*)
> +
> + for_each_active_route(&state->routing, route) {
> + if (route->source_pad != CSI_FORMATTER_PAD_SOURCE)
> + continue;
Can this happen ? There's a single source pad and a single sink pad.
> +
> + if (!(stream_mask & BIT_ULL(route->source_stream)))
> + continue;
> +
> + if (ret == -ENOIOCTLCMD) {
> + /*
> + * Source doesn't implement get_frame_desc, use
> + * default VC 0
> + */
> + vc = 0;
> + } else {
(*) ... you could drop this.
Those comments apply to csi_formatter_start_stream() as well.
> + vc = csi_formatter_get_vc(formatter, &fd,
> + route->sink_stream);
> + if (vc < 0)
> + continue;
> + }
> +
> + fmt = v4l2_subdev_state_get_format(state, route->sink_pad,
> + route->sink_stream);
> +
> + pix_fmt = csi_formatter_find_format(fmt->code);
> + if (WARN_ON(!pix_fmt))
> + continue;
> +
> + reg = CSI_VC_PIXEL_DATA_TYPE(vc) + formatter->reg_offset;
> + mask = BIT(csi_formatter_get_index_by_dt(formatter,
> + pix_fmt->data_type));
> +
> + /* Clear the data type bit to disable this VC */
> + regmap_clear_bits(formatter->regs, reg, mask);
> + }
> +}
> +
> +static int csi_formatter_start_stream(struct csi_formatter *formatter,
> + struct v4l2_subdev_state *state,
> + u64 stream_mask)
> +{
> + const struct csi_formatter_pix_format *pix_fmt;
> + struct v4l2_subdev_route *route;
> + struct v4l2_mbus_framefmt *fmt;
> + struct v4l2_mbus_frame_desc fd = {};
> + u64 configured_streams = 0;
> + unsigned int reg;
> + unsigned int mask;
> + int vc;
> + int ret;
> +
> + ret = v4l2_subdev_call(formatter->csi_sd, pad, get_frame_desc,
> + formatter->remote_pad, &fd);
> + if (ret < 0 && ret != -ENOIOCTLCMD) {
> + dev_err(formatter->dev, "Failed to get frame desc: %d\n", ret);
> + return ret;
> + }
> +
> + for_each_active_route(&state->routing, route) {
> + if (route->source_pad != CSI_FORMATTER_PAD_SOURCE)
> + continue;
> +
> + if (!(stream_mask & BIT_ULL(route->source_stream)))
> + continue;
> +
> + if (ret == -ENOIOCTLCMD) {
> + /*
> + * Source doesn't implement get_frame_desc, use
> + * default VC 0
> + */
> + vc = 0;
> + } else {
> + vc = csi_formatter_get_vc(formatter, &fd,
> + route->sink_stream);
> + if (vc < 0) {
> + ret = vc;
> + goto err_cleanup;
> + }
> + }
> +
> + fmt = v4l2_subdev_state_get_format(state, route->sink_pad,
> + route->sink_stream);
> +
> + pix_fmt = csi_formatter_find_format(fmt->code);
> + if (WARN_ON(!pix_fmt)) {
> + ret = -EINVAL;
> + goto err_cleanup;
> + }
> +
> + reg = CSI_VC_PIXEL_DATA_TYPE(vc) + formatter->reg_offset;
> + mask = BIT(csi_formatter_get_index_by_dt(formatter,
> + pix_fmt->data_type));
> +
> + /* Set the data type bit to enable this VC */
> + regmap_set_bits(formatter->regs, reg, mask);
> +
> + configured_streams |= BIT_ULL(route->source_stream);
> + }
> +
> + return 0;
> +
> +err_cleanup:
> + csi_formatter_stop_stream(formatter, state, configured_streams);
> + return ret;
> +}
> +
> +static int csi_formatter_subdev_enable_streams(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *state,
> + u32 pad, u64 streams_mask)
> +{
> + struct csi_formatter *formatter = sd_to_formatter(sd);
> + struct device *dev = formatter->dev;
> + u64 sink_streams;
> + int ret;
> +
> + sink_streams = v4l2_subdev_state_xlate_streams(state,
> + CSI_FORMATTER_PAD_SOURCE,
> + CSI_FORMATTER_PAD_SINK,
> + &streams_mask);
> + if (!sink_streams || !streams_mask)
> + return -EINVAL;
> +
> + guard(mutex)(&formatter->lock);
> +
> + if (!formatter->enabled_streams) {
> + ret = pm_runtime_resume_and_get(formatter->dev);
> + if (ret < 0) {
> + dev_err(dev, "Failed to resume runtime PM: %d\n", ret);
> + return ret;
> + }
> + }
> +
> + ret = csi_formatter_start_stream(formatter, state, streams_mask);
> + if (ret)
> + goto err_runtime_put;
> +
> + ret = v4l2_subdev_enable_streams(formatter->csi_sd,
> + formatter->remote_pad,
> + sink_streams);
> + if (ret)
> + goto err_stop_stream;
> +
> + formatter->enabled_streams |= streams_mask;
> +
> + return 0;
> +
> +err_stop_stream:
> + csi_formatter_stop_stream(formatter, state, streams_mask);
> +err_runtime_put:
> + if (!formatter->enabled_streams)
> + pm_runtime_put(formatter->dev);
> + return ret;
> +}
> +
> +static int csi_formatter_subdev_disable_streams(struct v4l2_subdev *sd,
> + struct v4l2_subdev_state *state,
> + u32 pad, u64 streams_mask)
> +{
> + struct csi_formatter *formatter = sd_to_formatter(sd);
> + u64 sink_streams;
> + int ret;
> +
> + sink_streams = v4l2_subdev_state_xlate_streams(state,
> + CSI_FORMATTER_PAD_SOURCE,
> + CSI_FORMATTER_PAD_SINK,
> + &streams_mask);
> + if (!sink_streams || !streams_mask)
> + return -EINVAL;
> +
> + guard(mutex)(&formatter->lock);
> +
> + ret = v4l2_subdev_disable_streams(formatter->csi_sd, formatter->remote_pad,
> + sink_streams);
> + if (ret)
> + dev_err(formatter->dev, "Failed to disable streams: %d\n", ret);
> +
> + csi_formatter_stop_stream(formatter, state, streams_mask);
> +
> + formatter->enabled_streams &= ~streams_mask;
> +
> + if (!formatter->enabled_streams)
> + pm_runtime_put(formatter->dev);
> +
> + return ret;
> +}
> +
> +static const struct v4l2_subdev_pad_ops formatter_subdev_pad_ops = {
> + .enum_mbus_code = csi_formatter_subdev_enum_mbus_code,
> + .get_fmt = v4l2_subdev_get_fmt,
> + .set_fmt = csi_formatter_subdev_set_fmt,
> + .get_frame_desc = v4l2_subdev_get_frame_desc_passthrough,
> + .set_routing = csi_formatter_subdev_set_routing,
> + .enable_streams = csi_formatter_subdev_enable_streams,
> + .disable_streams = csi_formatter_subdev_disable_streams,
> +};
> +
> +static const struct v4l2_subdev_ops formatter_subdev_ops = {
> + .pad = &formatter_subdev_pad_ops,
> +};
> +
> +static const struct v4l2_subdev_internal_ops formatter_internal_ops = {
> + .init_state = csi_formatter_subdev_init_state,
> +};
> +
> +/* -----------------------------------------------------------------------------
> + * Media entity operations
> + */
> +
> +static const struct media_entity_operations formatter_entity_ops = {
> + .link_validate = v4l2_subdev_link_validate,
> + .get_fwnode_pad = v4l2_subdev_get_fwnode_pad_1_to_1,
> +};
> +
> +static int csi_formatter_subdev_init(struct csi_formatter *formatter)
> +{
> + struct v4l2_subdev *sd = &formatter->sd;
> + int ret;
> +
> + v4l2_subdev_init(sd, &formatter_subdev_ops);
> +
> + snprintf(sd->name, sizeof(sd->name), "%s", dev_name(formatter->dev));
strscpy() should be enough, no need for snprintf().
> + sd->internal_ops = &formatter_internal_ops;
> +
> + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
> + V4L2_SUBDEV_FL_STREAMS;
> + sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
> + sd->entity.ops = &formatter_entity_ops;
> + sd->dev = formatter->dev;
> +
> + formatter->pads[CSI_FORMATTER_PAD_SINK].flags = MEDIA_PAD_FL_SINK
> + | MEDIA_PAD_FL_MUST_CONNECT;
> + formatter->pads[CSI_FORMATTER_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
> +
> + ret = media_entity_pads_init(&sd->entity, CSI_FORMATTER_PAD_NUM,
> + formatter->pads);
> + if (ret) {
> + dev_err(formatter->dev, "Failed to init pads\n");
> + return ret;
> + }
> +
> + ret = v4l2_subdev_init_finalize(sd);
> + if (ret)
> + media_entity_cleanup(&sd->entity);
> +
> + return ret;
> +}
> +
> +static inline struct csi_formatter *
> +notifier_to_csi_formatter(struct v4l2_async_notifier *n)
> +{
> + return container_of(n, struct csi_formatter, notifier);
> +}
> +
> +static int csi_formatter_notify_bound(struct v4l2_async_notifier *notifier,
> + struct v4l2_subdev *sd,
> + struct v4l2_async_connection *asc)
> +{
> + const unsigned int link_flags = MEDIA_LNK_FL_IMMUTABLE
> + | MEDIA_LNK_FL_ENABLED;
> + struct csi_formatter *formatter = notifier_to_csi_formatter(notifier);
> + struct v4l2_subdev *sdev = &formatter->sd;
> + struct media_pad *sink = &sdev->entity.pads[CSI_FORMATTER_PAD_SINK];
> + struct media_pad *remote_pad;
> + int ret;
> +
> + formatter->csi_sd = sd;
> +
> + dev_dbg(formatter->dev, "Bound subdev: %s pad\n", sd->name);
I recommend dropping this, there's already a debug message in
v4l2_async_match_notify().
> +
> + ret = v4l2_create_fwnode_links_to_pad(sd, sink, link_flags);
> + if (ret < 0)
> + return ret;
> +
> + remote_pad = media_pad_remote_pad_first(sink);
formatter->remote_pad = media_pad_remote_pad_first(sink);
is fine too, and you can drop the local variable.
> + if (!remote_pad) {
> + dev_err(formatter->dev, "Pipe not setup correctly\n");
> + return -EPIPE;
> + }
> + formatter->remote_pad = remote_pad->index;
> +
> + return 0;
> +}
> +
> +static const struct v4l2_async_notifier_operations formatter_notify_ops = {
> + .bound = csi_formatter_notify_bound,
> +};
> +
> +static int csi_formatter_async_register(struct csi_formatter *formatter)
> +{
> + struct device *dev = formatter->dev;
> + struct v4l2_async_connection *asc;
> + int ret;
> +
> + struct fwnode_handle *ep __free(fwnode_handle) =
> + fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 0, 0,
> + FWNODE_GRAPH_ENDPOINT_NEXT);
> + if (!ep)
> + return -ENOTCONN;
> +
> + v4l2_async_subdev_nf_init(&formatter->notifier, &formatter->sd);
> +
> + asc = v4l2_async_nf_add_fwnode_remote(&formatter->notifier, ep,
> + struct v4l2_async_connection);
> + if (IS_ERR(asc)) {
> + ret = PTR_ERR(asc);
> + goto err_cleanup_notifier;
> + }
> +
> + formatter->notifier.ops = &formatter_notify_ops;
> +
> + ret = v4l2_async_nf_register(&formatter->notifier);
> + if (ret)
> + goto err_cleanup_notifier;
> +
> + ret = v4l2_async_register_subdev(&formatter->sd);
> + if (ret)
> + goto err_unregister_notifier;
> +
> + return 0;
> +
> +err_unregister_notifier:
> + v4l2_async_nf_unregister(&formatter->notifier);
> +err_cleanup_notifier:
> + v4l2_async_nf_cleanup(&formatter->notifier);
> + return ret;
> +}
> +
> +static void csi_formatter_async_unregister(struct csi_formatter *formatter)
> +{
> + v4l2_async_unregister_subdev(&formatter->sd);
> + v4l2_async_nf_unregister(&formatter->notifier);
> + v4l2_async_nf_cleanup(&formatter->notifier);
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * Suspend/resume
> + */
> +
> +static int csi_formatter_runtime_suspend(struct device *dev)
> +{
> + struct v4l2_subdev *sd = dev_get_drvdata(dev);
> + struct csi_formatter *formatter = sd_to_formatter(sd);
> +
> + clk_disable_unprepare(formatter->clk);
> +
> + return 0;
> +}
> +
> +static int csi_formatter_runtime_resume(struct device *dev)
> +{
> + struct v4l2_subdev *sd = dev_get_drvdata(dev);
> + struct csi_formatter *formatter = sd_to_formatter(sd);
> +
> + return clk_prepare_enable(formatter->clk);
> +}
> +
> +static DEFINE_RUNTIME_DEV_PM_OPS(csi_formatter_pm_ops,
> + csi_formatter_runtime_suspend,
> + csi_formatter_runtime_resume, NULL);
> +
> +static int csi_formatter_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct csi_formatter *formatter;
> + u32 val;
> + int ret;
> +
> + formatter = devm_kzalloc(dev, sizeof(*formatter), GFP_KERNEL);
> + if (!formatter)
> + return -ENOMEM;
> +
> + formatter->dev = dev;
> +
> + ret = devm_mutex_init(dev, &formatter->lock);
> + if (ret)
> + return ret;
> +
> + formatter->regs = syscon_node_to_regmap(dev->parent->of_node);
> + if (IS_ERR(formatter->regs))
> + return dev_err_probe(dev, PTR_ERR(formatter->regs),
> + "Failed to get csi formatter regmap\n");
> +
> + ret = of_property_read_u32(dev->of_node, "reg", &val);
You can write
ret = of_property_read_u32(dev->of_node, "reg", &formatter->reg_offset);
and drop the val local variable.
> + if (ret < 0)
> + return dev_err_probe(dev, ret,
> + "Failed to get csi formatter reg property\n");
> +
> + formatter->reg_offset = val;
> +
> + formatter->clk = devm_clk_get(dev, NULL);
> + if (IS_ERR(formatter->clk))
> + return dev_err_probe(dev, PTR_ERR(formatter->clk),
> + "Failed to get pixel clock\n");
> +
> + ret = csi_formatter_subdev_init(formatter);
> + if (ret < 0)
> + return dev_err_probe(dev, ret, "Failed to initialize formatter subdev\n");
> +
> + platform_set_drvdata(pdev, &formatter->sd);
Store the formatter pointer, not the subdev pointer, that will save you
three calls to sd_to_formatter().
> +
> + /* Enable runtime PM. */
> + ret = devm_pm_runtime_enable(dev);
Would enabling autosuspend be useful ? It can be done on top.
> + if (ret)
> + goto err_cleanup_subdev;
> +
> + ret = csi_formatter_async_register(formatter);
> + if (ret < 0) {
> + dev_err_probe(dev, ret, "Failed to register async subdevice\n");
> + goto err_cleanup_subdev;
> + }
> +
> + return 0;
> +
> +err_cleanup_subdev:
> + v4l2_subdev_cleanup(&formatter->sd);
> + media_entity_cleanup(&formatter->sd.entity);
> + return ret;
> +}
> +
> +static void csi_formatter_remove(struct platform_device *pdev)
> +{
> + struct v4l2_subdev *sd = platform_get_drvdata(pdev);
> + struct csi_formatter *formatter = sd_to_formatter(sd);
> +
> + csi_formatter_async_unregister(formatter);
> +
> + v4l2_subdev_cleanup(&formatter->sd);
> + media_entity_cleanup(&formatter->sd.entity);
> +}
> +
> +static const struct of_device_id csi_formatter_of_match[] = {
> + { .compatible = "fsl,imx95-csi-formatter" },
> + { /* sentinel */ },
> +};
> +MODULE_DEVICE_TABLE(of, csi_formatter_of_match);
> +
> +static struct platform_driver csi_formatter_device_driver = {
> + .driver = {
> + .name = "csi-pixel-formatter",
> + .of_match_table = csi_formatter_of_match,
> + .pm = pm_ptr(&csi_formatter_pm_ops),
> + },
> + .probe = csi_formatter_probe,
> + .remove = csi_formatter_remove,
> +};
> +
> +module_platform_driver(csi_formatter_device_driver);
> +
> +MODULE_AUTHOR("NXP Semiconductor, Inc.");
> +MODULE_DESCRIPTION("NXP i.MX95 CSI Pixel Formatter driver");
> +MODULE_LICENSE("GPL");
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH v9 03/23] dt-bindings: ufs: mediatek,ufs: Add mt8196 variant
From: Louis-Alexis Eyraud @ 2026-07-20 16:21 UTC (permalink / raw)
To: Rob Herring, Nicolas Frattaroli
Cc: Alim Akhtar, Avri Altman, Bart Van Assche, Krzysztof Kozlowski,
Conor Dooley, Matthias Brugger, AngeloGioacchino Del Regno,
Chunfeng Yun, Vinod Koul, Kishon Vijay Abraham I, Peter Wang,
Stanley Jhu, James E.J. Bottomley, Martin K. Petersen,
Philipp Zabel, Liam Girdwood, Mark Brown, Chaotian Jing,
Neil Armstrong, kernel, linux-scsi, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek, linux-phy, Conor Dooley
In-Reply-To: <CAL_Jsq+mF_Q7Ld8__ZTc5yDvWAT6uK5wxfBJM-YdFjOvdiDc-w@mail.gmail.com>
Hi Rob,
On Tue, 2026-03-10 at 13:10 -0500, Rob Herring wrote:
> On Fri, Mar 6, 2026 at 12:37 PM Nicolas Frattaroli
> <nicolas.frattaroli@collabora.com> wrote:
> >
> > On Friday, 6 March 2026 17:33:05 Central European Standard Time Rob
> > Herring wrote:
> > > On Fri, Mar 06, 2026 at 02:24:44PM +0100, Nicolas Frattaroli
> > > wrote:
> > > > The MediaTek MT8196 SoC's UFS controller uses three additional
> > > > clocks
> > > > compared to the MT8195, and a different set of supplies. It is
> > > > therefore
> > > > not compatible with the MT8195.
> > > >
> > > > While it does have a AVDD09_UFS_1 pin in addition to the
> > > > AVDD09_UFS pin,
> > > > it appears that these two pins are commoned together, as the
> > > > board
> > > > schematic I have access to uses the same supply for both, and
> > > > the
> > > > downstream driver does not distinguish between the two supplies
> > > > either.
> > > >
> > > > Add a compatible for it, and modify the binding
> > > > correspondingly.
> > > >
> > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > Acked-by: Vinod Koul <vkoul@kernel.org>
> > > > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > > > Reviewed-by: AngeloGioacchino Del Regno
> > > > <angelogioacchino.delregno@collabora.com>
> > > > Signed-off-by: Nicolas Frattaroli
> > > > <nicolas.frattaroli@collabora.com>
> > > > ---
> > > > .../devicetree/bindings/ufs/mediatek,ufs.yaml | 58
> > > > +++++++++++++++++++++-
> > > > 1 file changed, 57 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git
> > > > a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > > > b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > > > index e0aef3e5f56b..a82119ecbfe8 100644
> > > > --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > > > +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml
> > > > @@ -16,10 +16,11 @@ properties:
> > > > - mediatek,mt8183-ufshci
> > > > - mediatek,mt8192-ufshci
> > > > - mediatek,mt8195-ufshci
> > > > + - mediatek,mt8196-ufshci
> > > >
> > > > clocks:
> > > > minItems: 1
> > > > - maxItems: 13
> > > > + maxItems: 16
> > > >
> > > > clock-names:
> > > > minItems: 1
> > > > @@ -37,6 +38,9 @@ properties:
> > > > - const: crypt_perf
> > > > - const: ufs_rx_symbol0
> > > > - const: ufs_rx_symbol1
> > > > + - const: ufs_sel
> > >
> > > "ufs" is redundant as all the clocks are for UFS. Same comment on
> > > prior
> > > patch.
> >
> > Is this naming a big enough concern to block this series with two
> > explicit acks on this patch that fixes a wholly broken and useless
> > binding?
>
> Shrug... Is changing it really that hard?
>
Since I'm currently working on rebasing this series and fixing its
remaining open issues (compilation, dt-bindings warnings,...) to send a
new revision, I've looked at the questions you raised.
First, renaming those clocks and all the other starting with "ufs_"
prefix (including the one that is simply named ufs) is indeed easy and
needs just a little rework.
Mostly, a driver patch, as it is currently explicitly using the name of
the 3 ufs_sel clocks and devicetree patches to adapt to this change.
The next series revision will include the devicetree patches for MT8195
SoC and the two boards that integrate this SoC and an UFS storage
(Genio 1200 EVK UFS and Radxa NIO-12L), to fix the warnings that the
dt-binding changes, done by patch 1 (additional clocks, freq-table-hz
deprecation, additional power supplies) in the v9 revision, generate.
> > > > + - const: ufs_sel_min_src
> > > > + - const: ufs_sel_max_src
> > >
> > > "src" sounds like a parent clock? If so, probably shouldn't be in
> > > the
> > > clocks list. 'assigned-clocks' is for dealing with parent clocks.
> > >
> >
> > I don't know what it is, and I have no way to consult any
> > documentation
> > that would tell me what it is. I am trying to put out this dumpster
> > fire
> > of a downstream turd that made its way into mainline as the review
> > process
> > has been completely subverted, and is only getting worse with each
> > passing
> > month that MediaTek is allowed to block this series from
> > progressing while
> > sneaking further changes through.
>
> It's good Mediatek is active, then they can tell us what the clocks
> are for. I would think the driver would give some clue.
>
Second, when searching in the driver code and the git history, it shows
that ufs_sel is indeed a parent clock.
The ufs_sel/ufs_sel_min_src/ufs_sel_max_src clock use in the driver
code was introduced by the commit b7dbc686f60b ("scsi: ufs: ufs-
mediatek: Support clk-scaling to optimize power consumption") to
implement a dynamic clock scaling feature.
ufs_sel is supposed to be the parent clock of the main clock ("ufs" in
dt-bindings) and both ufs_sel_min_src/ufs_sel_max_src the parent of
ufs_sel.
The code switches conditionally the ufs_sel parent to modify the ufs
clock rate (ufs_sel_max_src for maximum performance, ufs_sel_min_src
otherwise).
I've also looked at different downstream kernel trees, the assigned
clocks values for those 3 clocks in the ufshci node in devicetree are
consistent with the clock hierarchy in the MT8196 clock controllers
drivers.
This feature also seems to be linked to another one that added the
clock scaling for the FDE clock (ufs_aes in dt-bindings).
The commit that introduced it is 5e5976f5242d ("scsi: ufs: host:
mediatek: Support FDE (AES) clock scaling") and it also added the 3
undocumented clocks: ufs_fde, ufs_fde_min_src, ufs_fde_max_src.
It is similar to the previous described one.
The current driver code seems to require having the "ufs_fde" clock
(supposed to be the ufs_aes parent clock) in the devicetree, so that
the clock scaling feature for the "ufs_sel" clock is performed and I
did not find why.
So, with this current series dt-bindings patches, ufs clock scaling
feature seems not completely described yet.
There is also the crypto boost feature that make use of the
crypt_mux/crypt_lp/crypt_perf clocks in a similar way.
They were missing from dt-bindings, before this series patches made by
Nicolas to documented them. Angelo also sent a patch two years ago in
that regard ([1]) but did not get picked.
The feature has been introduced by commit 590b0d2372fe ("scsi: ufs-
mediatek: Support performance mode for inline encryption engine")
The crypt_mux clock is also supposed to be the ufs_aes parent clock and
its own parent is switched on need between crypt_lp (low power) and
crypt_perf (performance).
This feature is also depending two undocumented property:
- dvfsrc-vcore-supply: Angelo sent [2] to add it and this current
series forgot to add it too (to be done for v10 ?)
- mediatek,ufs-boost-crypt: vendor specific property to enable this
feature. Angelo sent [3] to remove its need but got reject back then
Note that crypto boost and FDE clock scaling features seem not to be
supposed to be enabled at the same time.
Again, this crypto boost feature seems not completely described yet.
Sorry for the wall of text but I felt it was better to add extra
details regarding all those features and how they relate to each other
to have a more complete answer regarding ufs_sel.
[1]
https://lore.kernel.org/linux-mediatek/20240612074309.50278-8-angelogioacchino.delregno@collabora.com/
[2]
https://lore.kernel.org/linux-mediatek/20240612074309.50278-9-angelogioacchino.delregno@collabora.com/
[3]
https://lore.kernel.org/linux-mediatek/20240612074309.50278-4-angelogioacchino.delregno@collabora.com/
> I don't see how accepting sub-par bindings or not fixes the issues
> here.
So, since all these features rely heavily on optional parent clocks,
that were not documented before being used in driver code, what should
be done to make progress and fix these dt-bindings?
What would you recommend to do in order to resolve those topics?
I'm open for ideas, please.
Best regards,
Louis-Alexis
>
> Rob
^ permalink raw reply
* Re: [PATCH 06/11] dt-bindings: watchdog: apple,wdt: Add t6030 and t6031 compatibles
From: Guenter Roeck @ 2026-07-20 16:17 UTC (permalink / raw)
To: Janne Grunau
Cc: Sven Peter, Neal Gompa, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Thomas Gleixner, Wim Van Sebroeck, Linus Walleij,
Mark Kettenis, Andi Shyti, Uwe Kleine-König,
Sasha Finkelstein, asahi, linux-arm-kernel, devicetree,
linux-kernel, linux-watchdog, linux-gpio, linux-i2c, linux-pwm
In-Reply-To: <20260709-apple-t603x-initial-devices-v1-6-55b305833123@jannau.net>
On Thu, Jul 09, 2026 at 09:30:52AM +0200, Janne Grunau wrote:
> The watchdog on Apple silicon M3 Pro, Max and Ultra SoCs is compatible
> with the t8103 (M1) one. Add "apple,t6030-wdt" for M3 Pro and
> "apple,t6031-wdt" for M3 Max and Ultra as per-SoC compatibles.
>
> Signed-off-by: Janne Grunau <j@jannau.net>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
Applied.
Thanks,
Guenter
^ permalink raw reply
* Re: [PATCH v2] dt-bindings: watchdog: snps,dw-wdt: Add RV1106 compatible
From: Guenter Roeck @ 2026-07-20 16:15 UTC (permalink / raw)
To: Simon Glass
Cc: Wim Van Sebroeck, Conor Dooley, devicetree, linux-rockchip,
linux-watchdog, Krzysztof Kozlowski, Rob Herring, Heiko Stuebner,
Krzysztof Kozlowski, Jamie Iles, linux-arm-kernel, linux-kernel
In-Reply-To: <20260714131856.v2.1.b5339e64b3fe4338b3924ebd9dc0096904699744@changeid>
On Tue, Jul 14, 2026 at 01:18:57PM -0600, Simon Glass wrote:
> Add the compatible for the watchdog of the Rockchip RV1106, which is
> compatible with the Synopsys DesignWare watchdog.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Applied.
Thanks,
Guenter
^ permalink raw reply
* Re: [PATCH v4 3/3] watchdog: npcm: add bootstatus support
From: Guenter Roeck @ 2026-07-20 16:11 UTC (permalink / raw)
To: Tomer Maimon
Cc: andrew, wim, robh, krzk+dt, conor+dt, openbmc, linux-watchdog,
linux-doc, devicetree, linux-kernel, avifishman70, tali.perry1,
venture, yuenn, benjaminfair, corbet, skhan, joel
In-Reply-To: <20260706144828.3517631-4-tmaimon77@gmail.com>
On Mon, Jul 06, 2026 at 05:48:28PM +0300, Tomer Maimon wrote:
> The NPCM750 uses RESSR and the NPCM845 uses INTCR2 to latch reset
> indications. Read those bits during probe and map them into watchdog
> bootstatus flags.
>
> For NPCM845, cache the sampled INTCR2 state in SCRPAD10 after the reset
> status bits are cleared so later probes can report the same boot-time
> state. Also report WDIOF_CARDRESET for the watchdog instance whose reset
> bit is latched, while leaving WPCM450 behavior unchanged.
>
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Applied.
Thanks,
Guenter
^ permalink raw reply
* Re: [PATCH v6 1/3] ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode
From: sashiko-bot @ 2026-07-20 16:10 UTC (permalink / raw)
To: Mohammad Rafi Shaik; +Cc: conor+dt, devicetree, robh
In-Reply-To: <20260720160226.1026440-2-mohammad.rafi.shaik@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Contradictory array lengths and definitions between `clocks` and `clock-names`, making valid hardware clock combinations fail validation.
--
--- Patch [1]: [PATCH v6 1/3] ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode ---
commit cca2bfa9278ee0dba4fe02f999f9bda9ec6f258f
Author: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode
This commit extends the qcom,q6apm-lpass-dais device tree binding to explicitly
describe Digital Audio Interface (DAI) child nodes. It adds address and size
cells to allow multiple DAI instances and defines a pattern to document per-DAI
properties like interface IDs and clocks.
> diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml
> --- a/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml
> +++ b/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml
[ ... ]
> + clocks:
> + minItems: 1
> + items:
> + - description: MI2S bit clock
> + - description: MI2S external bit clock
> + - description: MI2S master clock
> +
> + clock-names:
> + minItems: 1
> + items:
> + - enum: [bclk, eclk, mclk]
> + - const: mclk
[Severity: Medium]
Will this cause device tree validation to fail for valid hardware clock
combinations?
The clocks list defines 3 items, but clock-names defines only 2 items.
Because dt-schema limits arrays to the size of the items list when defined
in this way, providing 3 clocks in a device tree will trigger a "too long"
array error for clock-names.
Additionally, do the array index descriptions mismatch? The clocks array
defines index 1 as the external bit clock, but clock-names index 1 strictly
requires "mclk". This would prevent configuring "bclk" and "eclk" together
if "mclk" is not present.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260720160226.1026440-1-mohammad.rafi.shaik@oss.qualcomm.com?part=1
^ permalink raw reply
* Re: [PATCH v4 2/3] docs: watchdog: npcm: Add reset status description
From: Guenter Roeck @ 2026-07-20 16:10 UTC (permalink / raw)
To: Tomer Maimon
Cc: andrew, wim, robh, krzk+dt, conor+dt, openbmc, linux-watchdog,
linux-doc, devicetree, linux-kernel, avifishman70, tali.perry1,
venture, yuenn, benjaminfair, corbet, skhan, joel
In-Reply-To: <20260706144828.3517631-3-tmaimon77@gmail.com>
On Mon, Jul 06, 2026 at 05:48:27PM +0300, Tomer Maimon wrote:
> Add documentation describing how the NPCM watchdog driver reports reset
> causes through bootstatus on NPCM750 and NPCM845 systems.
>
> Document the reset flag mapping, the watchdog instance mapping for
> WDIOF_CARDRESET, and the NPCM750/NPCM845 latch handling. Also mention
> sysfs bootstatus reporting when watchdog sysfs support is enabled.
>
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Applied.
Thanks,
Guenter
^ permalink raw reply
* Re: [PATCH v4 1/3] dt-bindings: watchdog: npcm: add GCR syscon property
From: Guenter Roeck @ 2026-07-20 16:09 UTC (permalink / raw)
To: Tomer Maimon
Cc: andrew, wim, robh, krzk+dt, conor+dt, openbmc, linux-watchdog,
linux-doc, devicetree, linux-kernel, avifishman70, tali.perry1,
venture, yuenn, benjaminfair, corbet, skhan, joel
In-Reply-To: <20260706144828.3517631-2-tmaimon77@gmail.com>
On Mon, Jul 06, 2026 at 05:48:26PM +0300, Tomer Maimon wrote:
> NPCM750 and NPCM845 latch watchdog reset indications in the SoC
> GCR block rather than in the watchdog block itself.
>
> Add the optional nuvoton,sysgcr phandle so watchdog nodes can
> reference the shared GCR reset-status registers that hold those
> latched watchdog reset indications.
>
> This is needed by the following reset-status support, which reads
> those latches and reports watchdog-caused resets through bootstatus.
>
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
Applied.
Thanks,
Guenter
^ permalink raw reply
* Re: [PATCH v5 04/12] i3c: master: Add support for devices using SETAASA
From: Alexandre Belloni @ 2026-07-20 16:07 UTC (permalink / raw)
To: Akhil R
Cc: frank.li, Frank.Li, conor+dt, devicetree, linux-hwmon, linux-i3c,
robh, sashiko-reviews
In-Reply-To: <20260703090855.1519255-1-akhilrajeev@nvidia.com>
On 03/07/2026 09:08:55+0000, Akhil R wrote:
> On Thu, 25 Jun 2026 07:42:03 -0500 Frank Li wrote:
> > On Thu, Jun 25, 2026 at 09:38:15AM +0000, Akhil R wrote:
> >> On Wed, 24 Jun 2026 13:57:46 -0400, Frank Li wrote:
> >> ...
> >> ...
> >> >> [Severity: High]
> >> >> Is it possible that sending the SETAASA broadcast before direct SETDASA
> >> >> assignments breaks initialization for devices that natively support SETAASA
> >> >> but are configured for SETDASA?
> >> >>
> >> >> According to the I3C specification, any device on the bus natively supporting
> >> >> SETAASA will respond to this broadcast by adopting its static address as its
> >> >> dynamic address.
> >> >>
> >> >> After this broadcast, the driver iterates through devices and attempts to
> >> >> assign custom dynamic addresses via direct SETDASA commands:
> >> >>
> >> >> drivers/i3c/master.c:i3c_master_early_i3c_dev_add() {
> >> >> ...
> >> >> ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
> >> >> i3cdev->boardinfo->init_dyn_addr);
> >> >> ...
> >> >> }
> >> >>
> >> >> Since the target device already adopted its dynamic address during the
> >> >> SETAASA broadcast, it is no longer in the unassigned state and will NACK
> >> >> the subsequent SETDASA command.
> >> >
> >> > Look like correct, but I am not sure if target will NACK SETDASA. Or should
> >> > use SETNEWDA for SETAASA method.
> >>
> >> Yes, this looks valid for mixed device buses. I can move
> >> i3c_master_setaasa_locked() after the SETDASA handling and before
> >> i3c_master_do_daa() in the same function, so SETDASA-assigned devices will
> >> ignore the later SETAASA broadcast. Does that sound good to you?
> >
> > yes, try it to follow spec.
>
> I just noticed that the specification says: if both bits 0 and 1 are set,
> meaning both SETDASA and SETAASA are supported, the I3C Bus Controller should
> use SETDASA first.
>
> So moving i3c_master_setaasa_locked() after SETDASA handling follows the spec.
>
> I will wait a few more days before sending v6, to see if there are any other
> concerns.
No other concerns on my side.
>
> Best Regards,
> Akhil
>
> --
> linux-i3c mailing list
> linux-i3c@lists.infradead.org
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